Philips UAA2077AM Datasheet

INTEGRATED CIRCUITS

DATA SH EET

UAA2077AM

Image rejecting front-end
for DECT applications

Product specification
Supersedes data of 1995 Feb 16
File under Integrated Circuits, IC17

1996 Jul 04

Philips Semiconductors Product specification

Image rejecting front-end
for DECT applications

FEATURES

• Low-noise, wide dynamic range amplifier

• Very low noise figure

• Dual balanced mixer for over 25 dB on-chip image

rejection

• IF I/Q combiner at 110 MHz

• On-chip quadrature network

• RX fast on/off power-down mode

• Shrink small outline packaging

• Very small application (no image filter).

APPLICATIONS

• 1800 MHz front-end for DECT hand-portable
equipment

• Compact digital mobile communication equipment

• TDMA receivers.

GENERAL DESCRIPTION

UAA2077AM contains a high frequency low noise receiver
front-end intended to be used in DECT mobile telephones.
Designed in an advanced BiCMOS process it combines
high performance with low power consumption and a high
degree of integration, thus reducing external component
costs and total front-end size.

The main advantage of the UAA2077AM is its ability to
provide over 25 dB of image rejection. Consequently, the
image filter between the LNA and the mixer is suppressed.

UAA2077AM

Image rejection is achieved in the internal architecture by
two RF mixers in quadrature and two all-pass filters in I
and Q IF channels that phase shift the IF by 45° and 135°
respectively. The two phase shifted IFs are recombined
and buffered to furnish the IF output signal.

For instance, signals presented at the RF input at LO + IF
frequency are rejected through this signal processing
while signals at LO − IF frequency can form the IF signal.
An internal switch enables the upper or lower image
frequency to be rejected.

The receiver section consists of a low-noise amplifier that
drives a quadrature mixer pair. The IF amplifier has
on-chip 45° and 135° phase shifting and a combining
network for image rejection. The IF driver has differential
open-collector type outputs.

The LO part consists of an internal all-pass type phase
shifter to provide quadrature LO signals to the receive
mixers.The centre frequency of the phase shifter is
adjustable for maximum image rejection in a given band.
The all-pass filters outputs are buffered before being fed to
the receive mixers. All RF and IF inputs or outputs are
balanced.

Two pins RXON and SXON are used to control the
different power-down modes. A special mode of operation
called synthesizer-on mode (SX mode), controlled by pin
SXON can be used to minimize the LO pulling when the
receiver is turned on. When SXON is HIGH, all internal
buffers on the LO path are turned on. Pin SBS allows a
selection of whether to reject the upper or lower image
frequency. Special care has been taken for fast power-up
switching.

QUICK REFERENCE DATA

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

V

CC

I

CC(RX)

I

CC(PD)

T

amb

ORDERING INFORMATION

TYPE NUMBER

UAA2077AM SSOP20 plastic shrink small outline package; 20 leads; body width 4.4 mm SOT266-1

1996 Jul 04 2

supply voltage T

receive supply current 21.5 26.5 33.5 mA
supply current in power-down − 0.2 50 µA
operating ambient temperature −30 +25 +85 °C

NAME DESCRIPTION VERSION

= 0 to +70 °C 3.15 4.0 5.3 V

amb

over full temperature range 3.6 4.0 5.3 V

PACKAGE

Philips Semiconductors Product specification

Image rejecting front-end
for DECT applications

BLOCK DIAGRAM

handbook, full pagewidth

V

CCLNA

RFINA
RFINB

LNAGND

V

CCLO

V

QUADLO

n.c. n.c.9SXON12RXON SBS

4 7

3

5
6

8

15

10

LNA

low-noise

amplifier

UAA2077AM

QUADRATURE

PHASE

SHIFTER

o

+45

o

+135

RECEIVE SECTION

LOCAL OSCILLATOR

IF

COMBINER

SECTION

UAA2077AM

11

17

IFA

18

IFB

LOGND

16

1314

LOINBLOINA

MBH154

Fig.1 Block diagram.

1996 Jul 04 3

Philips Semiconductors Product specification

Image rejecting front-end
for DECT applications

PINNING

SYMBOL PIN DESCRIPTION

n.c. 1 not connected
n.c. 2 not connected
V

CCLNA

n.c. 4 not connected
RFINA 5 RF input A (balanced)
RFINB 6 RF input B (balanced)
n.c. 7 not connected
LNAGND 8 ground for LNA and IF parts
SXON 9 SX mode enable (see Table 1)
V

QUADLO

SBS 11 sideband selection
RXON 12 RX mode enable (see Table 1)
LOINB 13 LO input B (balanced)
LOINA 14 LO input A (balanced)
V

CCLO

LOGND 16 ground for LO parts
IFA 17 IF output A (balanced)
IFB 18 IF output B (balanced)
n.c. 19 not connected
n.c. 20 not connected

3 supply voltage for LNA and IF parts

10 input voltage for LO quadrature

trimming

15 supply voltage for LO parts

handbook, halfpage

V

n.c.

1

n.c.

2

V

CCLNA

LNAGND

QUADLO

n.c.
RFINA
RFINB

n.c.

SXON

3
4
5

UAA2077AM

6
7
8
9

10

Fig.2 Pin configuration.

UAA2077AM

20

n.c.
n.c.

19
18

IFB
IFA

17

LOGND

16

V

15

CCLO

14

LOINA

13

LOINB
RXON

12
11

SBS

MBH151

FUNCTIONAL DESCRIPTION
Receive section

The circuit contains a low-noise amplifier followed by two
high dynamic range mixers. These mixers are of the
Gilbert-cell type, the whole internal architecture is fully
differential.

The local oscillator, shifted in phase to 45° and 135°,
mixes the amplified RF to create I and Q channels.
The two I and Q channels are buffered, phase shifted by
45° and 135° respectively, amplified and recombined
internally to realize the image rejection.

Pin SBS allows sideband selection:

• f

LO>fRF

(SBS = 1)

• fLO<fRF (SBS = 0).
where fRF is the frequency of the wanted signal.

1996 Jul 04 4

Balanced signal interfaces are used for minimizing
crosstalk due to package parasitics.

The IF output is differential and of the open-collector type.
Typical application will load the output with a differential
1kΩ load; for example, a 1 kΩ resistor load at each IF
output, plus a differential 2 kΩ load consisting of the input
impedance of the IF filter or the input impedance of the
matching network for the IF filter. The power gain refers to
the available power on this 2 kΩ load. The path to V

CC

for
the DC current should be achieved via tuning inductors.
The output voltage is limited to VCC+3Vbe or 3 diode
forward voltage drops.

Fast switching, on/off, of the receive section is controlled
by the hardware input RXON.

Philips Semiconductors Product specification

Image rejecting front-end
for DECT applications

handbook, full pagewidth

V

CCLNA

RFINA
RFINB

LNA

LNAGND

MIXER

MIXER

LOIN

IF

amplifier

IF

amplifier

+45

+135

UAA2077AM

SBS

o

IFA

IF

COMBINER

IFB

o

MBH152

RXON

Fig.3 Block diagram, receive section.

Local oscillator section

The local oscillator (LO) input directly drives the two
internal all-pass networks to provide quadrature LO to the
receive mixers.

The centre frequency of the receive band is adjustable by
the voltage on pin V
connecting a resistor between V

. This should be achieved by

QUADLO

QUADLO

and VCC. Over
25 dB of image rejection can be obtained by an optimum
resistor value.

A synthesizer-on (SX) mode is used to power-up the LO
input buffers, thus minimizing the pulling effect on the
external VCO when entering receive mode. This mode is
active when SXON = 1.

There are no internal biassing components attached to the
pins LOINA and LOINB. These pins are connected by
capacitors to the internal phase shifting network.

handbook, halfpage

V

QUADLO

to RX

V

CCLO

QUAD

LOGND

MBH153

LOINA

LOINB

Fig.4 Block diagram, LO section.

1996 Jul 04 5