Philips UAA2073M Datasheet

INTEGRATED CIRCUITS

DATA SHEET

UAA2073M

Image rejecting front-end for GSM applications

Product specification

1995 Dec 07

Supersedes data of July 1995

File under Integrated Circuits, IC03

Philips Semiconductors	Product specification

Image rejecting front-end

UAA2073M

for GSM applications

FEATURES

∙Low-noise, wide dynamic range amplifier

∙Very low noise figure

∙Dual balanced mixer for at least 30 dB; on-chip image rejection

∙IF I/Q combination network for 50 to 100 MHz

∙Down-conversion mixer for closed-loop transmitters

∙Independent TX/RX fast on/off power-down modes

∙Very small outline packaging

∙Very small application (no image filter).

APPLICATIONS

∙900 MHz front-end for GSM hand-portable equipment

∙Compact digital mobile communication equipment

∙TDMA receivers.

GENERAL DESCRIPTION

UAA2073M contains both a receiver front-end and a high frequency transmit mixer intended for GSM (Global System for Mobile communications) cellular telephones. Designed in an advanced BiCMOS process it combines high performance with low power consumption and a high degree of integration, thus reducing external component costs and total front-end size.

The main advantage of the UAA2073M is its ability to provide over 30 dB of image rejection. Consequently, the image filter between the LNA and the mixer is suppressed and the duplexer design is eased, compared with a conventional front-end design.

ORDERING INFORMATION

Image rejection is achieved in the internal architecture by two RF mixers in quadrature and two all-pass filters in I and Q IF channels that phase shift the IF by 45° and 135° respectively. The two phase shifted IFs are recombined and buffered to furnish the IF output signal.

For instance, signals presented at the RF input at LO + IF frequency are rejected through this signal processing while signals at LO − IF frequency can form the IF signal. An internal switch allows to reject the upper or lower image frequency. Image rejection is at an optimum when the IF is 71 MHz and local oscillator is above the wanted signal.

The receiver section consists of a low-noise amplifier that drives a quadrature mixer pair. The IF amplifier has on-chip 45° and 135° phase shifting and a combining network for image rejection.The IF driver has differential open-collector type outputs.

The LO part consists of an internal all-pass type phase shifter to provide quadrature LO signals to the receive mixers. The all-pass filters outputs are buffered before been fed to the receive mixers.

The transmit section consists of a down-conversion mixer and a transmit IF driver stage. In the transmit mode an internal LO buffer is used to drive the transmit IF down-conversion mixer.

All RF and IF inputs or outputs are balanced to reduce EMC issues.

Fast power-up switching is possible. A synthesizer-on (synthon) mode enables LO buffers independent of the other circuits. When SYNTHON pin is HIGH, all internal buffers on the LO path of the circuit are turned on, thus minimizing LO pulling when remainder of receive chain is powered-up.

	TYPE NUMBER		PACKAGE
		NAME	DESCRIPTION	VERSION
	UAA2073M	SSOP20	plastic shrink small outline package; 20 leads; body width 4.4 mm	SOT266-1

1995 Dec 07

2

Philips Semiconductors	Product specification

Image rejecting front-end

UAA2073M

for GSM applications

QUICK REFERENCE DATA

Note 1.

SYMBOL	PARAMETER	MIN.	TYP.	MAX.	UNIT
VCC	supply voltage	3.6	3.75	5.3	V
ICC(RX)	receive supply current	21	26	32	mA
ICC(TX)	transmit supply current	9	12	15	mA
NF	noise figure on demonstration board (including matching	−	3.25	4.3	dB
	and PCB losses)
GCP	conversion power gain	20	23	26	dB
IR	image frequency rejection	30	37	−	dB
Tamb	operating ambient temperature	−30	+25	+85	°C

Note

1. For conditions see Chapters “DC characteristics” and “AC characteristics”.

BLOCK DIAGRAM

		n.c.	n.c.					SBS
		2	3		UAA2073M			1
VCC1	4
								20	IFA
	5
RFINA
								IF
	6		LNA
								COMBINER
RFINB
								19	IFB
		low-noise
	7
GND1		amplifier
							RECEIVE SECTION
VCC2	15						TRANSMIT SECTION
RXON	11			RX
	12	CURRENT		TX	QUADRATURE
TXON
	10	REGULATORS		IF	PHASE
SYNTHON					SHIFTER		MIXER
				LO
								14	TXOIFA
GND2	16							13	TXOIFB
		LOCAL OSCILLATOR
			SECTION		18	17	9	8
								MBG794
					LOINA	LOINB	TXINB	TXINA

Fig.1 Block diagram.

1995 Dec 07

3

Philips Semiconductors	Product specification

Image rejecting front-end

UAA2073M

for GSM applications

PINNING

SYMBOL	PIN	DESCRIPTION
SBS	1	sideband selection
n.c.	2	not connected
n.c.	3	not connected
VCC1	4	supply voltage for receive and
		transmit sections
RFINA	5	RF input A (balanced)
RFINB	6	RF input B (balanced)
GND1	7	ground 1 for receive and transmit
		sections
TXINA	8	transmit mixer input A (balanced)
TXINB	9	transmit mixer input B (balanced)
SYNTHON	10	hardware power-on of LO section
		(including buffers to RX and TX)
RXON	11	hardware power-on for receive
		section and LO buffers to RX
TXON	12	hardware power-on for transmit
		section and LO buffers to TX
TXOIFB	13	transmit mixer IF output B
		(balanced)
TXOIFA	14	transmit mixer IF output A
		(balanced)
VCC2	15	supply voltage for LO section
GND2	16	ground 2 for LO section
LOINB	17	LO input B (balanced)
LOINA	18	LO input A (balanced)
IFB	19	IF output B (balanced)
IFA	20	IF output A (balanced)

handbook, halfpage
SBS	1		20	IFA
n.c.				IFB
	2		19
n.c.
	3		18	LOINA
VCC1				LOINB
	4		17
RFINA				GND2
	5	UAA2073M	16
				VCC2
RFINB	6		15
GND1	7		14	TXOIFA
TXINA
	8		13	TXOIFB
				TXON
TXINB	9		12
SYNTHON	10		11	RXON
		MBG793

Fig.2 Pin configuration.

1995 Dec 07

4

Philips Semiconductors	Product specification

Image rejecting front-end

UAA2073M

for GSM applications

FUNCTIONAL DESCRIPTION

Receive section

The circuit contains a low-noise amplifier followed by two high dynamic range mixers. These mixers are of the Gilbert-cell type. The whole internal architecture is fully differential.

The local oscillator, shifted in phase to 45° and 135°, mixes the amplified RF to create I and Q channels. The two I and Q channels are buffered, phase shifted by 45° and 135° respectively, amplified and recombined internally to realize the image rejection.

Pin SBS allows sideband selection:

∙fLO < fRF (SBS = 1)

∙fLO > fRF (SBS = 0).

Balanced signal interfaces are used for minimizing crosstalk due to package parasitics. The RF differential input impedance is 150 Ω (parallel real part), choosen to minimize current consumption at best noise performance.

The IF output is differential and of the open-collector type, tuned for 71 MHz. Typical application will load the output with a differential 500 Ω load; i.e. a 500 Ω resistor load at each IF output, plus a 1 kΩ to x Ω narrow band matching network (x Ω being the input impedance of the IF filter).

The path to VCC for the DC current is achieved via tuning inductors. The output voltage is limited to VCC + 3Vbe or 3 diode forward voltage drops.

Fast switching, on/off, of the receive section is controlled by the hardware input RXON.

handbook, full pagewidth

SBS

		IF	+45o
VCC1	MIXER	amplifier
			IFA
RFINA			IF
RFINB	MIXER		COMBINER
			IFB
	LNA
GND1		IF
		amplifier	+135o
			MBG795
	SYNTHON		RXON
	LOIN

Fig.3 Block diagram, receive section.

1995 Dec 07

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