Philips UAA2073M Datasheet

INTEGRATED CIRCUITS
DATA SH EET
UAA2073M
Image rejecting front-end for GSM applications
Product specification Supersedes data of July 1995 File under Integrated Circuits, IC03
1995 Dec 07
Philips Semiconductors Product specification
Image rejecting front-end for GSM applications
FEATURES
Low-noise, wide dynamic range amplifier
Very low noise figure
Dual balanced mixer for at least 30 dB; on-chip image
rejection
IF I/Q combination network for 50 to 100 MHz
Down-conversion mixer for closed-loop transmitters
Independent TX/RX fast on/off power-down modes
Very small outline packaging
Very small application (no image filter).
APPLICATIONS
900 MHz front-end for GSM hand-portable equipment
Compact digital mobile communication equipment
TDMA receivers.
GENERAL DESCRIPTION
UAA2073M contains both a receiver front-end and a high frequency transmit mixer intended for GSM (Global System for Mobile communications) cellular telephones. Designed in an advanced BiCMOS process it combines high performance with low power consumption and a high degree of integration, thus reducing external component costs and total front-end size.
The main advantage of the UAA2073M is its ability to provide over 30 dB of image rejection. Consequently, the image filter between the LNA and the mixer is suppressed and the duplexer design is eased, compared with a conventional front-end design.
UAA2073M
Image rejection is achieved in the internal architecture by two RF mixers in quadrature and two all-pass filters in I and Q IF channels that phase shift the IF by 45° and 135° respectively. The two phase shifted IFs are recombined and buffered to furnish the IF output signal.
For instance, signals presented at the RF input at LO + IF frequency are rejected through this signal processing while signals at LO IF frequency can form the IF signal. An internal switch allows to reject the upper or lower image frequency. Image rejection is at an optimum when the IF is 71 MHz and local oscillator is above the wanted signal.
The receiver section consists of a low-noise amplifier that drives a quadrature mixer pair. The IF amplifier has on-chip 45° and 135° phase shifting and a combining network for image rejection.The IF driver has differential open-collector type outputs.
The LO part consists of an internal all-pass type phase shifter to provide quadrature LO signals to the receive mixers. The all-pass filters outputs are buffered before been fed to the receive mixers.
The transmit section consists of a down-conversion mixer and a transmit IF driver stage. In the transmit mode an internal LO buffer is used to drive the transmit IF down-conversion mixer.
All RF and IF inputs or outputs are balanced to reduce EMC issues.
Fast power-up switching is possible. A synthesizer-on (synthon) mode enables LO buffers independent of the other circuits. When SYNTHON pin is HIGH, all internal buffers on the LO path of the circuit are turned on, thus minimizing LO pulling when remainder of receive chain is powered-up.
ORDERING INFORMATION
TYPE NUMBER
NAME DESCRIPTION VERSION
UAA2073M SSOP20 plastic shrink small outline package; 20 leads; body width 4.4 mm SOT266-1
1995 Dec 07 2
PACKAGE
Philips Semiconductors Product specification
Image rejecting front-end
UAA2073M
for GSM applications
QUICK REFERENCE DATA
Note 1.
SYMBOL PARAMETER MIN. TYP. MAX. UNIT
V
CC
I
CC(RX)
I
CC(TX)
NF noise figure on demonstration board (including matching
G
CP
IR image frequency rejection 30 37 dB T
amb
Note
1. For conditions see Chapters “DC characteristics” and “AC characteristics”.
BLOCK DIAGRAM
supply voltage 3.6 3.75 5.3 V receive supply current 21 26 32 mA transmit supply current 9 12 15 mA
3.25 4.3 dB
and PCB losses) conversion power gain 20 23 26 dB
operating ambient temperature 30 +25 +85 °C
handbook, full pagewidth
V
CC1
RFINA RFINB
GND1
V
CC2
RXON
TXON
SYNTHON
GND2
n.c. n.c. SBS
4
5 6
7
15
11 12
REGULATORS
10
16
2 3
LNA
low-noise
amplifier
CURRENT
RX TX IF LO
UAA2073M
TRANSMIT SECTION
QUADRATURE
PHASE
SHIFTER
LOCAL OSCILLATOR
SECTION
LOINA
1
IF
COMBINER
RECEIVE SECTION
MIXER
81718
9
TXINATXINBLOINB
20
19
14
13
MBG794
IFA
IFB
TXOIFA TXOIFB
Fig.1 Block diagram.
1995 Dec 07 3
Philips Semiconductors Product specification
Image rejecting front-end for GSM applications
PINNING
SYMBOL PIN DESCRIPTION
SBS 1 sideband selection n.c. 2 not connected n.c. 3 not connected V
CC1
RFINA 5 RF input A (balanced) RFINB 6 RF input B (balanced) GND1 7 ground 1 for receive and transmit
TXINA 8 transmit mixer input A (balanced) TXINB 9 transmit mixer input B (balanced) SYNTHON 10 hardware power-on of LO section
RXON 11 hardware power-on for receive
TXON 12 hardware power-on for transmit
TXOIFB 13 transmit mixer IF output B
TXOIFA 14 transmit mixer IF output A
V
CC2
GND2 16 ground 2 for LO section LOINB 17 LO input B (balanced) LOINA 18 LO input A (balanced) IFB 19 IF output B (balanced) IFA 20 IF output A (balanced)
4 supply voltage for receive and
transmit sections
sections
(including buffers to RX and TX)
section and LO buffers to RX
section and LO buffers to TX
(balanced)
(balanced)
15 supply voltage for LO section
handbook, halfpage
SYNTHON RXON
SBS
1
n.c.
2
n.c.
3
V
4
CC1
RFINA
5
UAA2073M
6
RFINB
7
GND1
TXINA
8 9
TXINB
10
MBG793
Fig.2 Pin configuration.
UAA2073M
20
IFA IFB
19 18
LOINA LOINB
17
GND2
16
V
15
CC2
14
TXOIFA
13
TXOIFB TXON
12 11
1995 Dec 07 4
Philips Semiconductors Product specification
Image rejecting front-end for GSM applications
FUNCTIONAL DESCRIPTION Receive section
The circuit contains a low-noise amplifier followed by two high dynamic range mixers. These mixers are of the Gilbert-cell type. The whole internal architecture is fully differential.
The local oscillator, shifted in phase to 45° and 135°, mixes the amplified RF to create I and Q channels. The two I and Q channels are buffered, phase shifted by 45° and 135° respectively, amplified and recombined internally to realize the image rejection.
Pin SBS allows sideband selection:
f
LO<fRF
fLO>fRF (SBS = 0).
(SBS = 1)
UAA2073M
Balanced signal interfaces are used for minimizing crosstalk due to package parasitics. The RF differential input impedance is 150 (parallel real part), choosen to minimize current consumption at best noise performance.
The IF output is differential and of the open-collector type, tuned for 71 MHz. Typical application will load the output with a differential 500 load; i.e. a 500 resistor load at each IF output, plus a 1 kto x narrow band matching network (x being the input impedance of the IF filter). The path to V inductors. The output voltage is limited to VCC+3Vbe or 3 diode forward voltage drops.
Fast switching, on/off, of the receive section is controlled by the hardware input RXON.
for the DC current is achieved via tuning
CC
handbook, full pagewidth
V
CC1
RFINA RFINB
GND1
LNA
MIXER
MIXER
LOIN
IF
amplifier
IF
amplifier
+45
+135
o
o
RXONSYNTHON
Fig.3 Block diagram, receive section.
SBS
IFA
IF
COMBINER
IFB
MBG795
1995 Dec 07 5
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