Philips TEA1208T Technical data

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TEA1208T
High efficiency DC/DC converter
Product specification 2002 Nov 15
Philips Semiconductors Product specification
FEATURES
Fully integrated DC/DC converter circuit
Up-or-down conversion
Start-up from 1.85 V input voltage
Adjustable output voltage
High efficiency over a wide range of loads
Power handling capability up to 0.42 A continuous
average current
275 kHz switching frequency
Low quiescent power consumption
External clock synchronization
True current limit for Li-ion battery compatibility
Up to 100% duty cycle in down conversion
Undervoltage lockout
Shut-down function
8-pin SO package.
APPLICATIONS
Cellular and cordless phones, Personal Digital Assistants (PDAs) and others
Supply voltage source for low-voltage chip sets
Portable computers
Battery backup supplies
Cameras.
GENERAL DESCRIPTION
The TEA1208T is a fully integrated DC/DC converter. Efficient, compact and dynamic power conversion is achieved using special digital control concepts - Pulse Width Modulation (PWM) and Pulse Frequency Modulation (PFM), integrated low R switches with low parasitic capacitances, and fully synchronous rectification.
The device operates at a switching frequency of 275 kHz requiring only minimum sized external components. Deadlock isprevented by an on-chip undervoltage lockout circuit.
Efficient behaviour during short load peaks and compatibility with Li-ion batteries is guaranteed by an accurate current limiting function.
CMOS power
DSon
ORDERING INFORMATION
TYPE NUMBER
NAME DESCRIPTION VERSION
TEA1208T SO8 plastic small outline package; 8 leads; body width 3.9 mm SOT96-1
PACKAGE
2002 Nov 15 2
Philips Semiconductors Product specification
QUICK REFERENCE DATA
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
Voltage levels
UP CONVERSION; pin U/D = LOW V
I
V
O
V
I(start)
input voltage V output voltage 2.80 5.50 V
start-up input voltage IL< 62 mA 1.40 1.60 1.85 V DOWN CONVERSION; pin U/D = HIGH V
I
V
O
ENERAL
G V
fb
input voltage 2.80 5.50 V
output voltage 1.30 5.50 V
feedback voltage 1.19 1.24 1.29 V
Current levels
I
q
I
shdwn
I
LX
I
lim
quiescent current on pin 3 down conversion;
current in shut-down state 210µA
maximum continuous current on pin 4 T
current limit deviation I
Power MOSFETs
R
DSon
drain-to-source on-state resistance
N-type 0.10 0.20 0.30 P-type 0.10 0.22 0.35
Efficiency
η
1
η
2
efficiency up conversion VI= 3.6 V; VO= 4.6 V;
efficiency down conversion VI= 3.6 V; VO= 2.0 V;
Timing
f
sw
f
sync
t
res
switching frequency PWM mode 220 275 330 kHz
synchronization clock input frequency 4 6.5 20 MHz
response time from standby to P
I(start)
52 65 72 µA
VI= 3.6 V
=80°C −−0.30 A
amb
= 0.5 to 2.5 A
lim
up conversion 17.5 +17.5 % down conversion 17.5 +17.5 %
L1 = 10 µH
I
=1mA 88 %
L
I
= 200 mA 95 %
L
L1 = 10 µH
=1mA 86 %
I
L
I
= 200 mA 93 %
L
50 −µs
0(max)
5.50 V
2002 Nov 15 3
Philips Semiconductors Product specification
High efficiency DC/DC converter TEA1208T
BLOCK DIAGRAM
dbook, full pagewidth
UPOUT/DNIN
3
P-type POWER FET
SUPPLY
INTERNAL
sense FET
TEA1208T
CIRCUIT
START-UP
FB
7
AND
CONTROL LOGIC
MCE155
BAND GAP
REFERENCE
TIME
COUNTER
DIGITAL CONTROLLER
MODE GEARBOX
SHDWN
5681
GATE
SYNC
SYNC U/D
Fig.1 Block diagram.
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2002 Nov 15 4
CURRENT LIMIT
I/V
CONVERTER
4
LX
2
ILIM
COMPARATORS
TEMPERATURE
I/V
CONVERTER
N-type
POWER
PROTECTION
FET
sense
FET
13 MHz
OSCILLATOR
GND
Philips Semiconductors Product specification
PINNING
SYMBOL PIN DESCRIPTION
U/D 1 up-or-down conversion
selection input; active LOW for up conversion
ILIM 2 current limiting resistor
connection
UPOUT/DNIN 3 output voltage in up conversion;
input voltage in down
conversion LX 4 inductor connection SYNC 5 synchronization clock input GND 6 ground FB 7 feedback input SHDWN 8 shut-down input
handbook, halfpage
UPOUT/DNIN GND
1
U/D SHDWN
2
ILIM FB
TEA1208T
3 4
LX SYNC
8 7 6 5
MCE154
Fig.2 Pin configuration.
FUNCTIONAL DESCRIPTION Control mechanism
The TEA1208T DC/DC converter is able to operate in either PFM (discontinuous conduction) or PWM (continuous conduction) mode. All switching actions are completely determined by a digital control circuit which uses the output voltage level as its control input. This special design enables the use of a pulse width and frequency modulation scheme, which ensures optimum power efficiency over the complete operating range of the converter.
Whenhigh outputpower is requested,the deviceoperates in PWM (continuous conduction) mode. This results in minimumAC currentsinthe circuitcomponentsand hence optimumefficiency, minimumcosts and lowEMC. InPWM mode, the output voltage is allowed to vary between a window represented by two predefined voltage levels. As long as the output voltage stays within this window, switching continues in a fixed pattern. When the output voltage reaches a window border, the digital controller immediately adjusts the pulse width and inserts a current stepso that theoutputvoltagestays within thewindowwith higher or lower current capability. This approach enables very fast reaction to load variations. Figure 3 shows the converter’s response to a sudden load increase. The upper trace shows the output voltage. The ripple on top of the DC level is a result of the current in the output capacitor, which changes sign twice per cycle, times the capacitor’s internal Equivalent Series Resistance (ESR). Aftereach ramp-down oftheinductor current, i.e.whenthe ESR effect increases the output voltage, the converter determines what to do in the next cycle.
As soon as more load current is taken from the output the output voltage starts to decay.
When theoutput voltage becomes lower than the low limit ofthe window,it is correctedby extendingthe period ofthe inductor current ramp-up time. As a result, the DC current level is increased and normal PWM control can continue. The output voltage (including ESR effect) is again within the predefined window. Figure 4 depicts the spread of the output voltage window. The absolute value is most dependent on spread, while the actual window size is not affected. For a given device, the output voltage will not vary more than 2% typically.
In low output power situations, the TEA1208T will switch over to PFM (discontinuous conduction) operating mode. In this mode, regulation information obtained in previous PWM operating modes is used. This results in optimum inductor peak current levels in the PFM mode, which are slightly larger than the inductor ripple current in the PWM mode. As a result, the transition between PFM and PWM mode is optimum under all circumstances. In the PFM mode the TEA1208T regulates the output voltage to the high window limit as shown in Fig.3.
Synchronous rectification
For optimum efficiency over the whole load range, synchronous rectifiers inside the TEA1208T ensure that during the whole second switching phase, all inductor current will flow through the low-ohmic power MOSFETs. Special circuitry isincluded whichdetects thatthe inductor current reaches zero. Following this detection, the digital controller switches off the power MOSFET and starts regulation.
2002 Nov 15 5
Philips Semiconductors Product specification
Start-up
Start-upfrom lowinput voltage in up conversionis realized by an independent start-up oscillator, which starts switching the N-type power MOSFET as soon as the voltage at pin UPOUT/DNIN ismeasured tobe sufficiently high. The switch actions of the start-up oscillator will increase the output voltage.As soonas theoutput voltage is high enough for normal regulation, the digital control system takes over the control of the power MOSFETs.
Undervoltage lockout
As a result of too high a load or disconnection of the input power source, the output voltage can drop so low that normal regulation cannot be guaranteed. In this case, the device switches back to start-up mode. If the output voltage drops even further, switching stops completely.
Shut-down
When the shut-down input is made HIGH, the converter disables both power switches reducing the power consumption to a few microamperes.
Power switches
The device has two power switches - one N-type and one P-type power MOSFET, having a typical drain-to-source resistance of 0.20 and 0.22 respectively. The maximum average current in the power switches is
0.30 A at T
amb
=80°C.
Temperature protection
In PWM mode, the device will stop operating if the die temperature is too high (typically 175 °C). Operation resumes when the die temperature falls below 175 °C. As a result, low-frequency cycling between the on and off state will occur. Note that if the temperature of the device approaches T
, the actual maximum parameter limits
max
may be very different from those specified.
Current limiters
If the current inone ofthe powerswitches exceeds its limit in the PWM mode, the current ramp is stopped immediately, and the next switching phase is entered. Currentlimiting isrequired to enable optimal useof energy in Li-ion batteries, and to keep power conversion efficient during temporaryhigh loads. Furthermore, current limiting protects the IC against overload conditions, inductor saturation, etc. The current limiting level is set by an external resistor.
External synchronization
If an external high-frequency clock is applied to the synchronization clock input, the switching frequency in PWM mode will be exactly that frequency divided by 22. In thePFM mode, theswitching frequency isalwayslower. The quiescent current of the device increases when external clock pulses are applied. When no external synchronization is necessary, the synchronization clock input must be connected to ground level.
Behaviour at input voltage exceeding the specified range
In general, an input voltage exceeding thespecified range isnot recommendedsince instability mayoccur. Thereare two exceptions:
Upconversion: atan input voltage higher thanthe target output voltage, but up to 6 V, the converter will stop switchingand the internalP-type power MOSFETwillbe conducting. The output voltage will equal the input voltage minus some resistive voltage drop. The current limiting function is not active.
Down conversion: when the input voltage is lower than the target output voltage, but higher than 2.8 V, the P-type power MOSFET will stay conducting resulting in an output voltage being equal to the input voltage minus some resistive voltage drop. The current limiting function remains active.
2002 Nov 15 6
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