Philips TEA1207UK Technical data

查询TEA1207UK供应商

INTEGRATED CIRCUITS

DATA SH EET

TEA1207UK

High efficiency DC/DC converter
Chip Scale package

Product specification 2002 Jul 03

Philips Semiconductors Product specification

High efficiency DC/DC converter Chip
Scale package

FEATURES

• Fully integrated DC/DC converter circuit

• Up-or-down conversion

• Start-up from 1.85 V input voltage

• Adjustable output voltage

• High efficiency over large load range

• Power handling capability up to 0.85 A continuous

average current

• 275 kHz switching frequency

• Low quiescent power consumption

• Synchronizing with external clock

• True current limit for Li-ion battery compatibility

• Up to 100% duty cycle in down mode

• Undervoltage lockout

• Shut-down function

• 2 × 2 mm footprint chip scale package.

TEA1207UK

GENERAL DESCRIPTION

The TEA1207UK is a fully integrated DC/DC converter.
Efficient, compact and dynamic power conversion is
achievedusinganoveldigitallycontrolledconceptsuchas
Pulse Width Modulation (PWM) or Pulse Frequency
Modulation (PFM), integrated low R
switches with low parasitic capacitances, and fully
synchronous rectification.

The device operates at a 275 kHz switching frequency
which enables the use of external components with
minimum size. Deadlock is prevented by an on-chip
undervoltage lockout circuit.

Efficient behaviour during short load peaks and
compatibility with Li-ion batteries is guaranteed by an
accurate current limiting function.

CMOS power

DSon

APPLICATIONS

• Cellular and cordless phones, Personal Digital
Assistants (PDAs) and others

• Supply voltage source for low-voltage chip sets

• Portable computers

• Battery backup supplies

• Cameras.

ORDERING INFORMATION

PACKAGE

TYPE NUMBER

NAME DESCRIPTION VERSION

TEA1207UK LFBGA8 plastic low profile fine-pitch ball grid array package;

8 balls; body 2 × 2 × 0.46 mm

−

2002 Jul 03 2

Philips Semiconductors Product specification

High efficiency DC/DC converter Chip

TEA1207UK

Scale package

QUICK REFERENCE DATA

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

Voltage levels

UPCONVERSION; BALL U/D=LOW
V

I

V

O

V

I(start)

input voltage V
output voltage 2.80 − 5.50 V

start-up input voltage IL< 125 mA 1.40 1.60 1.85 V
DOWNCONVERSION; BALL U/D = HIGH
V

I

V

O

input voltage 2.80 − 5.50 V

output voltage 1.30 − 5.50 V
GENERAL
V

fb

feedback voltage 1.19 1.24 1.29 V

Current levels

I

q

I

shdwn

I

LX

quiescent current on ball A1 down mode; VI=3.6V 526572µA

current in shut-down state − 210µA

maximum continuous current on

ball A2
∆I

lim

current limiting deviation I

Power MOSFETs

R

DSon

drain-to-source on-state resistance

N-type 0.10 0.20 0.30 Ω
P-type 0.10 0.22 0.35 Ω

Efficiency

η1 efficiency upconversion V

η2 efficiency downconversion V

Timing

f

sw

f

sync

t

res

switching frequency PWM mode 220 275 330 kHz

synchronization clock input frequency 4 6.5 20 MHz

response time from standby to P

T

=60°C −−0.85 A

amb

= 0.5 to 5 A

lim

up mode −17.5 − +17.5 %
down mode −17.5 − +17.5 %

= 3.6 V; VO= 4.6 V;

I

L1 = 10 µH

I

=1mA − 88 − %

L

I

= 200 mA − 95 − %

L

= 1 A; pulsed − 83 − %

I

L

= 3.6 V; VO= 2.0 V;

I

L1 = 10 µH

I

=1mA − 86 − %

L

I

= 200 mA − 93 − %

L

= 1 A; pulsed − 81 − %

I

L

o(max)

− 50 −µs

− 5.50 V

I(start)

2002 Jul 03 3

Philips Semiconductors Product specification

High efficiency DC/DC converter Chip
Scale package

BLOCK DIAGRAM

UPOUT/DNIN

A1

SUPPLY

INTERNAL

TEA1207UK

B2

FB

BAND GAP

REFERENCE

TIME

COUNTER

TEA1207UK

MGU402

book, full pagewidth

P-type POWER FET

A2

sense FET

I/V

CONVERTER

C1

CIRCUIT

START-UP

AND

MODE GEARBOX

CONTROL LOGIC

CURRENT LIMIT

COMPARATORS

I/V

CONVERTER

N-type

PROTECTION

TEMPERATURE

FET

POWER

FET

sense

DIGITAL CONTROLLER

GATE

SYNC

13 MHz

OSCILLATOR

B1A3 C3 C2

SHDWN

SYNC U/D

GND

Fig.1 Block diagram.

This text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader.This text is here in

_white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader.This text is here inThis text is here in

white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader. white to force landscape pages to be ...

2002 Jul 03 4

LX

ILIM

Philips Semiconductors Product specification

High efficiency DC/DC converter Chip
Scale package

PINNING

SYMBOL BALL DESCRIPTION

UPOUT/DNIN A1 output voltage in up mode;

input voltage in down mode
LX A2 inductor connection
GND A3 ground
SYNC B1 synchronization clock input
FB B2 feedback input
ILIM C1 current limiting resistor

connection
U/D C2 up-or-down mode selection

input; active LOW for up mode
SHDWN C3 shut-down input

handbook, halfpage

C2 C3C1

B2B1

A2 A3

A1

MGU399

TEA1207UK

When high output power is requested, the device will
operate in the PWM mode. This results in minimum AC
currents in the circuit components and hence optimum
efficiency, minimum cost and low EMC. In this operating
mode, the output voltage is allowed to vary between two
predefined voltage levels. As long as the output voltage
stays within this so-called window, switching continues in
a fixed pattern. When the output voltage reaches one of
the window borders, the digital controller immediately
reacts by adjusting the pulse width and inserting a current
step in such a way that the output voltage stays within the
window with higher or lower current capability. This
approach enables very fast reaction to load variations.
Figure 3 shows the converter’s response to a sudden load
increase. The upper trace shows the output voltage. The
ripple on top of the DC level is a result of the current in the
output capacitor, which changes in sign twice per cycle,
times the capacitor’s internal Equivalent Series
Resistance (ESR). After each ramp-down of the inductor
current, i.e. when the ESR effect increases the output
voltage, the converter determines what to do in the next
cycle. As soon as more load current is taken from the
output the output voltage starts to decay.

When the output voltage becomes lower than the low limit
of the window, a corrective action is taken by a ramp-up of
theinductorcurrent during a much longer time. As a result,
the DC current level is increased and normal PWM control
can continue. The output voltage (including ESR effect) is
again within the predefined window. Figure 4 shows the
spread of the output voltage window. The absolute value
ismostdependentonspread,whiletheactualwindowsize
is not affected. For one specific device, the output voltage
will not vary more than 2% typical.

Fig.2 Ball configuration (bottom view).

FUNCTIONAL DESCRIPTION
Control mechanism

The TEA1207UK is able to operate in PFM (discontinuous
conduction) or PWM (continuous conduction) operating
mode. All switching actions are completely determined by
a digital control circuit which uses the output voltage level
asitscontrolinput. This novel digital approach enables the
use of a new pulse width and frequency modulation
scheme,whichensuresoptimumpowerefficiencyoverthe
complete operating range of the converter.

2002 Jul 03 5

In low output power situations, the TEA1207UK will switch
over to PFM mode. In this mode, regulation information
from earlier PWM operating modes is used. This results in
optimum inductor peak current levels in the PFM mode,
which are slightly larger than the inductor ripple current in
the PWM mode. As a result, the transition between PFM
andPWMmodeisoptimumunderallcircumstances. In the
PFM mode the TEA1207UK regulates the output voltage
to the high window limit shown in Fig.3.

Philips Semiconductors Product specification

High efficiency DC/DC converter Chip
Scale package

Synchronous rectification

For optimum efficiency over the whole load range,
synchronous rectifiers within the TEA1207UK ensure that
during the whole second switching phase, all inductor
current will flow through the low-ohmic power MOSFETs.
Special circuitry is included which detects when the
inductorcurrentreaches zero. Following this detection, the
digital controller switches off the power MOSFET and
proceeds with regulation.

Start-up

Start-up from low input voltage in boost mode is realized
by an independent start-up oscillator, which starts
switching the N-type power MOSFET as soon as the
voltage at ball UPOUT/DNIN is sufficiently high. The
switch actions of the start-up oscillator will increase the
output voltage. As soon as the output voltage is high
enough for normal regulation, the digital control system
takes over the control of the power MOSFETs.

Undervoltage lockout

As a result of too high load or disconnection of the input
power source, the output voltage can drop so low that
normal regulation cannot be guaranteed. In this event, the
device switches back to start-up mode. If the output
voltage drops down even further, switching is stopped
completely.

Shut-down

When the shut-down input is made HIGH, the converter
disables both power switches and the power consumption
is reduced to a few microamperes.

Power switches

The power switches in the IC are one N-type and one
P-type power MOSFET, having a typical drain-to-source
resistance of 0.20 and 0.22 Ω respectively. The maximum
average current in the power switches is 0.60 A at
T

=80°C.

amb

TEA1207UK

Current limiters

If the current in one of the power switches exceeds its limit
in the PWM mode, the current ramp is stopped
immediately, and the next switching phase is entered.
Current limiting is required to enable optimum use of
energy in Li-ion batteries, and to keep power conversion
efficientduring temporary high loads. Furthermore,current
limiting protects the IC against overload conditions,
inductor saturation, etc. The current limiting level is set by
an external resistor.

External synchronization

If an external high frequency clock is applied to the
synchronization clock input, the switching frequency in
PWM mode will be exactly that frequency divided by 22.
In PFM mode, the switching frequency is always lower.
The quiescent current of the device increases when
external clock pulses are applied. If no external
synchronization is necessary, the synchronization clock
input must be connected to ground.

Behaviour when the input voltage exceeds the
specified range

In general, an input voltage exceeding the specified range
isnot recommended since instability may occur. There are
two exceptions:

• Upconversion: at an input voltage higher than the target
output voltage, but up to 6 V, the converter will stop
switchingandtheinternal P-type power MOSFET will be
conducting. The output voltage will equal the input
voltage minus some resistive voltage drop. The current
limiting function is not active.

• Downconversion: when the input voltage is lower than
the target output voltage, but higher than 2.8 V, the
P-type power MOSFET will stay conducting resulting in
an output voltage being equal to the input voltage minus
some resistive voltage drop. The current limiting
function remains active.

Temperature protection

When the device operates in the PWM mode, and the die
temperature gets too high (typically 175 °C), the converter
stops operating. It resumes operation when the die
temperature falls below 175 °C again. As a result, low
frequent cycling between the on and off state will occur.
It shouldbenotedthat in the event of a device temperature
around the cut-off limit, the application will differ strongly
from the maximum specification.

2002 Jul 03 6

Philips Semiconductors Product specification

High efficiency DC/DC converter Chip
Scale package

handbook, full pagewidth

load increase

V

o

I

L

start corrective action

time

time

TEA1207UK

high window limit

low window limit

MGK925

handbook, full pagewidth

V

out, typ

V

h

2%

V

l

typical situation

Fig.3 Response to load increase.

maximum positive spread of V

V

h

2%

V

+4%

l

−4%

maximum negative spread of V

fb

V

h

2%

V

l

upper specification limit

lower specification limit

fb

MGR667

Fig.4 Spread of location of output voltage window.

2002 Jul 03 7

Philips Semiconductors Product specification

High efficiency DC/DC converter Chip

TEA1207UK

Scale package

LIMITING VALUES

In accordance with the Absolute Maximum Rating System (IEC 60134).

SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT

V

n

T

j

T

amb

T

stg

V

es

Notes

1. Class 3; equivalent to discharging a 100 pF capacitor through a 1500 resistor.

2. Class 2; equivalent to discharging a 200 pF capacitor through a 10 Ω resistor and a 0.75 µH inductor.

THERMAL CHARACTERISTICS

SYMBOL PARAMETER CONDITIONS VALUE UNIT

R

th(j-a)

voltage on any ball shut-down mode −0.2 +6.5 V

operating mode −0.2 +5.9 V
junction temperature −25 +150 °C
ambient temperature −40 +80 °C
storage temperature −40 +125 °C
electrostatic handling voltage human body model; note 1 −4000 +4000 V

machine model; note 2 −300 +300 V

thermal resistance from junction to
Printed-Circuit Board (PCB)

in free air; note 1 145 K/W

Note

1. The thermal resistance is highly dependent on printed-circuit board type and metal routing. The value given is valid
for a single metal layer printed-circuit board.

QUALITY SPECIFICATION

In accordance with

“SNW-FQ-611 part E”

.

2002 Jul 03 8

Philips Semiconductors Product specification

High efficiency DC/DC converter Chip

TEA1207UK

Scale package

CHARACTERISTICS

T

= −40 to +80 °C; all voltages are measured with respect to ground; positive currents flow into theIC; unless

amb

otherwise specified.

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

Voltage levels

PCONVERSION; BALL U/D=LOW

U
V

i

V

o

V

i(start)

V

i(uvlo)

OWNCONVERSION; BALL U/D = HIGH

D
V

i

V

o

input voltage V
output voltage 2.80 − 5.50 V
start-up input voltage IL< 125 mA 1.40 1.60 1.85 V
undervoltage lockout input voltage note 1 1.50 2.10 2.50 V

input voltage note 2 2.80 − 5.50 V

output voltage 1.30 − 5.50 V
GENERAL
V

∆V

fb

wdw

feedback input voltage 1.19 1.24 1.29 V

output voltage window PWM mode 1.5 2.0 3.0 %

Current levels

I

q

I

shdwn

I

LX

quiescent current on ball A1 down mode;

current in shut-down mode − 210µA

maximum continuous current on

ball A2
∆I

lim

current limit deviation I

Power MOSFETs

R

DSon

drain-to-source on-state resistance

N-type 0.10 0.20 0.30 Ω
P-type 0.10 0.22 0.35 Ω

Efficiency

η1 efficiency upconversion V

I(start)

52 65 72 µA

V3= 3.0 V; note 3

T

=60°C −−0.85 A

amb

T

=80°C −−0.60 A

amb

= 0.5 to 5.0 A;

lim

note 4

up mode −17.5 − +17.5 %
down mode −17.5 − +17.5 %

= 3.6 V; VO= 4.6 V;

I

L1 = 10 µH; note 5

I

=1mA − 88 − %

L

I

=10mA − 93 − %

L

I

=50mA − 93 − %

L

I

= 100 mA − 94 − %

L

= 200 mA − 95 − %

I

L

= 500 mA − 92 − %

I

L

I

= 1 A; pulsed − 83 − %

L

− 5.50 V

2002 Jul 03 9

Philips Semiconductors Product specification

High efficiency DC/DC converter Chip

TEA1207UK

Scale package

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

η2 efficiency downconversion VI= 3.6 V; VO= 2.0 V;

L1 = 10 µH; note 5

I

=1mA − 86 − %

L

I

=10mA − 91 − %

L

I

=50mA − 92 − %

L

I

= 100 mA − 92 − %

L

= 200 mA − 93 − %

I

L

I

= 500 mA − 89 − %

L

I

= 1 A; pulsed − 81 − %

L

Timing

f

sw

f

sync

t

res

Temperature

T

amb

T

co(max)

Digital levels

V

lL

V

IH

Notes

1. Theundervoltagelockoutvoltage shows wide specification limits since it decreases at increasing temperature. When
the temperature increases, the minimum supply voltage of the digital control part of the IC decreases and therefore
the correct operation of this function is guaranteed over the whole temperature range.

2. When Vi is lower than the target output voltage but higher than 2.8 V, the P-type power MOSFET will remain
conducting (100% duty cycle), resulting in Vo following Vi.

3. V3 is the voltage on ball A1 (UPOUT/DNIN).

4. The current limit is defined by the external resistor R
current limit increases in proportion to the programmed current limiting level.

5. The specified efficiency is valid when using an output capacitor having an ESR of 0.10 Ω and a 10 µH small size
inductor (Coilcraft DT1608C-103).

6. If the applied HIGH-level voltage is less than V3to 1 V, the quiescent current (lq) of the device will increase.

switching frequency PWM mode 220 275 330 kHz
synchronization clock input frequency 4 6.5 20 MHz
response time from standby to P

o(max)

− 50 −µs

ambient temperature −40 +25 +80 °C
maximum internal cut-off temperature 150 175 200 °C

LOW-level input voltage on balls B1,

0 − 0.4 V

C2 and C3
HIGH-level input voltage note 6

on ball C2 V
on balls B1 and C3 0.55V

(see Section “Current limiting resistors”). Accuracy of the

lim

− 0.4 − V3+ 0.3 V

3

− V3+ 0.3 V

3

2002 Jul 03 10

Philips Semiconductors Product specification

High efficiency DC/DC converter Chip
Scale package

APPLICATION INFORMATION

handbook, full pagewidth

L1

V

I

C1

LX

A2

C2 B1 C3 C1

TEA1207UK

A3

GNDU/D SYNC SHDWN ILIM

D1

UPOUT/DNIN

A1

FB

B2

R

lim

R1

R2

C2

MGU400

TEA1207UK

V

O

handbook, full pagewidth

V

I

Fig.5 Complete application diagram for upconversion.

UPOUT/DNIN

C1

A1

TEA1207UK

C1C2 B1 A3 C3

R

lim

GNDU/D SYNC SHDWNILIM

A2

B2

LX

FB

D1

L1

R1

R2

MGU401

C2

V

O

Fig.6 Complete application diagram for downconversion.

2002 Jul 03 11

Philips Semiconductors Product specification

High efficiency DC/DC converter Chip
Scale package

External component selection

INDUCTOR L1
The performance of the TEA1207UK is not very sensitive

to inductance value. Best efficiency performance over a
wide load current range is achieved by using e.g.
TDK SLF7032-6R8M1R6, having an inductance of 6.8 µH
and a saturation current level of 1.6 A. In case the
maximum output current is lower, other inductors are also
suitable such as the small sized Coilcraft DT1608 range.

INPUT CAPACITOR C1
The value of capacitor C1 strongly depends on the type of

input source. In general, a 100 µF tantalum capacitor will
do, or a 10 µF ceramic capacitor featuring very low series
resistance (ESR value).

OUTPUT CAPACITOR C2
The value and type of capacitor C2 depend on the

maximum output current and the ripple voltage which is
allowed in the application. Low-ESR tantalum capacitors
show good results. The most important specification of
capacitor C2 is its ESR, which mainly determines the
output voltage ripple.

DIODE D1
The Schottky diode is only used for a short time during

takeover from N-type power MOSFET and P-type power
MOSFET and vice versa. Therefore, a medium-power
diode such as Philips PRLL5819 is sufficient.

FEEDBACK RESISTORS R1 AND R2

TEA1207UK

• Use1%accurate SMD type resistors only. In case larger
body resistors are used, the capacitance on ball B2
(feedback input) will be too large, causing inaccurate
operation.

• Resistors R1 and R2 should have a maximum value of
57 kΩ when connected in parallel. A higher value will
result in inaccurate operation.

Under these conditions, the output voltage can be

R1

calculated by the formula:

URRENT LIMITING RESISTORS

C

V

O

The maximum instantaneous current is set by the external
resistors R
The connection of resistor R

. The preferred type is SMD, 1% accurate.

lim

differs per mode:

lim

• At upconversion (up mode): resistor R
connected between ball C1 (ILIM) and ball A1
(UPOUT/DNIN). The current limiting level is defined by:

238

=

I

--------- -

lim

R

lim

• At downconversion (down mode): resistor R
connected between ball C1 (ILIM) and ball A3 (GND).

The current limiting level is defined by:

The average inductor current during limited current
operation also depends on the inductance value, input
voltage, output voltage and resistive losses in all
components in the power path. Ensure that I
saturation current of the inductor.



1.24 1

×=



+

------- ­R2

must be

lim

I

lim

lim<Isat

must be

lim

270

=

--------- ­R

lim

The output voltage is determined by the resistors
R1 and R2. The following conditions apply:

2002 Jul 03 12

Philips Semiconductors Product specification

High efficiency DC/DC converter Chip

TEA1207UK

Scale package

PACKAGE OUTLINE

LFBGA8: plastic low profile fine-pitch ball grid array package; 8 balls; body 2.0 x 2.0 x 0.46 mm

B

D

ball A1
index area

A

E

A

2

A

A

1

detail X

TEA1207

eZ

C

B

A

213

DIMENSIONS (mm are the original dimensions)

A

UNIT

mm

OUTLINE
VERSION

TEA1207

max.

0.70

A

1bA2

0.28

0.20

D

0.48

0.44

2.05

1.95

2.05

1.95

0.38

0.26

IEC JEDEC JEITA

b

E

0.5

∅ w

M

D

Z

E

e

0 1 2 mm

scale

ye

w

0.63

0.05v0.1

REFERENCES

0.03

0.38

A

v

A

Z

Z

D

E

0.63

0.38

y

X

EUROPEAN

PROJECTION

MSD746

ISSUE DATE

2002 Jul 03 13

Philips Semiconductors Product specification

High efficiency DC/DC converter Chip
Scale package

SOLDERING
Introduction to soldering surface mount packages

Thistextgivesa very brief insight to a complex technology.
A more in-depth account of soldering ICs can be found in
our

“Data Handbook IC26; Integrated Circuit Packages”

(document order number 9398 652 90011).
There is no soldering method that is ideal for all surface

mount IC packages. Wave soldering can still be used for
certainsurfacemount ICs, but it is not suitableforfinepitch
SMDs. In these situations reflow soldering is
recommended.

Reflow soldering

Reflow soldering requires solder paste (a suspension of
fine solder particles, flux and binding agent) to be applied
totheprinted-circuitboardbyscreenprinting,stencillingor
pressure-syringe dispensing before package placement.

Several methods exist for reflowing; for example,
convection or convection/infrared heating in a conveyor
type oven. Throughput times (preheating, soldering and
cooling) vary between 100 and 200 seconds depending
on heating method.

Typical reflow peak temperatures range from
215 to 250 °C. The top-surface temperature of the
packages should preferable be kept below 220 °C for
thick/large packages, and below 235 °C for small/thin
packages.

Wave soldering

Conventional single wave soldering is not recommended
forsurfacemount devices (SMDs) or printed-circuit boards
with a high component density, as solder bridging and
non-wetting can present major problems.

To overcome these problems the double-wave soldering
method was specifically developed.

TEA1207UK

If wave soldering is used the following conditions must be
observed for optimal results:

• Use a double-wave soldering method comprising a
turbulent wave with high upward pressure followed by a
smooth laminar wave.

• For packages with leads on two sides and a pitch (e):
– larger than or equal to 1.27 mm, the footprint

longitudinal axis is preferred to be parallel to the
transport direction of the printed-circuit board;

– smaller than 1.27 mm, the footprint longitudinal axis

must be parallel to the transport direction of the
printed-circuit board.

The footprint must incorporate solder thieves at the
downstream end.

• Forpackageswith leads on four sides, the footprintmust
be placed at a 45° angle to the transport direction of the
printed-circuit board. The footprint must incorporate
solder thieves downstream and at the side corners.

During placement and before soldering, the package must
be fixed with a droplet of adhesive. The adhesive can be
applied by screen printing, pin transfer or syringe
dispensing. The package can be soldered after the
adhesive is cured.

Typical dwell time is 4 seconds at 250 °C.
A mildly-activated flux will eliminate the need for removal
of corrosive residues in most applications.

Manual soldering

Fix the component by first soldering two
diagonally-opposite end leads. Use a low voltage (24 V or
less) soldering iron applied to the flat part of the lead.
Contact time must be limited to 10 seconds at up to
300 °C.

When using a dedicated tool, all other leads can be
soldered in one operation within 2 to 5 seconds between
270 and 320 °C.

2002 Jul 03 14

Philips Semiconductors Product specification

High efficiency DC/DC converter Chip

TEA1207UK

Scale package

Suitability of surface mount IC packages for wave and reflow soldering methods

PACKAGE

BGA, LBGA, LFBGA, SQFP, TFBGA, VFBGA not suitable suitable
HBCC, HBGA, HLQFP, HSQFP, HSOP, HTQFP, HTSSOP, HVQFN,

HVSON, SMS

(4)

PLCC
LQFP, QFP, TQFP not recommended
SSOP, TSSOP, VSO not recommended

Notes

1. FormoredetailedinformationontheBGApackagesrefertothe

2. All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the maximum

3. These packages are not suitable for wave soldering. On versions with the heatsink on the bottom side, the solder

4. If wave soldering is considered, then the package must be placed at a 45° angle to the solder wave direction.

5. Wave soldering is suitable for LQFP, TQFP and QFP packages with a pitch (e) larger than 0.8 mm; it is definitely not

6. Wave soldering is suitable for SSOP and TSSOP packages with a pitch (e) equal to or larger than 0.65 mm; it is

, SO, SOJ suitable suitable

from your Philips Semiconductors sales office.

temperature (with respect to time) and body size of the package, there is a risk that internal or external package
cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). For details, refer to the
Drypack information in the

cannot penetrate between the printed-circuit board and the heatsink. On versions with the heatsink on the top side,
the solder might be deposited on the heatsink surface.

The package footprint must incorporate solder thieves downstream and at the side corners.

suitable for packages with a pitch (e) equal to or smaller than 0.65 mm.

definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm.

“Data Handbook IC26; Integrated Circuit Packages; Section: Packing Methods”

(1)

not suitable

“(LF)BGAApplicationNote

SOLDERING METHOD

WAVE REFLOW

(3)

suitable

(4)(5)

suitable

(6)

suitable

”(AN01026);orderacopy

(2)

.

2002 Jul 03 15

Philips Semiconductors Product specification

High efficiency DC/DC converter Chip

TEA1207UK

Scale package

DATA SHEET STATUS

PRODUCT

DATA SHEET STATUS

Objective specification Development This data sheet contains data from the objective specification for product

Preliminary specification Qualification This data sheet contains data from the preliminary specification.

Product specification Production This data sheet contains data from the product specification. Philips

Notes

1. Please consult the most recently issued data sheet before initiating or completing a design.

2. The product status of the device(s) described in this data sheet may have changed since this data sheet was
published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com.

(1)

STATUS

(2)

development. Philips Semiconductors reserves the right to change the
specification in any manner without notice.

Supplementary data will be published at a later date. Philips
Semiconductors reserves the right to change the specification without
notice, in order to improve the design and supply the best possible
product.

Semiconductors reserves the right to make changes at any time in order
to improve the design, manufacturing and supply. Changes will be
communicated according to the Customer Product/Process Change
Notification (CPCN) procedure SNW-SQ-650A.

DEFINITIONS

DEFINITIONS
Short-form specification  The data in a short-form

specification is extracted from a full data sheet with the
same type number and title. For detailed information see
the relevant data sheet or data handbook.

Limiting values definition  Limiting values given are in
accordance with the Absolute Maximum Rating System
(IEC 60134). Stress above one or more of the limiting
values may cause permanent damage to the device.
These are stress ratings only and operation of the device
attheseoratany other conditions above those given in the
Characteristics sections of the specification is not implied.
Exposure to limiting values for extended periods may
affect device reliability.

Application information  Applications that are
described herein for any of these products are for
illustrative purposes only. Philips Semiconductors make
norepresentation or warranty that such applicationswillbe
suitable for the specified use without further testing or
modification.

DISCLAIMERS
Life support applications  These products are not

designed for use in life support appliances, devices, or
systems where malfunction of these products can
reasonably be expected to result in personal injury. Philips
Semiconductorscustomers using or selling theseproducts
for use in such applications do so at their own risk and
agree to fully indemnify Philips Semiconductors for any
damages resulting from such application.

Right to make changes  Philips Semiconductors
reserves the right to make changes, without notice, in the
products, including circuits, standard cells, and/or
software, described or contained herein in order to
improve design and/or performance. Philips
Semiconductors assumes no responsibility or liability for
theuseof any of these products, conveys nolicenceortitle
under any patent, copyright, or mask work right to these
products,andmakesnorepresentationsorwarrantiesthat
these products are free from patent, copyright, or mask
work right infringement, unless otherwise specified.

2002 Jul 03 16

Philips Semiconductors Product specification

High efficiency DC/DC converter Chip
Scale package

NOTES

TEA1207UK

2002 Jul 03 17

Philips Semiconductors Product specification

High efficiency DC/DC converter Chip
Scale package

NOTES

TEA1207UK

2002 Jul 03 18

Philips Semiconductors Product specification

High efficiency DC/DC converter Chip
Scale package

NOTES

TEA1207UK

2002 Jul 03 19

Philips Semiconductors – a w orldwide compan y

Contact information

For additional information please visit http://www.semiconductors.philips.com. Fax: [phone]
For sales offices addresses send e-mail to: [e-mail].

© Koninklijke Philips Electronics N.V. 2002
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.

The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed
without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license
under patent- or other industrial or intellectual property rights.

Printed in The Netherlands 403502/02/pp20 Date of release: 2002 Jul 03 Document order number: 9397 750 08491

SCA74