Philips TDA8709AT Datasheet

INTEGRATED CIRCUITS

TDA8709A

Video analog input interface

Product specification	June 1994
Supersedes data of April 1993
File under Integrated Circuits, IC02

Philips Semiconductors

Philips Semiconductors	Product specification
Video analog input interface	TDA8709A

FEATURES

∙8-bit resolution

∙Sampling rate up to 32 MHz

∙TTL-compatible digital inputs and outputs

∙Internal reference voltage regulator

∙Low-level AC clock inputs and outputs

∙Clamp function with selection for ‘16’ or ‘128’

∙No sample-and-hold circuit required

∙Three selectable video inputs.

APPLICATIONS

∙Video signal processing

∙Digital picture processing

∙Frame grabbing.

∙Colour difference signals (U, V)

∙R, G, B signals

∙Chrominance signal (C).

QUICK REFERENCE DATA

GENERAL DESCRIPTION

The TDA8709A is an analog input interface for video signal processing. It includes a an input selector

(one out-of-three video signals), video amplifier with clamp and external gain control, an 8-bit analog-to-digital converter (ADC) with a sampling rate of 32 MHz and an input selector.

SYMBOL	PARAMETER				MIN.		TYP.	MAX.	UNIT
VCCA	analog supply voltage				4.5		5.0	5.5	V
VCCD	digital supply voltage				4.5		5.0	5.5	V
VCCO	TTL output supply voltage				4.2		5.0	5.5	V
ICCA	analog supply current				−		40	47	mA
ICCD	digital supply current				−		24	30	mA
ICCO	TTL output supply current				−		12	16	mA
ILE	DC integral linearity error				−		−	±1	LSB
DLE	DC differential linearity error				−		−	±0.5	LSB
fclk(max)	maximum clock frequency				30		32	−	MHz
B	maximum −3 dB bandwidth (preamplifier)				12		18	−	MHz
Ptot	total power dissipation				−		380	512	mW
ORDERING INFORMATION
TYPE NUMBER				PACKAGE
	PINS		PIN POSITION		MATERIAL			CODE
TDA8709A	28		DIP			plastic		SOT117-1
TDA8709AT	28		SO28L			plastic		SOT136-1

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Philips Semiconductors	Product specification
Video analog input interface	TDA8709A
BLOCK DIAGRAM

				analog
	handbook, full pagewidth	video input	video input	voltage	ADC	clock	decoupling
		selection bit 0	selection bit 1	output	input	input	input	TTL outputs VCCO (+ 5 V)

14

15

VIDEO

19

20

5

21

7

16

AMPLIFIER

video input 0

9

fast output

17

8 - bit

video input 1

INPUT

AMP.

1

chip enable

18

SELECTOR

ADC

D7

video input 2

2

D6

clamp capacitor

24

3

D5

connection

4

TTL

gain control

25

D4

TDA8709A

OUTPUTS

10

input

D3

11

D2

12

D1

13

CLAMP LEVEL "16"

D0

DIGITAL COMPARATOR

CLAMP

28

output

format

LOGIC

selection

CLAMP LEVEL "128"

DIGITAL COMPARATOR

27

26

6

8

22

23

MBB951

clamp

clamp

digital VCCD

digital

analog VCCA

analog

level

pulse

(+ 5 V)

ground

(+ 5 V)

ground

selection

Fig.1 Block diagram.

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Philips Semiconductors	Product specification
Video analog input interface	TDA8709A

PINNING

SYMBOL	PIN	DESCRIPTION
D7	1	data output; bit 7 (MSB)
D6	2	data output; bit 6
D5	3	data output; bit 5
D4	4	data output; bit 4
CLK	5	clock input
VCCD	6	digital supply voltage (+5 V)
VCCO	7	TTL outputs supply voltage (+5 V)
DGND	8	digital ground
FOEN	9	fast output chip enable
D3	10	data output; bit 3
D2	11	data output; bit 2
D1	12	data output; bit 1
D0	13	data output; bit 0 (LSB)
I0	14	video input selection bit 0
I1	15	video input selection bit 1
VIN0	16	video input 0
VIN1	17	video input 1
VIN2	18	video input 2
ANOUT	19	analog voltage output
ADCIN	20	analog-to-digital converter input
DEC	21	decoupling input
VCCA	22	analog supply voltage (+5 V)
AGND	23	analog ground
CLAMP	24	clamp capacitor connection
GAIN	25	gain control input
CLP	26	clamping pulse
CLS	27	clamping level selection input
OFS	28	output format selection

handbook, halfpage

D7	1			28		OFS
D6	2			27		CLS
D5	3		26			CLP
D4	4			25		GAIN
CLK	5			24		CLAMP
VCCD
	6		23			AGND
VCCO
	7		22			VCCA
			TDA8709A
DGND	8			21		DEC
FOEN	9			20		ADCIN
D3	10			19		ANOUT
						VIN2
D2	11			18
D1	12			17		VIN1
D0
	13			16		VIN0
I0						I1
	14		15
			MBB950

Fig.2 Pin configuration.

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Philips Semiconductors	Product specification
Video analog input interface	TDA8709A

FUNCTIONAL DESCRIPTION

TDA8709A is an 8-bit ADC with internal clamping and a preamplifier with adjustable gain.

The clamping value is switched via pin 27 between digital 16 (for R, G, B signals) and digital 128 (for

LIMITING VALUES

chrominance or colour difference signals). While clamping pulse at pin 27 is logic 1, the device will adjust the clamping level to the chosen value. The output format can be selected between binary and two's complement at pin 28.

In accordance with the Absolute Maximum Rating System (IEC 134).

SYMBOL	PARAMETER		MIN.		MAX.		UNIT
VCCA	analog supply voltage		−0.3		+7.0		V
VCCD	digital supply voltage		−0.3		+7.0		V
VCCO	TTL output supply voltage		−0.3		+7.0		V
VCC	supply voltage difference between VCCA and VCCD		−0.5		+0.5		V
	supply voltage difference between VCCO and VCCD		−0.5		+0.5		V
	supply voltage difference between VCCA and VCCO		−1.0		+1.0		V
VI	input voltage		−0.3		+7.0		V
IO	output current		−		+10		mA
Tstg	storage temperature		−55		+150		°C
Tamb	operating ambient temperature	0			+70		°C
Tj	junction temperature	0			+125		°C
THERMAL CHARACTERISTICS
SYMBOL	PARAMETER		VALUE				UNIT
Rth j-a	thermal resistance from junction to ambient in free air
	SOT117-1		55				K/W
	SOT136-1		70				K/W

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Philips Semiconductors	Product specification
Video analog input interface	TDA8709A

CHARACTERISTICS

VCCA = V22 to V23 = 4.5 to 5.5 V; VCCD = V6 to V8 = 4.5 to 5.5 V; VCCO = V7 to V8 = 4.2 to 5.5 V; AGND and DGND shorted together; VCCA to VCCD = −0.5 to +0.5 V; VCCO to VCCD = −0.5 to +0.5 V; VCCA to VCCO = −0.5 to +0.5 V;

Tamb = 0 to +70 °C; typical readings taken at VCCA = VCCD = VCCO = 5 V and Tamb = 25 °C; unless otherwise specified.

SYMBOL	PARAMETER	CONDITIONS	MIN.	TYP.	MAX.	UNIT
Supplies
VCCA	analog supply voltage		4.5	5.0	5.5	V
VCCD	digital supply voltage		4.5	5.0	5.5	V
VCCO	TTL output supply voltage		4.2	5.0	5.5	V
ICCA	analog supply current		−	40	47	mA
ICCD	digital supply current		−	24	30	mA
ICCO	TTL output supply current	TTL load (see Fig.7)	−	12	16	mA
Preamplifier inputs
VIN0 TO VIN2 INPUTS
VI(p-p)	input voltage (peak-to-peak value)	note 1	0.6	−	1.5	V
|Zi|	input impedance	fi = 6 MHz	10	20	−	kΩ
CI	input capacitance	fi = 6 MHz	−	1	−	pF
I0 AND I1 TTL INPUTS (SEE TABLE 1)
VIL	LOW level input voltage		0	−	0.8	V
VIH	HIGH level input voltage		2.0	−	VCCD	V
IIL	LOW level input current	VI = 0.4 V	−400	−	−	μA
IIH	HIGH level input current	VI = 2.7 V	−	−	20	μA
CLS, OFS AND CLP TTL INPUTS (SEE FIG.5)
VIL	LOW level input voltage		0	−	0.8	V
VIH	HIGH level input voltage		2.0	−	VCCD	V
IIL	LOW level input current	VI = 0.4 V	−400	−	−	μA
IIH	HIGH level input current	VI = 2.7 V	−	−	20	μA
tCLP	clamp pulse width		2	−	−	μs
GAIN INPUT (PIN 25)
V25(min)	input voltage for minimum gain	see Fig.9	−	1.8	−	V
V25(max)	input voltage for maximum gain	see Fig.9	−	3.8	−	V
II	input current		−	1.0	−	μA
CLAMP INPUT (PIN 24)
V24	clamp voltage for code 128 output		−	3.5	−	V
I24	clamp output current			see Table 2

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Philips Semiconductors				Product specification
Video analog input interface				TDA8709A
SYMBOL	PARAMETER	CONDITIONS	MIN.	TYP.	MAX.	UNIT
Video amplifier outputs
ANOUT OUTPUT (PIN 19)
V19(p-p)	AC output voltage	VOF = 1.33 V (p-p);	−	1.33	−	V
	(peak-to-peak value)	V25 = 3.0 V
I19	internal current source	RL = ∞	2.0	2.5	−	mA
IO(p-p)	output current driven by the load	VANOUT = 1.33 V (p-p);	−	−	1.0	mA
		note 2
V19	DC output voltage for black level	CLS = logic 1	−	VCCA − 2.02	−	V
V19	DC output voltage for black level	CLS = logic 0	−	VCCA − 2.6	−	V
Z19	output impedance		−	20	−	Ω
Preamplifier dynamic characteristics
αct	crosstalk between VIN inputs	VCCA = 4.75 to 5.25 V;	−	−50	−45	dB
		note 3
Gdiff	differential gain	VVIN = 1.33 V (p-p);	−	2	−	%
		V25 = 3.0 V
ϕdiff	differential phase	VVIN = 1.33 V (p-p);	−	0.8	−	deg
		V25 = 3.0 V
B	−3 dB bandwidth		12	−	−	MHz
S/N	signal-to-noise ratio	note 4	60	−	−	dB
SVRR1	supply voltage ripple rejection	note 5	−	45	−	dB
G	gain range	see Fig.9	−4.5	−	+6.0	dB
Gstab	gain stability as a function of supply	see Fig.9	−	−	5	%
	voltage and temperature
Analog-to-digital converter inputs
CLK INPUT (PIN 5)
VIL	LOW level input voltage		0	−	0.8	V
VIH	HIGH level input voltage		2.0	−	VCCD	V
IIL	LOW level input current	Vclk = 0.4 V	−400	−	−	μA
IIH	HIGH level input current	Vclk = 2.7 V	−	−	100	μA
|Zi|	input impedance	fclk = 10 MHz	−	4	−	kΩ
CI	input capacitance	fclk = 10 MHz	−	4.5	−	pF
FOEN INPUT (SEE TABLE 3)
VIL	LOW level input voltage		0	−	0.8	V
VIH	HIGH level input voltage		2.0	−	VCCD	V
IIL	LOW level input current	V9 = 0.4 V	−400	−	−	μA
IIH	HIGH level input current	V9 = 2.7 V	−	−	20	μA

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Philips Semiconductors				Product specification
Video analog input interface				TDA8709A
SYMBOL	PARAMETER	CONDITIONS	MIN.	TYP.	MAX.	UNIT
ADCIN INPUT (PIN 20; SEE TABLE 4)
V20	input voltage	digital output = 00	−	VCCA − 2.52	−	V
V20	input voltage	digital output = 255	−	VCCA − 1.52	−	V
V20(p-p)	input voltage amplitude		−	1.0	−	V
	(peak-to-peak value)
I20	input current		−	1.0	10	μA
|Zi|	input impedance	fi = 6 MHz	−	50	−	MΩ
CI	input capacitance	fi = 6 MHz	−	1	−	pF
Analog-to-digital converter outputs
DIGITAL OUTPUTS D0 TO D7
VOL	LOW level output voltage	IOL = 2 mA	0	−	0.6	V
VOH	HIGH level output voltage	IOL = −0.4 mA	2.4	−	VCCD	V
IOZ	output current in 3-state mode	0.4 V < VO < VCCD	−20	−	+20	μA
Switching characteristics
fclk(max)	maximum clock input frequency	see Fig.5; note 6	30	32	−	MHz
Analog signal processing (fclk = 32 MHz; see Fig.7)
Gdiff	differential gain	V20 = 1.0 V (p-p);	−	2	−	%
		see Fig.6; note 7
ϕdiff	differential phase	see Fig.6; note 7	−	2	−	deg
f1	fundamental harmonics (full-scale)	fi = 4.43 MHz; note 7	−	−	0	dB
fall	harmonics (full-scale);	fi = 4.43 MHz; note 7	−	−55	−	dB
	all components
SVRR2	supply voltage ripple rejection	note 8	−	1	5	%/V
Transfer function
ILE	DC integral linearity error		−	−	±1	LSB
DLE	DC differential linearity error		−	−	±0.5	LSB
ILE	AC integral linearity error	note 9	−	−	±2	LSB
Timing (fclk = 32 MHz; see Figs 5, 6 and 7)
DIGITAL OUTPUTS (CL = 15 pF; IOL = 2 mA; RL = 2 kΩ)
tds	sampling delay time		−	2	−	ns
th	output hold time		−	8	−	ns
td	output delay time		−	16	20	ns
tdEZ	3-state delay time; output enable		−	16	25	ns
tdDZ	3-state delay time; output disable		−	12	25	ns

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Philips Semiconductors	Product specification
Video analog input interface	TDA8709A

Notes to the “Characteristics”

1.0 dB is obtained at the AGC amplifier when applying Vi(p-p) = 1.33 V.

2.The output current at pin 19 should not exceed 1 mA. The load impedance RL should be referenced to VCCA and defined as:

a)AC impedance ³1 kW and the DC impedance >2.7 kW.

b)The load impedance should be coupled directly to the output of the amplifier so that the DC voltage supplied by the clamp is not disturbed.

3.Input signals with the same amplitude. Gain is adjusted to obtain ANOUT = 1.33 V (p-p).

4.Signal-to-noise ratio measured with 5 MHz bandwidth:

S	= 20 log	VANOUT ( p –p)	at B = 5 MHz.
---		V---------------------------------------------ANOUT (RMS noise)
N

5. The voltage ratio is expressed as:

	SVRR1	= 20 log	DVCCA	´	G	for VI = 1 V (p-p), gain at 100 kHz = 1 and 1 V supply variation.
			------------------VCCA		D--------G

6.It is recommended that the rise and fall times of the clock are ³2 ns. In addition, a ‘good layout’ for the digital and analog grounds is recommended.

7.These measurements are realized on analog signals after a digital-to-analog conversion (TDA8702 is used).

8.The supply voltage rejection is the relative variation of the analog signal (full-scale signal at input) for 1 V of supply variation:

D (VI ( 00) –VI ( FF) ) + (VI ( 00) –VI ( FF) )

SVRR2 = -----------------------------------------------------------------------------------------------------

DVCCA

9. Full-scale sine wave (fi = 4.4 MHz; fclk = 27 MHz).

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