Philips TDA8709AT-C2, TDA8709A-C2 Datasheet

DATA SH EET

Product specification
Supersedes data of April 1993
File under Integrated Circuits, IC02

June 1994

INTEGRATED CIRCUITS

Philips Semiconductors

TDA8709A

Video analog input interface

June 1994 2

Philips Semiconductors Product specification

Video analog input interface TDA8709A

FEATURES

• 8-bit resolution

• Sampling rate up to 32 MHz

• TTL-compatible digital inputs and outputs

• Internal reference voltage regulator

• Low-level AC clock inputs and outputs

• Clamp function with selection for ‘16’ or ‘128’

• No sample-and-hold circuit required

• Three selectable video inputs.

APPLICATIONS

• Video signal processing

• Digital picture processing

• Frame grabbing.

• Colour difference signals (U, V)

• R, G, B signals

• Chrominance signal (C).

GENERAL DESCRIPTION

The TDA8709A is an analog input interface for video signal
processing. It includes a an input selector
(one out-of-three video signals), video amplifier with clamp
and external gain control, an 8-bit analog-to-digital
converter (ADC) with a sampling rate of 32 MHz and an
input selector.

QUICK REFERENCE DATA

ORDERING INFORMATION

SYMBOL PARAMETER MIN. TYP. MAX. UNIT

V

CCA

analog supply voltage 4.5 5.0 5.5 V

V

CCD

digital supply voltage 4.5 5.0 5.5 V

V

CCO

TTL output supply voltage 4.2 5.0 5.5 V

I

CCA

analog supply current − 40 47 mA

I

CCD

digital supply current − 24 30 mA

I

CCO

TTL output supply current − 12 16 mA
ILE DC integral linearity error −−±1 LSB
DLE DC differential linearity error −−±0.5 LSB
f

clk(max)

maximum clock frequency 30 32 − MHz
B maximum −3 dB bandwidth (preamplifier) 12 18 − MHz
P

tot

total power dissipation − 380 512 mW

TYPE NUMBER

PACKAGE

PINS PIN POSITION MATERIAL CODE

TDA8709A 28 DIP plastic SOT117-1

TDA8709AT 28 SO28L plastic SOT136-1

June 1994 3

Philips Semiconductors Product specification

Video analog input interface TDA8709A

BLOCK DIAGRAM

Fig.1 Block diagram.

handbook, full pagewidth

MBB951

TTL

OUTPUTS

9
1

2
3

4
10
11
12
13

fast output

chip enable

D7
D6
D5
D4
D3
D2
D1
D0

output
format

selection

8 - bit

ADC

AMP.

VIDEO

AMPLIFIER

INPUT

SELECTOR

16
17
18

19

2014 15

video input

selection bit 0

video input
selection bit 1

analog

voltage

output

ADC
input

clock
input

decoupling
input

5

21 7

TTL outputs V (+ 5 V)

video input 0
video input 1
video input 2

clamp capacitor

connection

gain control

input

24

25

CLAMP

LOGIC

CLAMP LEVEL "16"

DIGITAL COMPARATOR

CLAMP LEVEL "128"

DIGITAL COMPARATOR

27

26

clamp

level

selection

clamp

pulse

6

digital V

CCD

(+ 5 V)

digital

ground

8

22

analog V

CCA

(+ 5 V)

CCO

analog
ground

23

TDA8709A

28

June 1994 4

Philips Semiconductors Product specification

Video analog input interface TDA8709A

PINNING

SYMBOL PIN DESCRIPTION

D7 1 data output; bit 7 (MSB)
D6 2 data output; bit 6
D5 3 data output; bit 5
D4 4 data output; bit 4
CLK 5 clock input
V

CCD

6 digital supply voltage (+5 V)

V

CCO

7 TTL outputs supply voltage (+5 V)
DGND 8 digital ground
FOEN 9 fast output chip enable
D3 10 data output; bit 3
D2 11 data output; bit 2
D1 12 data output; bit 1
D0 13 data output; bit 0 (LSB)
I0 14 video input selection bit 0
I1 15 video input selection bit 1
VIN0 16 video input 0
VIN1 17 video input 1
VIN2 18 video input 2
ANOUT 19 analog voltage output
ADCIN 20 analog-to-digital converter input
DEC 21 decoupling input
V

CCA

22 analog supply voltage (+5 V)
AGND 23 analog ground
CLAMP 24 clamp capacitor connection
GAIN 25 gain control input
CLP 26 clamping pulse
CLS 27 clamping level selection input
OFS 28 output format selection

Fig.2 Pin configuration.

handbook, halfpage

1
2
3
4
5
6
7
8

9
10
11
12
13

28
27
26
25
24
23
22
21

20
19
18
17
16
1514

TDA8709A

D7

D6
D5
D4

CLK

V

CCD

V

CCO

DGND

FOEN

D3
D2
D1
D0

I0

ADCIN
ANOUT
VIN2

VIN1
VIN0

I1

CLP

GAIN
CLAMP

AGND

V

CCA

DEC

OFS
CLS

MBB950

June 1994 5

Philips Semiconductors Product specification

Video analog input interface TDA8709A

FUNCTIONAL DESCRIPTION

TDA8709A is an 8-bit ADC with internal clamping and a
preamplifier with adjustable gain.

The clamping value is switched via pin 27 between
digital 16 (for R, G, B signals) and digital 128 (for

chrominance or colour difference signals). While clamping
pulse at pin 27 is logic 1, the device will adjust the
clamping level to the chosen value. The output format can
be selected between binary and two's complement at
pin 28.

LIMITING VALUES

In accordance with the Absolute Maximum Rating System (IEC 134).

THERMAL CHARACTERISTICS

SYMBOL PARAMETER MIN. MAX. UNIT

V

CCA

analog supply voltage −0.3 +7.0 V

V

CCD

digital supply voltage −0.3 +7.0 V

V

CCO

TTL output supply voltage −0.3 +7.0 V

∆V

CC

supply voltage difference between V

CCA

and V

CCD

−0.5 +0.5 V

supply voltage difference between V

CCO

and V

CCD

−0.5 +0.5 V

supply voltage difference between V

CCA

and V

CCO

−1.0 +1.0 V

V

I

input voltage −0.3 +7.0 V

I

O

output current − +10 mA

T

stg

storage temperature −55 +150 °C

T

amb

operating ambient temperature 0 +70 °C

T

j

junction temperature 0 +125 °C

SYMBOL PARAMETER VALUE UNIT

R

th j-a

thermal resistance from junction to ambient in free air

SOT117-1 55 K/W
SOT136-1 70 K/W

June 1994 6

Philips Semiconductors Product specification

Video analog input interface TDA8709A

CHARACTERISTICS

V

CCA

= V22to V23 = 4.5 to 5.5 V; V

CCD

= V6to V8 = 4.5 to 5.5 V; V

CCO

= V7to V8 = 4.2 to 5.5 V; AGND and DGND

shorted together; V

CCA

to V

CCD

= −0.5 to +0.5 V; V

CCO

to V

CCD

= −0.5 to +0.5 V; V

CCA

to V

CCO

= −0.5 to +0.5 V;

T

amb

= 0 to +70 °C; typical readings taken at V

CCA

= V

CCD

= V

CCO

= 5 V and T

amb

= 25 °C; unless otherwise specified.

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

Supplies

V

CCA

analog supply voltage 4.5 5.0 5.5 V

V

CCD

digital supply voltage 4.5 5.0 5.5 V

V

CCO

TTL output supply voltage 4.2 5.0 5.5 V

I

CCA

analog supply current − 40 47 mA

I

CCD

digital supply current − 24 30 mA

I

CCO

TTL output supply current TTL load (see Fig.7) − 12 16 mA

Preamplifier inputs

VIN0

TO VIN2 INPUTS

V

I(p-p)

input voltage (peak-to-peak value) note 1 0.6 − 1.5 V

|Z

i

| input impedance fi= 6 MHz 10 20 − kΩ

C

I

input capacitance fi = 6 MHz − 1 − pF
I0 AND I1 TTL INPUTS (SEE TABLE 1)
V

IL

LOW level input voltage 0 − 0.8 V
V

IH

HIGH level input voltage 2.0 − V

CCD

V

I

IL

LOW level input current VI = 0.4 V −400 −−µA
I

IH

HIGH level input current VI = 2.7 V −− 20 µA
CLS, OFS AND CLP TTL INPUTS (SEE FIG.5)
V

IL

LOW level input voltage 0 − 0.8 V
V

IH

HIGH level input voltage 2.0 − V

CCD

V

I

IL

LOW level input current VI = 0.4 V −400 −−µA
I

IH

HIGH level input current VI = 2.7 V −− 20 µA
t

CLP

clamp pulse width 2 −−µs
GAIN INPUT (PIN 25)
V

25(min)

input voltage for minimum gain see Fig.9 − 1.8 − V
V

25(max)

input voltage for maximum gain see Fig.9 − 3.8 − V
I

I

input current − 1.0 −µA
CLAMP INPUT (PIN 24)
V

24

clamp voltage for code 128 output − 3.5 − V
I

24

clamp output current see Table 2

June 1994 7

Philips Semiconductors Product specification

Video analog input interface TDA8709A

Video amplifier outputs

ANOUT OUTPUT (PIN 19)
V

19(p-p)

AC output voltage

(peak-to-peak value)

VOF = 1.33 V (p-p);
V25= 3.0 V

− 1.33 − V

I

19

internal current source RL = ∞ 2.0 2.5 − mA
I

O(p-p)

output current driven by the load V

ANOUT

= 1.33 V (p-p);

note 2

−− 1.0 mA

V

19

DC output voltage for black level CLS = logic 1 − V

CCA

− 2.02 − V

V

19

DC output voltage for black level CLS = logic 0 − V

CCA

− 2.6 − V

Z

19

output impedance − 20 −Ω

Preamplifier dynamic characteristics

α

ct

crosstalk between VIN inputs V

CCA

= 4.75 to 5.25 V;

note 3

−−50 −45 dB

G

diff

differential gain V

VIN

= 1.33 V (p-p);

V25= 3.0 V

− 2 − %

ϕ

diff

differential phase V

VIN

= 1.33 V (p-p);

V25= 3.0 V

− 0.8 − deg

B −3 dB bandwidth 12 −−MHz
S/N signal-to-noise ratio note 4 60 −−dB
SVRR1 supply voltage ripple rejection note 5 − 45 − dB
∆G gain range see Fig.9 −4.5 − +6.0 dB
G

stab

gain stability as a function of supply

voltage and temperature

see Fig.9 −− 5%

Analog-to-digital converter inputs

CLK

INPUT (PIN 5)

V

IL

LOW level input voltage 0 − 0.8 V
V

IH

HIGH level input voltage 2.0 − V

CCD

V

I

IL

LOW level input current V

clk

= 0.4 V −400 −−µA

I

IH

HIGH level input current V

clk

= 2.7 V −− 100 µA

|Z

i

| input impedance f

clk

= 10 MHz − 4 − kΩ

C

I

input capacitance f

clk

= 10 MHz − 4.5 − pF
FOEN INPUT (SEE TABLE 3)
V

IL

LOW level input voltage 0 − 0.8 V

V

IH

HIGH level input voltage 2.0 − V

CCD

V

I

IL

LOW level input current V9= 0.4 V −400 −−µA

I

IH

HIGH level input current V9= 2.7 V −− 20 µA

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

June 1994 8

Philips Semiconductors Product specification

Video analog input interface TDA8709A

ADCIN INPUT (PIN 20; SEE TABLE 4)
V

20

input voltage digital output = 00 − V

CCA

− 2.52 − V

V

20

input voltage digital output = 255 − V

CCA

− 1.52 − V

V

20(p-p)

input voltage amplitude
(peak-to-peak value)

− 1.0 − V

I

20

input current − 1.0 10 µA

|Z

i

| input impedance fi= 6 MHz − 50 − MΩ

C

I

input capacitance fi = 6 MHz − 1 − pF

Analog-to-digital converter outputs

D

IGITAL OUTPUTS D0 TO D7

V

OL

LOW level output voltage IOL = 2 mA 0 − 0.6 V

V

OH

HIGH level output voltage IOL = −0.4 mA 2.4 − V

CCD

V

I

OZ

output current in 3-state mode 0.4V<VO< V

CCD

−20 − +20 µA

Switching characteristics

f

clk(max)

maximum clock input frequency see Fig.5; note 6 30 32 − MHz

Analog signal processing (f

clk

= 32 MHz; see Fig.7)

G

diff

differential gain V20 = 1.0 V (p-p);

see Fig.6; note 7

− 2 − %

ϕ

diff

differential phase see Fig.6; note 7 − 2 − deg

f

1

fundamental harmonics (full-scale) fi= 4.43 MHz; note 7 −− 0dB

f

all

harmonics (full-scale);
all components

fi= 4.43 MHz; note 7 −−55 − dB

SVRR2 supply voltage ripple rejection note 8 − 1 5 %/V

Transfer function

ILE DC integral linearity error −− ±1 LSB
DLE DC differential linearity error −− ±0.5 LSB
ILE AC integral linearity error note 9 −− ±2 LSB

Timing (f

clk

= 32 MHz; see Figs 5, 6 and 7)

D

IGITAL OUTPUTS (C

L

= 15 pF; IOL=2mA;RL=2kΩ)

t

ds

sampling delay time − 2 − ns

t

h

output hold time − 8 − ns

t

d

output delay time − 16 20 ns

t

dEZ

3-state delay time; output enable − 16 25 ns

t

dDZ

3-state delay time; output disable − 12 25 ns

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

June 1994 9

Philips Semiconductors Product specification

Video analog input interface TDA8709A

Notes to the “Characteristics”

1. 0 dB is obtained at the AGC amplifier when applying V

i(p-p)

= 1.33 V.

2. The output current at pin 19 should not exceed 1 mA. The load impedance RL should be referenced to V

CCA

and

defined as:
a) AC impedance ≥1kΩ and the DC impedance >2.7 kΩ.
b) The load impedance should be coupled directly to the output of the amplifier so that the DC voltage supplied by

the clamp is not disturbed.

3. Input signals with the same amplitude. Gain is adjusted to obtain ANOUT = 1.33 V (p-p).

4. Signal-to-noise ratio measured with 5 MHz bandwidth:

5. The voltage ratio is expressed as:
for V

I

= 1 V (p-p), gain at 100 kHz = 1 and 1 V supply variation.

6. It is recommended that the rise and fall times of the clock are ≥2 ns. In addition, a ‘good layout’ for the digital and

analog grounds is recommended.

7. These measurements are realized on analog signals after a digital-to-analog conversion (TDA8702 is used).

8. The supply voltage rejection is the relative variation of the analog signal (full-scale signal at input) for 1 V of supply

variation:

9. Full-scale sine wave (f

i

= 4.4 MHz; f

clk

= 27 MHz).

S
N

--- -

20 log

V

ANOUT p p–()

V

ANOUT (RMS noise)

--------------------------------------------- -

at B = 5 MHz.=

SVRR1 20log

∆V

CCA

V

CCA

------------------

G

∆ G

--------

×=

SVRR2

∆ V

I00()VIFF()

–()V

I00()VIFF()

–()+

∆V

CCA

-----------------------------------------------------------------------------------------------------

=