Philips TDA8703T-C4, TDA8702T-C2 Datasheet
DATA SH EET
Product specification
Supersedes data of April 1993
File under Integrated Circuits, IC02
1996 Aug 23
INTEGRATED CIRCUITS
TDA8702
8-bit video digital-to-analog
converter
1996 Aug 23 2
Philips Semiconductors Product specification
8-bit video digital-to-analog converter TDA8702
FEATURES
• 8-bit resolution
• Conversion rate up to 30 MHz
• TTL input levels
• Internal reference voltage generator
• Two complementary analog voltage outputs
• No deglitching circuit required
• Internal input register
• Low power dissipation
• Internal 75 Ω output load (connected to the analog
supply)
• Very few external components required.
APPLICATIONS
• High-speed digital-to-analog conversion
• Digital TV including:
– field progressive scan
– line progressive scan
• Subscriber TV decoders
• Satellite TV decoders
• Digital VCRs.
GENERAL DESCRIPTION
The TDA8702 is an 8-bit Digital-to-Analog Converter
(DAC) for video and other applications. It converts the
digital input signal into an analog voltage output at a
maximum conversion rate of 30 MHz. No external
reference voltage is required and all digital inputs are TTL
compatible.
QUICK REFERENCE DATA
Note
1. D0 to D7 connected to V
CCD
and CLK connected to DGND.
2. The analog output voltages (V
OUT
and V
OUT
) are negative with respect to V
CCA
(see Table 1). The output resistance
between V
CCA
and each of these outputs is typically 75 Ω.
3. The −3 dB analog output bandwidth is determined by real time analysis of the output transient at a maximum input
code transition (code 0 to 255).
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
V
CCA
analog supply voltage 4.5 5.0 5.5 V
V
CCD
digital supply voltage 4.5 5.0 5.5 V
I
CCA
analog supply current note 1 − 26 32 mA
I
CCD
digital supply current note 1 − 23 30 mA
V
OUT
− V
OUT
full-scale analog output voltage
(peak-to-peak value)
note 2
Z
L
=10kΩ−1.45 −1.60 −1.75 V
Z
L
=75kΩ−0.72 −0.80 −0.88 V
ILE DC integral linearity error −−±1/2 LSB
DLE DC differential linearity error −−±1/2 LSB
f
CLK
maximum conversion rate −−30 MHz
B −3 dB analog bandwidth f
CLK
= 30 MHz; note 3 − 150 − MHz
P
tot
total power dissipation − 250 340 mW
1996 Aug 23 3
Philips Semiconductors Product specification
8-bit video digital-to-analog converter TDA8702
ORDERING INFORMATION
BLOCK DIAGRAM
TYPE
NUMBER
PACKAGE
NAME DESCRIPTION VERSION
TDA8702 DIP16 plastic dual in-line package; 16 leads (300 mil); long body SOT38-1
TDA8702T SO16 plastic small outline package; 16 leads; body width 7.5 mm SOT162-1
Fig.1 Block diagram.
handbook, full pagewidth
BAND-GAP
REFERENCE
CURRENT
REFERENCE
LOOP
CURRENT
GENERATORS
CURRENT
SWITCHES
REGISTERS
CLOCK INPUT
INTERFACE
MSA659
DATA
INPUT
INTERFACE
12
11
3
4
10
9
8
7
5
1
2
6
REF
100 nF
DGND
AGND
CLK
(LSB) D0
D1
D2
D3
D4
D5
D6
(MSB) D7
75
Ω
75
Ω
16
15
14
V
CCA
V
OUT
V
OUT
V
CCD
TDA8702/
TDA8702T
13
1996 Aug 23 4
Philips Semiconductors Product specification
8-bit video digital-to-analog converter TDA8702
PINNING
SYMBOL PIN DESCRIPTION
REF 1 voltage reference (decoupling)
AGND 2 analog ground
D2 3 data input; bit 2
D3 4 data input; bit 3
CLK 5 clock input
DGND 6 digital ground
D7 7 data input; bit 7
D6 8 data input; bit 6
D5 9 data input; bit 5
D4 10 data input; bit 4
D1 11 data input; bit 1
D0 12 data input; bit 0
V
CCD
13 positive supply voltage for digital
circuits (+5 V)
V
OUT
14 analog voltage output
V
OUT
15 complementary analog voltage output
V
CCA
16 positive supply voltage for analog
circuits (+5 V)
Fig.2 Pin configuration.
handbook, halfpage
MSA658
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
TDA8702/
TDA8702T
V
CCA
V
OUT
V
OUT
V
CCD
D0
D1
D4
D5
D6
D7
D3
D2
DGND
CLK
AGND
REF
1996 Aug 23 5
Philips Semiconductors Product specification
8-bit video digital-to-analog converter TDA8702
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 134).
HANDLING
Inputs and outputs are protected against electrostatic discharges in normal handling. However, to be totally safe, it is
desirable to take normal precautions appropriate to handling integrated circuits.
THERMAL RESISTANCE
SYMBOL PARAMETER MIN. MAX. UNIT
V
CCA
analog supply voltage −0.3 +7.0 V
V
CCD
digital supply voltage −0.3 +7.0 V
V
CCA
− V
CCD
supply voltage differential −0.5 +0.5 V
AGND − DGND ground voltage differential −0.1 +0.1 V
V
I
input voltage (pins 3 to 5 and 7 to 12) −0.3 V
CCD
V
I
OUT/IOUT
total output current (pins 14 and 15) −5 +26 mA
T
stg
storage temperature −55 +150 °C
T
amb
operating ambient temperature 0 +70 °C
T
j
junction temperature − +125 °C
SYMBOL PARAMETER VALUE UNIT
R
th j-a
from junction to ambient in free air
SOT38-1 70 K/W
SOT162-1 90 K/W
1996 Aug 23 6
Philips Semiconductors Product specification
8-bit video digital-to-analog converter TDA8702
CHARACTERISTICS
V
CCA=V16
− V2= 4.5 V to 5.5 V; V
CCD=V13
− V6= 4.5 V to 5.5 V; V
CCA
− V
CCD
= −0.5 V to +0.5 V; V
REF
decoupled to
AGND by a 100 nF capacitor; T
amb
=0°C to +70 °C; AGND and DGND shorted together; unless otherwise specified
(typical values measured at V
CCA=VCCD
= 5 V and T
amb
=25°C).
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
Supply
V
CCA
analog supply voltage 4.5 5.0 5.5 V
V
CCD
digital supply voltage 4.5 5.0 5.5 V
I
CCA
analog supply current note 1 − 26 32 mA
I
CCD
digital supply current note 1 − 23 30 mA
AGND − DGND ground voltage differential −0.1 − +0.1 V
Inputs
DIGITAL INPUTS (D7 TO D0) AND CLOCK INPUT (CLK)
V
IL
LOW level input voltage 0 − 0.8 V
V
IH
HIGH level input voltage 2.0 − V
CCD
V
I
IL
LOW level input current VI= 0.4 V −−0.3 −0.4 mA
I
IH
HIGH level input current VI= 2.7 V − 0.01 20 µA
f
CLK
maximum clock frequency −−30 MHz
Outputs (note 2; referenced to V
CCA
)
V
OUT
− V
OUT
full-scale analog output voltages
(peak-to-peak value)
ZL=10kΩ−1.45 −1.60 −1.75 V
Z
L
=75Ω−0.72 −0.80 −0.88 V
V
OS
analog offset output voltage code = 0 −−3−25 mV
V
OUT
/TC full-scale analog output voltage
temperature coefficient
−−200 µV/K
V
OS
/TC analog offset output voltage
temperature coefficient
−−20 µV/K
B −3 dB analog bandwidth note 3; f
CLK
= 30 MHz − 150 − MHz
G
diff
differential gain − 0.6 − %
Φ
diff
differential phase − 1 − deg
Z
O
output impedance − 75 −Ω
Transfer function (f
CLK
= 30 MHz)
ILE DC integral linearity error −−±1/2 LSB
DLE DC differential linearity error −−±1/2 LSB
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