Product specification
Supersedes data of 1996 Jan 02
File under Integrated Circuits, IC01
1997 Jun 27
Philips SemiconductorsProduct specification
Low-voltage stereo headphone amplifierTDA8559
FEA TURES
• Operating voltage from 1.9 to 30 V
• Very low quiescent current
• Low distortion
• Few external components
APPLICATIONS
• Portable telephones
• Walk-mans
• Portable audio
• Mains fed equipment.
• Differential inputs
• Usable as a mono amplifier in Bridge-Tied Load (BTL) or
stereo Single-Ended (SE)
• Single-ended mode without loudspeaker capacitor
• Mute and standby mode
• Short-circuit proof to ground, to supply voltage (<10 V)
and across load
• No switch on or switch off clicks
• ESD protected on all pins.
GENERAL DESCRIPTION
The TDA8559 is a stereo amplifier that operates over a
wide supply voltage range from 1.9 to 30 V and consumes
a very low quiescent current. This makes it suitable for
battery fed applications (2 × 1.5 V cells). Because of an
internal voltage buffer, this device can be used with or
without a capacitor connected in series with the load. It can
be applied as a headphone amplifier, but also as a mono
amplifier with a small speaker (25 Ω), or as a line driver in
mains applications.
QUICK REFERENCE DATA
SYMBOLPARAMETERCONDITIONSMIN.TYP.MAX.UNIT
Supplies
V
I
q(tot)
I
stb
P
operating supply voltage1.9330V
total quiescent current−2.754mA
standby supply current−−10µA
Stereo application
P
o
THDtotal harmonic distortionP
G
v
f
ss
output powerTHD = 10%3035−mW
=20mW; fi= 1 kHz−0.0750.15%
o
P
=20mW; fi= 10 kHz−0.1−%
o
voltage gain252627dB
small signal roll-off frequency−1dB−750−kHz
BTL application
P
o
THDtotal harmonic distortionP
G
v
output powerTHD = 10%125140−mW
=70mW; fi= 1 kHz−0.050.1%
o
P
=70mW; fi= 10 kHz−0.2−%
o
voltage gain313233dB
ORDERING INFORMATION
TYPE
NUMBER
NAMEDESCRIPTIONVERSION
PACKAGE
TDA8559DIP16plastic dual in-line package; 16 leads (300 mil); long bodySOT38-1
TDA8559TSO16plastic small outline package; 16 leads; body width 3.9 mmSOT109-1
1997 Jun 272
Philips SemiconductorsProduct specification
Low-voltage stereo headphone amplifierTDA8559
BLOCK DIAGRAM
handbook, full pagewidth
STANDBY
+IN1
−IN1
MUTE
MODE
+IN2
−IN2
SVRR
1
2
3
7
8
5
6
V
4
REFERENCE
50 kΩ
50
kΩ
P
100 kΩ
100
kΩ
+
V/I
−
50 kΩ
INPUT
LOGIC
+
V/I
−
50
kΩ
TDA8559
V
P2
−
+
+
−
BUFFER
50 kΩ
OA
DQC
OA
50 kΩ
V
P1
1615
V
P
14
OUT1
11
OUT2
12
BUFFER
n.c.GND
Fig.1 Block diagram.
1997 Jun 273
139,10
MGD115
Philips SemiconductorsProduct specification
Low-voltage stereo headphone amplifierTDA8559
PINNING
SYMBOLPINDESCRIPTION
STANDBY1standby select
+IN12non-inverting input 1
−IN13inverting input 1
SVRR4supply voltage ripple rejection
+IN25non-inverting input 2
The TDA8559 contains two amplifiers with differential
inputs, a 0.5VP output buffer and a high supply voltage
stabilizer. Each amplifier consists of a voltage-to-current
converter (V/I), an output amplifier and a common dynamic
quiescent current controller. The gain of each amplifier is
internally fixed at 26 dB (= 20 ×). The 0.5VP output can be
used as a replacement for the single-ended capacitors.
The two amplifiers can also be used as a mono amplifier in
a BTL configuration thereby resulting in more output
power.
With three mode select pins, the device can be switched
into the following modes:
1. Standby mode (I
<10µA)
P
2. Mute mode
3. Operation mode, with two input selections (the input
source is directly connected or connected via coupling
capacitors at the input).
The ripple rejection in the stereo application with a
single-ended capacitor can be improved by connecting a
capacitor between the 0.5VP capacitor pin and ground.
The device is fully protected against short-circuiting of the
output pins to ground, to the low supply voltage pin and
across the load.
V/I converters
The V/I converters have a transconductance of 400 µS.
The inputs are completely symmetrical and the two
amplifiers can be used in opposite phase. The mute mode
causes the V/I converters to block the input signal.
The input mode pin selects two applications in which the
V/I converters can be used.
The first application (input mode pin floating) is used with
a supply voltage below 6 V. The input DC level is at ground
level (the unused input pin connected to ground) and no
input coupling capacitors are necessary. The maximum
converter output current is sufficient to obtain an output
swing of 3 V (peak).
In the second application with a supply voltage greater
than 6 V (input mode pin HIGH), the input mode pin is
connected to VP. In this configuration (input DC
level = 0.5VP+ 0.6 V) the input source must be coupled
with a capacitor and the two unused input pins must be
connected via a capacitor to ground, to improve noise
performance. This application has a higher quiescent
current, because the maximum output current of the V/I
converter is higher to obtain an output voltage swing of
9 V (peak).
1997 Jun 274
Philips SemiconductorsProduct specification
Low-voltage stereo headphone amplifierTDA8559
Output amplifiers
The output amplifiers have a transresistance of 50 kΩ, a
bandwidth of approximately 750 kHz and a maximum
output current of 100 mA. The mid-tap output voltage
equals the voltage applied at the non-inverting pin of the
output amplifier. This pin is connected to the output of the
0.5VP buffer. This reduces the distortion when the load is
connected between an output amplifier and the buffer
(because feedback is applied over the load).
Buffer
The buffer delivers 0.5V
to the output with a maximum
P
output (sink and source) current of 200 mA (peak).
Dynamic quiescent controller
The Dynamic Quiescent Current controller (DQC) gives
the advantage of low quiescent current and low distortion.
When there are high frequencies in the output signal, the
DQC will increase the quiescent current of the two output
amplifiers and the buffer. This will reduce the cross-over
distortion that normally occurs at high frequencies and low
quiescent current. The DQC gives output currents that are
linear with the amplitude and the frequency of the output
signals. These currents control the quiescent current.
Stabilizer
The TDA8559 has a voltage supply range from
1.9 to 30 V. This range is divided over two supply voltage
pins. Pin 16 is 1.9 to 18 V (breakdown voltage of the
process); this pin is preferred for supply voltages less than
18 V. Pin 15 is used for applications where V
is
P
approximately 6 to 30 V. The stabilizer output is internally
connected to the supply voltage pin 16. In the range from
6 to 18 V, the voltage drop to pin 16 is 1 V. In the range
from 18 to 30 V the stabilizer output voltage (to pin 16) is
approximately 17 V.
Input logic
The MUTE pin (pin 7) selects the mute mode of the V/I
converters. LOW (TTL/CMOS) level is mute. A voltage
between 0.5 V (low level) and 1.5 V (high level) causes a
soft mute to operate (no plops). When pin 7 is floating or
greater than 1.5 V it is in the operating condition.
The input mode pin must be connected to V
when the
P
supply voltage is greater than 6 V. The input mode logic
raises the tail current of the V/I converters and enables the
two buffers to bias the inputs of the V/I converters.
Reference
This circuit supplies all currents needed in this device. With
the standby mode pin 1 (TTL/CMOS), it is possible to
switch to the standby mode and reduce the total quiescent
current to below 10 µA.
1997 Jun 275
Philips SemiconductorsProduct specification
Low-voltage stereo headphone amplifierTDA8559
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 134).
SYMBOLPARAMETERCONDITIONSMIN.MAX.UNIT
V
P2(max)
V
P1(max)
V
i(max)
I
ORM
P
tot
T
amb
T
stg
T
vj
t
sc
maximum supply voltage (pin 15)−30V
maximum supply voltage (pin 16)−18V
maximum input voltage−18V
peak output currentrepetitive−150mA
total power dissipationSO16−1.19W
voltage gain252627dB
small signal roll-off frequency−1dB−750−kHz
channel separationRs=5kΩ40−−dB
channel unbalance−−1dB
noise output voltagenote 3−7085µV
noise output voltage in mutenote 3−2030µV
output voltage in mutenote 4−−30µV
mid-tap voltage1.41.51.6V
input impedance75100125kΩ
DC output offset voltagenote 5−−100mV
=32Ω)
L
=20mW; fi= 1 kHz; note 2−0.0750.15%
o
P
=20mW; fi= 10 kHz; note 2−0.1−%
o
SVRRsupply voltage ripple rejectionnote 64555−dB
BTL application (R
P
o
output powerTHD = 10%125140−mW
THDtotal harmonic distortionP
G
v
f
ss
V
no
V
no(mute)
V
o(mute)
V
os
voltage gain313233dB
small signal roll-off frequency−1dB−750−kHz
noise output voltagenote 3−100120µV
noise output voltage in mutenote 3−2540µV
output voltage in mutenote 4−−40µV
DC output offset voltagenote 7−−150mv
=25Ω)
L
=70mW; fi= 1 kHz; note−0.050.1%
o
P
=70mW; fi= 10 kHz; note 2−0.1−%
o
SVRRsupply voltage ripple rejectionnote 63949−dB
Z
i
Line driver application (R
V
o
input impedance395061kΩ
≥ 1kΩ)
L
line output voltage0.1−2.9V
Notes
1. The supply voltage range at pin VP1 is from 1.9 to 18 V. Pin VP2 is used for the voltage range from 6 to 30 V.
2. Measured with low-pass filter 30 kHz.
3. Noise output voltage measured with a bandwidth of 20 Hz to 20 kHz, unweighted. Rs=5kΩ.
4. RMS output voltage in mute is measured with Vi= 200 mV (RMS); f = 1 kHz.
5. DC output offset voltage is measured between the signal output and the 0.5VP output.
6. The ripple rejection is measured with a ripple voltage of 200 mV (RMS) applied to the positive supply rail (Rs=0kΩ).
7. DC output offset voltage is measured between the two signal outputs.
1997 Jun 277
Philips SemiconductorsProduct specification
Low-voltage stereo headphone amplifierTDA8559
APPLICATION INFORMATION
General
For applications with a maximum supply voltage of 6 V
(input mode LOW) the input pins need a DC path to ground
(see Figs 3 and 4). For applications with supply voltages in
the range from 6 to 18 V (input mode HIGH) the input DC
level is 0.5V
+ 0.6 V. In this situation the input
P
configurations illustrated in Figs 5 and 6 have to be used.
The capacitor Cb is recommended for stability
improvement. The value may vary between
10 and 100 nF. This capacitor should be placed close to
the IC between pin 12 and pin 13.
Heatsink design
The standard application is stereo headphone
single-ended with a 32 Ω load impedance to buffer
(see Fig.9). The headphone amplifier can deliver a peak
output current of 150 mA into the load.
For the DIP16 envelope R
sine wave power dissipation for T
2.4 W
For T
1.7 W
For the SO16 envelope R
150 25–
=
---------------------52
=60°C the maximum total power dissipation is:
amb
150 60–
=
---------------------52
th j-amb
sinewave power dissipation for T
1.2 W
For T
0.85 W
150 25–
=
----------------------
105
=60°C the maximum total power dissipation is:
amb
150 60–
=
---------------------105
= 52 K/W; the maximum
th j-amb
=25°C is:
amb
= 105 K/W; the maximum
=25°C is:
amb
Test conditions
=25°C; unless otherwise specified: VP=3V,
T
amb
f = 1 kHz, RL=32Ω, Gain = 26 dB, low input mode,
band-pass filter: 22 Hz to 30 kHz. The total harmonic
distortion as a function of frequency was measured with
low-pass filter of 80 kHz. The quiescent current has been
measured without any load impedance.
In applications with coupling capacitors towards the load,
an electrolytic capacitor has to be connected to pin 4
(SVRR).
• The graphs for the single-ended application have been
measured with the application illustrated in Fig.9; input
configuration for input mode low (Fig.4) and input
configuration for input mode high (Fig.6).
• The graphs for the BTL application ‘input mode low’
have been measured with the application circuit
illustrated in Fig.11 and the input configuration
illustrated in Fig.4.
• The graphs for the line-driver application have been
measured with the application circuit illustrated in Fig.13
and the input configuration illustrated in Fig.6; input
mode high.
Input configurations
The IC can be applied in two ways, ‘input mode low’ and
‘input mode high’. This can be selected by the input mode
at pin 8:
1. Input mode low: pin 8 floating:
The DC level of the input pins has to be between 0 V
and (V
− 1.8 V). A DC path to ground is needed.
P
The maximum output voltage is approximately
2.1 V (RMS). Input configurations illustrated in
Figs 3 and 4 should be used.
2. Input mode high: pin 8 is connected to VP:
This mode is intended for supply voltages >6 V. It can
deliver a maximum output voltage of approximately
6 V (RMS) at THD = 0.5%. The DC voltage level of the
input pins is (0.5VP+ 0.6 V). Coupling capacitors are
necessary. Input configurations illustrated in
Figs 5 and 6 should be used.
1997 Jun 278
Philips SemiconductorsProduct specification
Low-voltage stereo headphone amplifierTDA8559
2.2 µF
V
IN
5 kΩINPUT
pins 2 and 5
pins 3 and 6
MGD123
Fig.3Input configuration; with input capacitor
(VP< 6 V).
220 nF
V
IN
220 nF
pins 2 and 5
INPUT
pins 3 and 6
MGD125
handbook, halfpage
V
IN
pins 2 and 5
INPUT
pins 3 and 6
MGD124
Fig.4Input configuration; without input capacitor
(VP< 6 V).
pin 2
V
V
100 nF
IN
220
nF
IN
100 nF
pin 3
pin 6
pin 5
MGD126
Fig.5 Input configuration (VP> 6 V).
V
P
620 kΩ
47 kΩ
mute
7
220 nF
MGL135
Fig.7 Soft mute.
1997 Jun 279
Fig.6Input configuration (at VP> 6 V, combined
negative inputs).
Standby/mute
• The standby mode (V1< 0.5 V) is intended for power
saving purpose. Then the total quiescent current is
<10 µA.
• To avoid ‘pop-noise’ during switch-on or switch-off the
IC can be muted (V7< 0.5 V). This can be achieved by
a ‘soft-mute’ circuit or by direct control from a
microcontroller.
Philips SemiconductorsProduct specification
Low-voltage stereo headphone amplifierTDA8559
Application 1: SE with loudspeaker capacitor
(see Fig.8)
The value of capacitor Cr influences the behaviour of the
Supply Voltage Ripple Rejection (SVRR) at low
frequencies; increasing the value of Cr increases the
performance of the SVRR.
Application 2: SE to buffer (without loudspeaker
capacitor) (see Fig.9)
This is the basic headphone application. The advantage of
this application with respect to application 1, is that it
needs only one external component (Cb) in the event of
stability problems.
Application 3: Improved SE to buffer (without
loudspeaker capacitor) (see Fig.10)
This application is an improved configuration of
application 2. The distinction between the two is
connecting the loads in opposite phase. This lowers the
average current through the SE buffer.
It should be noted that a headphone cannot be used
because the load requires floating terminals.
Application 4: Bridge tied load mono amplifier
(see Fig.11)
This configuration delivers four times the output power of
the SE application with the same supply and load
conditions. The capacitor Cr is not required.
Application 6: Line driver application 6 V < V
<18V
P
(see Fig.13)
The TDA8559T delivers a virtual rail-to-rail output voltage.
Because the input mode has to be high, the input
configurations illustrated in Figs 5 and 6 should be used.
This application can also be used for headphone
application, however, due to the limited output current and
the limited output power at the headphone, series resistors
have to be used between the output pins and the load.
The value of capacitor Cr influences the behaviour of the
SVRR at low frequencies; increasing the value of Cr
increases the performance of the SVRR.
Application 7: Line driver application 6V < V
<30V
P
(see Fig.14)
With the supply voltage connected to pin 15 it is possible
to use the head amplifier above the maximum of 18 V to
pin 16. The internal supply voltage will be reduced to a
maximum of approximately 17 V.
This will be convenient in applications where the supply
voltage is higher than 18 V, however an output voltage
swing that reaches the higher supply voltage is not
required. the input configurations illustrated in
Figs 5 and 6 should be used. This application can also be
used for headphone applications. However, due to the
limited output current, series resistors have to be used
between the output pins and the load.
Application 5: Line driver application 1.9 V < V
<6V
P
(see Fig.12)
The TDA8559 delivers a virtual rail-to-rail output voltage
and is also usable in a low voltage environment, as a line
driver. In this application the input needs a DC path to
ground, input configurations illustrated in Figs 3 and 4
should be used. The value of capacitor Cr influences the
behaviour of the SVRR at low frequencies; increasing the
value of Cr increases the performance of the SVRR.
1997 Jun 2710
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