1999 Sep 27 4
Philips Semiconductors Product specification
DC-coupled vertical deflection circuit TDA8356
PINNING FUNCTIONAL DESCRIPTION
The vertical driver circuit is a bridge configuration. The
deflectioncoilisconnectedbetweentheoutputamplifiers,
which are driven in opposite phase. An external resistor
(RM) connected in series with the deflection coil provides
internalfeedback information. The differentialinput circuit
is voltage driven. The input circuit has been adapted to
enable it to be used with the TDA9150, TDA9151B,
TDA9160A, TDA9162, TDA8366 and TDA8376 which
deliver symmetrical current signals. An external resistor
(R
CON
) connected between the differential input
determines the output current through the deflection coil.
Therelationshipbetweenthe differential input current and
the output current is defined by: I
diff
× R
CON=Icoil
× RM.
The output current is adjustable from 0.5 A (p-p) to
2 A (p-p) by varying RM. The maximum input differential
voltage is 1.8 V. In the application it is recommended that
V
diff
= 1.5 V (typ). This is recommended because of the
spread of input current and the spread in the value of
R
CON
.
The flyback voltage is determined by an additional supply
voltage VFB. The principle of operating with two supply
voltages (class G) makes it possible to fix the supply
voltage VPoptimum for the scan voltage and the second
supplyvoltage VFBoptimumfor the flyback voltage. Using
this method, very high efficiency is achieved.
The supply voltage VFB is almost totally available as
flyback voltage across the coil, this being possible due to
the absence of a decoupling capacitor (not necessary,
due to the bridge configuration). Built-in protections are:
• Thermal protection
• Short-circuit protection of the output pins (pins 4 and 7)
• Short-circuit protection of the output pins to VP.
A guard circuit V
O(guard)
is provided. The guard circuit is
activated at the following conditions:
• During flyback
• Duringshort-circuit of the coil andduring short-circuit of
the output pins (pins 4 and 7) to VP or ground
• During open loop
• When the thermal protection is activated.
This signal can be used for blanking the picture tube
screen.
SYMBOL PIN DESCRIPTION
I
drive(pos)
1 input power-stage (positive);
includes I
I(sb)
signal bias
I
drive(neg)
2 input power-stage (negative);
includes I
I(sb)
signal bias
V
P
3 operating supply voltage
V
O(B)
4 output voltage B
GND 5 ground
V
FB
6 input flyback supply voltage
V
O(A)
7 output voltage A
V
O(guard)
8 guard output voltage
V
I(fb)
9 input feedback voltage
Fig.2 Pin configuration.
Metal block connected to substrate pin 5.
Metal on back.
handbook, 2 columns
1
2
3
4
5
6
7
8
9
TDA8356
I
drive(pos)
V
I(fb)
V
P
V
O(B)
GND
V
FB
V
O(A)
V
O(guard)
I
drive(neg)
MGC092