Philips TDA4663T Datasheet
INTEGRATED CIRCUITS
DATA SH EET
TDA4663T
Baseband delay line
Product specification
Supersedes data of September 1993
File under Integrated Circuits, IC02
1996 Nov 22
Philips Semiconductors Product specification
Baseband delay line TDA4663T
FEATURES
• Two delay lines, using the switched-capacitor
technique, for a delay time of one horizontal line (1H)
minus 55 ns (64 µs − 55 ns)
GENERAL DESCRIPTION
The TDA4663T is an integrated baseband delay line circuit
with a delay time of one horizontal line (1H) minus 55 ns
(64 µs − 55 ns).
• Adjustment-free application
• Handles negative or positive colour-difference input
signals
• Clamping of AC-coupled input signals [mostly
colour-difference signals ±(R−Y) and ±(B−Y)]
• VCO without external components
• 3 MHz internal clock signal derived from a 6 MHz CCO,
line-locked by the sandcastle pulse (64 µs line)
• Sample-and-hold circuits and low-pass filters to
suppress the 3 MHz clock signal
• Output buffer amplifiers.
QUICK REFERENCE DATA
SYMBOL PARAMETER MIN. TYP. MAX. UNIT
V
P1
V
P2
I
P(tot)
V
i(p-p)
analog supply voltage (pin 9) 4.75 5 5.25 V
digital supply voltage (pin 1) 4.75 5 5.25 V
total supply current − 5.9 7.0 mA
input signal PAL/NTSC (peak-to-peak value)
±(R−Y); pin 16 − 1.3 − V
±(B−Y); pin 14 − 1.3 − V
G
v
V
o
gain of colour-difference output signals for PAL and NTSC
-----V
i
V
11
-------- V
16
V
12
-------- V
14
−1 0 +1 dB
−1 0 +1 dB
ORDERING INFORMATION
TYPE
NUMBER
NAME DESCRIPTION VERSION
PACKAGE
TDA4663T SO16 plastic small outline package; 16 leads; body width 3.9 mm SOT109-1
1996 Nov 22 2
Philips Semiconductors Product specification
Baseband delay line TDA4663T
BLOCK DIAGRAM
±(R−Y)
11
LP
SAMPLE-
AND-HOLD
LINE
MEMORY
mostly
output signals
colour-difference
output
buffers
pre-amplifiers
±(B−Y)
12
LP
SAMPLE-
AND-HOLD
LINE
MEMORY
n.c.
n.c.13n.c.15n.c.
2
6
TDA4663T
3 MHz shifting clock
BY-192
DIVIDER
PHASE
DETECTOR
FREQUENCY
BY-2
DIVIDER
CCO
6 MHz
LP
MED800
4, 8
3
GND2
1
P2
V
digital supply
Fig.1 Block diagram.
clamping pulse
SIGNAL
CLAMPING
16
±(R−Y)
handbook, full pagewidth
mostly
colour-difference
SIGNAL
CLAMPING
14
±(B−Y)
input signals
1996 Nov 22 3
analog supply
5
9
P1
V
DETECTOR
SANDCASTLE
sandcastle
pulse input
107GND1
Philips Semiconductors Product specification
Baseband delay line TDA4663T
PINNING
SYMBOL PIN DESCRIPTION
V
P2
n.c. 2 not connected
GND2 3 ground for digital part (0 V)
i.c. 4 internally connected
SAND 5 sandcastle pulse input
n.c. 6 not connected
V
CL
i.c. 8 internally connected
V
P1
GND1 10 ground for analog part (0 V)
V
o(R−Y)
V
o(B−Y)
n.c. 13 not connected
V
i(B−Y)
n.c. 15 not connected
V
i(R−Y)
1 supply voltage for digital part (+5 V)
7 clamping pulse input
9 supply voltage for analog part (+5 V)
11 ±(R−Y) output signal
12 ±(B−Y) output signal
14 ±(B−Y) input signal
16 ±(R−Y) input signal
handbook, halfpage
V
1
P2
n.c.
2
3
GND2
4
i.c.
TDA4663T
5
SAND
6
n.c.
7
V
CL
8
i.c.
MED801
Fig.2 Pin configuration.
16
V
i(R−Y)
15
n.c.
14
V
i(B−Y)
13
n.c.
12
V
o(B−Y)
11
V
o(R−Y)
10
GND1
9
V
P1
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 134). Ground pins 3 and 10 connected together.
SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT
V
P1
V
P2
V
5
V
n
I
n
T
stg
T
amb
P
tot
V
es
supply voltage (pin 9) −0.5 +7 V
supply voltage (pin 1) −0.5 +7 V
voltage on pin 5 −0.5 VP+ 1.0 V
voltage on pins 7, 11, 12, 14 and 16 −0.5 V
P
V
current on pins 7, 11 and 12 − 20 mA
storage temperature −25 +150 °C
operating ambient temperature −20 +70 °C
total power dissipation − 100 mW
electrostatic handling for all pins note 1 −±500 V
Note
1. Equivalent to discharging a 200 pF capacitor through a 0 Ω series resistor.
THERMAL CHARACTERISTICS
SYMBOL PARAMETER VALUE UNIT
R
th j-a
thermal resistance from junction to ambient in free air 220 K/W
1996 Nov 22 4
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