Philips TDA4657T, TDA4657 Datasheet

INTEGRATED CIRCUITS

DATA SH EET

TDA4657

Generic multi-standard decoder

Preliminary speciﬁcation File under Integrated Circuits, IC02

June 1993

Philips Semiconductors Preliminary speciﬁcation

Generic multi-standard decoder TDA4657

FEATURES

• Low voltage (8 V)

• Low power dissipation (250 mW)

• Automatic standard recognition

GENERAL DESCRIPTION

The TDA4657 is a monolithic integrated multi-standard colour decoder for PAL, SECAM and NTSC 4.43 MHz with negative colour difference output signals. It is adapted to the integrated baseband delay line TDA4660/61.

• No adjustments required

• Reduced external components

• Not all time constants integrated

(ACC, SECAM de-emphasis).

QUICK REFERENCE DATA

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT Supply

tot

supply voltage 7.2 8.0 8.8 V supply current VP= 8.0 V; without load 25 31 37 mA total power dissipation VP= 8.0 V; without load − 248 296 mW

Inputs

chrominance input voltage

note 1 20 200 400 mV

(peak-to-peak value)

sandcastle input voltage −−13.2 V

Outputs

colour difference output signals

independent of supply voltage; note 2

(peak-to-peak value)

−(R−Y) output PAL and NTSC 4.43 MHz 442 525 624 mV SECAM 950 1050 1150 mV

−(B−Y) output PAL and NTSC 4.43 MHz 559 665 791 mV SECAM 1200 1330 1460 mV

Notes to the quick reference data

1. Within 2 dB output voltage deviation.

2. Burstkey width 4.3 µs Burst width 2.25 µs, ratio burst chrominance amplitude 1/2.2.

ORDERING INFORMATION

EXTENDED

TYPE NUMBER

PINS PIN POSITION MATERIAL CODE

TDA4657 20 DIL plastic SOT146

TDA4657T 20 SO plastic SOT163A

Note

1. SOT146-1; 1996 November 26.

2. SOT163-1; 1996 November 26.

June 1993 2

PACKAGE

(1)

(2)

Philips Semiconductors Preliminary speciﬁcation

Generic multi-standard decoder TDA4657

June 1993 3

Fig.1 Block diagram.

Philips Semiconductors Preliminary speciﬁcation

Generic multi-standard decoder TDA4657

PINNING

SYMBOL PIN DESCRIPTION

−(R−Y) DEEM 2 external capacitor for SECAM de-emphasis

−(B−Y) CFOB 4 external capacitor SECAM demodulator control (B−Y) Channel GND 5 ground I

REF

CFOR 8 external capacitor SECAM demodulator control (R−Y) Channel CHR

ACC

HUE 11 input for HUE control and service switch N

IDT

OSC 14 PAL crystal PLL 15 external loop ﬁlter 2FSC 16 2 × f N

SEC

PAL

SC 20 sandcastle input

1 colour difference signal output −(R−Y)* for baseband delay line

3 colour difference signal output −(B−Y)* for baseband delay line

6 external resistor for SECAM oscillator 7 supply 8 V

9 chrominance signal input 10 external capacitor for ACC control

12 external capacitor for identiﬁcation circuit (NTSC) 13 external capacitor for identiﬁcation circuit (PAL and SECAM)

output

17 standard setting input/output for NTSC 4.43 18 standard setting input/output for SECAM 19 standard setting input/output for PAL

Fig.2 Pin configuration.

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Philips Semiconductors Preliminary speciﬁcation

Generic multi-standard decoder TDA4657

FUNCTIONAL DESCRIPTION

The IC contains all functions required for the identification and demodulation of signals with the standards PAL, SECAM and NTSC 4.3 with 4.43 MHz colour-carrier frequency. When an unknown signal is fed into the input, the circuit has to detect the standard of the signal, and has to switch on successively the appropriate input filter and demodulator and finally, after having identified the signal, it has to switch on the colour and, in event of NTSC reception, the hue control. At the outputs the two colour difference signals −(R−Y)* and −(B−Y)* are available.

ACC stage

The chrominance signal is fed into the asymmetrical input (pin 9) of the ACC stage (Automatic Colour Control). The input has to be AC coupled and has an input impedance of 20 kΩ in parallel with 10 pF. To control the chrominance amplitude the modulation independent burst amplitude is measured during the burstkey pulse which is derived from the sandcastle pulse present at pin 20. The generated error current is fed into an external storage capacitor at pin 10. The integrated error voltage controls the gain of the ACC stage so that its output is independent of input signal variations. The measurement is disabled during the vertical blanking to avoid failures because of missing burst signals.

Reference signal generation

The reference signal generation is achieved by a PLL system. The reference oscillator operates at twice the colour-carrier frequency and is locked on the burst of the chrominance signal (chr). A divider provides reference signals (f

) with the correct phase relationship for the

PAL/NTSC demodulator and the identification part. In the SECAM mode the two f0 frequencies are derived from the PAL crystal frequency by special dividers. In this mode the oscillator is not locked to the input signal. In the NTSC mode the hue control circuit is switched between ACC stage and PLL. The phase shift of the signal can be controlled by a DC voltage at pin 11. The hue control circuit is switched off during scanning. The reference frequency (2 × fsc) is available at pin 16 to drive a PAL comb filter for example.

Demodulation

The demodulation of the colour signal requires two demodulators. One is common for PAL and NTSC signals, the other is for SECAM signals. The PAL/NTSC demodulator consists of two synchronized demodulators, one for the (B−Y) Channel and the other for

the (R−Y) Channel. The required reference signals (f

)

are input from the reference oscillator. In NTSC mode the PAL switch is disabled. The SECAM demodulator consists of a PLL system. During vertical blanking the PLL oscillator is tuned to the f0 frequencies to provide a fixed black level at the demodulator output. During demodulation the control voltages are stored in the external capacitors at pins 4 and 8. The oscillator requires an external resistor at pin 6. Behind the PLL demodulator the signal is fed into the de-emphasis network which consists of two internal resistors (2.8 kΩ and 5.6 kΩ) and an external capacitor connected at pin 2 (220 pF). After demodulation the signal is filtered and then fed into the next stage.

Blanking, colour killer, buffers

As a result of using only one demodulator in SECAM mode the demodulated signal has to be split up in the (B−Y) Channel and the (R−Y) Channel. The unwanted signals occurring every second line, (R−Y) in the (B−Y) Channel and (B−Y) in the (R−Y) Channel, have to be blanked. This happens in the blanking stage by an artificial black level being inserted alternately every second line. To avoid disturbances during line and field flyback these parts of the colour differential signals are blanked in all modes. When no signal has been identified, the colour is switched off (signals are blanked) by the colour killer. At the end of the colour channels are low-ohmic buffers (emitter followers). The CD output signals −(B−Y)* and

−(R−Y)* are available at pins 1 and 3.

Identiﬁcation and system control

The identification part contains three identification demodulators. The first demodulates in PAL mode. It is only active during the burstkey pulse. The reference signal (fsc) has the (R−Y) phase. The second demodulator (PLL system) operates in SECAM mode and is active also during the burstkey pulse, but delayed by 2 µs. The PLL demodulator discriminates the frequency difference between the unmodulated f0 frequencies of the incoming signal (chr) and the reference frequency input from the crystal oscillator. These two demodulators are followed by an H/2 switch ‘rectifying’ the demodulated signal. The result is an identification signal (P

, pin 13) that is positive for a PAL

IDT

signal in PAL mode, for a SECAM signal in SECAM mode

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Philips Semiconductors Preliminary speciﬁcation

Generic multi-standard decoder TDA4657

and for a PAL signal in NTSC 4.4 mode. If P in SECAM mode, the scanner switches back to the PAL mode in order to prevent a PAL signal being erroneously identified as a SECAM signal (PAL priority). If then P mode and remains there if P

is not positive, the scanner returns to SECAM

IDT

is positive again. In the

IDT

event of a field frequency of 60 Hz the signal can not be identified as a SECAM signal, even if P

IDT

this event the scanner switches forward in the NTSC 4.4 mode. If the H/2 signal has the wrong polarity, the identification signal is negative and the H/2 flip-flop is set to the correct phase. The third demodulator operates in NTSC mode and is active during the burstkey pulse. The resulting identification signal (N

, pin 12) is positive for PAL and

IDT

NTSC 4.4 signals in NTSC 4.4 mode. The reference signal has the (B−Y) phase. The two identification signals allow an unequivocal identification of the received signal. In the event of a signal being identified, the scanning is stopped and after a delay time the colour is switched on.

is positive

IDT

is positive. In

pins 17, 18 and 19. During scanning the HIGH level is

2.5 V and when a signal has been identified the HIGH level is switched to 6 V. The standard pins can also be used as inputs in order to force the IC into a desired mode (Forced Standard Setting).

Sandcastle detector and pulse processing

In the sandcastle detector the super sandcastle pulse (SC) present at pin 20 is compared with three internal threshold levels by means of three differential amplifiers. The derived signals are the burstkey pulse, the horizontal blanking pulse and the combined horizontal and vertical blanking pulse. These signals are processed into various control pulses required for the timing of the IC.

Bandgap reference

In order to ensure that the CD output signals and the threshold levels of the sandcastle detector are independent of supply voltage variations a bandgap reference voltage has been integrated.

The standard outputs (active HIGH) are available at the

LIMITING VALUES

In accordance with the Absolute Maximum Rating System (IEC 134).

SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT

T T V P V

stg amb P tot 20

storage temperature −25 +150 °C operating ambient temperature 0 +70 °C supply voltage − 8.8 V power dissipation without load − 330 mW voltage at pin 20 I voltage at all other pins I

=10µA − 15 V

max

= 100 µA − VP+ vbeV

max

THERMAL RESISTANCE

SYMBOL PARAMETER THERMAL RESISTANCE

th j-a

thermal resistance on printed-circuit board from junction to ambient in free air (without heat spreader)

SO 20 90 K/W DIL 20 70 K/W

June 1993 6

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