Philips TDA1387T Datasheet

INTEGRATED CIRCUITS

DATA SH EET

TDA1387T

Stereo Continuous Calibration DAC (CC-DAC)

Preliminary speciﬁcation Supersedes data of September 1994 File under Integrated Circuits, IC01

1995 Dec 11

Philips Semiconductors Preliminary speciﬁcation

Stereo Continuous Calibration DAC (CC-DAC) TDA1387T

FEATURES

• Low power consumption

• Low total harmonic distortion

• Wide dynamic range (16-bit resolution)

• Continuous Calibration (CC) concept

• Single 3 to 5.5 V supply rail

• Output and bias current are proportional to the supply

voltage

• Fast settling time enables 2, 4 and 8 times oversampling (serial input) or double-speed operation at 4 times oversampling

• Internal bias current ensures maximum dynamic range

• Wide operating temperature range (−40 to + 85 °C)

• I2S-bus input format (time multiplex, two’s complement,

TTL)

• No zero-crossing distortion

• Large DC output voltage compliance

• Contained in small outline package.

ORDERING INFORMATION

APPLICATIONS

• Portable digital audio equipment.

GENERAL DESCRIPTION

The TDA1387T is a member of a generation of digital-to-analog converters which incorporates the innovative technique of Continuous Calibration. The largest bit currents are repeatedly generated from one single reference current. This duplication is based upon an internal charge storage principle and has an accuracy which is insensitive to ageing, temperature and process variations.

The TDA1387T is fabricated in a 1.0 µm CMOS process and features an extremely low power dissipation, small package size and easy application. The intrinsic high coarse current accuracy combined with the implemented symmetrical offset decoding method preclude zero-crossing distortion and ensure high quality audio reproduction. The CC-DAC is eminently suitable for use in portable digital audio equipment.

TYPE NUMBER

NAME DESCRIPTION VERSION

TDA1387T SO8 plastic small outline package; 8 leads; body width 3.9 mm. SOT96-1

PACKAGE

1995 Dec 11 2

Philips Semiconductors Preliminary speciﬁcation

Stereo Continuous Calibration DAC (CC-DAC) TDA1387T

QUICK REFERENCE DATA

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

(THD + N)/S total harmonic distortion

S/N signal-to-noise ratio at

BR input bit rate (pin 3) −− 18.4 Mbits/s f

clk

amb

tot

supply voltage 3.0 5.0 5.5 V supply current VDD= 5 V at code 0000H − 5.5 6.5 mA full scale output current VDD= 5 V 0.86 1.0 1.14 mA

=3V − 0.6 − mA

at 0 dB signal level −−88 −78 dB

plus noise-to-signal ratio

at 0 dB signal level − 0.004 0.012 % at −60 dB signal level −−33 −24 dB at −60 dB signal level − 2.2 6 % at −60 dB; A-weighted −−35 − dB at −60 dB; A-weighted − 1.7 − % A-weighted at code 0000H 86 98 − dB

bipolar zero current settling time to

− 0.2 −µs

±1 LSB

clock frequency −− 18.4 MHz full scale temperature

−±400 × 10

−6

−

coefﬁcient at pins 6 and 8 operating ambient

−40 − +85 °C

temperature total power dissipation VDD= 5 V at code 0000H − 27.5 36 mW

= 3 V at code 0000H − 10 − mW

1995 Dec 11 3

Philips Semiconductors Preliminary speciﬁcation

Stereo Continuous Calibration DAC (CC-DAC) TDA1387T

BLOCK DIAGRAM

Fig.1 Block diagram.

1995 Dec 11 4

Philips Semiconductors Preliminary speciﬁcation

Stereo Continuous Calibration DAC (CC-DAC) TDA1387T

PINNING

SYMBOL PIN DESCRIPTION

BCK 1 bit clock input WS 2 word selection input DATA 3 data input GND 4 ground V

REF 7 reference decoupling I

5 supply voltage input 6 left channel output

Fig.2 Pin configuration.

8 right channel output

FUNCTIONAL DESCRIPTION

The basic operation of the continuous calibration DAC is illustrated in Fig.3 which shows the calibration and operation cycle. During calibration of the MOS current source (Fig.3a) transistor M1 is connected as a diode by applying a reference current. The voltage Vgs on the intrinsic gate-source capacitance Cgs of M1 is then determined by the transistor characteristics. After the drain current has been calibrated to the reference value I

ref

, the switch S1 is opened and S2 is switched to the other position (Fig.3b). The gate-to-source voltage Vgs of M1 is not changed because the charge on Cgs is preserved. Therefore, the drain current of M1 will still be equal to I and this exact duplication of I

is now available at the

ref

OUT terminal. In the TDA1387T, 32 current sources and one spare

current source are continuously calibrated (see Fig.1). The spare current source is included to allow continuous converter operation. The output of one calibrated source is connected to an 11-bit binary current divider which consists of 2048 transistors. A symmetrical offset decoding principle is incorporated and arranges the bit switching such that the zero-crossing is performed by switching only the LSB currents.

The TDA1387T (CC-DAC) accepts serial input data format of 16-bit word length. Left and right data words are time multiplexed. The input data format is shown in Figs 4 and 5.

With a HIGH level on the WS input, data is placed in the right input register, with a LOW level on the WS input, data is placed in the left input register. The data in the input registers are simultaneously latched to the output registers which control the bit switches. An internal bias current I

bias

is added to the full scale output current IFS in order to achieve maximum dynamic range at the outputs of OP1 and OP2.

The signal current IFS and the bias current I

are both

bias

proportional to the supply voltage VDD, and have a fixed mutual relation A

(where A

bias

bias=Ibias/IFS

It is preferred that the non-inverting input of operational amplifiers OP1 and OP2 is tied to ground to achieve a maximum dynamic range over the supply voltage range.

A decoupling capacitor C4 is recommended for enhancing the supply voltage ripple rejection of the DAC. It has no significant effect on the noise performance.

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