Philips TDA1311A-N2 Datasheet

DATA SH EET

Preliminary speciﬁcation Supersedes data of July 1993 File under Integrated Circuits, IC01

1995 Dec 18

INTEGRATED CIRCUITS

TDA1311A

Stereo Continuous Calibration DAC (CC-DAC)

1995 Dec 18 2

Philips Semiconductors Preliminary speciﬁcation

Stereo Continuous Calibration DAC (CC-DAC)

TDA1311A

FEATURES

• Voltage output

• Space saving packages SO8 or DIP8

• Low power consumption

• Wide dynamic range (16-bit resolution)

• Continuous Calibration (CC) concept

• Easy application:

– single 4 to 5.5 V rail supply – output current and bias current are proportional to the

supply voltage

– integrated current-to-voltage converter

• Fast settling time permits 2, 4 and 8 × oversampling (serial input) or double-speed operation at 4 × oversampling

• Internal bias current ensures maximum dynamic range

• Wide operating temperature range (−40 °C to +85 °C)

• Compatible with most current Japanese input formats:

time multiplexed, two's complement, TTL

• No zero-crossing distortion

• Cost efficient.

GENERAL DESCRIPTION

The TDA1311A; AT is a voltage-driven digital-to-analog converter and is new generation of DAC devices which embodies the innovative technique of Continuous Calibration (CC). The largest bit-currents are repeatedly generated by one single current reference source. This duplication is based upon an internal charge storage principle which has an accuracy insensitive to ageing, temperature matching and process variations.

The TDA1311A; AT is fabricated in a 1.0 µm CMOS process and features an extremely low-power dissipation, small package size and easy application. Furthermore, the accuracy of the intrinsic high coarse-current combined with the implemented symmetrical offset decoding method preclude zero-crossing distortion and ensures high quality audio reproduction. Therefore, the CC-DAC is eminently suitable for use in (portable) digital audio equipment.

ORDERING INFORMATION

TYPE

NUMBER

PACKAGE

NAME DESCRIPTION VERSION

TDA1311A DIP8 plastic dual in-line package; 8 leads (300 mil) SOT97-1 TDA1311AT SO8 plastic small outline package; 8 leads; body width 3.9 mm SOT96-1

1995 Dec 18 3

Philips Semiconductors Preliminary speciﬁcation

Stereo Continuous Calibration DAC (CC-DAC)

TDA1311A

QUICK REFERENCE DATA

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

supply voltage 4 5 5.5 V

supply current VDD= 5 V at code 0000H − 3.4 6.0 mA

full scale output voltage VDD= 5 V 1.8 2.0 2.2 V

(THD+N)/S total harmonic distortion

plus noise

at 0 dB signal level −−68 −63 dB

− 0.04 0.07 %

at −60 dB signal level −−30 −24 dB

− 36%

at −60 dB signal level; A-weighted

−−33 − dB

− 2 − %

S/N signal-to-noise ratio at

bipolar zero

A-weighted at code 0000H 86 92 − dB

current settling time to ±1 LSB

− 0.2 −µs

BR input bit rate at data input −− 18.4 Mbits/s f

BCK

clock frequency at clock input

−− 18.4 MHz

full scale temperature coefﬁcient at analog outputs (IOL; IOR)

−±400 − ppm

amb

operating ambient temperature

−40 − +85 °C

tot

total power dissipation VDD= 5 V at code 0000H − 17 30 mW

1995 Dec 18 4

Philips Semiconductors Preliminary speciﬁcation

Stereo Continuous Calibration DAC (CC-DAC)

TDA1311A

BLOCK DIAGRAM

Fig.1 Block diagram.

handbook, full pagewidth

MBG858

32 (5-BIT)

CALIBRATED

CURRENT SOURCES

1 CALIBRATED

SPARE SOURCE

11-BIT

PASSIVE

DIVIDER

LEFT BIT SWITCHES

I/V

LEFT INPUT REGISTER

LEFT OUTPUT REGISTER

RIGHT BIT SWITCHES

RIGHT INPUT REGISTER

RIGHT OUTPUT REGISTER

I/V

32 (5-BIT)

CALIBRATED

CURRENT SOURCES

1 CALIBRATED

SPARE SOURCE

11-BIT

PASSIVE

DIVIDER

REFERENCE

SOURCE

CONTROL

AND TIMING

1 2 3

C2 100 nF

GND

TDA1311A

TDA1311AT

BCK

DATA

PINNING

SYMBOL PIN DESCRIPTION

BCK 1 bit clock input WS 2 word select input DATA 3 data input GND 4 ground V

5 supply voltage

6 left channel output

n.c.

not connected

8 right channel output

Fig.2 Pin configuration.

handbook, halfpage

1 2 3 4

8 7 6 5

MBG859

TDA1311A

TDA1311AT

BCK

DATA

GND

n.c.

1995 Dec 18 5

Philips Semiconductors Preliminary speciﬁcation

Stereo Continuous Calibration DAC (CC-DAC)

TDA1311A

FUNCTIONAL DESCRIPTION

The basic operation of the continuous calibration DAC is illustrated in Fig.3. The figure shows the calibration and operation cycle. During calibration of the MOS current source (see Fig.3a) transistor M1 is connected as a diode by applying a reference current. The voltage Vgs on the intrinsic gate-source capacitance Cgs of M1 is then determined by the transistor characteristics. After calibration of the drain current to the reference value I

REF

, the switch S1 is opened and S2 is switched to the other position (see Fig.3b). The gate-to-source voltage V

of M1 is not changed because the charge on Cgs is preserved. Therefore, the drain current of M1 will still be equal to I

REF

and this exact duplicate of I

REF

is now

available at the OUT terminal. The 32 current sources and the spare current source of the

TDA1311A; AT are continuously calibrated (see Fig.1). The spare current source is included to allow continuous converter operation. The output of one calibrated source is connected to an 11-bit binary current divider consisting of 2048 transistors.

A symmetrical offset decoding principle is incorporated that arranges the bit switching in such a way that the zero-crossing is performed only by switching the LSB currents.

The TDA1311A; AT (CC-DAC) accepts serial input data formats of 16-bit word length. Left and right data words are time multiplexed. The most significant bit (bit 1) must always be first. The input data format is shown in Figs 4 and 5.

With a HIGH level on the word select input (WS), data is placed in the left input register and with a LOW level on the WS input, data is placed in the right input register (see Fig.1). The data in the input registers are simultaneously latched in the output registers which control the bit switches.

An internal offset voltage V

is added to the full scale output voltage VFS; VOS and VFS are proportional to VDD: V

DD1/VDD2=VFS1/VFS2=VOS1/VOS2

Fig.3 Calibration principle.

handbook, full pagewidth

MBG860

out

ref

(a) (b)

(a) =calibration. (b) =operation.

1995 Dec 18 6

Philips Semiconductors Preliminary speciﬁcation

Stereo Continuous Calibration DAC (CC-DAC)

TDA1311A

LIMITING VALUES

In accordance with the Absolute Maximum Rating System (IEC 134).

Note

1. Human body model: C = 100 pF, R = 1500 Ω, 3 pulses positive and 3 pulses negative.

2. Machine model: C = 200 pF, L = 0.5 µH, R = 10 Ω, 3 pulses positive and 3 pulses negative.

THERMAL RESISTANCE

QUALITY SPECIFICATION

In accordance with SNW-FQ-0611.

CHARACTERISTICS

=5V; T

amb

=25°C; measured in Fig.1; unless otherwise speciﬁed.

SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT

supply voltage − 6.0 V

stg

storage temperature −55 +150 °C

XTAL

maximum crystal temperature − +150 °C

amb

operating ambient temperature −40 +85 °C

electrostatic handling note 1 −2000 +2000 V

note 2 −200 +200 V

SYMBOL PARAMETER VALUE UNIT

th j-a

thermal resistance from junction to ambient in free air

DIL8 100 K/W SO8 210 K/W

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

Supply

supply voltage 4.0 5.0 5.5 V

supply current at code 0000H − 3.4 6.0 mA

Digital inputs; pins WS, BCK and DATA

| input leakage current LOW VI= 0.8 V −− 10 µA

| input leakage current HIGH VI= 2.4 V −− 10 µA

BCK

clock frequency −− 18.4 MHz BR bit rate data input −− 18.4 Mbits/s f

word select input frequency −− 384 kHz

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