Philips SE5521 service manual

PhilipsNE5521Semiconductors Linear Products		Product specification
LVDT signal conditioner		NE/SA/SE5521

DESCRIPTION

The NE/SA/SE5521 is a signal conditioning circuit for use with

Linear Variable Differential Transformers (LVDTs) and Rotary Variable Differential Transformers (RVDTs). The chip includes a low distortion, amplitude-stable sine wave oscillator with programmable frequency to drive the primary of the LVDT/RVDT, a synchronous demodulator to convert the LVDT/RVDT output amplitude and phase to position information, and an output amplifier to provide amplification and filtering of the demodulated signal.

FEATURES

•Low distortion

•Single supply 5V to 20V, or dual supply ±2.5V to ±10V

•Oscillator frequency 1kHz to 20kHz

•Capable of ratiometric operation

•Low power consumption (182mV typ)

APPLICATIONS

•LVDT signal conditioning

•RVDT signal conditioning

•LPDT signal conditioning

•Bridge circuits

PIN CONFIGURATIONS

F, N Packages

AMP OUT	1				18	V+
+IN	2				17	CT
±IN	3				16	VREF
LVDT IN	4				15	FEEDBACK
DEMOD OUT	5				14	OSC
SYNC	6				13		OSC
GND	7				12	VREF/2
N.C.	8				11	RT
N.C.
	9				10	N.C.

TOP VIEW

D1 Package

AMP OUT						V+
	1				16
+IN
	2				15	CT
±IN	3				14	VREF
LVDT IN	4				13	FEEDBACK
DEMOD OUT						OSC
	5				12
SYNC
	6				11		OSC
GND
	7				10	VREF/2
N.C.
	8				9	RT

TOP VIEW

NOTE:

1. SOL Ð released in large SO package only.

ORDERING INFORMATION

DESCRIPTION	TEMPERATURE RANGE	ORDER CODE	DWG #
18-Pin Plastic Dual In-Line Package (DIP)	0 to +70°C	NE5521N	0407A
16-Pin Small Outline Large (SOL) Package	0 to +70°C	NE5521D	0171B
18-Pin Plastic Dual In-Line Package (DIP)	±40 to +85°C	SA5521N	0407A
18-Pin Ceramic Dual In-Line Package (CERDIP)	±55 to +125°C	SE5521F	0583A
16-Pin Ceramic Dual In-Line Package (CERDIP)	±40 to +85°C	SA5521D	0582B

ABSOLUTE MAXIMUM RATINGS

SYMBOL	PARAMETER	RATING	UNIT
VCC	Supply voltage	+20	V
	Split supply voltage	±10	V
	Operating temperature range
TA	NE5521	0 to 70	°C
	SA5521	±40 to +85	°C
	SE5521	±55 to +125	°C
TSTG	Storage temperature range	±65 to +125	°C
P	Power dissipation1	910	mW
D
NOTES:

1. For derating, see typical power dissipation versus load curves (Figure 1).

August 31, 1994

901

853-0043 13721

Philips Semiconductors Linear Products	Product specification
LVDT signal conditioner	NE/SA/SE5521

BLOCK DIAGRAM

VREF

		16
							15
						10k		FEEDBACK
	17			±	10k
CT		OSC	SINE			±	13	OSC
			CONV	+		+
RT	11						14	OSC
				10k
							12
	18
V+								VREF/2
						10k
							7	GND/V±
	3	AUX AMP
±IN
		±					4
	2							LVDT IN
+IN		+
					SYNCHRONOUS
	1				DEMODULATOR		6	SYNC
AMP
OUT
					5

DOMOD OUT

NOTE:

Pin numbers are for F, N packages.

PIN DEFINITIONS FOR D, F AND N PACKAGES

	PIN NO.		SYMBOL							DEFINITION
	D	F, N
	1	1	Amp Out				Auxiliary Amplifier Out.
	2	2		+IN			Auxiliary Amplifier non-inverting input.
	3	3		±IN			Auxiliary Amplifier inverting input.
	4	4	LVDT IN				Input to Synchronous Demodulator from the LVDT/RVDT secondary.
	5	5	DEMOD OUT				Pulsating DC output from the Synchronous Demodulator output. This voltage should be filtered before
							use.
	6	6	SYNC				Synchronizing input for the Synchronizing Demodulator. This input should be connected to the OSC or
							OSC	output. Sync is referenced to VREF/2.
	7	7	GND				Device return. Should be connected to system ground or to the negative supply.
	8	8		NC			No internal connection.
	--	9		NC			No internal connection.
	--	10		NC			No internal connection.
	9	11		RT			A temperature stable 18kΩ resistor should be connected between this pin and Pin 7.
	10	12	VREF/2				A high impedance source of one half the potential applied to VREF. The LVDT/RVDT secondary return
							should be to this point. A bypass capacitor with low impedance at the oscillator frequency should also be
							connected between this pin and ground.
	11	13					Oscillator sine wave output that is 180° out of phase with the OSC signal. The LVDT/RVDT primary is
				OSC
							usually connected between OSC and		OSC	pins.
	12	14	OSC				Oscillator sine wave output. The LVDT/RVDT primaries are usually connected between OSC and
											OSC
							pins.
	13	15	FEEDBACK				Usually connected to the OSC output for unity gain, a resistor between this pin and OSC, and one be-
							tween this pin and ground can provide for a change in the oscillator output pin amplitudes.
	14	16	VREF				Reference voltage input for the oscillator and sine converter. This voltage MUST be stable and must not
							exceed +V supply voltage.
	15	17		CT			Oscillator frequency-determining capacitor. The capacitor connected between this pin and ground should
							be a temperature-stable type.
	16	18		+V			Positive supply connection.

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