Philips psmn2r2-40ps Datasheet

Page 1

1. Product profile

1.1 General description

Stan dard level N-channel MOSFET in T O220 pa ckage qualified to 175 °C. This product is designed and qualified for use in a wide ran ge of industrial, communications and domestic equipment.

1.2 Features and benefits

PSMN2R2-40PS

N-channel 40 V 2.1 mΩ standard level MOSFET

Rev. 02 — 28 September 2009 Product data sheet

 High efficiency due to low switching

and conduction losses

 Suitable for standard level gate drive

sources

1.3 Applications

 DC-to-DC convertors  Load switching

 Motor control  Server power supplies

1.4 Quick reference data

Table 1. Quick reference

Symbol Parameter Conditions Min Typ Max Unit

tot

Dynamic characteristics

Static characteristics

DSon

drain-source voltage Tj≥ 25 °C; Tj≤ 175 °C - - 40 V drain current Tmb=25°C; VGS=10V;

see Figure 1

total power dissipation

gate-drain charge VGS=10V; ID=80A;

drain-source on-state resistance

Tmb= 25 °C; see Figure 2 - - 306 W

=20V;

see Figure 14 and 15

VGS=10V; ID=25A; Tj=25°C; see Figure 6

and 3

and 13

- - 100 A

-25-nC

[1]

- 1.75 2.1 mΩ

[1] Measured 3 mm from package.

Page 2

NXP Semiconductors

2. Pinning information

PSMN2R2-40PS

N-channel 40 V 2.1 mΩ standard level MOSFET

Table 2. Pinning information

Pin Symbol Description Simplified outline Graphic symbol

1G gate 2D drain 3S source

mb D drain

bb076

12mb3

SOT78

(TO-220AB)

3. Ordering information

Table 3. Ordering information

Type number Package

PSMN2R2-40PS TO-220AB plastic single-ended package; heatsink mounted; 1 mounting hole; 3-lead

Name Description Version

TO-220AB

SOT78

4. Limiting values

Table 4. Limiting values

In accordance with the Absolute Maximum Rating System (IEC 60134).

Symbol Parameter Conditions Min Max Unit

V V V I

I P T T

DS DGR GS

tot stg j

drain-source voltage Tj≥ 25 °C; Tj≤ 175 °C - 40 V drain-gate voltage Tj≥ 25 °C; Tj≤ 175 °C; RGS=20kΩ -40V gate-source voltage -20 20 V drain current VGS=10V; Tmb= 100 °C; see Figure 1 -100A

peak drain current tp≤ 10 µs; pulsed; Tmb=25°C; see Figure 3 -962A total power dissipation Tmb=25°C; see Figure 2 -306W storage temperature -55 175 °C junction temperature -55 175 °C

=10V; Tmb=25°C; see Figure 1 and 3 -100A

Product data sheet Rev. 02 — 28 September 2009 2 of 13

Page 3

NXP Semiconductors

PSMN2R2-40PS

N-channel 40 V 2.1 mΩ standard level MOSFET

Table 4. Limiting values

…continued

In accordance with the Absolute Maximum Rating System (IEC 60134).

Symbol Parameter Conditions Min Max Unit

Source-drain diode

Avalanche ruggedness

DS(AL)S

source current Tmb=25°C - 100 A peak source current tp≤ 10 µs; pulsed; Tmb=25°C - 962 A

non-repetitive drain-source avalanche

VGS=10V; T unclamped; R

=25°C; ID=100A; V

j(init)

=50Ω

sup

≤ 40 V;

-1.24J

energy

(A)

300

250

200

150

100

003aad125

(1)

(%)

120

der

03aa16

0 50 100 150 200

(°C)

Fig 1. Normalized continuous drain current as a

function of mounting base temperature

0 20015050 100

Tmb (°C)

Fig 2. Normalized total power dissipation as a

function of mounting base temperature

Product data sheet Rev. 02 — 28 September 2009 3 of 13

Page 4

NXP Semiconductors

PSMN2R2-40PS

N-channel 40 V 2.1 mΩ standard level MOSFET

10 μs

100 μs

1 ms

10 ms 100 ms

003aad316

(A)

Limit R

(1)

DSon

= VDS / I

-1

1 10 10

VDS (V)

Fig 3. Safe operating area; continuouse and peak drain currents as a function of drain-source voltage

5. Thermal characteristics

Table 5. Thermal characteristics

Symbol Parameter Conditions Min Typ Max Unit

th(j-mb)

thermal resistance from junction to mounting base

see Figure 4 - 0.25 0.5 K/W

003aad100

th (j-mb )

(K/W)

-1

= 0.5

0.2

0.1

-2

0.05

0.02

-3

single shot

-4

-6

-5

-4

-3

-2

-1

1 10

δ =

(s)

Fig 4. Transient thermal impedance from junction to mounting base as a function of pulse duration

Product data sheet Rev. 02 — 28 September 2009 4 of 13

Page 5

NXP Semiconductors

6. Characteristics

PSMN2R2-40PS

N-channel 40 V 2.1 mΩ standard level MOSFET

Table 6. Characteristics

Symbol Parameter Conditions Min Typ Max Unit

Static characteristics

(BR)DSS

GS(th)

drain-source breakdown voltage

gate-source threshold voltage

ID=250µA; VGS=0V; Tj=-55°C 36 - - V

=250µA; VGS=0V; Tj=25°C 40 - - V

ID=1mA; VDS = VGS; Tj=-55°C;

--4.6V

see Figure 11

=1mA; VDS = VGS; Tj= 175 °C;

1- - V

see Figure 11 I

DSS

GSS

DSon

=1mA; VDS = VGS; Tj=25°C;

see Figure 12

and 11

drain leakage current VDS=40V; VGS=0V; Tj=25°C --10µA

=40V; VGS=0V; Tj= 125 °C - - 200 µA

gate leakage current VGS=20V; VDS=0V; Tj= 25 °C - - 100 nA

=-20V; VDS=0V; Tj= 25 °C - - 100 nA

drain-source on-state resistance

VGS=10V; ID=25A; Tj= 100 °C; see Figure 13

=10V; ID=25A; Tj= 175 °C;

234V

- 2.75 3.3 mΩ

-3.84.6mΩ

see Figure 13 V

=10V; ID=25A; Tj=25°C;

[2]

- 1.75 2.1 mΩ

see Figure 6 and 13

internal gate resistance

-1-Ω

(AC)

Dynamic characteristi cs

Q Q

G(tot)

GS GS(th)

total gate charge ID=0A; VDS=0V; VGS=10V - 110 - nC

=80A; VDS=20V; VGS=10V;

gate-source charge - 42 - nC

see Figure 14

and 15

pre-threshold

- 130 - nC

-24-nC

gate-source charge

GS(th-pl)

post-threshold

-18-nC

gate-source charge Q V

C C C

GS(pl)

iss oss rss

gate-drain charge - 25 - nC

gate-source plateau

voltage

input capacitance VDS=20V; VGS= 0 V; f = 1 MHz;

output capacitance - 1671 - pF

reverse transfer

ID=80A; VDS=20V; see Figure 14

and 15

Tj=25°C; see Figure 16

-4.95-V

- 8423 - pF

- 814 - pF

capacitance t

d(on)

d(off)

turn-on delay time VDS=20V; RL=0.25Ω; VGS=10V;

=1.5Ω

rise time - 40.4 - ns

G(ext)

turn-off delay time - 66.6 - ns

fall time - 25.2 - ns

- 33.2 - ns

Product data sheet Rev. 02 — 28 September 2009 5 of 13

Page 6

NXP Semiconductors

PSMN2R2-40PS

N-channel 40 V 2.1 mΩ standard level MOSFET

Table 6. Characteristics …continued

Symbol Parameter Conditions Min Typ Max Unit

Source-drain diode

source-drain voltage IS=25A; VGS=0V; Tj=25°C;

see Figure 17

reverse recovery time IS=25A; dIS/dt = -100 A/µs; VGS=0V;

=20V

recovered charge IS=25A; dIS/dt = -100 A/µs; VGS=0V;

VDS=20V; Tj=25°C

[1] Tested to JEDEC standards where applicable. [2] Measured 3 mm from package.

- 0.85 1.2 V

- 53.7 - ns

- 80.75 - nC

300

(A)

250

200

150

100

01234

5.5VGS (V) =

003aad116

4.5

(V)

Fig 5. Output characteristics: drain current as a

function of drain-source voltage; typical values

DSon

(mΩ)

0 50 100 150 200 250 300

VGS (V) =

003aad117

5.5

(A)

Fig 6. Drain-source on-state resistance as a function

of drain current; typical values

Product data sheet Rev. 02 — 28 September 2009 6 of 13

Page 7

NXP Semiconductors

PSMN2R2-40PS

N-channel 40 V 2.1 mΩ standard level MOSFET

250 I

(A)

200

150

100

0 1.5 3 4.5 6

003aad118

25 °C175 °C

(V)

Fig 7. Transfer characteristics: drain current as a

function of gate-source voltage; typical values

003aad123

(S)

250

200

12000

(pf)

10000

8000

6000

4000

2000

-1

1 10

003aad122

(V)

iss

rss

Fig 8. Input and reverse transfer capacitances as a

function of gate-source voltage; typical values

003aad124

DS(on)

(mΩ)

150

100

0 50 100 150 200

(A)

Fig 9. Forward transconductance as a fun ction of

drain current; typical values

0 5 10 15 20

(V)

Fig 10. Drain-source on-state resistance as a function

of gate-source voltage; typical values

Product data sheet Rev. 02 — 28 September 2009 7 of 13

Page 8

NXP Semiconductors

PSMN2R2-40PS

N-channel 40 V 2.1 mΩ standard level MOSFET

GS(th)

(V)

−60 180120060

max

typ

min

003aad280

Tj (°C)

Fig 11. G ate-source threshold voltage as a function of

junction temperature

2.5

003aad326

−1

(A)

−2

−3

−4

−5

−6

0642

min typ max

03aa35

VGS (V)

Fig 12. Sub-threshold drain current as a function of

gate-source voltage

1.5

0.5

-60 0 60 120 180 T

(°C)

Fig 13. Normalized drain-source on state resistance

factor as a function of junction temperature

GS(pl)

GS(th)

GS1QGS2

G(tot)

003aaa5

Fig 14. Gate charge waveform definitions

Product data sheet Rev. 02 — 28 September 2009 8 of 13

Page 9

NXP Semiconductors

PSMN2R2-40PS

N-channel 40 V 2.1 mΩ standard level MOSFET

(V)

0 50 100 150

VDS = 10 V

003aad120

VDS = 20V

(nC)

Fig 15. G ate-source voltage as a function of gate

charge; typical values

100

(A)

12000

(pF)

8000

4000

-1

1 10 10

003aad121

iss

oss

rss

VDS (V)

Fig 16. Input, output and reverse transfer capacitances

as a function of drain-source voltage; typical values

003aad119

Tj = 175 °C

0 0.2 0.4 0.6 0.8 1

25 °C

(V)

Fig 17. So urce current as a function of source-drain voltage; typical values

Product data sheet Rev. 02 — 28 September 2009 9 of 13

Page 10

NXP Semiconductors

N-channel 40 V 2.1 mΩ standard level MOSFET

7. Package outline

lastic single-ended package; heatsink mounted; 1 mounting hole; 3-lead TO-220AB

PSMN2R2-40PS

SOT7

(1)

(2)

(3×)

(2)

(2×)

123

b(3×)

(1)

mounting

base

0 5 10 mm

scale

DIMENSIONS (mm are the original dimensions)

(1)

(2)

1.6

1.0

(2)

c D

1.3

0.7

0.4

16.0

15.2

REFERENCES

1.0

3-lead TO-220AB

UNIT A

4.7

4.1

Notes

1. Lead shoulder designs may vary.

2. Dimension includes excess dambar.

OUTLINE

VERSION

SOT78 SC-46

1.40

1.25

b b

0.9

0.6

IEC JEDEC JEITA

D1E e

6.6

10.3

5.9

9.7

2.54

L L

15.0

12.8

3.30

2.79

(1)

max.

3.0

p q

3.0

3.8

3.5

2.7

EUROPEAN

PROJECTION

2.6

2.2

ISSUE DATE

08-04-23 08-06-13

Fig 18. Package outline SOT78 (TO-220AB)

Product data sheet Rev. 02 — 28 September 2009 10 of 13

Page 11

NXP Semiconductors

8. Revision history

PSMN2R2-40PS

N-channel 40 V 2.1 mΩ standard level MOSFET

Table 7. Revision history

Document ID Release date Data sheet status Change notice Supersedes

PSMN2R2-40PS_2 20090928 Product data sheet - PSMN2R2-40PS_1 Modifications: PSMN2R2-40PS_1 20090624 Product data sheet - -

• Various changes to content.

Product data sheet Rev. 02 — 28 September 2009 11 of 13

Page 12

NXP Semiconductors

PSMN2R2-40PS

N-channel 40 V 2.1 mΩ standard level MOSFET

9. Legal information

9.1 Data sheet status

Document status

Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification.

[1] Please consult the most recently issued document before initiating or completing a design. [2] The term 'short data sheet' is explained in section "Definitions". [3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product

status information is available on the Internet at URL http://www.nxp.com

[1][2]

Product status

[3]

Definition

9.2 Definitions

Draft — The document is a draft version only. The content is still under

internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information.

Short data sheet — A short data sheet is an extract from a full dat a sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied u pon to co nt ain det ailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail.

9.3 Disclaimers

General — Information in this document is believed to be accurate and

reliable. However, NXP Semiconduct ors does not give any repr esentatio ns or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information.

Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof.

Suitability for use — NXP Semiconductors products are not designed, authorized or warranted to be suitable for use in medical, military, aircraft, space or life support equipment, nor in applications where failure or malfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors accepts no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk.

Applications — Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification.

Quick reference data — The Quick reference data is an extract of the product data given in the Limiting values and Characteri stics sections of this document, and as such is not complete, exhaustive or legally binding.

Limiting values — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) may cause permanent damage to the device. Limiting values are stress ratings only and operation of the device at these or any other conditions above those given in the Characteristics sections of this document is not implied. Exposure to limiting values for extended periods may affect device reliability.

Terms and conditions of sale — NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms intellectual property rights infringement and limitation of liability, unless explicitly otherwise agreed to in writing by NXP Semiconductors. In case of any inconsistency or conflict between information in this document and such terms and conditions, the latter will prevail.

No offer to sell or license — Nothing in this document may be interpreted or construed as an offer to sell product s that is ope n for accept ance or the gr ant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights.

Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from national authorities.

, including those pertaining to warranty,

9.4 Trademarks

Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners.

TrenchMOS — is a trademark of NXP B.V.

10. Contact information

For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: [email protected]

Product data sheet Rev. 02 — 28 September 2009 12 of 13

Page 13

NXP Semiconductors

11. Contents

1 Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . .1

1.1 General description . . . . . . . . . . . . . . . . . . . . . .1

1.2 Features and benefits. . . . . . . . . . . . . . . . . . . . .1

1.3 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . .1

1.4 Quick reference data . . . . . . . . . . . . . . . . . . . . .1

2 Pinning information. . . . . . . . . . . . . . . . . . . . . . .2

3 Ordering information. . . . . . . . . . . . . . . . . . . . . .2

4 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . .2

5 Thermal characteristics . . . . . . . . . . . . . . . . . . .4

6 Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . .5

7 Package outline . . . . . . . . . . . . . . . . . . . . . . . . .10

8 Revision history. . . . . . . . . . . . . . . . . . . . . . . . .11

9 Legal information. . . . . . . . . . . . . . . . . . . . . . . .12

9.1 Data sheet status . . . . . . . . . . . . . . . . . . . . . . .12

9.2 Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . .12

9.3 Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . .12

9.4 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . .12

10 Contact information. . . . . . . . . . . . . . . . . . . . . .12

PSMN2R2-40PS

N-channel 40 V 2.1 mΩ standard level MOSFET

Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’.

For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: [email protected]

Date of release: 28 September 2009

Document identifier: PSMN2R2-40PS_2