Philips PSMN130-200D Datasheet
DISCRETE SEMICONDUCTORS
DATA SH EET
PSMN130-200D
N-channel TrenchMOS
(TM)
transistor
Product specification August 1999
Philips Semiconductors Product specification
N-channel TrenchMOS
(TM)
transistor
PSMN130-200D
FEATURES SYMBOL QUICK REFERENCE DATA
• ’Trench’ technology
• Very low on-state resistance
• Fast switching
• Low thermal resistance
g
d
V
= 200 V
DSS
ID = 20 A
DS(ON)
≤ 130 mΩ
R
s
GENERAL DESCRIPTION PINNING SOT428 (DPAK)
SiliconMAXproductsusethelatest PIN DESCRIPTION
Philips Trench technology to
achieve the lowest possible 1 gate
on-state resistance in each
package at each voltage rating. 2 drain
1
Applications:- 3 source
• d.c. to d.c. converters
• switched mode power supplies tab drain
tab
2
1
3
The PSMN130-200D is supplied in
the SOT428 (Dpak) surface
mounting package.
LIMITING VALUES
Limiting values in accordance with the Absolute Maximum System (IEC 134)
SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT
V
DSS
V
DGR
V
GS
I
D
I
DM
P
D
T
, T
j
Drain-source voltage Tj = 25 ˚C to 175˚C - 200 V
Drain-gate voltage Tj = 25 ˚C to 175˚C; RGS = 20 kΩ - 200 V
Gate-source voltage - ± 20 V
Continuous drain current Tmb = 25 ˚C; VGS = 10 V - 20 A
= 100 ˚C; VGS = 10 V - 14 A
T
mb
Pulsed drain current Tmb = 25 ˚C - 80 A
Total power dissipation Tmb = 25 ˚C - 150 W
Operating junction and - 55 175 ˚C
stg
storage temperature
1 It is not possible to make connection to pin 2 of the SOT428 package.
August 1999 2 Rev 1.000
Philips Semiconductors Product specification
(TM)
transistor
PSMN130-200DN-channel TrenchMOS
AVALANCHE ENERGY LIMITING VALUES
Limiting values in accordance with the Absolute Maximum System (IEC 134)
SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT
E
AS
Non-repetitive avalanche Unclamped inductive load, IAS = 19 A; - 252 mJ
energy t
= 100 µs; Tj prior to avalanche = 25˚C;
p
V
≤ 25 V; RGS = 50 Ω; VGS = 10 V; refer
DD
to fig;15
I
AS
Non-repetitive avalanche - 20 A
current
THERMAL RESISTANCES
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
R
th j-mb
Thermal resistance junction - - 1 K/W
to mounting base
R
th j-a
Thermal resistance junction SOT428 package, pcb mounted, minimum - 50 - K/W
to ambient footprint
ELECTRICAL CHARACTERISTICS
Tj= 25˚C unless otherwise specified
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
V
(BR)DSS
V
GS(TO)
R
DS(ON)
I
GSS
I
DSS
Q
g(tot)
Q
gs
Q
gd
t
d on
t
r
t
d off
t
f
L
d
L
s
C
iss
C
oss
C
rss
Drain-source breakdown VGS = 0 V; ID = 0.25 mA; 200 - - V
voltage T
= -55˚C 178 - - V
j
Gate threshold voltage VDS = VGS; ID = 1 mA 2 3 4 V
= 175˚C 1 - - V
T
j
T
= -55˚C - - 6 V
j
Drain-source on-state VGS = 10 V; ID = 25 A - 120 130 mΩ
resistance T
= 175˚C - - 377 mΩ
j
Gate source leakage current VGS = ±10 V; VDS = 0 V - 0.02 100 nA
Zero gate voltage drain VDS = 150 V; VGS = 0 V; - 0.05 10 µA
current T
Total gate charge ID = 20 A; V
= 160 V; VGS = 10 V - 65 - nC
DD
= 175˚C - - 500 µA
j
Gate-source charge - 10 - nC
Gate-drain (Miller) charge - 22 - nC
Turn-on delay time VDD = 100 V; RD = 4.7 Ω; - 15 - ns
Turn-on rise time VGS = 10 V; RG = 5.6 Ω -46-ns
Turn-off delay time Resistive load - 50 - ns
Turn-off fall time - 38 - ns
Internal drain inductance Measured tab to centre of die - 3.5 - nH
Internal source inductance Measured from source lead to source - 7.5 - nH
bond pad
Input capacitance VGS = 0 V; VDS = 25 V; f = 1 MHz - 2470 - pF
Output capacitance - 207 - pF
Feedback capacitance - 90 - pF
August 1999 3 Rev 1.000
Philips Semiconductors Product specification
(TM)
transistor
PSMN130-200DN-channel TrenchMOS
REVERSE DIODE LIMITING VALUES AND CHARACTERISTICS
Tj = 25˚C unless otherwise specified
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
I
S
I
SM
V
SD
t
rr
Q
rr
Continuous source current - - 20 A
(body diode)
Pulsed source current (body - - 80 A
diode)
Diode forward voltage IF = 25 A; VGS = 0 V - 0.95 1.2 V
Reverse recovery time IF = 20 A; -dIF/dt = 100 A/µs; - 124 - ns
Reverse recovery charge VGS = -10 V; VR = 25 V - 0.74 - µC
August 1999 4 Rev 1.000
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