Philips Semiconductors Objective specification
TrenchMOS transistor PSMN020-150W
FEATURES SYMBOL QUICK REFERENCE DATA
• ’Trench’ technology
• Very low on-state resistance V
d
= 150 V
DSS
• Fast switching
• High thermal cycling performance I
• Low thermal resistance
g
s
R
DS(ON)
= 73 A
D
≤ 20 mΩ
GENERAL DESCRIPTION PINNING SOT429 (TO247)
N-channel enhancement mode PIN DESCRIPTION
field-effect power transistor in a
plastic envelope using ’trench’ 1 gate
technology. The device has very
low on-state resistance. It is 2 drain
intended for use in dc to dc
converters and general purpose 3 source
switching applications.
2
tab drain
1
The PSMN020-150Wis suppliedin
the SOT429 (TO247) conventional
leaded package.
LIMITING VALUES
Limiting values in accordance with the Absolute Maximum System (IEC 134)
3
SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT
V
DSS
V
DGR
V
GS
I
D
Drain-source voltage Tj = 25 ˚C to 175˚C - 150 V
Drain-gate voltage Tj = 25 ˚C to 175˚C; RGS = 20 kΩ - 150 V
Gate-source voltage - ± 20 V
Continuous drain current Tmb = 25 ˚C - 73 A
Tmb = 100 ˚C - 51 A
I
DM
P
D
Tj, T
Pulsed drain current Tmb = 25 ˚C - 290 A
Total power dissipation Tmb = 25 ˚C - 300 W
Operating junction and - 55 175 ˚C
stg
storage temperature
AVALANCHE ENERGY LIMITING VALUES
Limiting values in accordance with the Absolute Maximum System (IEC 134)
SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT
E
AS
I
AS
Non-repetitive avalanche Unclamped inductive load, IAS = 64 A; - 1255 mJ
energy tp = 0.2 ms; Tj prior to avalanche = 25˚C;
VDD ≤ 25 V; RGS = 50 Ω; VGS = 5 V
Non-repetitive avalanche - 73 A
current
February 1999 1 Rev 1.000
Philips Semiconductors Objective specification
TrenchMOS transistor PSMN020-150W
THERMAL RESISTANCES
SYMBOL PARAMETER CONDITIONS TYP. MAX. UNIT
R
th j-mb
R
th j-a
ELECTRICAL CHARACTERISTICS
Tj= 25˚C unless otherwise specified
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
V
(BR)DSS
V
GS(TO)
R
DS(ON)
I
GSS
I
DSS
Q
g(tot)
Q
gs
Q
gd
t
d on
t
r
t
d off
t
f
L
d
L
d
L
s
C
iss
C
oss
C
rss
Thermal resistance junction - 0.5 K/W
to mounting base
Thermal resistance junction in free air 45 - K/W
to ambient
Drain-source breakdown VGS = 0 V; ID = 0.25 mA; 150 - - V
voltage Tj = -55˚C 133 - - V
Gate threshold voltage VDS = VGS; ID = 1 mA 2.0 3.0 4.0 V
Tj = 175˚C 1.0 - - V
Tj = -55˚C - - 4.4 V
Drain-source on-state VGS = 10 V; ID = 25 A - 18 20 mΩ
resistance Tj = 175˚C - - 57 mΩ
Gate source leakage current VGS = ±10 V; VDS = 0 V - 2 100 nA
Zero gate voltage drain VDS = 150 V; VGS = 0 V; - 0.05 10 µA
current Tj = 175˚C - - 500 µA
Total gate charge ID = 73 A; V
= 120 V; VGS = 10 V - 164 - nC
DD
Gate-source charge - 30 - nC
Gate-drain (Miller) charge - 77 - nC
Turn-on delay time VDD = 75 V; RD = 3 Ω; - 50 - ns
Turn-on rise time VGS = 10 V; RG = 5 Ω - 114 - ns
Turn-off delay time Resistive load - 214 - ns
Turn-off fall time - 114 - ns
Internal drain inductance Measured from tab to centre of die - 3.5 - nH
Internal drain inductance Measured from drain lead to centre of die - 4.5 - nH
Internal source inductance Measured from source lead to source - 7.5 - nH
bond pad
Input capacitance VGS = 0 V; VDS = 25 V; f = 1 MHz - 6429 7000 pF
Output capacitance - 785 810 pF
Feedback capacitance - 435 500 pF
REVERSE DIODE LIMITING VALUES AND CHARACTERISTICS
Tj = 25˚C unless otherwise specified
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
I
S
I
SM
V
SD
t
rr
Q
rr
February 1999 2 Rev 1.000
Continuous source current - - 73 A
(body diode)
Pulsed source current (body - - 290 A
diode)
Diode forward voltage IF = 25 A; VGS = 0 V - 0.85 1.2 V
IF = 75 A; VGS = 0 V - 1.1 - V
Reverse recovery time IF = 20 A; -dIF/dt = 100 A/µs; - 200 - ns
Reverse recovery charge VGS = 0 V; VR = 30 V - 1.5 - µC