Philips PSMN009-100W Datasheet

Philips Semiconductors Product specification
N-channel TrenchMOS transistor PSMN009-100W
FEATURES SYMBOL QUICK REFERENCE DATA
’Trench’ technology
• Very low on-state resistance V
d
= 100 V
DSS
• Low thermal resistance I
g
s
R
DS(ON)
D
= 100 A
9 m
GENERAL DESCRIPTION PINNING SOT429 (TO247)
SiliconMAXproductsusethelatest PIN DESCRIPTION
Philips Trench technology to achieve the lowest possible 1 gate on-state resistance in each package at each voltage rating. 2 drain
Applications:- 3 source
• d.c. to d.c. converters
2
• switched mode power supplies tab drain
1
The PSMN009-100Wis suppliedin the SOT429 (TO247) conventional leaded package.
LIMITING VALUES
Limiting values in accordance with the Absolute Maximum System (IEC 134)
3
SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT
V
DSS
V
DGR
V
GS
I
D
Drain-source voltage Tj = 25 ˚C to 175˚C - 100 V Drain-gate voltage Tj = 25 ˚C to 175˚C; RGS = 20 k - 100 V Gate-source voltage - ± 20 V Continuous drain current Tmb = 25 ˚C - 100
1
Tmb = 100 ˚C - 79 A
I
DM
P
D
Tj, T
Pulsed drain current Tmb = 25 ˚C - 300 A Total power dissipation Tmb = 25 ˚C - 300 W Operating junction and - 55 175 ˚C
stg
storage temperature
1 Maximum continuous current limited by package.
A
October 1999 1 Rev 1.100
Philips Semiconductors Product specification
N-channel TrenchMOS transistor PSMN009-100W
AVALANCHE ENERGY LIMITING VALUES
Limiting values in accordance with the Absolute Maximum System (IEC 134)
SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT
E
AS
I
AS
THERMAL RESISTANCES
SYMBOL PARAMETER CONDITIONS TYP. MAX. UNIT
R
th j-mb
R
th j-a
Non-repetitive avalanche Unclamped inductive load, IAS = 100 A; - 650 mJ energy tp = 100 µs; Tj prior to avalanche = 25˚C;
VDD 50 V; RGS = 50 ; VGS = 5 V; refer to
fig:15 Non-repetitive avalanche - 100 A current
Thermal resistance junction - 0.5 K/W to mounting base Thermal resistance junction in free air 45 - K/W to ambient
ELECTRICAL CHARACTERISTICS
Tj= 25˚C unless otherwise specified
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
V
(BR)DSS
V
GS(TO)
R
DS(ON)
I
GSS
I
DSS
Q
g(tot)
Q
gs
Q
gd
t
d on
t
r
t
d off
t
f
L
d
L
d
L
s
C
iss
C
oss
C
rss
Drain-source breakdown VGS = 0 V; ID = 0.25 mA; 100 - - V voltage Tj = -55˚C 89 - - V Gate threshold voltage VDS = VGS; ID = 1 mA 2.0 3.0 4.0 V
Tj = 175˚C 1.0 - - V
Tj = -55˚C - - 6 V Drain-source on-state VGS = 10 V; ID = 25 A - 6.7 9 m resistance Tj = 175˚C - 15 25 m Gate source leakage current VGS = ±10 V; VDS = 0 V - 2 100 nA Zero gate voltage drain VDS = 100 V; VGS = 0 V; - 0.05 10 µA current Tj = 175˚C - - 500 µA
Total gate charge ID = 100 A; V
= 80 V; VGS = 10 V - 214 - nC
DD
Gate-source charge - 45 - nC Gate-drain (Miller) charge - 91 - nC
Turn-on delay time VDD = 50 V; RD = 2 ; - 40 - ns Turn-on rise time VGS = 10 V; RG = 5.6 - 100 - ns Turn-off delay time Resistive load - 260 - ns Turn-off fall time - 100 - ns
Internal drain inductance Measured from tab to centre of die - 3.5 - nH Internal drain inductance Measured from drain lead to centre of die - 4.5 - nH Internal source inductance Measured from source lead to source - 7.5 - nH
bond pad
Input capacitance VGS = 0 V; VDS = 25 V; f = 1 MHz - 9000 - pF Output capacitance - 1000 - pF Feedback capacitance - 650 - pF
October 1999 2 Rev 1.100
Philips Semiconductors Product specification
N-channel TrenchMOS transistor PSMN009-100W
REVERSE DIODE LIMITING VALUES AND CHARACTERISTICS
Tj = 25˚C unless otherwise specified
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
I
S
I
SM
V
SD
t
rr
Q
rr
Continuous source current - - 100 A (body diode) Pulsed source current (body - - 300 A diode) Diode forward voltage IF = 25 A; VGS = 0 V - 0.82 1.2 V
IF = 75 A; VGS = 0 V - 0.95 - V
Reverse recovery time IF = 20 A; -dIF/dt = 100 A/µs; - 100 - ns Reverse recovery charge VGS = 0 V; VR = 30 V - 0.5 - µC
October 1999 3 Rev 1.100
Loading...
+ 5 hidden pages