Philips PSMN004-36P, PSMN004-36B User Manual

PSMN004-36B

PSMN004-36P/36B

N-channel enhancement mode field-effect transistor

Rev. 01 — 19 November 2001

Product data

1. Description

N-channel logic level field-effect power transistor in a plastic package using

TrenchMOS™1 technology.

Product availability:

PSMN004-36P in SOT78 (TO-220AB)

PSMN004-36B in SOT404 (D2-PAK).

2. Features

■Very low on-state resistance

■Fast switching.

3. Applications

■DC to DC converters

■Switch mode power supplies.

4.Pinning information

Table 1:

Pinning - SOT78 and SOT404, simplified outline and symbol

Pin

Description

Simplified outline

Symbol

1

gate (g)

mb

mb

d

2

drain (d)

[1]

3

source (s)

g

mb

drain (d)

MBB076

s

2

MBK106

1

3

MBK116

1

2

3

SOT78 (TO-220AB)

SOT404 (D2-PAK)

[1]It is not possible to make connection to pin 2 of the SOT404 package.

1.TrenchMOS is a trademark of Koninklijke Philips Electronics N.V.

Philips Semiconductors		PSMN004-36P/36B
		N-channel enhancement mode field-effect transistor
5. Quick reference data
Table 2:	Quick reference data
Symbol	Parameter	Conditions	Typ	Max	Unit
VDS	drain-source voltage (DC)	Tj = 25 to 175 °C	−	36	V
ID	drain current (DC)	Tmb = 25 °C; VGS = 5 V	−	75	A
Ptot	total power dissipation	Tmb = 25 °C	−	230	W
Tj	junction temperature		−	175	°C
RDSon	drain-source on-state resistance	VGS = 10 V; ID = 25 A; Tj = 25°C	3.5	4	mΩ
		VGS = 5 V; ID = 25 A; Tj = 25°C	4	5	mΩ

6. Limiting values

Table 3: Limiting values

In accordance with the Absolute Maximum Rating System (IEC 60134).

Symbol	Parameter	Conditions	Min	Max	Unit
VDS	drain-source voltage (DC)	Tj = 25 to 175 °C	−	36	V
VDGR	drain-gate voltage (DC)	Tj = 25 to 175 °C; RGS = 20 kΩ	−	36	V
VGS	gate-source voltage (DC)		−	±15	V
VGSM	gate-source voltage	tp ≤ 50 μs; pulsed;	−	±20	V
		duty cycle 25 %; Tj ≤ 150 °C
ID	drain current (DC)	Tmb = 25 °C; VGS = 5 V; Figure 2 and 3	−	75	A
		Tmb = 100 °C; VGS = 5 V; Figure 2	−	75	A
IDM	peak drain current	Tmb = 25 °C; pulsed; tp ≤ 10 μs; Figure 3	−	240	A
Ptot	total power dissipation	Tmb = 25 °C; Figure 1	−	230	W
Tstg	storage temperature		−55	+175	°C
Tj	operating junction temperature		−55	+175	°C
Source-drain diode
IS	source (diode forward) current (DC)	Tmb = 25 °C	−	75	A
ISM	peak source (diode forward) current	Tmb = 25 °C; pulsed; tp ≤ 10 μs	−	240	A
Avalanche ruggedness
EAS	non-repetitive avalanche energy	unclamped inductive load;	−	120	mJ
		ID = 75 A; tp = 0.1 ms; VDD = 15 V;
		RGS = 50 Ω; VGS = 5V; starting Tj = 25 °C;
IAS	non-repetitive avalanche current	unclamped inductive load;	−	75	A
		VDD = 15 V; RGS = 50 Ω; VGS = 5V;
		starting Tj = 25 °C

9397 750 08621

© Koninklijke Philips Electronics N.V. 2001. All rights reserved.

Product data

Rev. 01 — 19 November 2001

2 of 13

Philips Semiconductors	PSMN004-36P/36B
	N-channel enhancement mode field-effect transistor

	120							03aa16
	Pder
	(%)
		80
		40
		0
			0	50	100	150		200
						T	mb	(oC)
P		=	Ptot		× 100%
	der		----------------------
			P	°C )
			tot (25

Fig 1. Normalized total power dissipation as a function of mounting base temperature.

120				03ag42
ID
(%)
80
40
0
0	50	100	150	200
			Tmb (ºC)

I der	I D
	= ------------------- × 100%
	I D(25	°C )

Fig 2. Normalized continuous drain current as a function of mounting base temperature.

103		03ag44
ID	RDS(on) = VDS/ ID
(A)		tp = 10 us
102		100 us
		1 ms
	DC	10 ms
10
		100 ms
1
1	10	102
		VDS (V)

Tmb = 25 °C; IDM is single pulse.

Fig 3. Safe operating area; continuous and peak drain currents as a function of drain-source voltage.

9397 750 08621

© Koninklijke Philips Electronics N.V. 2001. All rights reserved.

Product data

Rev. 01 — 19 November 2001

3 of 13

Philips Semiconductors		PSMN004-36P/36B
		N-channel enhancement mode field-effect transistor
7. Thermal characteristics
Table 4:	Thermal characteristics
Symbol	Parameter	Conditions	Value	Unit
Rth(j-mb)	thermal resistance from junction to mounting	Figure 4	0.65	K/W
	base
Rth(j-a)	thermal resistance from junction to ambient	vertical in still air; SOT78 package	60	K/W
		mounted on a printed circuit board;	50	K/W
		minimum footprint; SOT404 package

7.1 Transient thermal impedance

1								03ag43
Zth j-mb	δ = 0.5
(K/W)
10-1	0.2
	0.1
	0.05
10-2	0.02						tp
						P
							δ = T
		single pulse
						tp	t
							T
10-3
10-6		10-5	10-4	10-3	10-2	10-1	tp (s)	1

Fig 4. Transient thermal impedance from junction to mounting base as a function of pulse duration.

9397 750 08621

© Koninklijke Philips Electronics N.V. 2001. All rights reserved.

Product data

Rev. 01 — 19 November 2001

4 of 13