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pcf84c81a
DATASHEETS
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Philips pcf84c81a DATASHEETS

INTEGRATED CIRCUITS
DATA SH EET
PCF84C81A
Telecom microcontroller
Product specification Supersedes data of 1996 Nov 20 File under Integrated Circuits, IC14
1998 Apr 20
Philips Semiconductors Product specification
Telecom microcontroller PCF84C81A

CONTENTS

1 FEATURES 2 GENERAL DESCRIPTION 3 ORDERING INFORMATION 4 BLOCK DIAGRAM 5 PINNING INFORMATION
5.1 Pinning
5.2 Pin description 6 INSTRUCTION SET 7 HIGH SINK OUTPUT CURRENTS 8 ROM MASK OPTIONS 9 HANDLING 10 LIMITING VALUES 11 DC CHARACTERISTICS 12 AC CHARACTERISTICS 13 PACKAGE OUTLINES 14 SOLDERING
14.1 Introduction
14.2 DIP
14.2.1 Soldering by dipping or by wave
14.2.2 Repairing soldered joints
14.3 SO
14.3.1 Reflow soldering
14.3.2 Wave soldering
14.3.3 Repairing soldered joints 15 DEFINITIONS 16 LIFE SUPPORT APPLICATIONS 17 PURCHASE OF PHILIPS I2C COMPONENTS
Philips Semiconductors Product specification
Telecom microcontroller PCF84C81A

1 FEATURES

• Manufactured in silicon gate CMOS process
• 8-bit CPU, ROM, RAM, I/O in a 28-lead package
• 8 kbyte ROM, 256 byte RAM (PCF84C81A)
• I2C-bus interface with multi-master capability
• Over 100 instructions (based on MAB8048) all of
1 or 2 cycles
• 20 quasi-bidirectional I/O Port lines
• High sink current capability on the 8 lines of Port 1
• 8-bit programmable timer/event counter 1
• 3 single-level vectored interrupts:
– external – 8-bit programmable timer/event counter 1
2
C-bus
–I
• Two test inputs, one of which also serves as the external interrupt input
• Stop and Idle modes
• Supply voltage: 2.5 to 5.5 V
• Clock frequency: 1 to 16 MHz
• Operating temperature: −40 to +85 °C.

2 GENERAL DESCRIPTION

This data sheet details the specific properties of the PCF84C81A. The shared properties of the PCF84CxxxA family of microcontrollers are described in the
“PCF84CxxxA family”
conjunction with this publication. The PCF84C81A is a general purpose CMOS
microcontroller with 8 kbytes of program memory and 256 bytes of RAM. In addition to 20 I/O port lines, the microcontrollers provide an on-chip I2C-bus interface. This two-line serial bus extends the microcontroller capabilities when implemented with the powerful I These include LCD drivers, I/O expanders, telecom circuits, ADC and DAC converters, clock/calendar circuits, EEPROM and RAM and are listed in
data sheet which should be read in
2
C-bus peripherals.
“Data Handbook
IC12, I2C Peripherals”.
The instruction set is based on that of the MAB8048 and is a sub-set of that listed in the sheet.
“PCF84CxxxA family”
data

3 ORDERING INFORMATION (see note 1)

TYPE NUMBER
NAME DESCRIPTION VERSION
PCF84C81AP DIP28 plastic dual in-line package; 28 leads (600 mil) SOT117-1 PCF84C81AT SO28 plastic small outline package; 28 leads; body width 7.5 mm SOT136-1
Note
1. Please refer to the Order Entry Form (OEF) for the full type number to use when ordering. This type number will also
specify the required program and the ROM mask options.
PACKAGE
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1998 Apr 20 4
PORT 0
P0.0 to P0.7
8
PORT 0
BUFFER
CLOCK
SCLK
SDA/P2.3
DATA
PORT 2
FLIP-FLOPS
PORT 2
BUFFER
3
PORT 1
FLIP-FLOPS
P1.0 to P1.7P2.0 to P2.2
PORT 1
BUFFER
RESIDENT ROM
8
2 kbytes
(PCF84C21A)
4 kbytes
(PCF84C41A)
8 kbytes
(PCF84C81A)
DECODE
FLIP-FLOPS

4 BLOCK DIAGRAM

Telecom microcontroller PCF84C81A
Philips Semiconductors Product specification
INTERRUPT
SIO/
derivative
interrupt
I2C-BUS
INTERFACE
LOGIC
8
ACCUMULATOR
timer interrupt
external interrupt
INTERNAL
CLOCK
FREQ.
30
32
T1
4
8
TEMPORARY
REGISTER 2
STOP
IDLE
INTERRUPT INITIALIZE
8
8
TEMPORARY
REGISTER 1
CONTROL &
TIMING
ARITHMETIC
LOGIC UNIT
OSCILLATOR
DECIMAL
ADJUST
XTAL 2XTAL 1RESETINT / T0
MEMORY
BANK
FLIP-FLOPS
TIMER/ EVENT
COUNTER
HIGHER
PROGRAM
COUNTER
8
88 8
5888 8
INSTRUCTION
REGISTER
&
DECODER
LOWER
PROGRAM
COUNTER
CONDITIONAL
BRANCH
LOGIC
PROGRAM
STATUS
WORD
RAM
ADDRESS
REGISTER
INT / T0 T 1
TIMER
FLAG
CARRY ACC
ACC BIT
TEST
8
MULTIPLEXER
REGISTER 0 REGISTER 1 REGISTER 2 REGISTER 3 REGISTER 4 REGISTER 5
D
REGISTER 6
E
REGISTER 7
C
8 LEVEL STACK
O
(VARIABLE LENGTH)
D E
OPTIONAL SECOND
REGISTER BANK
DATA STORE
RESIDENT RAM ARRAY
MBB561
Fig.1 Block diagram of PCF84C21A; PCF84C41A and PCF84C81A.
Fig.1 Block diagram.
handbook, full pagewidth
Philips Semiconductors Product specification
Telecom microcontroller PCF84C81A

5 PINNING INFORMATION

5.1 Pinning

handbook, halfpage
SDA/P2.3
INT/T0
P2.2
SCLK
P0.0 P0.1 P0.2 P0.3 P0.4 P0.5 P0.6 P0.7
V
T1 SS
1 2 3 4 5 6 7
PCF84C81A
8
9 10 11 12 13
Fig.2 Pin configuration.
MBB562
28 27 26 25 24 23 22 21 20 19 18 17 16 1514
V
DD P2.1 P2.0 P1.7 P1.6 P1.5
P1.4 P1.3
P1.2 P1.1 P1.0 RESET XTAL2 XTAL1

5.2 Pin description Table 1 DIP28 and SO28 packages

SYMBOL PIN FUNCTION
P2.2 1 1 bit of Port 2: 4-bit
quasi-bidirectional I/O port
SDA/P2.3 2 bidirectional data line of the
2
I
C-bus interface, or 1 bit of Port 2: 4-bit quasi-bidirectional I/O port
SCLK 3 bidirectional clock line of the
2
I
C-bus interface
P0.0 to P0.7 4 to 11 8 bits of Port 0: 8-bit
quasi-bidirectional I/O port
INT/T0 12 Interrupt/Test 0 T1 13 Test 1/count input of 8-bit
timer/event counter 1
V
SS
14 ground
XTAL1 15 crystal oscillator input or
external clock input
XTAL2 16 crystal oscillator output RESET 17 Reset input P1.0 to P1.7 18 to 25 8 bits of Port 1: 8-bit
quasi-bidirectional I/O port
P2.0 to P2.1 26 to 27 2 bits of Port 2: 4-bit
quasi-bidirectional I/O port
V
DD
28 positive supply

6 INSTRUCTION SET

See the “
PCF84CxxxA family
” data sheet for a complete
description of the instruction set.

7 HIGH SINK OUTPUT CURRENTS

The Port 1 outputs of these devices are designed for high current drive in the logic 0 state. They are capable of driving 10 mA loads and higher. Applications include drive for small relays and light-emitting diodes (LEDs).
To avoid overload, care should be taken that the total Port 1 current averages less than 80 mA, i.e. an average of 10 mA per Port 1 line. Refer to Chapter “Limiting values” which specifies an upper limit of 100 mA for ISS.
Philips Semiconductors Product specification
Telecom microcontroller PCF84C81A

8 ROM MASK OPTIONS

ROM CODE OPTION
Program/data
Port Output
P0.0 to P0.7 standard open-drain push-pull P1.0 to P1.7 standard open-drain push-pull P2.0 to P2.2 standard open-drain push-pull SDA/P2.3 − open-drain −
Port State after reset
P0.0 to P0.7 set reset − P1.0 to P1.7 set reset − P2.0 to P2.2 set reset − SDA/P2.3 set −−
Any mix of instructions and data up to ROM size of 8 kbytes.
Oscillator
Transconductance LOW (g
) MEDIUM (gmM) HIGH (gmH)
mL

9 HANDLING

Inputs and outputs are protected against electrostatic discharge in normal handling. However, it is good practice to take normal precautions appropriate to handling MOS devices. See
“Data Handbook IC14, Section: Handling MOS devices”

10 LIMITING VALUES

In accordance with the Absolute Maximum Rating System (IEC 134).
SYMBOL PARAMETER MIN. MAX. UNIT
V
DD
V
I
I
I
I
O
I
O
P
tot
P
O
I
DD
I
SS
T
stg
T
j
supply voltage −0.5 +7 V all input voltages −0.5 VDD+ 0.5 V DC input current −10 +10 mA DC output current except Port 1 output LOW −10 +10 mA DC output current, Port 1 output LOW −10 +20 mA total power dissipation − 125 mW power dissipation per output − 30 mW supply current −50 +50 mA ground supply current −100 +50 mA storage temperature range −55 +150 °C operating junction temperature − 90 °C
.
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