Philips pcf84c12a DATASHEETS

DATA SH EET

Product specification

Supersedes data of 1996 Nov 20

File under Integrated Circuits, IC14

1998 May 11

INTEGRATED CIRCUITS

PCF84C12A

8-bit microcontroller

1998 May 11 2

Philips Semiconductors Product specification

8-bit microcontroller PCF84C12A

CONTENTS

1 FEATURES

2 GENERAL DESCRIPTION

3 ORDERING INFORMATION (see note 1)

4 BLOCK DIAGRAM

5 PINNING INFORMATION

5.1 Pinning

5.2 Pin description

6 INSTRUCTION SET

7 ROM MASK OPTIONS

8 HANDLING

9 LIMITING VALUES

10 DC CHARACTERISTICS

11 AC CHARACTERISTICS

12 PACKAGE OUTLINES

13 SOLDERING

13.1 Introduction

13.2 DIP

13.3 SO

14 DEFINITIONS

15 LIFE SUPPORT APPLICATIONS

1998 May 11 3

Philips Semiconductors Product specification

8-bit microcontroller PCF84C12A

1 FEATURES

• Manufactured in silicon gate CMOS process

• 8-bit CPU, ROM, RAM, I/O in a 20-lead package

• 1 kbyte ROM

• 64 byte RAM

• Over 100 instructions (based on MAB8048) all of

1 or 2 cycles

• 13 quasi-bidirectional I/O port lines

• 8-bit programmable timer/event counter 1

• Two single-level vectored interrupts:

– external

– 8-bit programmable timer/event counter 1

• Two test inputs, one of which also serves as the external

interrupt input

• Stop and Idle modes

• Supply voltage: 2.5 to 5.5 V

• Clock frequency: 1 to 16 MHz

• Operating temperature: −40 to +85 °C.

2 GENERAL DESCRIPTION

This data sheet details the specific properties of the

PCF84C12A. The shared properties of the PCF84CxxxA

family of microcontrollers are described in the

“PCF84CxxxA family”

data sheet, which should be read in

conjunction with this publication. Note that the devices

described in this data sheet do not feature I

2

C-bus

compatibility or derivative logic, so the information given in

the family data sheet about these features can be ignored.

The PCF84C12A is a general purpose CMOS

microcontroller with 1 kbyte of program memory.

It includes 64 bytes of RAM and 13 I/O port lines.

The instruction set is based on the MAB8048 and is a

sub-set of that listed in the

“PCF84CxxxA family”

data

sheet.

3 ORDERING INFORMATION

Note

1. Please refer to the Order Entry Form (OEF) for these devices for the full type number to use when ordering. This type

number will also specify the required program and ROM mask options.

TYPE NUMBER

(1)

PACKAGE

NAME DESCRIPTION VERSION

PCF84C12AP DIP20 plastic dual in-line package; 20 leads (300 mil) SOT146-1

PCF84C12AT SO20 plastic small outline package; 20 leads; body width 7.5 mm SOT163-1

1998 May 11 4

Philips Semiconductors Product specification

8-bit microcontroller PCF84C12A

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4 BLOCK DIAGRAM

handbook, full pagewidth

OSCILLATOR

MBC951

PORT 0

FLIP-FLOPS

PORT 0

BUFFER

8

HIGHER

PROGRAM

COUNTER

LOWER

PROGRAM

COUNTER

PROGRAM

STATUS

WORD

MEMORY

BANK

FLIP-FLOPS

RESIDENT ROM

1 kbyte

(PCF84C12A)

2 kbytes

(PCF84C22A)

4 kbytes

(PCF84C42A)

DECODE

5 888 8

P0.7 to P0.0

RAM

ADDRESS

REGISTER

(8)

ACCUMULATOR

TEMPORARY

REGISTER 1

TEMPORARY

REGISTER 2

ARITHMETIC

LOGIC UNIT

INSTRUCTION

REGISTER

&

DECODER

DECIMAL

ADJUST

CONTROL & TIMING

XTAL 2XTAL 1RESETINT / T0

STOP

IDLE

INTERRUPT

INITIALIZE

CONDITIONAL

BRANCH

LOGIC

INT / T0

TEST 1

TIMER

FLAG

CARRY

ACC

ACC BIT

TEST

RESIDENT RAM ARRAY

64 bytes

MULTIPLEXER

8 LEVEL STACK

(VARIABLE LENGTH)

OPTIONAL SECOND

REGISTER BANK

DATA STORE

D

E

C

O

D

E

REGISTER 0

REGISTER 1

REGISTER 2

REGISTER 3

REGISTER 4

REGISTER 5

REGISTER 6

REGISTER 7

PORT 1

FLIP-FLOPS

PORT 1

BUFFER

P1.0 to P1.4

5

3

TIMER/

EVENT

COUNTER

32

INTERNAL

CLOCK

FREQ.

30

TEST 1

888 8 8

INTERRUPT

LOGIC

timer interrupt

external interrupt

Fig.1 Block diagram of PCF84C12A.

1998 May 11 5

Philips Semiconductors Product specification

8-bit microcontroller PCF84C12A

5 PINNING INFORMATION

5.1 Pinning

Fig.2 Pin configuration.

handbook, halfpage

1

2

3

4

5

6

7

8

9

10

20

19

18

17

16

15

14

13

12

11

PCF84C12A

MBK778

P0.0

P0.1

P0.2

P0.3

P0.4

P0.5

P0.6

P0.7

INT/T0

V

SS

T1

XTAL1

XTAL2

RESET

P1.0

P1.1

P1.3

P1.2

P1.4

V

DD

5.2 Pin description

Table 1 DIP20 and SO20 packages

SYMBOL PIN TYPE DESCRIPTION

P0.0 to P0.7 1 to 8 I/O Port 0: 8-bit

quasi-bidirectional

I/O port

INT/T0 9 I Interrupt/Test 0

V

SS

10 P ground

T1 11 I Test 1/count input of

8-bit timer/event

counter 1

XTAL1 12 I crystal oscillator

input or external

clock input

XTAL2 13 O crystal oscillator

output

RESET 14 I reset input

P1.0 to P1.4 15 to 19 I/O Port 1: 4-bit

quasi-bidirectional

I/O port

V

DD

20 P positive supply

6 INSTRUCTION SET

Since the I

2

C-bus interface, Port 2 and derivative logic are

not provided, instructions associated with these functions

are not available.

ROM space is restricted to 1 kbyte for the PCF84C12A.

Therefore, the instructions SEL MB1/2/3 should be

avoided as they would define non-existing program

memory banks.

As RAM space is limited to 64 bytes, care should be taken

to avoid accesses to non-existing RAM locations.

Refer to the

“PCF84CxxxA family”

data sheet, for a

complete description of the instruction set.