INTEGRATED CIRCUITS
DATA SHEET
PCF5078
Power amplifier controller for GSM and PCN systems
Product specification |
|
1999 Apr 12 |
|||||
File under Integrated Circuits, IC17 |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Philips Semiconductors |
Product specification |
|
|
Power amplifier controller for GSM and
PCF5078
PCN systems
FEATURES
∙Compatible with baseband interface family PCF5073x
∙Two power sensor inputs
∙Temperature compensation of sensor signal
∙Active filter for DAC input
∙Power Amplifier (PA) protection against mismatching
∙Bias current source for detector diodes
∙Generation of pre-bias level for PA at start of burst (home position)
∙Possibility to adapt home position by external components
∙Applicable for a wide range of silicon and GaAs power amplifiers.
QUICK REFERENCE DATA
APPLICATIONS
∙Global System for Mobile communication (GSM)
∙Personal Communications Network (PCN) systems.
GENERAL DESCRIPTION
This CMOS device integrates an amplifier for the detected RF voltage from the sensor, an integrator and an active filter to build a PA control loop for cellular systems with a small amount of passive components.
SYMBOL |
PARAMETER |
MIN. |
TYP. |
MAX. |
UNIT |
|
|
|
|
|
|
VDD |
supply voltage |
2.4 |
3.6 |
5.0 |
V |
IDD(tot) |
total supply current |
− |
− |
6 |
mA |
Tamb |
operating ambient temperature |
−40 |
− |
+85 |
°C |
ORDERING INFORMATION
TYPE |
|
PACKAGE |
|
|
|
|
|
NUMBER |
NAME |
DESCRIPTION |
VERSION |
|
|||
|
|
|
|
PCF5078T |
TSSOP8 |
plastic thin shrink small outline package; 8 leads; body width 3.0 mm |
SOT505-1 |
|
|
|
|
1999 Apr 12 |
2 |
Philips Semiconductors |
Product specification |
|
|
Power amplifier controller for GSM and
PCF5078
PCN systems
BLOCK DIAGRAM
|
|
|
antenna |
|
|
|
|
|
|
|
|
sensor |
|
|
|
|
|
|
|
RF |
PA |
|
|
|
|
|
|
|
|
|
D1 |
D2 |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
VINT |
|
|
|
|
|
VS2 |
VS1 |
|
|
|
|
VC |
|
|
|
4 |
3 |
S1 |
|
2 |
|
1 |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
C4 |
|
|
|
|
|
|
|
|
|
10 pF |
|
S2 |
R2 |
|
|
|
|
|
C1 |
S5 |
R1 |
1 kΩ |
||
|
|
|
|
|
|
||||
|
|
|
|
|
|
|
|
|
|
|
|
|
|
6 pF |
|
|
20 kΩ |
|
|
|
|
|
|
C2 |
OP1 |
|
|
|
|
|
|
|
|
|
|
OP4 |
VDD |
||
|
|
|
|
PCF5078 |
|||||
|
|
|
|
|
|||||
|
|
|
|
|
|
|
|||
|
|
|
|
6 pF |
|
|
S4 |
S3 |
10 μA |
|
|
|
|
|
R6 |
|
|||
|
|
|
|
|
|
|
|||
|
|
|
|
|
|
|
|
Vprebias |
|
|
|
|
|
|
15 kΩ |
|
|
|
|
|
|
30 μA |
30 μA |
VDD |
|
R4 |
|||
|
|
|
|
||||||
|
|
VDD |
VDD |
|
|
6 kΩ |
|||
|
|
|
|
|
|
||||
|
|
|
|
10 μA |
|
|
|||
|
|
|
|
|
R3 |
|
|
|
|
|
|
|
|
|
|
Vhome |
|
|
|
|
|
|
|
C3 |
50 kΩ |
|
S1 S2 S3 S4 S5 |
||
|
|
|
|
|
|
|
|
||
|
|
|
|
|
|
|
VDAC |
|
CONTROL |
|
|
|
|
5 pF |
|
|
|
|
|
|
|
|
|
|
|
VDD |
|
LOGIC |
|
|
|
|
|
|
|
|
|
||
|
|
|
|
|
|
|
|
|
|
|
|
5 |
6 |
|
7 |
8 |
|
|
|
|
|
VSS |
VDAC |
VHOME |
VDD |
|
|
MGS193 |
|
|
|
|
|
|
|
|
|||
|
|
AUXDAC3 |
|
|
|
|
|
|
|
|
|
PCF5073x |
|
|
|
|
|
||
Fig.1 Block diagram.
1999 Apr 12 |
3 |
Philips Semiconductors |
Product specification |
|
|
Power amplifier controller for GSM and
PCF5078
PCN systems
PINNING
SYMBOL |
PIN |
DESCRIPTION |
|
|
|
VC |
1 |
PA control output voltage |
|
|
|
VINT |
2 |
negative integrator input |
|
|
|
VS1 |
3 |
sensor signal input 1 |
|
|
|
VS2 |
4 |
sensor signal input 2 |
|
|
|
VSS |
5 |
ground supply |
VDAC |
6 |
DAC input voltage |
|
|
|
VHOME |
7 |
home position input voltage |
|
|
|
VDD |
8 |
supply voltage |
handbook, halfpage
VC |
1 |
8 |
VDD |
|
VINT |
2 |
7 |
VHOME |
|
VS1 |
3 |
PCF5078 |
VDAC |
|
6 |
||||
VS2 |
4 |
|
5 |
VSS |
|
|
MGS194 |
|
|
Fig.2 Pin configuration.
FUNCTIONAL DESCRIPTION
General
The PCF5078 integrates an amplifier for the detected RF voltage from the sensor, an integrator and an active filter to build a PA control loop with a small amount of passive components.
The sensor amplifier is able to amplify signals from a RF power detector in a range of −20 to +15 dBm. This complies to the PA output power range of GSM and PCN systems when a directional coupler with 20 dB attenuation is used.
The Schottky diode for power detection (sensor) is biased by an integrated current source of 30 μA. Variations of the forward voltage of the diodes with the temperature have no influence on the measured signal, because they are cancelled by sampling around the switched capacitor operational amplifier OP1 (see Fig.1).
An external Digital-to-Analog Converter (DAC) with10-bit resolution is necessary to control the loop e.g. the AUXDAC3 of the baseband interface family PCF5073x.
An integrated active filter smooths the voltage steps of the DAC and avoids a feedthrough of the DAC harmonics into the modulation spectra of the PA.
The DAC signal and the sensor signal are added by operational amplifier OP1. The voltage difference of both signals is integrated by operational amplifier OP4, which provides the PA control voltage on pin VC. The integration is performed by means of an external capacitance CVINT connected between pins VINT and VC.
The shape of the rising and falling power burst edges can be determined by means of the DAC voltage (see Fig.3).
Power-down mode
During the not used time slots in Time Division Multiple Access (TDMA) systems, the PCF5078 must be turned off by switching off the supply voltage on pin VDD.
Initial conditions and start-up
The PCF5078 has been designed to operate in bursts as required in TDMA systems. For each time slot to be transmitted it must be powered-up by switching on the supply voltage. This allows a proper initialization of switches S1 to S5.
During start-up switches S1, S2 and S3 are closed and switches S4 and S5 are opened (see Fig.4).
The forward voltages on the Schottky diodes are sampled on capacitors C1 and C2, respectively, because switch S1 is closed. Moreover, the control voltage on pin VC is
initially forced to pre-bias level Vprebias because switches S2 and S3 are closed and switch S4 is opened.
Switch S1 is opened after a fixed time the supply voltage has been switched on and then the circuit is ready. This time is defined on-chip and can be maximum 45 μs. Once switch S1 is open, a ramp signal with a minimum amplitude of 25 mV applied on pin VDAC determines opening of switch S3 and closing of switch S4 with a delay of maximum 3 μs with respect to the start of the ramp.
After opening switch S3, the control voltage on pin VC rises in a fixed amount of time to the home position level so biasing the PA to the beginning of the active range of its control curve. Switch S2 remains closed during this typical time of 2 μs. When switch S2 is opened, switch S5 is closed allowing the transfer of any signal coming from amplifier OP1.
1999 Apr 12 |
4 |
Philips Semiconductors |
Product specification |
|
|
Power amplifier controller for GSM and
PCF5078
PCN systems
After this preset, the control voltage is free to increase according to the control loop if RF input is present (see Fig.3).
For higher DAC ramp steps the delay time of opening switch S3 (and closing switch S4) is reduced. On the contrary, the delay time between opening switch S2 with respect to opening switch S3 (and closing switch S4) remains unchanged.
For a correct start-up it is required that the rising time of the supply voltage is maximum 20 μs.
End of a burst
For a proper down ramp, the final value of the DAC input voltage should be below the value at the beginning of the burst and so be able to really shut-off the PA (see Fig.5). This means the code programmed for the last bit of the
DAC down ramp (CODEEND) has to be lower than the initial value of the up ramp (CODESTART). Moreover, the last code must be maintained until the supply voltage has
been switched off.
When the voltage on pin VC is detected to be lower than
VVHOME a built-in mechanism forces the voltage on pin VC to Vprebias by closing switches S1, S2 and S3 and by opening switches S4 and S5.
For proper operation, the supply voltage should be switched off at least 15 μs later with respect to the end of the down ramp on pin VDAC.
PA protection against mismatching
A second sensor amplified input is integrated into the PCF5078 for measuring the reflected wave of the directional coupler. The signal is added to the measured RF power signal (see Fig.3). When mismatching at the output of the PA occurs the power is reduced. A high Voltage Standing Wave Ratio (VSWR) at the output of the PA often occurs in systems where the PA is connected to the antenna via switches with low attenuation instead of using a duplex filter.
Home position voltage
A forward voltage of an on-chip silicon diode is provided as
the default home position voltage Vhome. This voltage matches the requirements at the control input of most PAs
and exhibits the same temperature coefficient.
However, if another value is needed for a certain PA the level can be adjusted by connecting external components to pin VHOME (see Figs 10 and 11). The home position voltage can be set between 200 and 1000 mV when using a capacitor of 50 pF connected between pins VINT
and VC.
1999 Apr 12 |
5 |
Philips Semiconductors |
Product specification |
|
|
Power amplifier controller for GSM and |
|
|
|
|
PCF5078 |
||||||
PCN systems |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
RFout 0 |
|
|
|
|
|
|
|
|
|
|
|
(dBc) −10 |
|
|
|
|
|
|
|
|
|
|
|
−20 |
|
|
|
|
|
|
|
|
|
|
|
−30 |
|
|
|
|
|
|
|
|
|
|
|
−40 |
|
|
|
|
|
|
|
|
|
|
|
−50 |
|
|
|
|
|
|
|
|
|
|
|
−60 |
|
|
|
|
|
|
|
|
|
|
|
−70 |
|
|
|
|
|
|
|
|
|
|
|
−80 |
−28 |
|
|
−18 |
−10 |
0 |
+543 |
+553 +561 |
+571 |
|
time (μs) |
|
|
|
|
||||||||
VVDAC |
|
|
|
|
|
|
|
|
|
|
|
<0.9VDD |
|
|
|
|
|
|
|
|
|
|
|
CODESTART |
|
|
|
|
|
|
|
|
CODEEND |
|
|
0 |
2 |
4 |
6 |
8 |
10 12 14 16 |
16 18 20 22 24 26 28 30 |
32 |
DAC bits at 560 kHz |
|||
|
|
|
|
|
|
|
|
|
|
||
VVC |
|
|
|
|
|
|
|
|
|
|
|
<0.9VDD |
|
|
|
|
|
|
|
|
|
|
|
Vprebias |
|
|
|
|
|
|
|
|
|
|
|
0 |
2 |
4 |
6 |
8 |
10 12 14 16 |
16 18 20 22 24 26 28 30 |
32 |
DAC bits at 560 kHz |
|||
|
|
|
|
|
|
|
|
|
|
||
VDD |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
time |
RFin |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
time |
>45 μs |
|
|
|
|
|
|
|
|
>15 μs |
MGS197 |
|
Fig.3 Timing diagram.
1999 Apr 12 |
6 |
Loading...