SO8plastic small outline package; 8 leads; body width 3.9 mmSOT96-1
Note
1. X = 0 to 9; depending on threshold voltage.
GENERAL DESCRIPTION
The PCF1252-Xs are low-power CMOS voltage threshold
detectors designed especially for supervision of
microcontroller/microprocessor systems for detection of
power-on/off conditions and generation of a system reset
pulse. The PCF1252-X also provides a POWF (power fail)
output which is activated at a precise factory-programmed
trip point. A system RESET output has a built-in delay with
duration determined by an external capacitor (CCT).
A second comparator (comparator 2) has been included to
enable the possibility of a second monitoring point in the
system.
PACKAGE
BLOCK DIAGRAM
handbook, full pagewidth
V
COMIN
DD
83
42
V
SS
comparator 2
+
−
comparator 1
+
−
1.30 V
PCF1252-X
DELAY
1
CTSELECT
MGC915
5
COMOUT
7
POWF
6
RESET
Fig.1 Block diagram.
1998 Apr 162
Philips SemiconductorsProduct specification
Threshold detector and reset generatorPCF1252-X family
PINNING
SYMBOLPINDESCRIPTION
CT1connection for the external capacitor
SELECT2select polarity or external reset input
COMIN3comparator input
V
SS
4ground (0 V)
COMOUT5comparator output
RESET6reset output
POWF7power failure signal output
V
DD
8supply voltage
handbook, halfpage
1
CT
SELECT
COMIN
2
PCF1252-X
3
4
V
SS
Fig.2 Pinning diagram.
MGC916
V
8
POWF
7
RESET
6
COMOUT
5
DD
FUNCTIONAL DESCRIPTION (see Fig.1)
The PCF1252-X contains:
• A precise factory-programmed voltage reference
• Two comparators
• A delay circuit.
The PCF1252-X family is comprised of 10 versions with
different factory-programmed voltage trip-points (V
TRIP
see Chapter “Characteristics”.
Supply
The supply voltage (V
) is internally divided before being
DD
compared, via comparator 1, with the internal reference
voltage.
POWF (see Fig.3)
The POWF output is:
• LOW, if VDD is below V
• HIGH, if VDD is above V
TRIP
TRIP
.
Power-on reset (SELECT = LOW)
As V
rises past V
DD
, a positive reset pulse is generated
TRIP
at RESET. The duration of the reset pulse (tR) is
determined by the value of the external capacitor (CCT;
maximum 1 µF, see Fig.8) connected to CT. With no
external capacitor connected, CCT assumes a minimum
value of 100 pF. If SELECT is HIGH, the reset pulse is
inverted.
Voltage trip-point
By selecting the voltage trip-point slightly higher than the
minimum operating voltage of the
microcontroller/microprocessor, there is sufficient time for
data storage before the power actually fails.
In order to prevent oscillations around the voltage
trip-point, a small hysteresis has been included, resulting
),
in a power-on switching point that is higher than the
voltage trip-point (minimum of 15 mV). The voltage
trip-point refers to the value at which power-off is signalled.
COMIN
Input to the second comparator (comparator 2).
When used in conjunction with an external voltage divider,
this allows a second point in the system to be monitored.
This input has no built-in hysteresis. When not in use
connect to V
. COMOUT will be LOW or HIGH
DD
depending on the voltage at COMIN:
• COMOUT = HIGH, if voltage at COMIN is above the
switch point VSP (typically 1.30 V).
• COMOUT = LOW, if voltage at COMIN is below the
switch point VSP (typically 1.30 V).
Power failure
During a power-off condition (V
DD<VTRIP
), POWF goes
LOW. After a time delay (tS), also determined by CCT,
RESET goes HIGH. Any POWF assertion (VDD<V
TRIP
)
will result in a subsequent RESET pulse.
1998 Apr 163
Philips SemiconductorsProduct specification
Threshold detector and reset generatorPCF1252-X family
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 134).
SYMBOLPARAMETERCONDITIONSMIN.MAX.UNIT
V
DD
V
I
I
I
I
O
P
tot
T
stg
T
amb
HANDLING
Inputs and outputs are protected against electrostatic discharge in normal handling. However, to be totally safe, it is
desirable to take normal handling precautions appropriate to handling MOS devices (see
supply voltage−0.5+7.0V
input voltage−0.5VDD+ 0.5V
DC clamp-diode currentall pins: VI< −0.5 V
−20mA
or VI>VDD+ 0.5 V
output current−20mA
total power dissipation−150mW
storage temperature−65+100°C
operating ambient temperature−40+85°C
“Handling MOS Devices”
).
CHARACTERISTICS
= 2.4 to 6.0 V; VSS=0V; T
V
DD
= −40 to +85 °C; (see Fig.3); unless otherwise specified.