Philips PCF1174C Technical data

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PCF1174C

4-digit static LCD car clock

Product specification
Supersedes data of September 1993
File under Integrated Circuits, IC16

1997 Apr 16

Philips Semiconductors Product specification

4-digit static LCD car clock PCF1174C

FEATURES

• Internal voltage regulator is electrically programmable
for various LCD voltages

• Time calibration is electrically programmable
(no trimming capacitor required)

• LCD voltage adjusts with temperature for good contrast

• 4.19 MHz oscillator

• 12-hour or 24-hour mode

• Operating ambient temperature: −40 to +85 °C

• 40-lead plastic SMD, face down (VSO40).

ORDERING INFORMATION

TYPE

NUMBER

PCF1174CT VSO40 plastic very small outline package; 40 leads; face down
PCF1174CU − uncased chip in tray

Notes

1. See Fig.1 and Chapter “Package outline” for pin layout and package details.

2. See Chapter “Chip dimensions and bonding pad locations” for pad layout and package details.

NAME DESCRIPTION VERSION

(2)

GENERAL DESCRIPTION

The PCF1174C is a single chip, 4.19 MHz CMOS car clock
circuit providing hours, minutes and seconds functions.
It is designed to drive a 4-digit static liquid crystal display
(LCD).

Two external single-pole, single-throw switches will
accomplish all time setting functions. Time calibration and
voltage regulator are electrically programmable via an
on-chip EEPROM. The circuit is battery-operated via an
internal voltage regulator and an external resistor.

PACKAGE

(1)

SOT158-2

−

1997 Apr 16 2

Philips Semiconductors Product specification

4-digit static LCD car clock PCF1174C

PINNING

SYMBOL PIN DESCRIPTION

BP 1 backplane output
PM 2 segment driver
AM 3 segment driver
ADEG1 4 segment driver
C1 5 segment driver
E2 6 segment driver
D2 7 segment driver
C2 8 segment driver
E3 9 segment driver
C3 10 segment driver
E4 11 segment driver
D4 12 segment driver
C4 13 segment driver
B4 14 segment driver
S1 15 hour adjustment input
DATA 16 EEPROM data input
OSC IN 17 oscillator input
OSC OUT 18 oscillator output
V

SS

19 negative supply
MODE 20 12/24-hour mode select input
V

PP

21 programming voltage input
TS 22 test speed-up mode input
ENABLE 23 set enable input for S1 and S2
V

DD

24 positive supply voltage
FLASH 25 colon option input
SEL 26 EEPROM select input
S2 27 minute adjustment input
A4 28 segment driver
F4 29 segment driver
G4 30 segment driver
B3 31 segment driver
AD3 32 segment driver
F3 33 segment driver
G3 34 segment driver
COL 35 segment driver
B2 36 segment driver
A2 37 segment driver
F2 38 segment driver
G2 39 segment driver
B1 40 segment driver

ADEG1

OSC IN

OSC OUT

Fig.1 Pin configuration, PCF1174CT, (VSO40).

BP
PM
AM

C1

E2
D2
C2

E3
C3

E4
D4
C4

B4

S1

DATA

V

SS

MODE

1
2
3
4
5
6
7
8
9

10

PCF1174CT

11
12

13

15
16
17
18
19
20

MSA991

40
39
38
37
36
35
34
33
32
31
30
29
28
2714
26
25
24
23
22
21

B1
G2
F2
A2
B2
COL
G3
F3
AD3
B3
G4
F4
A4
S2
SEL
FLASH

V

DD

ENABLE

TS
V

PP

1997 Apr 16 3

Philips Semiconductors Product specification

4-digit static LCD car clock PCF1174C

FUNCTIONAL DESCRIPTION AND TESTING
Outputs

The circuit outputs static data to the LCD. Generation of
BP and the output signals are shown in Fig.4.

F2

E2

A2

G2

AM

E1

A1

G1

B1

C1

PM

D1

Fig.2 Segment designation of LCD.

D2

The average voltages across the segments are:

1. V

ON(RMS)=VDD

B2

C2

2. V

P1 (P3)

P2 (P4)

OFF(RMS)

F3

E3

=0V.

A3

G3

D3

B3

C3

F4

E4

A4

G4

D4

MSA992

B4

C4

TIME

TIME

PM

(a)

a. 12-hour mode.

(b)

b. 24-hour mode.

Fig.3 Typical displays.

MSA994

MSA993

V

DD

BP

0

SEGMENT

V

ON

DD

0

V

DD

0

15.625 ms

OFF

Fig.4 Backplane and output signals.

MSA996

1997 Apr 16 4

Philips Semiconductors Product specification

4-digit static LCD car clock PCF1174C

LCD voltage (see Fig.5)
The adjustable voltage regulator controls the supply

voltage (see Section “LCD voltage programming”) in
relation to temperature for good contrast, for example
when VDD= 4.5 V at +25 °C, then:

VDD= 3 to 4 V at +85 °C.
VDD= 5 to 6 V at −40 °C.

−8

V

SS

(V)

−6

−4

−2

0

40 0 40 120

(1) Programmed to 4.0 V at 25 °C (value within the specified operating range).
(2) Programmed to 4.5 V at 25 °C (value within the specified operating range).
(3) Programmed to 5.0 V at 25 °C (value within the specified operating range).

(3)

(2)
(1)

Fig.5 Regulated voltage as a function of temperature (typical).

80

MSA995

o

T ( C)

1997 Apr 16 5

Philips Semiconductors Product specification

4-digit static LCD car clock PCF1174C

12/24-hour mode

Operation in 12-hour or 24-hour mode is selected by
connecting MODE to VDDor VSS respectively.

Power-on

After connecting the supply, the start-up mode is:
1:00 AM; 12-hour mode.
0:00; 24-hour mode.

Colon

If FLASH is connected to V

the colon pulses at 1 Hz.

DD

If FLASH is connected to VSS the colon is static.

Time setting

Switch inputs S1 and S2 have a pull-up resistor to facilitate
the use of single-pole, single-throw contacts. A debounce
circuit is incorporated to protect against contact bounce
and parasitic voltages.

Set enable

Inputs S1 and S2 are enabled by connecting ENABLE to

or disabled by connecting to VSS.

V

DD

Set hours

When S1 is connected to V

the hours displayed

SS

advances by one and after one second continues with one
advance per second until S1 is released (auto-increment).

Set minutes

Segment test/reset

When S1 and S2 are connected to V

, all LCD segments

SS

are switched ON. Releasing switches S1 and S2 resets the
display. No reset occurs when DATA is connected to V

SS

(overlapping S1 and S2).

Test mode

When TS is connected to V

, the device is in normal

DD

operating mode. When connecting TS to VSS all counters
(seconds, minutes and hours) are stopped, allowing quick
testing of the display via S1 and S2 (debounce and
auto-increment times are 64 times faster). TS has a
pull-up resistor but for reasons of safety it should be
connected to VDD.

EEPROM

V

has a pull-up resistor but for reasons of safety it should

PP

be connected to VDD.

LCD voltage programming

To enable LCD voltage programming, SEL is set to
open-circuit and a level of V

− 5 V is applied to V

DD

PP

(see Fig.6). The first pulse (tE) applied to the DATA input
clears the EEPROM to give the lowest voltage output.
Further pulses (tL) will increment the output voltage by
steps of typically 150 mV (T

amb

=25°C).
For programming, measure VDD− VSS and apply a store
pulse (tW) when the required value is reached. If the
maximum number of steps (n = 31) is reached and an
additional pulse is applied the voltage will return to the
lowest value.

When S2 is connected to V

the time displayed in

SS

minutes advances by one and after one second continues
with one advance per second until S2 is released
(auto-increment). In addition to minute correction, the
seconds counter is reset to zero.

1997 Apr 16 6

Time calibration

To compensate for the tolerance in the quartz crystal
frequency which has been positively offset (nominal
deviation +60 × 10

−6

) by capacitors at the oscillator input
and output, a number (n) of 262144 Hz pulses are
inhibited every second of operation.