Philips PCA8582F-2P, PCA8582F-2T, PCD8582D-2P, PCD8582D-2T, PCF8582E-2P Datasheet
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INTEGRATED CIRCUITS
DATA SH EET
PCX8582X-2 Family
256 x 8-bit CMOS EEPROMS
with I
Product specification
Supersedes data of February 1992
File under Integrated Circuits, IC12
Philips Semiconductors
2
C-bus interface
December 1994
Philips Semiconductors Product specification
QUICK REFERENCE DATA
SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT
V
DD
supply voltage 2.5 6.0 V
I
DDR
supply current READ f
SCL
= 100 kHz
VDD= 3 V − 60 µA
VDD= 6 V − 200 µA
I
DDW
supply current ERASE/WRITE f
SCL
= 100 kHz
VDD= 3 V − 0.6 mA
VDD= 6 V − 2.0 mA
I
DDSB
supply current STANDBY VDD= 3 V − 3.5 µA
VDD= 6 V − 10 µA
256 x 8-bit CMOS EEPROMS
with I
FEATURES
• Low power CMOS
– maximum active current 2.0 mA
– maximum standby current 10 µA (at 6.0 V),
• Non-volatile storage of 2-Kbits organized as 256 × 8-bits
• Single supply with full operation down to 2.5 V
• On-chip voltage multiplier
• Serial input/output I2C-bus
• Write operations
– byte write mode
– 8-byte page write mode
• Read operations
– sequential read
– random read
• Internal timer for writing (no external components)
• Power-on reset
• High reliability by using a redundant storage code
• Endurance
– >500 k E/W-cycles at T
• 40 years non-volatile data retention time (typ.)
• Pin and address compatible to
– PCX8570, PCF8571, PCF8572 and PCF8581
– PCX8494X-2, PCX8598X-2 -Family.
2
C-bus interface
typical 4 µA
(minimizes total write time per byte)
= 22 °C
amb
PCX8582X-2 Family
DESCRIPTION
The PCX8582X-2 is a 2-Kbit (256 × 8-bit) floating gate
electrically erasable programmable read only memory
(EEPROM). By using an internal redundant storage code
it is fault tolerant to single bit errors. This feature
dramatically increases reliability compared to conventional
EEPROM memories.
Power consumption is low due to the full CMOS
technology used. The programming voltage is generated
on-chip, using a voltage multiplier.
As data bytes are received and transmitted via the serial
I2C-bus, a package using eight pins is sufficient. Up to
eight PCX8582X-2 devices may be connected to the
I2C-bus. Chip select is accomplished by three address
inputs (A0, A1, A2).
Timing of the ERASE/WRITE cycle is carried out
internally, thus no external components are required. Pin 7
(PTC) must be connected to either V
There is an option of using an external clock for timing the
length of an ERASE/WRITE cycle.
or left open-circuit.
DD
December 1994 2
Philips Semiconductors Product specification
256 x 8-bit CMOS EEPROMS
2
with I
ORDERING INFORMATION
PCF8582C-2P DIP8 plastic dual in-line package;
PCD8582D-2P −25 +70 3.0 6.0
PCF8582E-2P −40 +85 4.5 5.5
PCA8582F-2P −40 +125 4.5 5.5
PCF8582C-2T SO8 plastic small outline
PCD8582D-2T −25 +70 3.0 6.0
PCF8582E-2T −40 +85 4.5 5.5
PCA8582F-2T −40 +125 4.5 5.5
DEVICE SELECTION
Table 1 Device selection code
SELECTION DEVICE CODE CHIP ENABLE R/
Bit b71 b6 b5 b4 b3 b2 b1 b0
Device 1 0 1 0 A2 A1 A0 R/W
Note
1. The MSB b7 is sent first.
C-bus interface
TYPE
NUMBER
PACKAGE TEMPERATURE (°C) SUPPLY (V)
NAME DESCRIPTION VERSION MIN. MAX. MIN. MAX.
SOT97-1 −40 +85 2.5 6.0
8 leads (300 mil)
SOT96-1 −40 +85 2.5 6.0
package;
8 leads; body width 3.9 mm
PCX8582X-2 Family
W
Table 2 Endurance and data retention guarantees
DEVICE ENDURANCE E/W CYCLES DATA RETENTION YEARS
PCF8582C-2; PCA8582F-2 500000
Note
1. At the time of publication of this data sheet the statistical history was not yet sufficient to guarantee 1000000000 E/W
cycle performance for these types.
December 1994 3
(1)
40
Philips Semiconductors Product specification
handbook, full pagewidth
MBC794
TEST MODE DECODER
POWER - ON RESET
I C - BUS CONTROL LOGIC
2
SEQUENCER
ADDRESS
HIGH
REGISTER
BYTE
COUNTER
DIVIDER
( 128)
EE
CONTROL
TIMER
( 16)
EEPROM
ADDRESS
POINTER
BYTE
LATCH
(8 bytes)
SHIFT
REGISTER
ADDRESS
SWITCH
INPUT
FILTER
OSCILLATOR
8
4
3
n
7
PTC
PCX8582X-2
4
V
SS
A1
A2
A0
321
8
V
DD
6
5
SCL
SDA
Fig.1 Block diagram.
256 x 8-bit CMOS EEPROMS
2
with I
BLOCK DIAGRAM
C-bus interface
PCX8582X-2 Family
December 1994 4
Philips Semiconductors Product specification
Fig.2 Pin configuration.
handbook, halfpage
1
2
3
4
8
7
6
5
A0
A1
A2
V
SS
SDA
SCL
PTC
V
DD
PCX8582X-2
MBC792
256 x 8-bit CMOS EEPROMS
2
with I
C-bus interface
PINNING
SYMBOL PIN DESCRIPTION
A0 1 address input 0
A1 2 address input 1
A2 3 address input 2
V
SS
4 negative supply voltage
SDA 5 serial data input/output (I2C-bus)
SCL 6 serial clock input (I2C-bus)
PTC 7 programming time control output
V
DD
8 positive supply voltage
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC134).
SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT
V
DD
V
I
I
I
I
O
T
stg
T
amb
supply voltage −0.3 +7.0 V
voltage on any input pin |ZI| > 500 Ω VSS− 0.8 VDD+ 0.8 V
current on any input pin − 1 mA
output current − 10 mA
storage temperature −65 +150 °C
operating ambient temperature
PCF8582C-2; PCF8582E-2 −40 +85 °C
PCD8582D-2 −25 +70 °C
PCA8582F-2 −40 +125 °C
PCX8582X-2 Family
December 1994 5
Philips Semiconductors Product specification
256 x 8-bit CMOS EEPROMS
2
with I
C-bus interface
CHARACTERISTICS
PCF8582C-2: VDD= 2.5 to 6.0 V; VSS= 0 V; T
PCD8582D-2: V
PCF8582E-2: V
PCA8582F-2: V
= 3.0 to 6.0 V; VSS= 0 V; T
DD
= 4.5 to 5.5 V; VSS= 0 V; T
DD
= 4.5 to 5.5 V; VSS= 0 V; T
DD
= −40 to +85 °C; unless otherwise specified.
amb
= −25 to +70 °C; unless otherwise specified.
amb
= −40 to +85 °C; unless otherwise specified.
amb
= −40 to +125 °C; unless otherwise specified.
amb
SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT
Supplies
V
DD
supply voltage
PCF8582C-2 2.5 6.0 V
PCD8582D-2 3.0 6.0 V
PCF8582E-2; PCA8582F-2 4.5 5.5 V
I
DDR
supply current READ f
= 100 kHz
SCL
PCF8582C-2; PCD8582D-2 VDD= 3.0 V − 60 µA
VDD= 6.0 V − 200 µA
PCF8582E-2; PCA8582F-2 VDD= 5.5 V − 200 µA
I
DDW
supply current ERASE/WRITE f
= 100 kHz
SCL
PCF8582C-2; PCD8582D-2 VDD= 3.0 V − 0.6 mA
VDD= 6.0 V − 2.0 mA
PCF8582E-2; PCA8582F-2 VDD= 5.5 V − 2.0 mA
I
DDSB
supply current STANDBY f
= 100 kHz
SCL
PCF8582C-2; PCD8582D-2 VDD= 3.0 V − 3.5 µA
VDD= 6.0 V − 10 µA
PCF8582E-2; PCA8582F-2 VDD= 5.5 V − 10 µA
PTC input (pin 7)
V
IL
V
IH
LOW level input voltage −0.8 0.1V
HIGH level input voltage 0.9V
SCL input (pin 6)
V
V
I
f
C
IL
IH
LI
SCL
I
LOW level input voltage −0.8 0.3V
HIGH level input voltage 0.7V
input leakage current VI= VDDor V
SS
clock input frequency 0 100 kHz
input capacitance VI= V
SS
SDA input/output (pin 5)
V
IL
V
IH
V
OL
I
LO
C
I
LOW level input voltage −0.8 0.3V
HIGH level input voltage 0.7V
LOW level output voltage IOL= 3 mA; V
output leakage current VOH= V
input capacitance VI= V
DD(min)
DD
SS
Data retention time
t
S
data retention time T
= 55 °C 10 − years
amb
PCX8582X-2 Family
V
DD
VDD+ 0.8 V
DD
V
DD
VDD+ 0.8 V
DD
− ±1 µA
− 7 pF
V
DD
VDD+ 0.8 V
DD
− 0.4 V
− 1 µA
− 7 pF
December 1994 6
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