Philips MC145406N, MC145406D Datasheet
INTEGRATED CIRCUITS
MC145406
EIA-232-D/V.28 driver/receiver
Product specification
IC19 Data Handbook
1994 Aug 31
Philips Semiconductors Product specification
MC145406EIA-232-D/V.28 driver/receiver
DESCRIPTION
The MC145406 is a silicon-gate CMOS IC that combines 3 drivers
and 3 receivers to fulfill the electrical specifications of standards
EIA-232-D and CCITT V .28. The drivers feature true TTL input
compatibility , slew-rate limited output, 300Ω power-off source
impedance, and output typically switching to within 25% of the
supply rails. The receivers can handle up to ±25V while presenting
3 to 7kΩ impedance. Hysteresis in the receiver aids reception of
noisy signals. By combining both drivers and receivers in a single
CMOS chip, the MC145406 provides efficient, low-power solutions
for EIA-232-D and V .28 applications.
FEATURES
Drivers
•±5 to ±12V supply range
•300Ω power-off source impedance
•Output current limiting
•TTL compatible
•Maximum slew rate = 30V/µs
Receivers
•±25V input voltage range over the full supply range
•3 to 7kΩ input impedance
•Hysteresis on input switchpoint
General
•Very low supply currents for long battery life
•Operation is independent of power supply sequencing
PIN CONFIGURATION
D and N Packages
V
DD
1
RX
2
1
TX
3
1
RX
2
4
TX
2
5
RX
6
3
TX
3
7
V
8
SS
NOTE:
D = Driver
R = Receiver
Figure 1. Pin Configuration
APPLICATIONS
•Modem interface
•Voice/data telephone interface
•Lap-top computers
•UART interface
V
16
CC
R
R
R
15
DO1
14
D
D
D
DI1
13
DO2
12
DI2
11
DO3
10
DI3
GND
9
SL00057
ORDERING INFORMATION
DESCRIPTION TEMPERATURE RANGE ORDER CODE DWG #
16-Pin Plastic Dual In-Line (DIP) Package 0 to +70°C MC145406N SOT38-4
16-Pin Small Outline Large (SOL) Package 0 to +70°C MC145406D SOT162-1
ABSOLUTE MAXIMUM RATINGS
SYMBOL PARAMETER RATING UNITS
V
CC
V
DD
V
SS
V
IR
P
D
T
A
T
STG
θ
JA
NOTE: This device contains protection circuitry to protect the inputs against damage due to high static voltages or electric fields; however, it is
advised that normal precautions be taken to avoid application of any voltage higher than maximum rated voltages to this high impedance circuit.
For proper operation, it is recommended that the voltages at the DI and DO pins be constrained to the range GND ≤
≤ VCC. Also, the voltage at the RX pin should be constrained to ±25V, and TX should be constrained to VSS ≤ V
always be tied to an appropriate logic voltage level (e.g., GND or V
Supply voltage -0.5 to +6.0 V
Supply voltage -0.5 to +13.5 V
Supply voltage +0.5 to -13.5 V
Input voltage range
RX
inputs (VSS - 15) to (VDD + 15) V
1-3
DI
inputs -0.5 to (VCC + 0.5) V
1-3
DC current per pin ±100 mA
Power dissipation (package) 1.0 W
Operating temperature range 0 to +70 °C
Storage temperature range -65 to +150 °C
Thermal impedance
N package 80 °C/W
D package 105 °C/W
VDI ≤ VDD and GND ≤ V
≤ VDD. Unused inputs must
for DI, and VSS or VDD for RX).
CC
TX1-3
DO
1994 Aug 31 853-1430 13721
2
Philips Semiconductors Product specification
MC145406EIA-232-D/V.28 driver/receiver
BLOCK DIAGRAM
RX
TX
300
5.4k
RECEIVER
15k
V
SS
V
DD
V
SS
DRIVER
LEVEL
SHIFT
V
CC
+
–
HYSTERESIS
V
CC
V
CC
DO
1.0V
1.8V
+
–
1.4V
DI
SL00058
Figure 2. Block Diagram
PIN #
1 V
8 V
16 V
SYMBOL PIN DESCRIPTION
DD
SS
CC
Positive power supply. The most positive power supply pin, which is typically 5 to 12 volts.
Negative power supply. The most negative power supply pin, which is typically -5 to -12 volts.
Digital power supply. The digital supply pin, which is connected to the logic power supply (maximum +5.5V).
9 GND Ground. Ground return pin is typically connected to the signal ground pin of the EIA-232-D connector (Pin 7)
as well as to the logic power supply ground.
2, 4, 6 RX1, RX2, RX3Receive Data Input. These are the EIA-232-D receive signal inputs whose voltages can range from +25 to
-25V . A voltage between +3 and +25 is decoded as a space and causes the corresponding DO pin to swing to
ground (0V); a voltage between -3 and -25V is decoded as a mark and causes the DO pin to swing up to V
The actual turn-on input switchpoint is typically biased at 1.8V above ground, and includes 800mV of hysteresis
CC
for noise rejection. The nominal input impedance is 5kΩ. An open or grounded input pin is interpreted as a mark,
forcing the DO pin to V
CC
.
11, 13, 15 DO1, DO2, DO3 Data Output. These are the receiver digital output pins, which swing from VCC to GND. A space on the RX pin
causes DO to produce a logic zero; a mark produces a logic one. Each output pin is capable of driving one
LSTTL input load.
10, 12, 14 DI1, DI2, DI3 Data Input. These are the high-impedance digital input pins to the drivers. TTL compatibility is accomplished
by biasing the input switchpoint at 1.4V above ground. However, 5V CMOS compatibility is maintained as well.
Input voltage levels on these pins must be between VCC and GND.
3, 5, 7 TX1, TX2, TX3 Transmit Data Output. These are the EIA-232-D transmit signal output pins, which swing toward VDD and VSS.
A logic one at a DI input causes the corresponding TX output to swing toward VSS. A logic zero causes the output
to swing toward VDD (the output voltages will be slightly less than VDD or VSS depending upon the output load).
Output slew rates are limited to a maximum of 30V/µs. When the MC145406 is off (VDD = VSS = VCC = GND),
the minimum output impedance is 300Ω.
.
1994 Aug 31
3
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