Philips ISP1561 User Manual

UM10005_3

ISP1561 Evaluation Board User’s Guide

April 2003

User’s Guide

Rev. 2.0

Revision History:

Revision Date Description Author

2.0 Apr 2003 Updated terminology

• “USB 1.1” to “Original USB”

• “USB 2.0” to “Hi-Speed USB”

C” to “I2C-bus”

• “I

1.3 Mar 2003 Updated the following sections:

• Section 4.7

• Section 6.2

• Section 7

1.2 Oct 2002 Updated the following sections:

• Section 4.4, removed the last paragraph.

• Section 8: Changed PSR05 to PSR05-

PD10611.

1.1 July 2002 Contents update. Socol Constantin, Adrian

1.0 Feb 2002 First draft. Adrian Albu and Socol

Yuk-lin ONG

Teh Hock Lye

Tan Kim Kiat

Albu and Teh Hock Lye

Constantin

We welcome your feedback. Send it to wired.support@philips.com

Philips Semiconductors - Asia Product Innovation Centre Visit www.semiconductors.philips.com/buses/usb

or www.flexiusb.com

Philips Semiconductors ISP1561 Evaluation Board User’s Guide

This is a legal agreement between you (either an individual or an entity) and Philips Semiconductors. By accepting this product, you indicate your agreement to the disclaimer specified as follows:

DISCLAIMER

PRODUCT IS DEEMED ACCEPTED BY RECIPIENT. THE PRODUCT IS PROVIDED “AS IS” WITHOUT WARRANTY OF ANY KIND. TO THE MAXIMUM EXTENT PERMITTED BY APPLICABLE LAW, PHILIPS SEMICONDUCTORS FURTHER DISCLAIMS ALL WARRANTIES, INCLUDING WITHOUT LIMITATION ANY IMPLIED WARRANTIES OF MERCHANT ABILITY, FITNESS FOR A PARTICULAR PURPOSE, AND NONINFRINGEMENT. THE ENTIRE RISK ARISING OUT OF THE USE OR PERFORMANCE OF THE PRODUCT AND DOCUMENTATION REMAINS WITH THE RECIPIENT. TO THE MAXIMUM EXTENT PERMITTED BY APPLICABLE LAW, IN NO EVENT SHALL PHILIPS SEMICONDUCTORS OR ITS SUPPLIERS BE LIABLE FOR ANY CONSEQUENTIAL, INCIDENTAL, DIRECT, INDIRECT, SPECIAL, PUNITIVE, OR OTHER DAMAGES WHATSOEVER (INCLUDING, WITHOUT LIMITATION, DAMAGES FOR LOSS OF BUSINESS PROFITS, BUSINESS INTERRUPTION, LOSS OF BUSINESS INFORMATION, OR OTHER PECUNIARY LOSS) ARISING OUT OF THIS AGREEMENT OR THE USE OF OR INABILITY TO USE THE PRODUCT, EVEN IF PHILIPS SEMICONDUCTORS HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.

User’s Guide Rev. 2.0—April 2003 2 of 20

Philips Semiconductors ISP1561 Evaluation Board User’s Guide

CONTENTS

1. INTRODUCTION.................................................................................................................................. 4

2. ISP1561 PIN CONFIGURATION........................................................................................................ 5

3. SYSTEM REQUIREMENTS .................................................................................................................. 5

4. ISP1561 EVALUATION BOARD ........................................................................................................6

4.1. PORT POWERED LEDS ...........................................................................................................................................................6

4.2. GOODLINK LEDS....................................................................................................................................................................6

4.3. V

4.4. LEGACY SUPPORT....................................................................................................................................................................7

4.5. INPUT CLOCK ..........................................................................................................................................................................8

4.6. EXTERNAL 5 V POWER SOURCE AND S3 WAKE-UP CAPABILITY....................................................................................8

4.7. LOADING THE SUBSYSTEM ID AND VENDOR ID FROM THE EXTERNAL EEPROM........................................................8

5. HI-SPEED USB (EHCI) DRIVERS ....................................................................................................... 9

6. LOADING OF THE ISP1561 DRIVERS............................................................................................ 10

POWER SUPPLY................................................................................................................................................................6

AUX

6.1. LOADING OF OHCI DRIVERS............................................................................................................................................. 10

6.2. LOADING OF EHCI DRIVERS .............................................................................................................................................. 13

7. SCHEMATICS ...................................................................................................................................... 15

8. BILL OF MATERIALS ......................................................................................................................... 19

9. REFERENCES ....................................................................................................................................... 20

FIGURES

Figure 1-1: ISP1561 Evaluation Board...........................................................................................................................................................................4

Figure 2-1: Pin Configuration..........................................................................................................................................................................................5

Figure 4-1: Evaluation Board Schematic.......................................................................................................................................................................6

Figure 4-2: Block Diagram of Legacy Signal Connection and Testing .................................................................................................................7

Figure 4-3: I2C-bus EEPROM Programming Example...............................................................................................................................................9

C-bus is a registered trademark and GoodLink is a trademark of Koninklijke Philips Electronics N.V. Microsoft

I and Windows are either registered trademarks or trademarks of Microsoft Corp. in the United States and/or other countries. Intel is a registered trademark of Intel, Inc. The names of actual companies and products mentioned herein may be the trademarks of their respective owners. All other names, products, and trademarks are the property of their respective owners.

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Philips Semiconductors ISP1561 Evaluation Board User’s Guide

1. Introduction

The ISP1561 evaluation board is a standard implementation of the ISP1561 in a complete configuration that allows you to exercise all signals and main features. Figure 1-1 shows the ISP1561 evaluation board.

Some of the features that are implemented in the ISP1561 evaluation board are as follows:

• Selection between PCI V

and PCI VCC power supply, with voltage presence indicator. This feature in

AUX

combination with the auxiliary +5 V input on J1 allows testing the system wake-up from power management states, such as S3cold, in which PCI V

is not present. This is intended mainly for testing the

ISP1561 in motherboard or notebook designs.

• Selection between 12 MHz clock (from a crystal) or 48 MHz clock (from a 48 MHz oscillator) input. By

default, 12 MHz crystal is implemented.

• Simple and reliable overcurrent protection scheme that allows testing of the

OCn

and

PWEn

signals.

Alternative solutions (resettable circuit protection devices) can be adopted.

• Port power and GoodLink™ LEDs. These may be omitted in a standard commercial implementation but

are considered useful on the evaluation board for easier understanding of functionality and debugging.

• Connector for testing legacy signals in the case of an on-board solution design. Testing the legacy feature

requires a motherboard with BIOS support for USB or legacy implementation on OHCI.

• Input for an external power supply (J1). This allows complete testing of power management on a standard

mainboard, including the power management modes in which the PCI +5 V is cut off.

Figure 1-1: ISP1561 Evaluation Board

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Philips Semiconductors ISP1561 Evaluation Board User’s Guide

2. ISP1561 Pin Configuration

Figure 2-1: Pin Configuration

3. System Requirements

• Intel® PII400 MHz processor and above, or equivalent in speed from AMD®, Cyrix® and VIA®, is

recommended. Generally, the processor usage indicator will vary according to the type and number of applications launched for exercising USB devices attached. For example, running data transfer tests on two high-speed (HS) hard disk drives (HDDs) on a P4 at 1.7 GHz, 128 Mbytes DDRAM, Microsoft® Windows® 2000 will determine a processor usage figure of 30% to 40%. Adding two Original USB cameras and an application playing MP3 song through Original USB speakers may increase the average processor usage figure up to 70% to 80%. Also, a Hi-Speed USB camera and an Original USB camera running simultaneously will increase the processor usage up to 100% (depending on resolution settings).

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Philips Semiconductors ISP1561 Evaluation Board User’s Guide

• Motherboard with PCI slots that are compatible with PCI Local Bus Specification, Rev. 2.2 (Supporting at

least S1 and S3 power management modes for power management features testing.).

• Memory: Minimum amount as indicated by the operating system and applications requirements, similar to

processor speed requirement mentioned earlier. Only a small amount of memory is occupied by the installation of the device drivers itself or OHCI/EHCI functionality.

• HDD space: Mainly determined by the operating system and applications requirements because specific

drivers need very little space.

• Graphics cards, other adapter cards: No special requirements.

• Operating systems supported: Windows 98 Second Edition (SE), Windows 2000, Windows XP and

Windows Millennium Edition (Me).

4. ISP1561 Evaluation Board

PORT1

PORT2

PORT3

PORT4

2 4 6

1 3 5

3 2 1

Figure 4-1: Evaluation Board Schematic

4.1. Port Powered LEDs

LEDs D2, D3, D4 and D5 indicate the power status of USB ports. If a port is powered, the respective LED is turned on. It is turned off during system boot-up until OHCI or EHCI drivers are loaded, or it is switched off whenever an overcurrent condition occurs.

4.2. GoodLink LEDs

LEDs D6, D7, D8 and D9 are GoodLink indicators. These LEDs blink when a device is connected to the respective port indicating port activity.

4.3. V

If the motherboard used is PCI 2.2 compliant, jumper JP1 position 2-3 may be shorted, allowing S3cold suspend and resume testing (PCI V or older version compliant, jumper JP1 position 1-2 must be shorted (PCI V present). Note that in both these situations LED D1 must be turned on indicating that the ISP1561 is powered.

User’s Guide Rev. 2.0—April 2003 6 of 20

Power Supply

AUX

= 3.3 V is used and an external +5 V is necessary). If the motherboard used is PCI 2.1

AUX

= 3.3 V is used because V

AUX

is not

Philips Semiconductors ISP1561 Evaluation Board User’s Guide

Important: If the LED D1 is not lit, it indicates that the ISP1561 does not have the V

supply (V

AUX

is not supplied

AUX

in the PCI connector). Therefore, your computer will stop responding or ‘hang’ when the operating system is loading OHCI or EHCI drivers. Switch JP1 to position 1-2 to connect to the PCI V

= 3.3 V (present under

normal conditions, except some system power management modes, for example, S3cold and S4).

4.4. Legacy Support

Fixed I/O 60/64H access is enabled by the EmulationEnable (EE) bit

SMM

System BIOS

Fixed I/O 60/64H access can be disabled or subtractive decode is used

P C I B U S

104H 108H

10CH

00H

100H

OHCI

Target Acce ss

Config Memory

Access

Memory map

LegacySupport

...

LegacyEnable

Opera tiona l

Registers

USB

Keyboard

IOEnb

MemEnb

RootHub

Fixed I/O 60H and 64H Access

IO map (60H and 64H)

Legacy Support Emulation Reg

Legacy

Emulati on

Handler

USB

Mouse

IRQ1

IRQ12

SMI#

A20OUT

KBIRQ1

MUIRQ12

System Chipset

System Int errupt

Controller

System Memory

Controller

Legacy Mouse and

Keyboard Controller

Legacy

Keybo ard

PCI Bridge...

80c42

System Chipset

Legacy Mous e

Figure 4-2: Block Diagram of Legacy Signal Connection and Testing

Figure 4-2 shows the necessary connections for testing the legacy support functionality. The necessary signals must be accessible on the motherboard used for legacy testing.

Testing R22 R23 R2 R3

Legacy support — Default setting

[1]

—

[1]

10 k 10 k

0  0  10 k 10 k

(No legacy support)

[1] When testing the legacy support, resistors R22 and R23 (or the pull-down resistors located at the bottom of the evaluation board) must be removed.

The JP2 connector is used for testing the keyboard and mouse legacy support.

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