Philips ISP1301 User Manual

UM10028_1

ISP1301 USB OTG Transceiver Eval Kit User’s Guide

User’s Guide

Rev. 1.0

Revision History:

Version Date Descriptions Author

1.0 Feb 2003 First release David Wang

February 2003

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Philips Semiconductors ISP1301 USB OTG Transceiver Eval Kit User’s Guide

This is a legal agreement between you (either an individual or an entity) and Philips Semiconductors. By accepting this product, you indicate your agreement to the disclaimer specified as follows:

DISCLAIMER

PRODUCT IS DEEMED ACCEPTED BY RECIPIENT. THE PRODUCT IS PROVIDED “AS IS” WITHOUT WARRANTY OF ANY KIND. TO THE MAXIMUM EXTENT PERMITTED BY APPLICABLE LAW, PHILIPS SEMICONDUCTORS FURTHER DISCLAIMS ALL WARRANTIES, INCLUDING WITHOUT LIMITATION ANY IMPLIED WARRANTIES OF MERCHANT ABILITY, FITNESS FOR A PARTICULAR PURPOSE, AND NONINFRINGEMENT. THE ENTIRE RISK ARISING OUT OF THE USE OR PERFORMANCE OF THE PRODUCT AND DOCUMENTATION REMAINS WITH THE RECIPIENT. TO THE MAXIMUM EXTENT PERMITTED BY APPLICABLE LAW, IN NO EVENT SHALL PHILIPS SEMICONDUCTORS OR ITS SUPPLIERS BE LIABLE FOR ANY CONSEQUENTIAL, INCIDENTAL, DIRECT, INDIRECT, SPECIAL, PUNITIVE, OR OTHER DAMAGES WHATSOEVER (INCLUDING, WITHOUT LIMITATION, DAMAGES FOR LOSS OF BUSINESS PROFITS, BUSINESS INTERRUPTION, LOSS OF BUSINESS INFORMATION, OR OTHER PECUNIARY LOSS) ARISING OUT OF THIS AGREEMENT OR THE USE OF OR INABILITY TO USE THE PRODUCT, EVEN IF PHILIPS SEMICONDUCTORS HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.

User’s Guide Rev. 1.0—February 2003 2 of 18

Philips Semiconductors ISP1301 USB OTG Transceiver Eval Kit User’s Guide

CONTENTS

1. INTRODUCTION ...............................................................................................................................5

2. SYSTEM REQUIREMENTS................................................................................................................5

3. CONFIGURATIONS AND SETTINGS............................................................................................6

3.1. POWER REQUIREMENTS ......................................................................................................................................................6

3.2. I2C MASTER SELECTION ......................................................................................................................................................6

3.3. USB INTERFACE ..................................................................................................................................................................7

3.4. AUDIO INTERFACE ..............................................................................................................................................................7

3.5. RESET ...................................................................................................................................................................................7

4. LOCATION OF MAJOR COMPONENTS .......................................................................................7

5. TEST PROGRAM 1301.EXE ..............................................................................................................8

5.1. INTRODUCTION..................................................................................................................................................................8

5.2. RUNNING THE TEST PROGRAM..........................................................................................................................................9

5.3. USING MENUS......................................................................................................................................................................9

5.3.1. Choose I2C slave address for ISP1301.................................................................................................................................. 9

5.3.2. Reset all registers ......................................................................................................................................................................... 9

5.3.3. List all registers ..........................................................................................................................................................................10

5.3.4. Read/Write register .................................................................................................................................................................. 10

5.3.5. Select Mode of Operation....................................................................................................................................................... 11

5.3.6. Enable/Disable charge-pump................................................................................................................................................. 11

6. HARDWARE DESCRIPTION.......................................................................................................... 12

6.1. BLOCK DIAGRAM ..............................................................................................................................................................12

6.2. FUNCTIONAL DESCRIPTION.............................................................................................................................................12

6.2.1. PCF8584 I2C-bus controller .................................................................................................................................................... 12

6.2.2. PC parallel to I2C converter .................................................................................................................................................... 12

6.2.3. HC, DC and OTG core logic interface connector............................................................................................................. 12

6.2.4. Power manager.......................................................................................................................................................................... 13

6.2.5. Audio interface........................................................................................................................................................................... 13

7. CONNECTOR PIN INFORMATION..............................................................................................13

7.1. DB-25 PC PARALLEL PORT CONNECTOR (J10) PIN ASSIGNMENT...............................................................................13

7.2. 8-BIT MICROPROCESSOR INTERFACE 20 X 2 HEADER (J13) PIN ASSIGNMENT.............................................................13

7.3. USB OTG CONTROLLER INTERFACE 8 X 2 HEADER (J8 AND J3) PIN ASSIGNMENT .................................................13

8. SCHEMATICS OF THE EVALUATION BOARD ......................................................................... 14

9. BILL OF MATERIALS.......................................................................................................................17

10. REFERENCES ....................................................................................................................................18

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Philips Semiconductors ISP1301 USB OTG Transceiver Eval Kit User’s Guide

TABLES

Table 3-1: +5.0 V power selection.......................................................................................................................................................................... 6

Table 3-2: V

Table 3-3: I2C master selection................................................................................................................................................................................ 6

Table 7-1: DB-25 PC parallel port connector (J10) pin assignment..............................................................................................................13

Table 7-2: 8-bit microprocessor-interface 20 x 2 header (J13) pin assignment

Table 7-3: OTG Controller interface J8 pin assignment..................................................................................................................................14

Table 7-4: OTG Controller interface J3 pin assignment..................................................................................................................................14

Table 9-1: BOM of the ISP1301 evaluation board .............................................................................................................................................17

and VIO selection .............................................................................................................................................................................. 6

BAT

[1]

.......................................................................................13

FIGURES

Figure 1-1: ISP1301 evaluation board PCB layout ............................................................................................................................................... 5

Figure 4-1: Location of major components........................................................................................................................................................... 8

Figure 5-1: Test program main menu ..................................................................................................................................................................... 9

Figure 5-2: List all registers screen display..........................................................................................................................................................10

Figure 5-3: Read/Write register screen display.................................................................................................................................................. 11

Figure 5-4: Select Mode of Operation screen display.......................................................................................................................................11

Figure 6-1: Block diagram of the ISP1301 evaluation board............................................................................................................................ 12

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Philips Semiconductors ISP1301 USB OTG Transceiver Eval Kit User’s Guide

1. Introduction

The ISP1301 is a Universal Serial Bus (USB) On-The-Go (OTG) transceiver device that is fully compliant with Universal Serial Bus Specification Rev. 2.0 and On-The-Go Supplement to the USB 2.0 Specification Rev. 1.0. It integrates a USB full-speed and low-speed transceiver, and other analog components to fully support OTG functionality.

The ISP1301 is ideal for use in portable electronics devices, such as mobile phones, personal digital assistants (PDAs), digital still cameras, and digital audio players. The ISP1301 acts as a physical layer to interface with any USB OTG Controller.

The ISP1301 evaluation board is designed to evaluate the functions of the ISP1301 chip. The main components on the board are: the ISP1301 (in HVQFN24 package), I and USB OTG controller interface. The operation mode of the ISP1301 can be configured through the I interface. The OTG status and control registers in the ISP1301 can also be accessed through the I

C master, USB mini-AB connector, analog audio interface,

C interface.

To verify the functions of the ISP1301 by using the DOS test program that is provided with the evaluation kit, connect the ISP1301 evaluation board to the parallel port of a PC. To fully verify the functions of the ISP1301, a USB OTG controller is used to connect to the ISP1301 board through the defined interface connector.

Figure 1-1: ISP1301 evaluation board PCB layout

2. System requirements

An x86 PC with DB-25 parallel port is required. The test program runs on DOS (or the command line in Microsoft program is compiled using Turbo

User’s Guide Rev. 1.0—February 2003 5 of 18

Windows® 98). In the BIOS setting, select port address 378H for the onboard parallel port. The test

C++ 3.0.

Philips Semiconductors ISP1301 USB OTG Transceiver Eval Kit User’s Guide

3. Configurations and settings

3.1. Power requirements

By default, the ISP1301 board is powered by a +5.0 V power supply through the DC jack (J12, inner +). The +5.0 V power can also be supplied from the USB Type-B connector (J4). However, when J4 is connected to a USB port on the PC, leave the USB mini-AB connector (J9) unconnected. If an external microprocessor is used to control

C controller chip PCF8584 (U4), the +5.0 V power can also be supplied from pin 16 and pin 18 of the

the I microprocessor connector (J13).

When the +5.0 V power is correctly applied to the board, LED2 (green) will turn ON.

Table 3-1: +5.0 V power selection

Jumper Descriptions

JP6

Short 1(UP5V) and 2 (+5V): +5.0 V from the microprocessor interface (pin 16 or 18 of J13) Short 3 (H_VBUS) and 4 (+5V): +5.0 V from the V

line of the USB connector (pin 1 of J4)

BUS

Short 5 (EXT5V) and 6 (+5V): +5.0 V from the DC jack (J12, inner +) [default]

The power supply (V

pin) for the ISP1301 can be provided either from the onboard +3.3 V source or from the

BAT

OTG Controller interface (pin 2 of J3).

Similarly, the power supply for the V

(called V

in the ISP1301 datasheet) pin of the ISP1301 can be provided

DD_LGC

either from the onboard +3.3 V source or from the OTG Controller interface (pin 2 of J8).

Table 3-2: V

and VIO selection

BAT

Jumper Descriptions

JP2

JP5

Short: V Open: V Short: V Open: V

from the onboard +3.3 V source [default]

BAT

from the pin 2 of J3

BAT

from the onboard +3.3 V source [default]

from the pin 2 of J8

3.2. I2C master selection

The I2C master controller can be supplied from any one of three sources:

• PC parallel port (software I

• Philips I

• External I

C controller chip PCF8584 (hardware I2C master)

C master that is connected to the I2C header J11.

Table 3-3: I2C master selection

Jumper Descriptions

JP3

Short 1 (SDA_8584) and 2 (SDA5V): SDA from PCF8584 Short 2 (SDA5V) and 3 (SDA_PC): SDA from PC parallel port [default] Open: SDA from I

JP4

Short 1 (SCL_8584) and 2 (SCL5V): SCL from PCF8584 Short 2 (SCL5V) and 3 (SCL_PC): SCL from PC parallel port [default] Open: SCA from I

Note: SCL and SDA come from the same I

C master)

C master.

C connector (pin 4 of J11)

C connector (pin 3 of J11)

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