Philips ISP1109 User Manual

ISP1109

Universal Serial Bus transceiver with carkit support

Rev. 01 — 14 July 2005 Product data sheet

1. General description

The ISP1109 is a Universal Serial Bus (USB) transceiver device that supports

CEA−936−A, Mini-USB Analog Carkit Interface Bus SpeciﬁcationRev. 2.0

(12 Mbit/s) and low-speed (1.5 Mbit/s) data rates. The ISP1109 is available in HVQFN32 package.

2. Features

. It is fully compliant with

. TheISP1109 can transmit and receiveserial data at full-speed

Universal Serial

■ Fully complies with

■ Supports

■ Can transmit and receive serial data at full-speed (12 Mbit/s) and low-speed

■ Supports Serial Parallel Interface (SPI) (up to 26 MHz) and I2C-bus (up to 400 kHz)

■ Supports Universal Asynchronous Receiver-Transmitter (UART) pass-through on the

■ Built-in analog switches to support analog audio signals multiplexedon the DP and DM

■ Supports On-The-Go (OTG) Session Request Protocol (SRP)

■ Supports Power-down mode, in which the whole chip consumes less than 20 µA

■ 3.0 V to 5.25 V power supply input range (VCC)

■ Supports wide range digital interfacing I/O voltage (V

■ ±12 kV ESD protection at pins DP, DM, ID, V

■ Supports charger current switching (ISET) detection

■ Full industrial grade operation from −40 °Cto+85°C

■ Available in a small HVQFN32 (5 x 5 mm2) halogen-free and lead-free package.

3. Applications

Universal Serial Bus Speciﬁcation Rev. 2.0

CEA−936−A, Mini-USB Analog Carkit Interface

(1.5 Mbit/s) data rates

serial interface to access control and status registers

DP and DM lines

lines

power current

, VCC, GNDA and GNDD

BUS

) of 1.65 V to 3.6 V

CC(I/O)

■ Mobile phones.

Philips Semiconductors

USB transceiver with carkit support

4. Ordering information

Table 1: Ordering information

Type number Package

Name Description Version

ISP1109BS HVQFN32 plastic thermal enhanced very thin quad ﬂat package; no leads;

32 terminals; body 5x5x0.85 mm

ISP1109

SOT617-1

Product data sheet Rev. 01 — 14 July 2005 2 of 59

Philips Semiconductors

5. Block diagram

CC(I/O)

RESET_N

SPI_I2C_SEL

SPI_MISO

SPI_MOSI/

I2C_SDA

SPI_CLK/

I2C_SCL

SPI_CS/

I2C_ADR

INT_N

UART_TXD

5 9

SHIFTER

8, 19

LEVEL

CLOCK AND

TIMER

SPI

INTERFACE

REGISTERS

I2C-BUS

INTERFACE

SERIAL CONTROLLER

ISP1109

DP_PU/ DP_INT

DETECTOR

ISP1109

USB transceiver with carkit support

POWER

BLOCK

ID DET

ISET

CONTROL

28 29

REG3V3

BUS

REF

ID_PU ID

ISET

UART_RXD

DAT/VP SE0/VM

OE_N

RCV

SPEED

SUSPEND

GNDD

Fig 1. Block diagram.

17 20

16 15 14

6 7

die pad

SE DETECTOR

DIF TX

DIF RX

D+

SE D−

23 22

−

AUDIO

SWITCH

004aaa486

DP DM

MIC

SPKR_R

SPKR_L

GNDA

Product data sheet Rev. 01 — 14 July 2005 3 of 59

Philips Semiconductors

6. Pinning information

6.1 Pinning

ISP1109

USB transceiver with carkit support

terminal 1

index area

SPKR_R GNDA

SPKR_L DP

RESET_N OE_N

SPEED V

SUSPEND

1 24 2 23 3 22

4 21

INT_N REG3V3

5 20 6 19 7 18 8 17

CC(I/O)

REFVBUS

MIC

32313029282726

ISP1109BS

10111213141516

SPI_MISO

SPI_I2C_SEL

SPI_MOSI/I2C_SDA

Transparent top view

Fig 2. Pin conﬁguration HVQFN32; top view.

ID_PU

ISET

UART_RXD

UART_TXD 25

RCV

SPI_CS/I2C_ADR

SPI_CLK/I2C_SCL

CC(I/O)

DAT/VP SE0/VM

004aaa487

SPI_I2C_SEL

SPI_MISO

SPI_MOSI/I2C_SDA

SPI_CLK/I2C_SCL

SPI_CS/I2C_ADR

VMVPRCV

10111213141516

SUSPEND DAT/VP

SPEED V

RESET_N OE_N

SPKR_L

SPKR_R

terminal 1

index area

8 17

CC(I/O)

7 18 6 19 5 20 4 21

INT_N REG3V3

3 22

2 23 1 24

GNDD

(exposed die pad)

ISP1109BS

32313029282726

REF

BUS

MIC

Bottom view

ISET

ID_PU

UART_RXD

SE0/VM

CC(I/O)

DM DP GNDA

004aaa703

UART_TXD

Fig 3. Pin conﬁguration HVQFN32; bottom view.

Product data sheet Rev. 01 — 14 July 2005 4 of 59

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6.2 Pin description

Table 2: Pin description

Symbol

SPKR_R 1 AI - analog audio input signal for the right speaker

SPKR_L 2 AI - analog audio input signal for the left speaker

INT_N 4 OD high-Z interrupt output; active LOW; connect to V

RESET_N 5 I - asynchronous reset input, active LOW

SPEED 6 I - speed selection input for the USB transceiver:

SUSPEND 7 I - suspend selection input for the USB transceiver:

CC(I/O)

SPI_I2C_ SEL

SPI_MISO 10 O - SPI slave data output; leave this pin open when

SPI_MOSI/ I2C_SDA

USB transceiver with carkit support

[1] [2]

Pin Type

3 P - supply voltage; operates when

[3]

Reset state

Description

channel

3.0 V < V

< 5.25 V

through a 3.3 kΩ resistor open-drain output

input

• LOW: USB low-speed

• HIGH: USB full-speed.

when not in use, connect to V 10 kΩ resistor

input

• LOW: normal operation

• HIGH: suspend mode.

when not in use, connect to ground through a 10 kΩ resistor

input

8 P - supply voltage for I/O interface logic signals

(1.65 V to 3.6 V)

9 I - selection of SPI or I

C-bus serial interface to

access internal registers:

• LOW: SPI slave interface is selected

• HIGH: I

The I is determined by pin 13 (I2C_ADR).

input

C-bus is selected

I push-pull output

11 I/OD high-Z SPI_MOSI input — SPI slave data input

I2C_SDA input and output — serial I when used as an I open-drain; connect to V resistor.

C-bus slave interface is selected.

C-bus device address is 010 110Xb; here X

C-bus data, the pad is

CC(I/O)

ISP1109

CC(I/O)

through a

CC(I/O)

C-bus data;

through a 3.3 kΩ

Product data sheet Rev. 01 — 14 July 2005 5 of 59

Philips Semiconductors

ISP1109

USB transceiver with carkit support

Table 2: Pin description

CC(I/O)

[1] [2]

Pin Type

12 I/OD high-Z SPI_CLK input — SPI clock input

13 I - SPI_CS input — SPI chip select input

19 P - supply voltage for the I/O interface logic signals

Symbol

SPI_CLK/ I2C_SCL

SPI_CS/ I2C_ADR

VM 14 O - single-ended DM receiver output; leave this pin

VP 15 O - single-ended DP receiver output; leave this pin

RCV 16 O 0 differential receiver output; leave this pin open

SE0/VM 17 I/O high-Z SE0 input and output — SE0 functions in

DAT/VP 18 I/O high-Z DAT input and output — DAT functions in

OE_N 20 I - enable differential transmitter input

REG3V3 21 P - regulated output voltage 3.3 V; a 0.1 µF external

DM 22 AI/O high-Z this pin can be programmed as:

…continued

[3]

Reset state

Description

I2C_SCL input and output — serial I when used as an I open-drain; connect to V resistor.

I2C_ADR input — LSB address offset of the

C-bus slave address.

input

open when not in use push-pull output

when not in use push-pull output

DAT_SE0 USB mode VM input and output — VM functions in VP_VM

USB mode. bidirectional pad

DAT_SE0 USB mode VP input and output — VP functions in VP_VM

USB mode. bidirectional pad

(1.65 V to 3.6 V)

input

capacitor is required

C-bus clock, the pad is

through a 3.3 kΩ

CC(I/O)

C-busclock;

• USB D− (data minus pin)

• transparent UART RxD or

• transparent audio SPKR_L.

DP 23 AI/O high-Z this pin can be programmed as:

• USB D+ (data plus pin)

• transparent UART TxD or

• transparent audio SPKR_R or MIC.

GNDA 24 P - analog ground

Product data sheet Rev. 01 — 14 July 2005 6 of 59

Philips Semiconductors

ISP1109

USB transceiver with carkit support

Table 2: Pin description

Symbol

[1] [2]

Pin Type

…continued

[3]

Reset

Description

state

UART_TXD 25 I - connect to TxD of the UART controller; when not in

use, connect to V

through a 10 kΩ resistor

CC(I/O)

input

UART_RXD 26 O - connect to RxD of the UART controller; leave this

pin open when not in use push-pull output

ISET 27 O

[4]

- output indicating detection of the carkit, charger or factory mode to enable high current mode of the phone charger; leave this pin open when not in use

push-pull output

ID_PU 28 AI - an external resistor is connected between the ID

and ID_PU pins

ID 29 AI - identiﬁcation detector input of the USB mini

connector

BUS

REF

30 AI - V

line input supply voltage of the USB

BUS

connector

[5]

31 P - supply voltage for audio circuits; 2.775 V ± 0.1 V MIC 32 AO - audio output signal for the microphone channel GNDD exposed

P - digital ground

die pad

[1] Symbol names ending with underscore N—for example, NAME_N—indicate active LOW signals. [2] Use a decoupling capacitor of 0.1 µF on all V [3] I = input; O = output; I/O = digital input/output; OD = open-drain output; AI/O = analog input/output;

P = power or ground. [4] The ISET pin is powered by REG3V3. All other digital pins are powered by V [5] For the decoupling capacitor requirement, refer to Table 7-7 of

CC(I/O)

, V

and VCC pins.

REF

CC(I/O)

Universal Serial Bus Speciﬁcation Rev. 2.0

Product data sheet Rev. 01 — 14 July 2005 7 of 59

Philips Semiconductors

7. Functional description

7.1 Serial controller

The serial controller includes the following functions:

ISP1109

USB transceiver with carkit support

• Serial Controller interface (SPI or I

C-bus)

• Device Identiﬁcation registers

• Control registers

• Interrupt registers

• Interrupt generator.

The serial controller acts as an SPI slave or I2C-bus slave. All the registers are the same as that in SPI or I2C-bus mode. In I2C-bus mode, the

registers are accessed in 8-bit width (bits 0 to 7) for each address. In SPI mode, there are 25 bits for each address, only bits 0 to 7 are useful while bits 8 to 24 are don’t cares.

At hardware reset including power-on reset, the level on pin SPI_I2C_SEL will determine whether the SPI or I2C-bus interface is active. If SPI_I2C_SEL = LOW, the SPI interface is selected. If SPI_I2C_SEL = HIGH, the I2C-bus interface is selected.

7.2 V

detector

BUS

The V session valid comparator threshold voltage (V bit VBUS_DET of the Interrupt Source register. If V stored.

detector provides voltage level detection on V

BUS

th(svc)

. If V

BUS

), logic 1 will be stored in

is below V

BUS

is above the V

BUS

, logic 0 will be

th(svc)

BUS

7.3 ID detector

In normal power mode, that is, when both VCC and V senses the condition of the ID line and can differentiate between the following three conditions:

are present, the ID detector

CC(I/O)

• ID pin is ﬂoating (bit ID_FLOAT = 1)

• ID pin is shorted to ground (bit ID_GND = 1)

• ID pin is connected to ground through resistor R

are logic 0). The recommended procedure to detect the status of ID using software is:

1. When nothing is connected, ID is in the ID_FLOAT state. Enable the ID_FLOAT interrupt (falling edge).

2. If an interrupt occurs, read the Interrupt Latch register. If ID changes, bit ID_FLOAT is set.

3. The software waits for sometime, for example: 100 ms, to allow mechanical debounce.

4. The software reads the Interrupt Source register, and checks bits ID_FLOAT and ID_GND.

Product data sheet Rev. 01 — 14 July 2005 8 of 59

(bits ID_FLOAT and ID_GND

DN(ID)

Philips Semiconductors

The ID detector has a switch that can be used to ground pin ID. This switch is controlled by bit ID_PULLDN of the Resistor Control register, and bits PH_ID_INT and PH_ID_ACK of the Audio Control register. See Table 3.

Table 3: ID pull-down control

ID_PULLDN PH_ID_ACK PH_ID_INT Switch between ID and GND

000off 0 0 1 on for time t

010waitfortime t

0 1 1 not deﬁned 1XXon

USB transceiver with carkit support

then off; bit PH_ID_INT

auto-clears to 0

off; bit PH_ID_ACK auto-clears to 0

Wint(ID)

, turn on the switch for t

int(ID)

ISP1109

then

Wint(ID)

The ID detector also has a switch that is connected between the ID_PU and V the voltage on the ID pin is higher than the voltage on the V

pin, the switch will be

REF

turned off. Otherwise, the switch will remain on.

7.4 Pull-up and pull-down resistors

The DP pull-up resistor can be enabled or disabled (default enabled) using register bit DP_PULLUP, if V be enabled, if VCC>V

To support DP Session Request Protocol (SRP), it is required that a B-device can perform DP pulsing when V bit DP_SRP_EN is set, the DP pull-up resistor will be enabled irrespective of the status of V

BUS

Table 4: DP pull-up resistor (R

Bit V DP_SRP_EN DP_PULLUP V

00XXXoff 0 1 no X X off 01XLOWXoff 0 1 X X LOW off 0 1 yes HIGH HIGH on 1 X X X HIGH on

) control

UP(DP)

BUS>Vth(svc)

is above V

BUS

and V

th(ISET)

is below the session end threshold (0.2 V to 0.8 V). If register

BUS

Pin DP pull-up resistor (SW1)

CC(I/O)

. The pull-up resistance on pin DP (R

th(svc)

BUS>Vth(svc)

HIGH RESET_N

UP(DP)

pins. If

) must

The pull-up resistor is context variable, as described in document

ECN_27%_Resistor

The value of the pull-up resistor depends on the condition of the USB bus:

• When the bus is idle, the value of the resistor is 900 Ω to 1575 Ω (SW2 = on).

• When the bus is transmitting or receiving, the value of the resistor is 1425 Ω to

3090 Ω (SW2 = off).

DP also implements a weak pull-up resistor (R

weakUP(DP)

bit DP_WKPU_EN of the Resistor Control register; see Figure 4. R connected to the DP pin (SW3 = on), if bit DP_WKPU_EN = 1 and the voltage on V greater than V

Product data sheet Rev. 01 — 14 July 2005 9 of 59

th(svc)

) that is controlled by

weakUP(DP)

will be

BUS

Philips Semiconductors

ISP1109

USB transceiver with carkit support

The DP pull-down resistor (R

) is connected to the DP line, if bit DP_PULLDOWN in

DN(DP)

the Resistor Control register is set. The DM pull-down resistor (R

DN(DM)

in the Resistor Control register is set.

REG3V3

0.525 kΩ to

1.515 kΩ

SW1

0.9 kΩ to

1.575 kΩ

) is connected to the DM line, if bit DM_PULLDOWN

SW2

weakUP(DP)

130 kΩ ± 30 %

SW3

DM_PULLDOWN

15 kΩ (14.3 kΩ to

24.8 kΩ)

004aaa520

15 kΩ

(14.3 kΩ to

24.8 kΩ)

DP_PULLDOWN

DN(DP)

DN(DM)

Fig 4. DP and DM pull-up and pull-down resistors.

7.5 Power block

The built-in DC-DC regulator conditions the input power supply (VCC) for use in the core of the ISP1109.

When VCC is greater than 3.6 V, the regulator will output 3.3 V ± 10 %. When VCC is less than 3.6 V, the regulator will be bypassed and pin REG3V3 will be shorted to pin VCC.

The output of the regulator can be monitored on pin REG3V3. A capacitor (0.1 µF) will be connected to pin REG3V3.

7.6 Carkit DP interrupt detector

The carkit DP interrupt detector is a comparator that detects the carkit interrupt signal on the DP line in analog audio mode. Bit DP_INT will be cleared (set to logic 0), if the voltage level on the DP line is below the carkit interrupt threshold V

thPH(DP)L

(0.4 V to 0.6 V).

The carkit interrupt detector is enabled in audio mode only (bit AUDIO_EN = 1).

Product data sheet Rev. 01 — 14 July 2005 10 of 59

Philips Semiconductors

7.7 Audio switches

The audio switchesprovide low impedance path for analog audio signals to be multiplexed on the DP and DM lines, or loopback between the MIC and SPKR lines.

There are ﬁve analog switches that are controlled by register bits. The impedance of the switches will be between 50 Ω and 150 Ω. Table 5 shows the relation between the control bits and the switches. Figure 5 shows the audio switches.

Table 5: Audio switch control

AUDIO_EN AUDIO_MONO S1 S2 S3

0 X off off off 1 0 on off on 1 1 off on off

ISP1109

USB transceiver with carkit support

SPKR_R

Fig 5. Audio switches.

SW_MIC_ SPKR_R

MIC

SW_MIC_ SPKR_L

SPKR_L

004aaa518

7.8 ISET detector

The ISET detector will set the ISET pin HIGH when either of the following conditions is met:

• ID>V

th(ID_FM)

• DP and DM SE1 detected, V

The DP and DM SE1 detector will time the length of the SE1 condition. The timer value is programmable using register bit TMR_SE1. The timer ranges from 0 ms to 15 ms, with 1 ms interval.

, VCC>V

th(ISET)

CC>Vth(ISET)

and V

BUS>Vth(svc)

and V

BUS>Vth(svc)

The ID > V

th(ID_FM)

detector, and the SE1 detector (with timer) requires bias current. In Power-down mode, the bias current is turned off to minimize current ICC. The bias current needs to be enabled so that the ISET detector can function as described earlier.

• If the Power-down is because V

voltage goes above the SESS_VLD threshold.

BUS

Product data sheet Rev. 01 — 14 July 2005 11 of 59

is disconnected, the bias will be enabled if the

CC(I/O)

Philips Semiconductors

• If the Power-down is because of the setting of register bit PWR_DN in the Mode

Control register, the bias will be enabled if the V SESS_VLD threshold. Note: In this case, make sure bit SESS_VLD_IEH in the Interrupt Enable High register is set to logic 1 before the PWR_DN bit is set. The recommended sequences for software is:

a. Set bit SESS_VLD_IEH to logic 1 b. Set bit PWR_DN to logic 1 c. Wait for interrupt from the ISP1109 d. If INT_N is asserted, read the Interrupt Latch register e. If bit SESS_VLD_INT is logic 1, clear bit PWR_DN (Note: Software must clear

ISP1109

USB transceiver with carkit support

voltage goes above the

BUS

bit PWR_DN within 5 ms from the time pin INT_N is asserted. For details, see Section 10).

Pin ISET will remain LOW when VCCis below V software through register bits. If bit ISET_DRV_EN is set to logic 1, the status of the ISET pin will be determined by bit ISET_STATE.

7.9 USB transceiver

7.9.1 Differential driver

The operation of the driver is described in Table 6.

Table 6: Transceiver driver operating setting

Pin Pin or bit RESET_N

HIGH LOW 0 0 output value from DAT/VP to DP and

HIGH LOW 0 1 output value from DAT/VP to DP and

HIGH LOW 1 X output value from DAT/VP to DP and

HIGH HIGH X X high-Z LOW X X X high-Z

[1] Include the internal power-on-reset pulse (active HIGH).

[1]

OE_N

SUSPEND

. Pin ISET can also be controlled by

th(ISET)

Bit DAT_SE0 Differential driver

SE0/VM to DM

DM, if SE0/VM is LOW; otherwise, drive both DP and DM LOW

Table 7 shows the behavior of the transmit operation in detail.

Table 7: USB functional mode: transmit operation

USB mode Inputs Outputs

DAT/VP SE0/VM DP DM

DAT_SE0 LOW LOW LOW HIGH DAT_SE0 HIGH LOW HIGH LOW DAT_SE0 LOW HIGH LOW LOW DAT_SE0 HIGH HIGH LOW LOW VP_VM LOW LOW LOW LOW

Product data sheet Rev. 01 — 14 July 2005 12 of 59

Philips Semiconductors

ISP1109

USB transceiver with carkit support

Table 7: USB functional mode: transmit operation

USB mode Inputs Outputs

DAT/VP SE0/VM DP DM

VP_VM HIGH LOW HIGH LOW VP_VM LOW HIGH LOW HIGH VP_VM HIGH HIGH HIGH HIGH

7.9.2 Differential receiver

The operation of the differential receiver is described in Table 8.

Table 8: Differential receiver operation settings

Pin or bit SUSPEND

0 HIGH 1 0 output differential value from DP and

0 HIGH 1 1 output differential value from DP and

0 HIGH 0 X output differential value from DP and

XLOWXX0 1XXXX

Pin OE_N Bit Differential receiver

…continued

DAT_SE0 BI_DI

DM to RCV

DM to DAT/VP and RCV

DM to RCV

The detailed behavior of the receive transceiver operation is shown in Table 9.

Table 9: USB functional mode: receive operation

USB mode Pin or bit

SUSPEND

DAT_SE0 0 LOW LOW RCV HIGH last value of RCV DAT_SE0 0 HIGH LOW HIGH LOW HIGH DAT_SE0 0 LOW HIGH LOW LOW LOW DAT_SE0 0 HIGH HIGH RCV LOW last value of RCV DAT_SE0 1 LOW LOW LOW HIGH X DAT_SE0 1 HIGH LOW HIGH LOW X DAT_SE0 1 LOW HIGH LOW LOW X DAT_SE0 1 HIGH HIGH HIGH LOW X VP_VM 0 LOW LOW LOW LOW last value of RCV VP_VM 0 HIGH LOW HIGH LOW HIGH VP_VM 0 LOW HIGH LOW HIGH LOW VP_VM 0 HIGH HIGH HIGH HIGH last value of RCV VP_VM 1 LOW LOW LOW LOW X VP_VM 1 HIGH LOW HIGH LOW X VP_VM 1 LOW HIGH LOW HIGH X VP_VM 1 HIGH HIGH HIGH HIGH X

Inputs Outputs DP DM DAT/VP

[1]

SE0/VM

[1]

RCV

[1] Applies only to bidirectional mode (bit BI_DI = 1). For unidirectional mode (bit BI_DI = 0), DAT/VP and SE0/VM are input-only pins.

Product data sheet Rev. 01 — 14 July 2005 13 of 59

Philips Semiconductors

7.10 Power-On Reset (POR)

ISP1109

USB transceiver with carkit support

When V (t

) will be typically 800 ns. The pulse is started when VCC rises above V

PORP

is directly connected to the RESET_N pin, the internal POR pulse width

CC(I/O)

POR(trip)

(1.5 V to 2.5 V). To give a better view of the functionality, Figure 6 shows a possible curve of VCCwith dips

at t2 to t3 and t4 to t5. If the dip at t4 to t5 is too short (that is, < 11 µs), the internal POR pulse will not react and will remain LOW. The internal POR starts with a 1 at t0. At t1, the detector will see the passing of the trip level and a delay element will add another t

PORP

before it drops to 0. The internal POR pulse will be generated whenever VCC drops below V

POR(trip)

for more

than 11 µs.

POR(trip)

t0 t1 t2 t3 t4 t5

(1)

PORP

(1) PORP = Power-On Reset Pulse.

Fig 6. Internal power-on reset timing.

PORP

004aaa582

PORP

Product data sheet Rev. 01 — 14 July 2005 14 of 59

Philips Semiconductors

8. Modes of operation

The ISP1109 supports four types of modes:

• Power modes

• Serial control modes

• USB modes

• Transparent modes.

8.1 Power modes

8.1.1 Normal mode

ISP1109

USB transceiver with carkit support

In this mode, both VCC and V operation range (VCC≥ 3.0 V, V

There are three levels of power saving schemes in the ISP1109:

• Active power mode: Power is on; all circuits are active.

• USB suspend mode: To reduce power consumption, the USB differential receiver is

powered off.

• Power-down mode: Set by writing logic 1 to bit PWR_DN of the Mode Control 2

register. The clock generator and all biasing circuits are turned off to reduce power consumption to the minimum possible; typically ICC is less than 20 µA. For details on waking up the clock, see Section 10.

8.1.2 Disable mode

In disable mode, V Power-down state, if V

When VCC is below threshold V When V

pin ISET, if any of the following conditions is detected:

BUS>Vth(svc)

• Voltage on pin ID is greater than V

• DP and DM are single-ended one (SE1).

are connected and their voltage levels are within the

CC(I/O)

≥ 1.65 V, V

CC(I/O)

is cut-off and VCC is powered. In this mode, the ISP1109 is in

CC(I/O)

is below SESS_VLD threshold (0.8 V to 2.0 V).

BUS

, pin ISET will remain at the LOW level.

th(ISET)

and VCC rises above V

th(ISET)

th(ID_FM)

≤ VCC).

CC(I/O)

, the ISP1109 will output HIGH on

If the preceding condition is detected, pin ISET will be asserted within 1.5 ms when V rises above V

The USB differential driver will be set in three-state as long as V pull-up resistor (R resistor (R

weakUP(DP)

th(ISET)

) will be disconnected from the DP line. The DP weak pull-up

UP(DP)

) will be connected if the V

voltage is above V

BUS

is lost. The DP

CC(I/O)

th(svc)

8.1.3 Isolate mode

In isolate mode, VCCis cut-off and V stable level to all digital output pins, and all bidirectional digital pins will be set in three-state.

Table 10 shows a summary of power modes.

Product data sheet Rev. 01 — 14 July 2005 15 of 59

is powered. In this mode, the ISP1109 will drive

CC(I/O)

Philips Semiconductors

ISP1109

USB transceiver with carkit support

Table 10: ISP1109 power modes: summary

CC(I/O)

BUS

PWR_DN (bit) ICC<20µA ISET (pin) Comment

off off X X yes high-Z power off off on X X yes high-Z isolate mode on off <V on off >V

th(svc) th(svc)

X yes LOW disable mode (Power-down)

X no LOW or HIGH disable mode (ISET operation) on on X 0 no LOW or HIGH normal mode (full operation) on on X 1 yes LOW or HIGH normal mode (Power-down)

Table 11 shows the pin states in disable or isolate mode.

Table 11: ISP1109 pin states in disable or isolate mode

Pin name Disable mode

= on, V

, REG3V3 powered not present

CC(I/O)

, V

REF

not present powered

CC(I/O)

= off)

ISET drive HIGH or LOW high-Z DP high-Z high-Z DM 15 kΩ pull-down enabled high-Z RCV high-Z drive LOW VP, VM, SPI_MISO, UART_RXD high-Z drive HIGH RESET_N, SPEED, SUSPEND,

high-Z high-Z SPI_I2C_SEL, SPI_MOSI/I2C_SDA, SPI_CLK/I2C_CLK, SPI_CS/I2C_ADR, SE0/VM, DAT/VP, UART_TXD, INT_N

MIC, SPKR_R, SPKR_L, ID, V

BUS

ID_PU V

high-Z high-Z

(high-Z, if voltage on

REF

pin ID > V

REF

)

Isolate mode (V

= off, V

(high-Z, if voltage on

REF

pin ID > V

REF

CC(I/O)

)

= on)

8.2 Serial control modes

8.2.1 I2C-bus mode

In I2C-bus mode, an external System-on-a-Chip (SoC) directly communicates with the serial controller through the SCL and SDAlines. The serial controller has a built-in I2C-bus slave function. An external I2C-bus master can access the internal registers of the ISP1109 through the I2C-bus interface.

The supported I2C-bus bit rate is up to 400 kbit/s. The I2C-bus device address is 010 110Xb, where X is determined by pin 13.

8.2.2 SPI mode

In this mode, an external SoC directly communicates with the serial controller through the SPI interface: SPI_MOSI, SPI_MISO, SPI_CLK, SPI_CS. The serial controller has a built-in SPI slave function. An external SPI master can access the internal registers of the ISP1109 through the SPI interface. The maximum SPI clock rate is 26 MHz.

Product data sheet Rev. 01 — 14 July 2005 16 of 59

Philips Semiconductors

8.3 USB modes

The four USB modes of the ISP1109 are:

• VP_VM unidirectional mode

• VP_VM bidirectional mode

• DAT_SE0 unidirectional mode (default)

• DAT_SE0 bidirectional mode.

In VP_VM USB mode, pin DAT/VP is used for the VP function, pin SE0/VM is used for the VM function, and pin RCV is used for the RCV function.

In DAT_SE0 USB mode, pin DAT/VP is used for the DAT function, pin SE0/VM is used for the SE0 function, and pin RCV is not used.

In unidirectional mode, pins DAT/VP and SE0/VM are always input. In bidirectional mode, the direction of these signals depends on input OE_N.

Table 12 speciﬁes the functionality of the device during the four USB modes.

ISP1109

USB transceiver with carkit support

Table 12: USB functional modes: I/O values

USB mode

VP_VM unidirectional 0 0 X TxD+

DAT_SE0 unidirectional 1 0 X TxD

[1] Some of the modes and signals are provided to achieve backward compatibility with IP cores. [2] TxD+ and TxD− are single-ended inputs to drive the DP and DM outputs, respectively, in single-ended mode. [3] RxD+ and RxD− are the outputs of the single-ended receivers connected to DP and DM, respectively. [4] TxD is the input to drive DP and DM in DAT_SE0 mode. [5] FSE0 is to force an SE0 on the DP and DM lines in DAT_SE0 mode. [6] RxD is the output of the differential receiver. [7] RSE0 is an output, indicating that an SE0 is received on the DP and DM lines.

[1]

bidirectional 1 LOW TxD+

bidirectional 1 LOW TxD

Bit Pin DAT_SE0 BI_DI OE_N DAT/VP SE0/VM VP VM RCV

HIGH RxD+

HIGH RxD

[2] [2]

[3] [4] [4]

[6]

TxD− TxD− RxD− FSE0 FSE0 RSE0

[2] [2]

[3] [5] [5]

[7]

RxD+

[6]

8.4 Transparent modes

8.4.1 Transparent UART mode

RxD−

[6]

RxD

[6]

When in transparent UART mode, an SoC (with the UART controller) communicates through the ISP1109 to another UART device that is connected to its DP and DM lines. The ISP1109 operates as logic level translator between the following pins, depending on the setting of register bit UART_PIN_SEL.

• If UART_PIN_SEL = 0 (default):

– For the TxD signal: From UART_TXD (V – For the RxD signal: From DP (REG3V3 level) to UART_RXD (REG3V3 level).

Product data sheet Rev. 01 — 14 July 2005 17 of 59

level) to DM (REG3V3 level)

CC(I/O)

Philips Semiconductors

• If UART_PIN_SEL = 1:

– For the TxD signal: From SE0/VM (V – For the RxD signal: From DP (REG3V3 level) to DAT/VP (REG3V3 level).

The ISP1109 is in transparent UART mode, if bit UART_ENof the Mode Control 1 register is set.

8.4.2 Transparent audio mode

In transparent audio mode, the ISP1109 will disable its DP and DM driver. The carkit interrupt detector is enabled. The built-in analog switches will be tuned based on the selection of carkit audio mode:

• Stereo mode: SPKR_L on DM and SPKR_R on DP

• Mono and MIC mode: SPKR_L on DM and MIC on DP.

The ISP1109 is in transparent audio mode, if bit UART_EN of the Mode Control 1 register is cleared, and bit AUDIO_EN of the Audio Control register is set.

8.4.3 Transparent general-purpose buffer mode

USB transceiver with carkit support

level) to DM (REG3V3 level)

CC(I/O)

ISP1109

In transparent general-purpose buffermode, the DAT/VP and SE0/VM pins are connected to the DP and DM pins, respectively. Using bits TRANSP_BDIR1 and TRANSP_BDIR0 of the Mode Control 2 register as speciﬁed in Table 14, you can control the direction of data transfer. The ISP1109 is in transparent general-purpose buffer mode if bit UART_EN = 0, bit AUDIO_EN = 0, and bit TRANSP_EN = 1.

Table 13 provides a summary of the device operating modes.

Table 13: Summary of device operating modes

Mode Bit Description

UART_EN UART_PIN_SEL AUDIO_EN AUDIO_MONO TRANSP_EN

USB mode 0 X 0 X 0 USB ATX enabled Transparent

general purpose buffer mode

TransparentAudio mode (stereo)

TransparentAudio mode (mono)

TransparentUART mode (mode 1)

TransparentUART mode (mode 2)

0 X 0 X 1 USB ATX disabled.

SE0/VM ↔ DM DAT/VP ↔ DP

Table 14

See

0 X 1 0 X USB ATX disabled.

SPKR_L → DM SPKR_R → DP

0 X 1 1 X USB ATX disabled.

SPKR_L → DM MIC ← DP

1 0 X X X USB ATX disabled.

UART_TXD→ DM UART_RXD← DP

1 1 X X X USB ATX disabled.

SE0/VM → DM DAT/VP ← DP

Product data sheet Rev. 01 — 14 July 2005 18 of 59

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