Philips BF1101, BF1101R DATASHEETS

DISCRETE SEMICONDUCTORS
DATA SH EET
BF1101; BF1101R; BF1101WR
N-channel dual-gate MOS-FETs
Product specification Supersedes data of 1999 Feb 01
1999 May 14
N-channel dual-gate MOS-FETs BF1101; BF1101R; BF1101WR

FEATURES

Short channel transistor with high forward transfer admittance to input capacitance ratio
Low noise gain controlled amplifier up to 1 GHz
Partly internal self-biasing circuit to ensure good cross-modulation performance during AGC and good DC stabilization.

APPLICATIONS

VHF and UHF applications with 3 to 7 V supply voltage, such as television tuners and professional communications equipment.

DESCRIPTION

Enhancement type N-channel field-effect transistor with source and substrate interconnected. Integrated diodes between gates and source protect against excessive input voltage surges. The BF1101, BF1101R and BF1101WR are encapsulated in the SOT143B, SOT143R and SOT343R plastic packages respectively.

PINNING

PIN DESCRIPTION
1 source 2 drain 3 gate 2 4 gate 1
handbook, 2 columns
12
Top view
BF1101 marking code: NDp.
Fig.1 Simplified outline
(SOT143B).
34
MSB014
handbook, 2 columns
Top view
BF1101R marking code: NCp.
Fig.2 Simplified outline
(SOT143R).
page
21
Top view
BF1101WR marking code: NC.
Fig.3 Simplified outline
(SOT343R).
43
12
MSB035
43
MSB842

QUICK REFERENCE DATA

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
V
DS
I
D
P
tot
y
forward transfer admittance 25 30 mS
fs
C
ig1-ss
C
rss
drain-source voltage −−7V drain current −−30 mA total power dissipation −−200 mW
input capacitance at gate 1 2.2 2.7 pF
reverse transfer capacitance f = 1 MHz 25 35 fF F noise figure f = 800 MHz 1.7 2.5 dB X
mod
cross-modulation input level for k = 1% at
100 −−dBµV
40 dB AGC
T
j
operating junction temperature −−150 °C
CAUTION
This product is supplied in anti-static packing to prevent damage caused by electrostatic discharge during transport and handling. For further information, refer to Philips specs.: SNW-EQ-608, SNW-FQ-302A and SNW-FQ-302B.
1999 May 14 2
N-channel dual-gate MOS-FETs BF1101; BF1101R; BF1101WR

LIMITING VALUES

In accordance with the Absolute Maximum Rating System (IEC 134).
SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT
V
DS
I
D
I
G1
I
G2
P
tot
T
stg
T
j
Note
1. T
s

THERMAL CHARACTERISTICS

drain-source voltage 7V drain current 30 mA gate 1 current −±10 mA gate 2 current −±10 mA total power dissipation Ts≤ 110 °C; note 1 200 mW storage temperature 65 +150 °C operating junction temperature +150 °C
is the temperature of the soldering point of the source lead.
SYMBOL PARAMETER VALUE UNIT
R
th j-s
handbook, halfpage
P
tot
(mW)
thermal resistance from junction to soldering point 200 K/W
250
200
150
100
50
0
0 50 100 200
MGL615
150
Ts (°C)
Fig.4 Power derating curve.
1999 May 14 3
N-channel dual-gate MOS-FETs BF1101; BF1101R; BF1101WR

STATIC CHARACTERISTICS

T
=25°C unless otherwise specified.
j
SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT
V
(BR)DSS
V
(BR)G1-SS
V
(BR)G2-SS
V
(F)S-G1
V
(F)S-G2
V
G1-S (th)
V
G2-S (th)
I
DSX
I
G1-SS
I
G2-SS
drain-source breakdown voltage V gate 1-source breakdown voltage V gate 2-source breakdown voltage V forward source-gate 1 voltage V forward source-gate 2 voltage V gate 1-source threshold voltage V gate 2-source threshold voltage V drain-source current V
gate 1 cut-off current V gate 2 cut-off current V
G1-S=VG2-S G2-S=VDS G1-S=VDS G2-S=VDS G1-S=VDS
=4V; VDS=5V; ID= 100 µA 0.3 1.0 V
G2-S
=5V; VDS=5V; ID= 100 µA 0.3 1.2 V
G1-S
=4V; VDS=5V; RG1= 120 k;
G2-S
note 1
G2-S=VDS G1-S=VDS
= 0; ID=10µA7V = 0; I = 0; I = 0; I = 0; I
= 10 mA 7 16 V
G1-S
= 10 mA 7 16 V
G2-S
= 10 mA 0.5 1.5 V
S-G1
= 10 mA 0.5 1.5 V
S-G2
816mA
= 0; V = 0; V
=5V 50 nA
G1-S
=4V 20 nA
G2-S
Note
1. R
connects G1 to VGG= 5 V; see Fig.21.
G1

DYNAMIC CHARACTERISTICS

Common source; T
=25°C; V
amb
= 4 V; VDS= 5 V; ID= 12 mA; unless otherwise specified.
G2-S
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
forward transfer admittance pulsed; Tj=25°C 253040mS
y
fs
C
ig1-ss
C
ig2-ss
C
oss
C
rss
F noise figure f = 800 MHz; Y X
mod
input capacitance at gate 1 f = 1 MHz 2.2 2.7 pF input capacitance at gate 2 f = 1 MHz 1.6 pF output capacitance f = 1 MHz 1.2 pF reverse transfer capacitance f = 1 MHz 25 35 fF
S=YS opt
cross-modulation input level for k = 1% at 0 dB AGC;
fw= 50 MHz; f
= 60 MHz; note 1
unw
input level for k = 1% at 40 dB AGC; f
= 50 MHz; f
w
= 60 MHz; note 1
unw
1.7 2.5 dB 85 −−dBµV
100 −−dBµV
Note
1. Measured in test circuit of Fig.21.
1999 May 14 4
N-channel dual-gate MOS-FETs BF1101; BF1101R; BF1101WR
20
handbook, halfpage
I
D
(mA)
16
12
8
4
0
0
VDS=5V. Tj=25°C.
0.4
0.8 1.2 1.6 2
V
G2-S
= 4 V
3.5 V
V
G1-S
Fig.5 Transfer characteristics; typical values.
MGS299
2.5 V
1.5 V
(V)
3 V
2 V
1 V
20
handbook, halfpage
I
D
(mA)
16
12
8
4
0
V
=4V.
G2-S
Tj=25°C.
0
V
= 1.6 V
G1-S
1.5 V
1.4 V
1.3 V
1.2 V
1.1 V 1 V
2
468
Fig.6 Output characteristics; typical values.
V
MGS300
DS
(V)
100
handbook, halfpage
I
G1
(µA)
80
60
40
20
0
0
VDS=5V. Tj=25°C.
0.5
V
= 4 V
G2-S
1 1.5 2 2.5
V
Fig.7 Gate 1 current as a function of gate 1
voltage; typical values.
3.5 V
G1-S
3 V
2.5 V
2 V
(V)
MGS301
40
handbook, halfpage
y
fs
(mS)
30
20
10
0
0
VDS=5V. Tj=25°C.
81641220
Fig.8 Forward transfer admittance as a
function of drain current; typical values.
V
G2-S
MGS302
= 4 V
3.5 V 3 V
2.5 V
2 V
ID (mA)
1999 May 14 5
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