INTEGRATED CIRCUITS
DATA SHEET
For a complete data sheet, please also download:
∙The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications
∙The IC06 74HC/HCT/HCU/HCMOS Logic Package Information
∙The IC06 74HC/HCT/HCU/HCMOS Logic Package Outlines
74HC/HCT4511
BCD to 7-segment latch/decoder/driver
Product specification |
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December 1990 |
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File under Integrated Circuits, IC06 |
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Philips Semiconductors |
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Product specification |
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BCD to 7-segment latch/decoder/driver |
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74HC/HCT4511 |
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FEATURES
·Latch storage of BCD inputs
·Blanking input
·Lamp test input
·Driving common cathode LED displays
·Guaranteed 10 mA drive capability per output
·Output capability: non-standard
·ICC category: MSI
GENERAL DESCRIPTION
ripple blanking input (BI), an active LOW lamp test input (LT), and seven active HIGH segment outputs (Qa to Qg).
When LE is LOW, the state of the segment outputs (Qa to Qg) is determined by the data on D1 to D4.
When LE goes HIGH, the last data present on D1 to D4 are stored in the latches and the segment outputs remain stable.
When LT is LOW, all the segment outputs are HIGH independent of all other input conditions. With LT HIGH, a LOW on BI forces all segment outputs LOW. The inputs LT and BI do not affect the latch circuit.
The 74HC/HCT4511 are high-speed Si-gate CMOS devices and are pin compatible with “4511” of the “4000B” series. They are specified in compliance with JEDEC standard no. 7A.
The 74HC/HCT4511 are BCD to 7-segment latch/decoder/drivers with four address inputs (D1 to D4),
an active LOW latch enable input (LE), an active LOW
QUICK REFERENCE DATA
GND = 0 V; Tamb = 25 °C; tr = tf = 6 ns
APPLICATIONS
·Driving LED displays
·Driving incandescent displays
·Driving fluorescent displays
·Driving LCD displays
·Driving gas discharge displays
SYMBOL |
PARAMETER |
CONDITIONS |
TYPICAL |
UNIT |
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HC |
HCT |
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tPHL/ tPLH |
propagation delay |
CL = 15 pF; VCC = 5 V |
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Dn to Qn |
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24 |
24 |
ns |
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23 |
24 |
ns |
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LE |
to Qn |
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to Qn |
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19 |
20 |
ns |
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BI |
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12 |
13 |
ns |
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LT |
to Qn |
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CI |
input capacitance |
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3.5 |
3.5 |
pF |
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CPD |
power dissipation capacitance per latch |
notes 1 and 2 |
64 |
64 |
pF |
Notes
1. CPD is used to determine the dynamic power dissipation (PD in mW): PD = CPD ´ VCC2 ´ fi + å (CL ´ VCC2 ´ fo) where:
fi = input frequency in MHz
fo = output frequency in MHz
å (CL ´ VCC2 ´ fo) = sum of outputs
CL = output load capacitance in pF
VCC = supply voltage in V
2. For HC the condition is VI = GND to VCC
For HCT the condition is VI = GND to VCC - 1.5 V
December 1990 |
2 |
Philips Semiconductors |
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Product specification |
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BCD to 7-segment latch/decoder/driver |
74HC/HCT4511 |
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ORDERING INFORMATION |
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See “74HC/HCT/HCU/HCMOS Logic Package Information”. |
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PIN DESCRIPTION |
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PIN NO. |
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SYMBOL |
NAME AND FUNCTION |
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3 |
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lamp test input (active LOW) |
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LT |
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4 |
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ripple blanking input (active LOW) |
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BI |
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5 |
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latch enable input (active LOW) |
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LE |
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7, 1, 2, 6 |
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D1 to D4 |
BCD address inputs |
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8 |
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GND |
ground (0 V) |
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13, 12, 11, 10, 9, 15, 14 |
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Qa to Qg |
segments outputs |
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16 |
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VCC |
positive supply voltage |
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Fig.1 Pin configuration. |
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Fig.2 Logic symbol. |
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Fig.3 IEC logic symbol. |
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December 1990 |
3 |
Philips Semiconductors |
Product specification |
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BCD to 7-segment latch/decoder/driver |
74HC/HCT4511 |
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Fig.4 Functional diagram.
FUNCTION TABLE
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INPUTS |
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OUTPUTS |
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DISPLAY |
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LE |
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BI |
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LT |
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D4 |
D3 |
D2 |
D1 |
Qa |
Qb |
Qc |
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Qd |
Qe |
Qf |
Qg |
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X |
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X |
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L |
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X |
X |
X |
X |
H |
H |
H |
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H |
H |
H |
H |
8 |
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X |
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L |
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H |
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X |
X |
X |
X |
L |
L |
L |
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L |
L |
L |
L |
blank |
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L |
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H |
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H |
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L |
L |
L |
L |
H |
H |
H |
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H |
H |
H |
L |
0 |
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L |
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H |
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H |
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L |
L |
L |
H |
L |
H |
H |
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L |
L |
L |
L |
1 |
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L |
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H |
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H |
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L |
L |
H |
L |
H |
H |
L |
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H |
H |
L |
H |
2 |
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L |
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H |
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H |
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L |
L |
H |
H |
H |
H |
H |
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H |
L |
L |
H |
3 |
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L |
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H |
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H |
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L |
H |
L |
L |
L |
H |
H |
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L |
L |
H |
H |
4 |
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L |
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H |
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H |
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L |
H |
L |
H |
H |
L |
H |
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H |
L |
H |
H |
5 |
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L |
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H |
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H |
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L |
H |
H |
L |
L |
L |
H |
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H |
H |
H |
H |
6 |
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L |
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H |
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H |
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L |
H |
H |
H |
H |
H |
H |
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L |
L |
L |
L |
7 |
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L |
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H |
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H |
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H |
L |
L |
L |
H |
H |
H |
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H |
H |
H |
H |
8 |
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L |
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H |
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H |
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H |
L |
L |
H |
H |
H |
H |
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L |
L |
H |
H |
9 |
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L |
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H |
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H |
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H |
L |
H |
L |
L |
L |
L |
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L |
L |
L |
L |
blank |
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L |
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H |
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H |
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H |
L |
H |
H |
L |
L |
L |
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L |
L |
L |
L |
blank |
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L |
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H |
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H |
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H |
H |
L |
L |
L |
L |
L |
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L |
L |
L |
L |
blank |
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L |
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H |
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H |
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H |
H |
L |
H |
L |
L |
L |
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L |
L |
L |
L |
blank |
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L |
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H |
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H |
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H |
H |
H |
L |
L |
L |
L |
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L |
L |
L |
L |
blank |
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L |
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H |
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H |
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H |
H |
H |
H |
L |
L |
L |
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L |
L |
L |
L |
blank |
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H |
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H |
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H |
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X |
X |
X |
X |
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(1) |
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(1) |
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Note
1.Depends upon the BCD-code applied during the LOW-to-HIGH transition of LE. H = HIGH voltage level
L = LOW voltage level X = don’t care
December 1990 |
4 |