Philips 74HCT4511U, 74HCT4511N, 74HCT4511D, 74HC4511U, 74HC4511N Datasheet

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Philips 74HCT4511U, 74HCT4511N, 74HCT4511D, 74HC4511U, 74HC4511N Datasheet

INTEGRATED CIRCUITS

DATA SHEET

For a complete data sheet, please also download:

The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications

The IC06 74HC/HCT/HCU/HCMOS Logic Package Information

The IC06 74HC/HCT/HCU/HCMOS Logic Package Outlines

74HC/HCT4511

BCD to 7-segment latch/decoder/driver

Product specification

 

December 1990

File under Integrated Circuits, IC06

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Philips Semiconductors

 

Product specification

 

 

 

 

 

 

BCD to 7-segment latch/decoder/driver

 

74HC/HCT4511

 

 

 

 

 

 

 

 

 

FEATURES

·Latch storage of BCD inputs

·Blanking input

·Lamp test input

·Driving common cathode LED displays

·Guaranteed 10 mA drive capability per output

·Output capability: non-standard

·ICC category: MSI

GENERAL DESCRIPTION

ripple blanking input (BI), an active LOW lamp test input (LT), and seven active HIGH segment outputs (Qa to Qg).

When LE is LOW, the state of the segment outputs (Qa to Qg) is determined by the data on D1 to D4.

When LE goes HIGH, the last data present on D1 to D4 are stored in the latches and the segment outputs remain stable.

When LT is LOW, all the segment outputs are HIGH independent of all other input conditions. With LT HIGH, a LOW on BI forces all segment outputs LOW. The inputs LT and BI do not affect the latch circuit.

The 74HC/HCT4511 are high-speed Si-gate CMOS devices and are pin compatible with “4511” of the “4000B” series. They are specified in compliance with JEDEC standard no. 7A.

The 74HC/HCT4511 are BCD to 7-segment latch/decoder/drivers with four address inputs (D1 to D4),

an active LOW latch enable input (LE), an active LOW

QUICK REFERENCE DATA

GND = 0 V; Tamb = 25 °C; tr = tf = 6 ns

APPLICATIONS

·Driving LED displays

·Driving incandescent displays

·Driving fluorescent displays

·Driving LCD displays

·Driving gas discharge displays

SYMBOL

PARAMETER

CONDITIONS

TYPICAL

UNIT

 

 

HC

HCT

 

 

 

 

 

 

 

 

 

 

 

 

 

 

tPHL/ tPLH

propagation delay

CL = 15 pF; VCC = 5 V

 

 

 

 

 

Dn to Qn

 

24

24

ns

 

 

 

 

 

 

23

24

ns

 

 

LE

to Qn

 

 

 

 

to Qn

 

19

20

ns

 

 

BI

 

 

 

 

 

 

12

13

ns

 

 

LT

to Qn

 

CI

input capacitance

 

3.5

3.5

pF

CPD

power dissipation capacitance per latch

notes 1 and 2

64

64

pF

Notes

1. CPD is used to determine the dynamic power dissipation (PD in mW): PD = CPD ´ VCC2 ´ fi + å (CL ´ VCC2 ´ fo) where:

fi = input frequency in MHz

fo = output frequency in MHz

å (CL ´ VCC2 ´ fo) = sum of outputs

CL = output load capacitance in pF

VCC = supply voltage in V

2. For HC the condition is VI = GND to VCC

For HCT the condition is VI = GND to VCC - 1.5 V

December 1990

2

Philips Semiconductors

 

 

 

 

 

Product specification

 

 

 

 

 

 

 

BCD to 7-segment latch/decoder/driver

74HC/HCT4511

 

 

 

 

 

 

 

ORDERING INFORMATION

 

 

See “74HC/HCT/HCU/HCMOS Logic Package Information”.

 

PIN DESCRIPTION

 

 

 

 

 

 

 

 

 

 

 

PIN NO.

 

SYMBOL

NAME AND FUNCTION

 

 

 

 

 

 

 

 

3

 

 

 

 

 

lamp test input (active LOW)

 

 

LT

 

 

 

4

 

 

 

ripple blanking input (active LOW)

 

 

BI

 

 

 

5

 

 

latch enable input (active LOW)

 

 

LE

 

 

7, 1, 2, 6

 

D1 to D4

BCD address inputs

 

8

 

GND

ground (0 V)

 

13, 12, 11, 10, 9, 15, 14

 

Qa to Qg

segments outputs

 

16

 

VCC

positive supply voltage

 

Fig.1 Pin configuration.

 

Fig.2 Logic symbol.

 

Fig.3 IEC logic symbol.

 

 

 

 

 

December 1990

3

Philips Semiconductors

Product specification

 

 

BCD to 7-segment latch/decoder/driver

74HC/HCT4511

 

 

Fig.4 Functional diagram.

FUNCTION TABLE

 

 

 

 

 

 

 

 

 

INPUTS

 

 

 

 

 

OUTPUTS

 

 

DISPLAY

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

LE

 

 

BI

 

 

LT

 

D4

D3

D2

D1

Qa

Qb

Qc

 

Qd

Qe

Qf

Qg

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

X

 

 

X

 

 

L

 

X

X

X

X

H

H

H

 

H

H

H

H

8

X

 

 

L

 

 

H

 

X

X

X

X

L

L

L

 

L

L

L

L

blank

L

 

 

H

 

 

H

 

L

L

L

L

H

H

H

 

H

H

H

L

0

L

 

 

H

 

 

H

 

L

L

L

H

L

H

H

 

L

L

L

L

1

L

 

 

H

 

 

H

 

L

L

H

L

H

H

L

 

H

H

L

H

2

L

 

 

H

 

 

H

 

L

L

H

H

H

H

H

 

H

L

L

H

3

 

L

 

 

H

 

 

H

 

L

H

L

L

L

H

H

 

L

L

H

H

4

 

L

 

 

H

 

 

H

 

L

H

L

H

H

L

H

 

H

L

H

H

5

 

L

 

 

H

 

 

H

 

L

H

H

L

L

L

H

 

H

H

H

H

6

 

L

 

 

H

 

 

H

 

L

H

H

H

H

H

H

 

L

L

L

L

7

 

L

 

 

H

 

 

H

 

H

L

L

L

H

H

H

 

H

H

H

H

8

 

L

 

 

H

 

 

H

 

H

L

L

H

H

H

H

 

L

L

H

H

9

 

L

 

 

H

 

 

H

 

H

L

H

L

L

L

L

 

L

L

L

L

blank

 

L

 

 

H

 

 

H

 

H

L

H

H

L

L

L

 

L

L

L

L

blank

 

L

 

 

H

 

 

H

 

H

H

L

L

L

L

L

 

L

L

L

L

blank

 

L

 

 

H

 

 

H

 

H

H

L

H

L

L

L

 

L

L

L

L

blank

 

L

 

 

H

 

 

H

 

H

H

H

L

L

L

L

 

L

L

L

L

blank

 

L

 

 

H

 

 

H

 

H

H

H

H

L

L

L

 

L

L

L

L

blank

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

H

 

 

H

 

 

H

 

X

X

X

X

 

 

 

(1)

 

 

 

(1)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Note

1.Depends upon the BCD-code applied during the LOW-to-HIGH transition of LE. H = HIGH voltage level

L = LOW voltage level X = don’t care

December 1990

4

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