Philips 74HCT42U, 74HCT42N, 74HCT42D, 74HC42U, 74HC42N Datasheet

...
0 (0)
Philips 74HCT42U, 74HCT42N, 74HCT42D, 74HC42U, 74HC42N Datasheet

INTEGRATED CIRCUITS

DATA SHEET

For a complete data sheet, please also download:

The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications

The IC06 74HC/HCT/HCU/HCMOS Logic Package Information

The IC06 74HC/HCT/HCU/HCMOS Logic Package Outlines

74HC/HCT42

BCD to decimal decoder (1-of-10)

Product specification

 

December 1990

File under Integrated Circuits, IC06

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Philips Semiconductors

Product specification

 

 

 

 

BCD to decimal decoder (1-of-10)

74HC/HCT42

 

 

 

 

FEATURES

·Mutually exclusive outputs

·1-of-8 demultiplexing capability

·Outputs disabled for input codes above nine

·Output capability: standard

·ICC category: MSI

GENERAL DESCRIPTION

The 74HC/HCT42 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A.

QUICK REFERENCE DATA

GND = 0 V; Tamb = 25 °C; tr = tf = 6 ns

The 74HC/HCT42 decoders accept four active HIGH BCD inputs and provide 10 mutually exclusive active LOW outputs. The active LOW outputs facilitate addressing other MSI circuits with active LOW input enables.

The logic design of the “42” ensures that all outputs are HIGH when binary codes greater than nine are applied to the inputs.

The most significant input (A3) produces an useful inhibit function when the “42” is used as a 1-of-8 decoder. The A3 input can also be used as the data input in an 8-output demultiplexer application.

SYMBOL

PARAMETER

CONDITIONS

TYPICAL

UNIT

 

 

HC

HCT

 

 

 

 

 

 

 

 

 

 

 

 

tPHL/ tPLH

propagation delay An to

 

n

CL = 15 pF; VCC = 5 V

14

17

ns

Y

CI

input capacitance

 

3.5

3.5

pF

CPD

power dissipation capacitance per package

notes 1 and 2

37

37

pF

Notes

1. CPD is used to determine the dynamic power dissipation (PD in mW): PD = CPD ´ VCC2 ´ fi + å (CL ´ VCC2 ´ fo) where:

fi = input frequency in MHz

fo = output frequency in MHz

å (CL ´ VCC2 ´ fo) = sum of outputs

CL = output load capacitance in pF

VCC = supply voltage in V

2.For HC the condition is VI = GND to VCC

For HCT the condition is VI = GND to VCC - 1.5 V

ORDERING INFORMATION

See “74HC/HCT/HCU/HCMOS Logic Package Information”.

December 1990

2

Loading...
+ 4 hidden pages