Philips 74ABT2240PW, 74ABT2240N, 74ABT2240DB, 74ABT2240D Datasheet

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INTEGRATED CIRCUITS

74ABT2240

Octal inverting buffer with 30Ω series termination resistors (3-State)

Product specification

1998 Jan 16

Supersedes data of 1996 Oct 08 IC23 Data Handbook

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Philips Semiconductors

Product specification

Octal inverting buffer with 30Ω series termination

74ABT2240

resistors (3-State)

FEATURES

Octal bus interface

3-State buffers

Live insertion/extraction permitted

Outputs include series resistance of 30Ω, making external termination resistors unnecessary

Output capability: +12mA/±32mA

Latch-up protection exceeds 500mA per Jedec Std 17

ESD protection exceeds 2000 V per MIL STD 883 Method 3015 and 200 V per Machine Model

Power-up 3-State

Same part as 74ABT240-1

QUICK REFERENCE DATA

DESCRIPTION

The 74ABT2240 high-performance BiCMOS device combines low static and dynamic power dissipation with high speed.

The 74ABT2240 device is an octal inverting buffer that is ideal for driving bus lines. The device features two Output Enables (1OE, 2OE), each controlling four of the 3-State outputs.

The 74ABT2240 is designed with 30Ω series resistance in both the

High and Low states of the output. This design reduces line noise in applications such as memory address drivers, clock drivers and bus receivers/transmitters.

The 74ABT2240 is the same as the 74ABT240-1. The part number has been changed to reflect industry standards.

SYMBOL

 

 

PARAMETER

CONDITIONS

TYPICAL

UNIT

 

 

Tamb = 25°C; GND = 0V

 

 

 

 

 

 

tPLH

Propagation delay

CL = 50pF; VCC = 5V

2.8

ns

 

 

 

 

 

tPHL

An to Yn

4.3

 

 

CIN

Input capacitance

VI = 0V or VCC

3

pF

COUT

Output capacitance

Outputs disabled; VO = 0V or VCC

7

pF

ICCZ

Total supply current

Outputs disabled; VCC = 5.5V

50

μA

ORDERING INFORMATION

PACKAGES

TEMPERATURE RANGE

OUTSIDE NORTH AMERICA

NORTH AMERICA

DWG NUMBER

 

 

 

 

 

20-Pin Plastic DIP

±40°C to +85°C

74ABT2240 N

74ABT2240 N

SOT146-1

 

 

 

 

 

20-Pin plastic SO

±40°C to +85°C

74ABT2240 D

74ABT2240 D

SOT163-1

 

 

 

 

 

20-Pin Plastic SSOP Type II

±40°C to +85°C

74ABT2240 DB

74ABT2240 DB

SOT339-1

 

 

 

 

 

20-Pin Plastic TSSOP Type I

±40°C to +85°C

74ABT2240 PW

7ABT2240PW DH

SOT360-1

 

 

 

 

 

PIN CONFIGURATION

 

 

 

 

 

 

PIN DESCRIPTION

 

 

 

 

 

 

 

 

 

 

 

 

 

 

PIN NUMBER

SYMBOL

NAME AND FUNCTION

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

2, 4, 6, 8

1A0 ± 1A3

Data inputs

 

 

 

 

 

 

 

20

VCC

 

 

 

 

 

 

 

 

 

 

 

 

1OE

 

1

 

 

11, 13, 15, 17

2A0 ± 2A3

Data inputs

1A0

2

19

 

 

 

 

 

2OE

 

 

 

 

 

 

 

 

 

 

 

 

 

 

18, 16, 14, 12

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

1Y0 ± 1Y3

Data outputs

2Y0

3

18

1Y0

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

9, 7, 5, 3

 

 

 

 

 

 

 

 

Data outputs

1A1

4

17

2A0

 

 

2Y0 ± 2Y3

 

 

 

5

16

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

2Y1

1Y1

 

 

 

 

 

 

 

 

 

 

 

 

 

 

1, 19

1OE, 2OE

Output enables

 

 

 

 

 

 

 

 

 

 

 

 

 

1A2

6

15

2A1

 

 

 

 

 

 

 

 

 

 

 

 

 

 

10

 

GND

Ground (0V)

 

 

 

 

 

 

7

14

 

 

 

 

 

 

2Y2

1Y2

 

 

 

 

 

 

 

 

 

 

 

 

 

 

20

 

 

VCC

Positive supply voltage

1A3

8

13

2A2

 

 

 

 

 

 

 

 

 

 

9

12

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

2Y3

1Y3

 

 

 

 

 

 

 

 

 

 

 

 

GND

10

11

2A3

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

SA00034

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

1998 Jan 16

2

853-1626 18865

Philips 74ABT2240PW, 74ABT2240N, 74ABT2240DB, 74ABT2240D Datasheet

Philips Semiconductors

Product specification

Octal inverting buffer with 30Ω series termination

74ABT2240

resistors (3-State)

LOGIC SYMBOL

2

1A0

1Y0

18

4

1A1

1Y1

16

6

1A2

1Y2

14

8

1A3

1Y3

12

1

1OE

 

 

17

2A0

2Y0

3

 

 

15

2A1

2Y1

5

 

 

13

2A2

2Y2

7

 

 

11

2A3

2Y3

9

 

 

19

2OE

 

 

SA00035

LOGIC SYMBOL (IEE/IEC)

1

EN

 

2

 

 

 

 

 

 

 

18

 

4

 

 

 

16

 

 

 

6

 

 

 

14

 

 

 

8

 

 

 

12

 

 

 

19

 

 

 

 

 

 

 

 

EN

 

 

 

17

 

 

 

 

 

 

 

3

 

15

 

5

 

 

 

13

 

7

 

 

 

11

 

9

 

 

 

 

 

 

 

 

FUNCTION TABLE

 

 

 

 

INPUTS

 

 

OUTPUTS

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

1An

 

 

 

2An

 

 

 

 

 

 

 

1OE

 

2OE

1Yn

2Yn

 

 

 

 

 

 

 

 

 

 

 

 

 

L

L

 

L

L

 

H

 

H

 

 

 

 

 

 

 

 

 

 

 

 

 

L

H

 

L

H

 

L

 

L

 

 

 

 

 

 

 

 

 

 

 

 

 

H

X

 

H

X

 

Z

 

Z

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

H

= High voltage level

 

 

 

 

 

 

 

 

 

 

L

= Low voltage level

 

 

 

 

 

 

 

 

 

 

X

= Don't care

 

 

 

 

 

 

 

 

 

 

Z

= High impedance ºoffº state

 

 

 

 

 

 

 

SCHEMATIC OF EACH OUTPUT

VCC

OUTPUT

GND

SA00030

SA00036

ABSOLUTE MAXIMUM RATINGS1, 2

SYMBOL

PARAMETER

CONDITIONS

RATING

UNIT

 

 

 

 

 

VCC

DC supply voltage

 

±0.5 to +7.0

V

IIK

DC input diode current

VI < 0

±18

mA

VI

DC input voltage3

 

±1.2 to +7.0

V

IOK

DC output diode current

VO < 0

±50

mA

V

DC output voltage3

output in Off or High state

±0.5 to +5.5

V

OUT

 

 

 

 

IOUT

DC output current

output in Low state

128

mA

Tstg

Storage temperature range

 

±65 to 150

°C

NOTES:

1.Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under ªrecommended operating conditionsº is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

2.The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction temperatures which are detrimental to reliability. The maximum junction temperature of this integrated circuit should not exceed 150°C.

3.The input and output voltage ratings may be exceeded if the input and output current ratings are observed.

1998 Jan 16

3

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