Philips 74ABTH16952DL, 74ABTH16952DGG, 74ABT16952DL, 74ABT16952DGG Datasheet
74ABT16952
74ABTH16952
16-bit registered transceiver (3-State)
Product specification
Supersedes data of 1995 Sep 28
IC23 Data Handbook
1998 Feb 25
INTEGRATED CIRCUITS
Philips Semiconductors Product specification
74ABT16952
74ABTH16952
16-bit registered transceiver (3-State)
2
1998 Feb 25 853-1814 19018
FEA TURES
•Two 8-bit registered transceivers
•Live insertion/extraction permitted
•Power-up 3-State
•74ABTH16952 incorporates bus-hold data inputs which eliminate
the need for external pull-up resistors to hold unused inputs
•Power-up reset
•Multiple V
CC
and GND pins minimize switching noise
•Independent registers for A and B buses
•Output capability: +64mA/–32mA
•Latch-up protection exceeds 500mA per Jedec Std 17
•ESD protection exceeds 2000V per MIL STD 883 Method 3015
and 200V per Machine Model
•Bus-hold data inputs eliminate the need for external pull-up
resistors to hold unused inputs
DESCRIPTION
The 74ABT16952 high-performance BiCMOS device combines low
static and dynamic power dissipation with high speed and high
output drive.
The 74ABT16952 is a dual octal registered transceiver. Two 8-bit
registers store data flowing in both directions between two
bidirectional buses. Data applied to the inputs is entered and stored
on the rising edge of the Clock (nCPXX) provided that the Clock
Enable (nCEXX
) is Low. The data is then present at the 3-State
output buffers, but is only accessible when the Output Enable
(nOEXX) is Low. Data flow from A inputs to B outputs is the same as
for B inputs to A outputs.
Two options are available, 74ABT16952 which does not have the
bus-hold feature and 74ABTH16952 which incorporates the
bus-hold feature.
QUICK REFERENCE DA TA
SYMBOL PARAMETER
CONDITIONS
T
amb
= 25°C; GND = 0V
TYPICAL UNIT
t
PLH
t
PHL
Propagation delay
nCPBA to nAx or
nCPAB to nBx
CL = 50pF; VCC = 5V
2.8
2.3
ns
C
IN
Input capacitance VI = 0V or V
CC
4 pF
C
I/O
I/O capacitance VO = 0V or VCC; 3-State 7 pF
I
CCZ
pp
Outputs disabled; VCC = 5.5V 500 µA
I
CCL
Quiescent su ly current
Outputs LOW; VCC = 5.5V 8 mA
ORDERING INFORMATION
PACKAGES TEMPERATURE RANGE OUTSIDE NORTH AMERICA NORTH AMERICA DWG NUMBER
56-Pin Plastic SSOP Type III –40°C to +85°C 74ABT16952 DL BT16952 DL SOT371-1
56-Pin Plastic TSSOP Type II –40°C to +85°C 74ABT16952 DGG BT16952 DGG SOT364-1
56-Pin Plastic SSOP Type III –40°C to +85°C 74ABTH16952 DL BH16952 DL SOT371-1
56-Pin Plastic TSSOP Type II –40°C to +85°C 74ABTH16952 DGG BH16952 DGG SOT364-1
PIN DESCRIPTION
PIN NUMBER SYMBOL NAME AND FUNCTION
2, 55
18, 22
1CPAB / 1CPBA
2CPAB / 2CPBA
Clock input A to B / Clock input B to A
3, 54,
26, 31
1CEAB / 1CEBA
2CEAB / 2CEBA
Clock enable input A to B / Clock enable input B to A
52, 51, 49, 48, 47, 45, 44, 43
42, 41, 40, 38, 37, 36, 34, 33
1A0 – 1A7
2A0 – 2A7
Data inputs/outputs (A side)
1, 56
8, 29
1B0 – 1B7
2B0 – 2B7
Data inputs/outputs (B side)
4, 11, 18, 25, 32, 39, 45, 53
1OEAB / 1OEBA
2OEAB / 2OEBA
Output enable inputs
4, 17, 30, 43 GND Ground (0V)
7, 22, 35, 50 V
CC
Positive supply voltage
Philips Semiconductors Product specification
74ABT16952
74ABTH16952
16-bit registered transceiver (3-State)
1998 Feb 25
3
PIN CONFIGURATION
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
1OEAB
1CPAB
1CEAB
GND
1A0
1A1
1A2
1A3
1A4
GND
1A5
1A6
1A7
2A0
2A2
GND
2A3
V
CC
2A1
2A4
2A5
2A6
V
CC
1OEBA
1CPBA
1CEBA
GND
1B0
1B1
1B2
1B3
1B4
GND
1B5
1B6
1B7
2B0
2B2
GND
2B3
V
CC
2B1
2B4
2B5
2B6
2B7
V
CC
2A7
25
26
27
28
32
31
30
29
GND
2CPAB
2CEAB
GND
2CPBA
2OEBA
2CEBA
2OEAB
SH00070
LOGIC SYMBOL
1A0 1A1 1A2 1A3 1A4 1A5 1A6 1A7
2
3
1CPAB
1CEAB
55
54
1CPBA
1CEBA
568910121314
1B0 1B1 1B2 1B3 1B4 1B5 1B6 1B7
52 51 49 48 47 45 44 43
2A0 2A1 2A2 2A3 2A4 2A5 2A6 2A7
27
26
2CPAB
2CEAB
30
31
2CPBA
2CEBA
15 16 17 19 20 21 23 24
2B0 2B1 2B2 2B3 2B4 2B5 2B6 2B7
42 41 40 38 37 36 34 33
561OEBA
11OEAB
292OEBA
282OEAB
SH00071
Philips Semiconductors Product specification
74ABT16952
74ABTH16952
16-bit registered transceiver (3-State)
1998 Feb 25
4
LOGIC SYMBOL (IEEE/IEC)
SH00086
5
6
8
9
10
12
13
14
16
17
19
20
21
23
24
56
1EN3
∇3
5D
1A0
1A1
1A2
1A3
1A4
1A5
1A6
1A7
2A0
2A1
2A2
2A3
2A4
2A5
2A6
2A7
15
52
51
49
48
47
45
44
43
42
41
40
38
37
36
34
33
1B0
1B1
1B2
1B3
1B4
1B5
1B6
1B7
2B0
2B1
2B2
2B3
2B4
2B5
2B6
2B7
6D 4 ∇
∇911D
12D
10 ∇
54
55
1
3
2
29
31
30
28
26
27
1OEBA
1CEBA
1LPBA
1OEAB
1LEAB
1CPAB
2OEBA
2CEBA
2CPBA
2OEAB
2LEAB
2CPAB
G1
1C5
EN4
G2
2C6
EN9
G7
7C11
EN10
G8
8C12
FUNCTION TABLE for Register nAx or nBx
INPUTS INTERNAL OPERATING
nAx or
nBx
nCPXX nCEXX Q MODE
X X H NC Hold data
L
H
↑
↑
L
L
L
H
Load data
H =High voltage level
L =Low voltage level
↑ =Low-to-High transition
X = Don’t care
XX=AB or BA
NC=No change
FUNCTION TABLE for Output Enable
INPUTS INTERNAL nAx or nBx OPERATING
nOEXX Q OUTPUTS MODE
H X Z Disable outputs
L
L
L
H
L
H
Enable outputs
H =High voltage level
L =Low voltage level
X = Don’t care
XX=AB or BA
Z =High impedance ”off” state
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