Philips 40PFL8664H/12, 40PFL7664H/12 Schematic

Colour Television Chassis
LB
18670_000_090907.eps
090911

Contents Page Contents Page

1. Revision List 2
2. Technical Specifications and Connections 2
3. Precautions, Notes, and Abbreviation List 6
4. Mechanical Instructions 10
5. Service Modes, Error Codes, and Fault Finding 14
6. Alignments 32
7. Circuit Descriptions 38
8. IC Data Sheets 41
9. Block Diagrams Wiring Diagram 40" (Edge LIT) 49 Block Diagram Video 50 Block Diagram Audio 51 Block Diagram Control & Clock Signals 52
Block Diagram I2C 53
Supply Lines Overview 54
10. Circuit Diagrams and PWB Layouts Drawing PWB 10-LED: Microcontroller Block 10-LED: Microcontroller Block 56 59 10-LED: LED Block 57 59 10-LED: LED Drive 58 59 SSB: DC/DC +3V3 +1V2 (B01A) 60 88 SSB: DC/DC +3V3-Stdby +1V2-Stdby (B01B) 61 88 SSB: Front End (B02A) 62 88 SSB: PNX8543 - Power (B03A) 63 88 SSB: PNX8543 - Video stream/LVDS out(B03B) 64 88 SSB: PNX8543 - Audio Amplifier (B03C) 65 88 SSB: PNX8543 - Audio (B03D) 66 88 SSB: PNX8543 - Analogue AV (B03E) 67 88 SSB: PNX8543 - SDRAM (B03F) 68 88 SSB: PNX8543 - Cntrl MIPS/Flash/PCI (B03G) 69 88 SSB: PNX8543 - Stdby-Cntrl/Debug (B03H) 70 88 SSB: Bolt-on (B04A) 71 88 SSB: Analog IO - Scart 1 & 2 (B04B) 72 88 SSB: YPbPr / Side I/O / S-video (B04C) 73 88
©
Copyright 2009 Koninklijke Philips Electronics N.V. All rights reserved. No part of this publication may be reproduced, stored in a retrieval system or transmitted, in any form or by any means, electronic, mechanical, photocopying, or otherwise without the prior permission of Philips.
55 59
SSB: HDMI (B05A) 74 88 SSB: Ethernet (B05B) 75 88 SSB: PCMCIA (B05C) 76 88 SSB: Class-D (B06A) 77 88 SSB: Display Interface (Common) (B07A) 78 88 SSB: Display Interface (B07B) 79 88 SSB: PNX5100 - Power (B08A) 80 88 SSB: PNX5100 - SDRAM (B08B) 81 88 SSB: PNX5100 - Ctrl/PCI/Debug (B08C) 82 88 SSB: PNX5100 - LVDS In/Out (B08D) 83 88 SSB: PNX5100 - AmbiLight (B08E) 84 88 SSB: SRP List Explanation 85 SSB: SRP List Part 1 86 SSB: SRP List Part 2 87 Temperature Sensor (TS1) 89 90
Published by ER/EL 0972 BU TV Consumer Care, the Netherlands Subject to modification EN 3122 785 18672
2009-Dec-18
EN 2 Q548.1E LB1.
Revision List

1. Revision List

Manual xxxx xxx xxxx.0
First release.
Manual xxxx xxx xxxx.1
All Chapters: updated CTN overview, see Table 2-1
Chapter 5: added SSB replacement flowcharts in section
5.8.12
Chapter 6: changed option codes, see Table 6-3 and
Table 6-4
Manual xxxx xxx xxxx.2
Chapter 2: improved readability of the connection overview; see figure 2-1
.
.

2. Technical Specifications and Connections

Index of this chapter:

2.1 Technical Specifications

2.2 Directions for Use

2.3 Connections
2.4 Chassis Overview
Notes:
Figures can deviate due to the different set executions.
Specifications are indicative (subject to change).
2.1 Technical Specifications
For on-line product support please use the links in Table 2-1. Here is product information available, as well as getting started, user manuals, frequently asked questions and software & drivers.

Table 2-1 Described Model numbers

CTN Styling Published in:
40PFL7664H/12
40PFL8664H/12
Edge LIT 3122 785 18670
Edge LIT 3122 785 18670
2.2 Directions for Use
You can download this information from the following websites:
http://www.philips.com/support http://www.p4c.philips.com
2009-Dec-18

2.3 Connections

Technical Specifications and Connections
EN 3Q548.1E LB 2.
Side connectors
1
2 3 4
5
Back connectors
11
AUDIO
OUT
12
17
10 9
SPDIF
EXT 2
OUT
(RGB/CVBS)
VGA
EXT 1
(RGB/CVBS)
NETWORK
6
7
8
Note: The following connector colour abbreviations are used (according to DIN/IEC 757): Bk= Black, Bu= Blue, Gn= Green, Gy= Grey, Rd= Red, Wh= White, Ye= Yellow.

2.3.1 Side Connections

1 - Cinch: Audio - In
Rd - Audio R 0.5 V Wh - Audio L 0.5 V
2 - Cinch: Video CVBS - In
Ye - Video CVBS 1 V
/ 10 kΩ jq
RMS
/ 10 kΩ jq
RMS
/ 75 Ω jq
PP
AUDIO IN: LEFT / RIGHT HDMI 1 / DVI HDMI 2 / DVI HDMI 3 / DVI
13
EXT 3
14

Figure 2-1 Connection overview

4 - Head phone (Output)
Bk - Head phone 32 - 600 Ω / 10 mW ot
5 - Common Interface
68p - See diagram B05C SSB: PCMCIA
6 - USB2.0
VGA
HDMI 3
HDMI 2 HDMI 1
15 16
1 2 3 4
TV ANTENNA
18672_001_091218.eps
10000_022_090121.eps
091218
090121
jk
3 - S-Video (Hosiden): Video Y/C - In
1 - Ground Y Gnd H 2 - Ground C Gnd H 3 - Video Y 1 V 4 - Video C 0.3 V
/ 75 Ω j
PP
/ 75 Ω j
PP
Figure 2-2 USB (type A)
1-+5V k 2 - Data (-) jk 3 - Data (+) jk 4 - Ground Gnd H
2009-Dec-18
EN 4 Q548.1E LB2.
Technical Specifications and Connections
7 - HDMI: Digital Video, Digital Audio - In (see connector 15)
8 - Service Connector (UART)
1 - Ground Gnd H 2 - UART_TX Transmit k 3 - UART_RX Receive j

2.3.2 Rear Connections

9 - EXT1/2: Video RGB - In, CVBS - In/Out, Audio - In/Out (*)
20
21
10000_001_090121.eps
2
1
090121
Figure 2-3 SCART connector
1 - Audio R 0.5 V 2 - Audio R 0.5 V 3 - Audio L 0.5 V
/ 1 kΩ k
RMS
/ 10 kΩ j
RMS
/ 1 kΩ k
RMS
4 - Ground Audio Gnd H 5 - Ground Blue Gnd H 6 - Audio L 0.5 V 7 - Video Blue 0.7 V 8 - Function Select 0 - 2 V: INT
/ 10 kΩ j
RMS
/ 75 Ω jk
PP
4.5 - 7 V: EXT 16:9
9.5 - 12 V: EXT 4:3 j
9 - Ground Green Gnd H 10 - n.c. 11 - Video Green 0.7 V 12 - n.c.
/ 75 Ω j
PP
13 - Ground Red Gnd H 14 - Ground P50 Gnd H 15 - Video Red 0.7 V 16 - Status/FBL 0 - 0.4 V: INT
/ 75 Ω j
PP
1 - 3 V: EXT / 75 Ω j 17 - Ground Video Gnd H 18 - Ground FBL Gnd H 19 - Video CVBS/Y 1 V 20 - Video CVBS 1 V 21 - Shield Gnd H
/ 75 Ω k
PP
/ 75 Ω j
PP
(*) Note: The AV output on SCART 1 or 2 will be enabled (SW controlled) for analogue RF channels only, if the decoder is turned “on” in the Menu: select Setup -> Installation -> Decoder
-> Status: select SCART 1 or 2 -> Channel: select any analogue channel.
10 - Cinch: S/PDIF - Out
Bk - Coaxial 0.4 - 0.6V
/ 75 Ω kq
PP
11 - Cinch: Audio - Out
Rd - Audio - R 0.5 V Wh - Audio - L 0.5 V
/ 10 kΩ kq
RMS
/ 10 kΩ kq
RMS
12 - VGA: Video RGB - In
1
5
6
11
10000_002_090121.eps
10
15
090127
Figure 2-4 VGA Connector
1 - Video Red 0.7 V 2 - Video Green 0.7 V 3 - Video Blue 0.7 V 4-n.c.
/ 75 Ω j
PP
/ 75 Ω j
PP
/ 75 Ω j
PP
5 - Ground Gnd H 6 - Ground Red Gnd H 7 - Ground Green Gnd H 8 - Ground Blue Gnd H
9-+5V 10 - Ground Sync Gnd H
+5 V j
DC
11 - n.c. 12 - DDC_SDA DDC data j 13 - H-sync 0 - 5 V j 14 - V-sync 0 - 5 V j 15 - DDC_SCL DDC clock j
13 - Mini Jack: Audio - In
Wh - Audio L 0.5 V Rd - Audio R 0.5 V
/ 10 kΩ jo
RMS
/ 10 kΩ jo
RMS
14 - EXT3: Cinch: Video YPbPr - In, Audio - In
Gn - Video Y 1 V Bu - Video Pb 0.7 V Rd - Video Pr 0.7 V Rd - Audio - R 0.5 V Wh - Audio - L 0.5 V
/ 75 Ω jq
PP
/ 75 Ω jq
PP
/ 75 Ω jq
PP
/ 10 kΩ jq
RMS
/ 10 kΩ jq
RMS
15 - HDMI 1, 2 & 3: Digital Video, Digital Audio - In
19
18 2
10000_017_090121.eps
1
090428
Figure 2-5 HDMI (type A) connector
1 - D2+ Data channel j 2 - Shield Gnd H 3 - D2- Data channel j 4 - D1+ Data channel j 5 - Shield Gnd H 6 - D1- Data channel j 7 - D0+ Data channel j 8 - Shield Gnd H 9 - D0- Data channel j 10 - CLK+ Data channel j 11 - Shield Gnd H 12 - CLK- Data channel j 13 - Easylink Control channel jk 14 - n.c. 15 - DDC_SCL DDC clock j 16 - DDC_SDA DDC data jk 17 - Ground Gnd H 18 - +5V j 19 - HPD Hot Plug Detect j 20 - Ground Gnd H
16 - Aerial - In
- - IEC-type (EU) Coax, 75 Ω D
17 - RJ45: Ethernet (if present)
112345678
E_06532_025.eps
210905
Figure 2-6 Ethernet connector
1 - TD+ Transmit signal k 2 - TD- Transmit signal k 3 - RD+ Receive signal j 4 - CT Centre Tap: DC level fixation 5 - CT Centre Tap: DC level fixation 6 - RD- Receive signal j 7 - GND Gnd H 8 - GND Gnd H
2009-Dec-18
Technical Specifications and Connections

2.4 Chassis Overview

Refer to chapter Block Diagrams for PWB/CBA locations.
EN 5Q548.1E LB 2.
2009-Dec-18
EN 6 Q548.1E LB3.
Precautions, Notes, and Abbreviation List

3. Precautions, Notes, and Abbreviation List

Index of this chapter:

3.1 Safety Instructions

3.2 Warnings

3.3 Notes

3.4 Abbreviation List
3.1 Safety Instructions
Safety regulations require the following during a repair:
Connect the set to the Mains/AC Power via an isolation
transformer (> 800 VA).
Replace safety components, indicated by the symbol h,
only by components identical to the original ones. Any other component substitution (other than original type) may increase risk of fire or electrical shock hazard. Of de set ontploft!
Safety regulations require that after a repair, the set must be returned in its original condition. Pay in particular attention to the following points:
Route the wire trees correctly and fix them with the
mounted cable clamps.
Check the insulation of the Mains/AC Power lead for
external damage.
Check the strain relief of the Mains/AC Power cord for
proper function.
Check the electrical DC resistance between the Mains/AC
Power plug and the secondary side (only for sets that have a Mains/AC Power isolated power supply):
1. Unplug the Mains/AC Power cord and connect a wire between the two pins of the Mains/AC Power plug.
2. Set the Mains/AC Power switch to the “on” position (keep the Mains/AC Power cord unplugged!).
3. Measure the resistance value between the pins of the Mains/AC Power plug and the metal shielding of the tuner or the aerial connection on the set. The reading should be between 4.5 MΩ and 12 MΩ.
4. Switch “off” the set, and remove the wire between the two pins of the Mains/AC Power plug.
Check the cabinet for defects, to prevent touching of any inner parts by the customer.
picture carrier at 475.25 MHz for PAL, or 61.25 MHz for NTSC (channel 3).
Where necessary, measure the waveforms and voltages
with (D) and without (E) aerial signal. Measure the voltages in the power supply section both in normal operation (G) and in stand-by (F). These values are indicated by means of the appropriate symbols.

3.3.2 Schematic Notes

All resistor values are in ohms, and the value multiplier is often used to indicate the decimal point location (e.g. 2K2 indicates 2.2 kΩ).
Resistor values with no multiplier may be indicated with either an “E” or an “R” (e.g. 220E or 220R indicates 220 Ω).
All capacitor values are given in micro-farads (μ=× 10 nano-farads (n =× 10
Capacitor values may also use the value multiplier as the decimal point indication (e.g. 2p2 indicates 2.2 pF).
An “asterisk” (*) indicates component usage varies. Refer to the diversity tables for the correct values.
The correct component values are listed on the Philips Spare Parts Web Portal.

3.3.3 Spare Parts

For the latest spare part overview, consult your Philips Spare Part web portal.

3.3.4 BGA (Ball Grid Array) ICs

Introduction
For more information on how to handle BGA devices, visit this URL: http://www.atyourservice-magazine.com “Magazine”, then go to “Repair downloads”. Here you will find Information on how to deal with BGA-ICs.
BGA Temperature Profiles
For BGA-ICs, you must use the correct temperature-profile. Where applicable and available, this profile is added to the IC Data Sheet information section in this manual.
-9
), or pico-farads (p =× 10
. Select
-12
-6
),
).
3.2 Warnings
All ICs and many other semiconductors are susceptible to
electrostatic discharges (ESD w). Careless handling during repair can reduce life drastically. Make sure that, during repair, you are connected with the same potential as the mass of the set by a wristband with resistance. Keep components and tools also at this same potential.
Be careful during measurements in the high voltage section.
Never replace modules or other components while the unit is switched “on”.
When you align the set, use plastic rather than metal tools. This will prevent any short circuits and the danger of a circuit becoming unstable.
3.3 Notes

3.3.1 General

Measure the voltages and waveforms with regard to the chassis (= tuner) ground (H), or hot ground (I), depending on the tested area of circuitry. The voltages and waveforms shown in the diagrams are indicative. Measure them in the Service Default Mode with a colour bar signal and stereo sound (L: 3 kHz, R: 1 kHz unless stated otherwise) and

3.3.5 Lead-free Soldering

Due to lead-free technology some rules have to be respected by the workshop during a repair:
Use only lead-free soldering tin. If lead-free solder paste is required, please contact the manufacturer of your soldering equipment. In general, use of solder paste within workshops should be avoided because paste is not easy to store and to handle.
Use only adequate solder tools applicable for lead-free soldering tin. The solder tool must be able: – To reach a solder-tip temperature of at least 400°C. – To stabilize the adjusted temperature at the solder-tip. – To exchange solder-tips for different applications.
Adjust your solder tool so that a temperature of around 360°C - 380°C is reached and stabilized at the solder joint. Heating time of the solder-joint should not exceed ~ 4 sec. Avoid temperatures above 400°C, otherwise wear-out of tips will increase drastically and flux-fluid will be destroyed. To avoid wear-out of tips, switch “off” unused equipment or reduce heat.
Mix of lead-free soldering tin/parts with leaded soldering tin/parts is possible but PHILIPS recommends strongly to avoid mixed regimes. If this cannot be avoided, carefully clear the solder-joint from old tin and re-solder with new tin.
2009-Dec-18
Precautions, Notes, and Abbreviation List
EN 7Q548.1E LB 3.

3.3.6 Alternative BOM identification

It should be noted that on the European Service website, “Alternative BOM” is referred to as “Design variant”.
The third digit in the serial number (example: AG2B0335000001) indicates the number of the alternative B.O.M. (Bill Of Materials) that has been used for producing the specific TV set. In general, it is possible that the same TV model on the market is produced with e.g. two different types of displays, coming from two different suppliers. This will then result in sets which have the same CTN (Commercial Type Number; e.g. 28PW9515/12) but which have a different B.O.M. number. By looking at the third digit of the serial number, one can identify which B.O.M. is used for the TV set he is working with. If the third digit of the serial number contains the number “1” (example: AG1B033500001), then the TV set has been manufactured according to B.O.M. number 1. If the third digit is a “2” (example: AG2B0335000001), then the set has been produced according to B.O.M. no. 2. This is important for ordering the correct spare parts! For the third digit, the numbers 1...9 and the characters A...Z can be used, so in total: 9 plus 26= 35 different B.O.M.s can be indicated by the third digit of the serial number.
Identification: The bottom line of a type plate gives a 14-digit serial number. Digits 1 and 2 refer to the production centre (e.g. AG is Bruges), digit 3 refers to the B.O.M. code, digit 4 refers to the Service version change code, digits 5 and 6 refer to the production year, and digits 7 and 8 refer to production week (in example below it is 2006 week 17). The 6 last digits contain the serial number.
MODEL :
PROD.NO:
32PF9968/10
AG 1A0617 000001
MADE IN BELGIUM
220-240V 50/60Hz
~
VHF+S+H+UHF
BJ3.0E LA
S
10000_024_090121.eps
Figure 3-1 Serial number (example)

3.3.7 Board Level Repair (BLR) or Component Level Repair (CLR)

If a board is defective, consult your repair procedure to decide if the board has to be exchanged or if it should be repaired on component level. If your repair procedure says the board should be exchanged completely, do not solder on the defective board. Otherwise, it cannot be returned to the O.E.M. supplier for back charging!

3.3.8 Practical Service Precautions

It makes sense to avoid exposure to electrical shock.
While some sources are expected to have a possible dangerous impact, others of quite high potential are of limited current and are sometimes held in less regard.
Always respect voltages. While some may not be
dangerous in themselves, they can cause unexpected reactions that are best avoided. Before reaching into a powered TV set, it is best to test the high voltage insulation. It is easy to do, and is a good service precaution.
128W
090121

3.4 Abbreviation List

0/6/12 SCART switch control signal on A/V
board. 0 = loop through (AUX to TV), 6 = play 16 : 9 format, 12 = play 4 : 3 format
AARA Automatic Aspect Ratio Adaptation:
algorithm that adapts aspect ratio to remove horizontal black bars; keeps the original aspect ratio
ACI Automatic Channel Installation:
algorithm that installs TV channels directly from a cable network by
means of a predefined TXT page ADC Analogue to Digital Converter AFC Automatic Frequency Control: control
signal used to tune to the correct
frequency AGC Automatic Gain Control: algorithm that
controls the video input of the feature
box AM Amplitude Modulation AP Asia Pacific AR Aspect Ratio: 4 by 3 or 16 by 9 ASF Auto Screen Fit: algorithm that adapts
aspect ratio to remove horizontal black
bars without discarding video
information ATSC Advanced Television Systems
Committee, the digital TV standard in
the USA ATV See Auto TV Auto TV A hardware and software control
system that measures picture content,
and adapts image parameters in a
dynamic way AV External Audio Video AVC Audio Video Controller AVIP Audio Video Input Processor B/G Monochrome TV system. Sound
carrier distance is 5.5 MHz BDS Business Display Solutions (iTV) BLR Board-Level Repair BTSC Broadcast Television Standard
Committee. Multiplex FM stereo sound
system, originating from the USA and
used e.g. in LATAM and AP-NTSC
countries B-TXT Blue TeleteXT C Centre channel (audio) CEC Consumer Electronics Control bus:
remote control bus on HDMI
connections CL Constant Level: audio output to
connect with an external amplifier CLR Component Level Repair ComPair Computer aided rePair CP Connected Planet / Copy Protection CSM Customer Service Mode CTI Color Transient Improvement:
manipulates steepness of chroma
transients CVBS Composite Video Blanking and
Synchronization DAC Digital to Analogue Converter DBE Dynamic Bass Enhancement: extra
low frequency amplification DCM Data Communication Module. Also
referred to as System Card or
Smartcard (for iTV). DDC See “E-DDC” D/K Monochrome TV system. Sound
carrier distance is 6.5 MHz DFI Dynamic Frame Insertion
2009-Dec-18
EN 8 Q548.1E LB3.
Precautions, Notes, and Abbreviation List
DFU Directions For Use: owner's manual DMR Digital Media Reader: card reader DMSD Digital Multi Standard Decoding DNM Digital Natural Motion DNR Digital Noise Reduction: noise
reduction feature of the set DRAM Dynamic RAM DRM Digital Rights Management DSP Digital Signal Processing DST Dealer Service Tool: special remote
control designed for service
technicians DTCP Digital Transmission Content
Protection; A protocol for protecting
digital audio/video content that is
traversing a high speed serial bus,
such as IEEE-1394 DVB-C Digital Video Broadcast - Cable DVB-T Digital Video Broadcast - Terrestrial DVD Digital Versatile Disc DVI(-d) Digital Visual Interface (d= digital only) E-DDC Enhanced Display Data Channel
(VESA standard for communication
channel and display). Using E-DDC,
the video source can read the EDID
information form the display. EDID Extended Display Identification Data
(VESA standard) EEPROM Electrically Erasable and
Programmable Read Only Memory EMI Electro Magnetic Interference EPG Electronic Program Guide EPLD Erasable Programmable Logic Device EU Europe EXT EXTernal (source), entering the set by
SCART or by cinches (jacks) FDS Full Dual Screen (same as FDW) FDW Full Dual Window (same as FDS) FLASH FLASH memory FM Field Memory or Frequency
Modulation FPGA Field-Programmable Gate Array FTV Flat TeleVision Gb/s Giga bits per second G-TXT Green TeleteXT H H_sync to the module HD High Definition HDD Hard Disk Drive HDCP High-bandwidth Digital Content
Protection: A “key” encoded into the
HDMI/DVI signal that prevents video
data piracy. If a source is HDCP coded
and connected via HDMI/DVI without
the proper HDCP decoding, the
picture is put into a “snow vision” mode
or changed to a low resolution. For
normal content distribution the source
and the display device must be
enabled for HDCP “software key”
decoding. HDMI High Definition Multimedia Interface HP HeadPhone I Monochrome TV system. Sound
2
I
C Inter IC bus
2
I
D Inter IC Data bus
2
I
S Inter IC Sound bus
carrier distance is 6.0 MHz
IF Intermediate Frequency IR Infra Red IRQ Interrupt Request ITU-656 The ITU Radio communication Sector
(ITU-R) is a standards body
subcommittee of the International
Telecommunication Union relating to
radio communication. ITU-656 (a.k.a.
SDI), is a digitized video format used for broadcast grade video. Uncompressed digital component or digital composite signals can be used. The SDI signal is self-synchronizing, uses 8 bit or 10 bit data words, and has a maximum data rate of 270 Mbit/s, with a minimum bandwidth of 135 MHz.
ITV Institutional TeleVision; TV sets for
hotels, hospitals etc.
LS Last Status; The settings last chosen
by the customer and read and stored in RAM or in the NVM. They are called at start-up of the set to configure it according to the customer's
preferences LATAM Latin America LCD Liquid Crystal Display LED Light Emitting Diode L/L' Monochrome TV system. Sound
carrier distance is 6.5 MHz. L' is Band
I, L is all bands except for Band I LPL LG.Philips LCD (supplier) LS Loudspeaker LVDS Low Voltage Differential Signalling Mbps Mega bits per second M/N Monochrome TV system. Sound
carrier distance is 4.5 MHz MHEG Part of a set of international standards
related to the presentation of
multimedia information, standardised
by the Multimedia and Hypermedia
Experts Group. It is commonly used as
a language to describe interactive
television services MIPS Microprocessor without Interlocked
Pipeline-Stages; A RISC-based
microprocessor MOP Matrix Output Processor MOSFET Metal Oxide Silicon Field Effect
Transistor, switching device MPEG Motion Pictures Experts Group MPIF Multi Platform InterFace MUTE MUTE Line MTV Mainstream TV: TV-mode with
Consumer TV features enabled (iTV) NC Not Connected NICAM Near Instantaneous Compounded
Audio Multiplexing. This is a digital
sound system, mainly used in Europe. NTC Negative Temperature Coefficient,
non-linear resistor NTSC National Television Standard
Committee. Color system mainly used
in North America and Japan. Color
carrier NTSC M/N= 3.579545 MHz,
NTSC 4.43= 4.433619 MHz (this is a
VCR norm, it is not transmitted off-air) NVM Non-Volatile Memory: IC containing
TV related data such as alignments O/C Open Circuit OSD On Screen Display OAD Over the Air Download. Method of
software upgrade via RF transmission.
Upgrade software is broadcasted in
TS with TV channels. OTC On screen display Teletext and
Control; also called Artistic (SAA5800) P50 Project 50: communication protocol
between TV and peripherals PAL Phase Alternating Line. Color system
mainly used in West Europe (color
carrier= 4.433619 MHz) and South
America (color carrier PAL M=
2009-Dec-18
Precautions, Notes, and Abbreviation List
EN 9Q548.1E LB 3.
3.575612 MHz and PAL N= 3.582056
MHz) PCB Printed Circuit Board (same as “PWB”) PCM Pulse Code Modulation PDP Plasma Display Panel PFC Power Factor Corrector (or Pre-
conditioner) PIP Picture In Picture PLL Phase Locked Loop. Used for e.g.
FST tuning systems. The customer
can give directly the desired frequency POD Point Of Deployment: a removable
CAM module, implementing the CA
system for a host (e.g. a TV-set) POR Power On Reset, signal to reset the uP PTC Positive Temperature Coefficient,
non-linear resistor PWB Printed Wiring Board (same as “PCB”) PWM Pulse Width Modulation QRC Quasi Resonant Converter QTNR Quality Temporal Noise Reduction QVCP Quality Video Composition Processor RAM Random Access Memory RGB Red, Green, and Blue. The primary
color signals for TV. By mixing levels
of R, G, and B, all colors (Y/C) are
reproduced. RC Remote Control RC5 / RC6 Signal protocol from the remote
control receiver RESET RESET signal ROM Read Only Memory RSDS Reduced Swing Differential Signalling
data interface R-TXT Red TeleteXT SAM Service Alignment Mode S/C Short Circuit SCART Syndicat des Constructeurs
d'Appareils Radiorécepteurs et
SCL Serial Clock I
Téléviseurs
SCL-F CLock Signal on Fast I SD Standard Definition SDA Serial Data I SDA-F DAta Signal on Fast I
2
C
2
C bus
2
C
2
C bus SDI Serial Digital Interface, see “ITU-656” SDRAM Synchronous DRAM SECAM SEequence Couleur Avec Mémoire.
Color system mainly used in France and East Europe. Color carriers=
4.406250 MHz and 4.250000 MHz SIF Sound Intermediate Frequency SMPS Switched Mode Power Supply SoC System on Chip SOG Sync On Green SOPS Self Oscillating Power Supply SPI Serial Peripheral Interface bus; a 4-
wire synchronous serial data link
standard S/PDIF Sony Philips Digital InterFace SRAM Static RAM SRP Service Reference Protocol SSB Small Signal Board SSC Spread Spectrum Clocking, used to
reduce the effects of EMI STB Set Top Box STBY STand-BY SVGA 800 × 600 (4:3) SVHS Super Video Home System SW Software SWAN Spatial temporal Weighted Averaging
Noise reduction SXGA 1280 × 1024 TFT Thin Film Transistor THD Total Harmonic Distortion
TMDS Transmission Minimized Differential
Signalling TS Transport Stream TXT TeleteXT TXT-DW Dual Window with TeleteXT UI User Interface uP Microprocessor UXGA 1600 × 1 200 (4:3) V V-sync to the module VESA Video Electronics Standards
Association VGA 640 × 480 (4:3) VL Variable Level out: processed audio
output toward external amplifier VSB Vestigial Side Band; modulation
method WYSIWYR What You See Is What You Record:
record selection that follows main
picture and sound WXGA 1280 × 768 (15:9) XTAL Quartz crystal XGA 1024 × 768 (4:3) Y Luminance signal Y/C Luminance (Y) and Chrominance (C)
signal YPbPr Component video. Luminance and
scaled color difference signals (B-Y
and R-Y) YUV Component video
2009-Dec-18
EN 10 Q548.1E LB4.
Mechanical Instructions

4. Mechanical Instructions

Index of this chapter:

4.1 Cable Dressing

4.2 Service Positions
4.3 Assy/Panel Removal
4.4 Set Re-assembly
4.1 Cable Dressing
Notes:
Figures below can deviate slightly from the actual situation, due to the different set executions.

Figure 4-1 Cable dressing 40PFL8664H/xx

For taping see also Wiring Diagram 40" (Edge LIT)
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EN 11Q548.1E LB 4.

4.2 Service Positions

For easy servicing of this set, there are a few possibilities created:
The buffers from the packaging.
Foam bars (created for Service).

4.2.1 Foam Bars

1
Required for sets
1
42"
10000_018_090121.eps
Figure 4-2 Foam bars
The foam bars (order code 3122 785 90580 for two pieces) can be used for all types and sizes of Flat TVs. See figure Figure 4-2
for details. Sets with a display of 42" and larger, require four foam bars [1]. Ensure that the foam bars are always supporting the cabinet and never only the display. Caution: Failure to follow these guidelines can seriously damage the display! By laying the TV face down on the (ESD protective) foam bars, a stable situation is created to perform measurements and alignments. By placing a mirror under the TV, you can monitor the screen.
090121

4.3 Assy/Panel Removal

4.3.1 Rear Cover

Warning: Disconnect the mains power cord before you remove
the rear cover. Note: it is not necessary to remove the stand while removing the rear cover.
1. Remove all screws of the rear cover.
2. Lift the rear cover from the TV. Make sure that wires and flat coils are not damaged while lifting the rear cover from the set.

4.3.2 Ambilight

1. After removal of the rear cover, the Ambilight modules are accessible.
2. Unplug the connector(s).
3. Remove the screws that fixate the unit.
4. Take the unit out.
When defective, replace the whole unit.

4.3.3 Speakers

Each speaker unit is mounted with three screws. A sticker on the unit indicates if it is the right (“R”) or left (“L”) box (seen from the front side of the TV).
1. Unplug the connectors.
2. Remove the screws that fixate the unit.
3. Take the unit out.
When defective, replace the whole unit.

4.3.4 LED/IR

1. Unplug the connectors.
2. Remove the two fixation screws.
3. Take the unit out.
When defective, replace the whole unit.

4.3.5 Keyboard Control

1. Release the cable.
2. Unplug the connector.
3. Release the clip on top of the unit and take the unit out.
When defective, replace the whole unit.

4.3.6 Temperature Sensor

1. Unplug the connector.
2. Remove the screw.
3. Take the unit out.
When defective, replace the whole unit.

4.3.7 Power Supply

1. Unplug all connectors.
2. Remove the fixation screws.
3. Take the unit out.
When defective, replace the whole unit.

4.3.8 Small Signal Board (SSB)

Caution: It is mandatory to remount screws at their original
position during re-assembly. Failure to do so may result in damaging the SSB.
1. Unplug all connectors. Be careful with the fragile LVDS connector(s)!
2. Remove all screws that secure the board.
3. Take the board out.
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EN 12 Q548.1E LB4.
Mechanical Instructions

4.3.9 LCD Panel

See Figure 4-3
1. Remove the stand [1].
2. Unplug connectors 1M20 and 1M21 on the IR/LED [2].
3. Lift the Keyboard Control unit [3] from the frame.
4. Unplug connector 1351 (CN-S-1)on PSU-1 [4].
5. Unplug connectors 1316 & 1317 to the LED backlight [5].
6. Unplug LVDS connectors 1G50 and 1G51 on the SSB [6].
7. Unplug connector 1351 (CN-S-1-A) on PSU-2 [7].
8. Free the following cables from their saddles (or loosen tape) [8]: – all cables located just beneath PSU-1 and PSU-2. – all cables located just above PSU-1 and PSU-2.
9. Remove all screws that hold the metal subframe [9], and lift the subframe, including boards and cables, from the cabinet. See Figure 4-4
10. The LCD panel can now be lifted from the cabinet.
11. Before sending a defective LCD panel to the warehouse, remove all cables, tapes and also the aluminium cooling block. See Figure 4-5 placed on the new panel. Refer also to Wiring Diagram 40" (Edge LIT) placing instructions.
for details.
5
8
for details.
for details. These items must be re-
4
for tape
5
8
9
3
6
7
8
8
2
1
Figure 4-3 LCD Panel removal (1/3): Disassembly sequence.
1
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EN 13Q548.1E LB 4.
Figure 4-4 LCD Panel removal (2/3): Subframe with panels and cables
18670_101_090911.eps
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Figure 4-5 LCD Panel removal (3/3): Bare LCD panel after removal subframe

4.4 Set Re-assembly

To re-assemble the whole set, execute all processes in reverse order.
Notes:
While re-assembling, make sure that all cables are placed and connected in their original position. See also Figure 4-1
Pay special attention not to damage the EMC foams in the set. Ensure that EMC foams are mounted correctly.
.
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Service Modes, Error Codes, and Fault Finding

5. Service Modes, Error Codes, and Fault Finding

Index of this chapter:

5.1 Test Points

5.2 Service Modes

5.3 Step by step Start-up
5.4 Service Tools
5.5 Error Codes
5.6 The Blinking LED Procedure
5.7 Protections
5.8 Fault Finding and Repair Tips
5.9 Software Upgrading
5.1 Test Points
As most signals are digital, it will be difficult to measure waveforms with a standard oscilloscope. However, several key ICs are capable of generating test patterns, which can be controlled via ComPair. In this way it is possible to determine which part is defective.
Perform measurements under the following conditions:
Service Default Mode.
Video: Colour bar signal.
Audio: 3 kHz left, 1 kHz right.
5.2 Service Modes
Service Default mode (SDM) and Service Alignment Mode (SAM) offers several features for the service technician, while the Customer Service Mode (CSM) is used for communication between the call centre and the customer.
All service-unfriendly modes (if present) are disabled, like: – (Sleep) timer. – Child/parental lock. – Picture mute (blue mute or black mute). – Automatic volume levelling (AVL). – Skip/blank of non-favourite pre-sets.
How to Activate SDM
For this chassis there are two kinds of SDM: an analog SDM and a digital SDM. Tuning will happen according to Table 5-1
Analog SDM: use the standard RC-transmitter and key in the code “062596”, directly followed by the “MENU” (or HOME) button. Note: It is possible that, together with the SDM, the main menu will appear. To switch it “off”, push the “MENU” (or HOME) button again.
Digital SDM: use the standard RC-transmitter and key in the code “062593”, directly followed by the “MENU” (or HOME) button. Note: It is possible that, together with the SDM, the main menu will appear. To switch it “off”, push the “MENU” (or HOME) button again.
Analog SDM can also be activated by, on the SSB, shorting for a moment the solder pads SDM [1] (see
Figure 5-1
).
1
SDM1SDM
.
This chassis also offers the option of using ComPair, a hardware interface between a computer and the TV chassis. It offers the abilities of structured troubleshooting, error code reading, and software version read-out for all chassis. (see also section 5.4.1 ComPair
Note: For the new model range, a new remote control (RC) is used with some renamed buttons. This has an impact on the activation of the Service modes. For instance the old “MENU” button is now called “HOME” (or is indicated by a “house” icon).

5.2.1 Service Default Mode (SDM)

Purpose
To create a pre-defined setting, to get the same measurement results as given in this manual.
To override SW protections detected by stand-by processor and make the TV start up to the step just before protection (a sort of automatic step by step start up). See section 5.3 Step by step Start-up
To start the blinking LED procedure where only layer 2 errors are displayed (see also section 5.5 Error Codes
Specifications
Table 5-1 SDM default settings
Region Freq. (MHz)
Europe, AP(PAL/Multi) 475.25 PAL B/G
Europe, AP DVB-T 546.00 PID
).
.
Video: 0B 06 PID PCR: 0B 06 PID Audio: 0B 07
Default system
DVB-T
18440_200_090225.eps
Figure 5-1 Service mode pads
After activating this mode, “SDM” will appear in the upper right corner of the screen (when a picture is available).
How to Navigate
When the “MENU” (or HOME) button is pressed on the RC transmitter, the set will toggle between the SDM and the normal
).
user menu (with the SDM mode still active in the background).
How to Exit SDM
Use one of the following methods:
Switch the set to STAND-BY via the RC-transmitter.
Via a standard customer RC-transmitter: key in “00”­sequence.
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All picture settings at 50% (brightness, colour, contrast).
All sound settings at 50%, except volume at 25%.
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Service Modes, Error Codes, and Fault Finding
EN 15Q548.1E LB 5.

5.2.2 Service Alignment Mode (SAM)

Purpose
To perform (software) alignments.
To change option settings.
To easily identify the used software version.
To view operation hours.
To display (or clear) the error code buffer.
How to Activate SAM
Via a standard RC transmitter: key in the code “062596” directly followed by the “INFO” or “I+” button. After activating SAM with this method a service warning will appear on the screen, continue by pressing the red button on the RC.
Contents of SAM (see also Table 6-5
):
Hardware InformationA. SW version. Displays the software version of the
main software (example: Q5481-0.26.2.0= AAAaB_X.Y.W.Z).
AAAA= the chassis name, where “a” indicates the chip version: e.g. TV543/32= Q543, TV543/82= Q548, Q543/92= Q549.
B= the SW branch version. This is a sequential number (this is no longer the region indication, as the software is now multi-region).
X.Y.W.Z= the software version, where X is the main version number (different numbers are not compatible with one another) and Y.W.Z is the sub version number (a higher number is always compatible with a lower number).
B. SBY PROC version. Displays the software version
of the stand-by processor.
C. Production Code. Displays the production code of
the TV, this is the serial number as printed on the back of the TV set. Note that if an NVM is replaced or is initialized after corruption, this production code has to be re-written to NVM. ComPair will foresee in a possibility to do this.
Operation Hours. Displays the accumulated total of operation hours (not the stand-by hours). Every time the TV is switched “on/off”, 0.5 hours is added to this number.
Errors (followed by maximum 10 errors). The most recent error is displayed at the upper left (for an error explanation see section 5.5 Error Codes
).
Reset Error Buffer. When “cursor right” (or the “OK” button) is pressed and then the “OK” button is pressed, the error buffer is reset.
Alignments. This will activate the “ALIGNMENTS” sub­menu. See chapter 6. Alignments.
Dealer Options. Extra features for the dealers. See Table
6-5.
Options. Extra features for Service. For more information regarding option codes, see chapter 6. Alignments. Note that if the option code numbers are changed, these have to be confirmed with pressing the “OK” button before the options are stored. Otherwise changes will be lost.
Initialize NVM. The moment the processor recognizes a corrupted NVM, the “initialize NVM” line will be highlighted. Now, two things can be done (dependent of the service instructions at that moment): – Save the content of the NVM via ComPair for
development analysis, before initializing. This will give the Service department an extra possibility for diagnosis (e.g. when Development asks for this).
– Initialize the NVM.
Note: When the NVM is corrupted, or replaced, there is a high possibility that no picture appears because the display code is not correct. So, before initializing the NVM via the SAM, a picture is necessary and therefore the correct display option has to be entered. Refer to chapter 6. Alignments for details. To adapt this option, it’s advised to use ComPair (the correct HEX values
for the options can be found in chapter 8 “Alignments”) or
a method via a standard RC (described below). Changing the display option via a standard RC: Key in the code “062598” directly followed by the “MENU” (or HOME) button and “XXX” (where XXX is the 3 digit decimal display code as mentioned in Table 6-3
. Make sure to key in all three digits, also the leading zero’s. If the above action is successful, the front LED will go out as an indication that the RC sequence was correct. After the display option is changed in the NVM, the TV will go to the Stand-by mode. If the NVM was corrupted or empty before this action, it will be initialized first (loaded with default values). This initializing can take up to 20 seconds.
Display Option
Code
39mm
040
PHILIPS
MODEL:
32PF9968/10
27mm
PROD.SERIAL NO:
AG 1A0620 000001
(CTN Sticker)
10000_038_090121.eps
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Figure 5-2 Location of Display Option Code sticker
Store - go right. All options and alignments are stored
when pressing “cursor right” (or the “OK” button) and then the “OK”-button.
SW Maintenance.
SW Events. Not useful for Service purposes. In case
of specific software problems, the development department can ask for this information.
HW Events. Not useful for Service purposes. In case
of specific software problems, the development department can ask for this information.
Operation hours display. Displays the accumulated total
of display operation hours. So, this one keeps up the lifetime of the display itself, mainly to compensate the degeneration behaviour.
Test settings. For development purposes only.
Development file versions. Not useful for Service
purposes, this information is only used by the development department.
Upload to USB. To upload several settings from the TV to
an USB stick, which is connected to the SSB. The items are “Channel list”, “Personal settings”, “Option codes”, “Display-related alignments” and “History list”. First a
directory “repair\” has to be created in the root of the USB stick. To upload the settings select each item
separately, press “cursor right” (or the “OK” button), confirm with “OK” and wait until “Done” appears. In case the download to the USB stick was not successful “Failure” will appear. In this case, check if the USB stick is connected properly and if the directory “repair” is present in the root of the USB stick. Now the settings are stored onto the USB stick and can be used to download onto another TV or other SSB. Uploading is of course only possible if the software is running and if a picture is available. This method is created to be able to save the customer’s TV settings and to store them into another SSB.
Download from USB. To download several settings from
the USB stick to the TV. Same way of working as with uploading. To make sure that the download of the channel list from USB to the TV is executed properly, it is necessary to restart the TV and tune to a valid preset if necessary.
Note: The “History list item” can not be downloaded from USB to the TV. This is a “read-only” item. In case of specific problems, the development department can ask for this information.
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Service Modes, Error Codes, and Fault Finding
How to Navigate
In SAM, the menu items can be selected with the “CURSOR UP/DOWN” key (or the scroll wheel) on the RC­transmitter. The selected item will be highlighted. When not all menu items fit on the screen, move the “CURSOR UP/ DOWN” key to display the next/previous menu items.
With the “CURSOR LEFT/RIGHT” keys (or the scroll wheel), it is possible to: – (De) activate the selected menu item. – (De) activate the selected sub menu.
With the “OK” key, it is possible to activate the selected action.
How to Exit SAM
Use one of the following methods:
Switch the set to STAND-BY via the RC-transmitter.
Via a standard RC-transmitter, key in “00” sequence, or select the “BACK” key.

5.2.3 Customer Service Mode (CSM)

Purpose
When a customer is having problems with his TV-set, he can call his dealer or the Customer Helpdesk. The service technician can then ask the customer to activate the CSM, in order to identify the status of the set. Now, the service technician can judge the severity of the complaint. In many cases, he can advise the customer how to solve the problem, or he can decide if it is necessary to visit the customer. The CSM is a read only mode; therefore, modifications in this mode are not possible. When CSM is activated, the layer 1 error is displayed via blinking LED. Only the latest error is displayed. (see also section 5.5 Error Codes
When CSM is activated and there is a USB stick connected to the TV, the software will dump the complete CSM content to the USB stick. The file (Csm.txt) will be saved in the root of the USB stick. This information can be handy if no information is displayed.
When in this chassis CSM is activated, a test pattern will be displayed during 5 s.: 1 s. blue, 1 s. green, and 1 s. red, then again 1 s. blue and 1 s. green. This test pattern is generated by the PNX5120. So if this test pattern is shown, it could be determined that the back end video chain (PNX5120, LVDS, and display) of the SSB is working.
How to Activate CSM
Key in the code “123654” via the standard RC transmitter.
Note: Activation of the CSM is only possible if there is no (user) menu on the screen!
How to Navigate
By means of the “CURSOR-DOWN/UP” knob (or the scroll wheel) on the RC-transmitter, can be navigated through the menus.
Contents of CSM
The contents are displayed on three pages: General, Software versions, and Quality items. However, these group names itself are not shown anywhere in the CSM menu.
General
Set Type. This information is very helpful for a helpdesk/ workshop as reference for further diagnosis. In this way, it is not necessary for the customer to look at the rear of the TV-set. Note that if an NVM is replaced or is initialized after corruption, this set type has to be re-written to NVM. ComPair will foresee in a possibility to do this.
).
Production Code. Displays the production code (the serial number) of the TV. Note that if an NVM is replaced or is initialized after corruption, this production code has to be re-written to NVM. ComPair will foresee a in possibility to do this.
Installed date. Indicates the date of the first installation of the TV. This date is acquired via time extraction.
Options 1. Gives the option codes of option group 1 as set in SAM (Service Alignment Mode).
Options 2. Gives the option codes of option group 2 as set in SAM (Service Alignment Mode).
12NC SSB. Gives an identification of the SSB as stored in NVM. Note that if an NVM is replaced or is initialized after corruption, this identification number has to be re-written to NVM. ComPair will foresee in a possibility to do this. This identification number is the 12nc number of the SSB. Remark: the content here can also be a part of the 12NC of the SSB in combination with the serial number.
12NC display. Shows the 12NC of the display
12NC supply. Shows the 12NC of the supply.
12NC “fan board”. Shows the 12NC of the “fan board”­module.
12NC “LED Dimming Panel”. Shows the 12NC of the LED dimming Panel.
Software versions
Current main SW. Displays the built-in main software version. In case of field problems related to software, software can be upgraded. As this software is consumer upgradeable, it will also be published on the Internet. Example: Q5481E_1.2.3.4.
Standby SW. Displays the built-in stand-by processor software version. Upgrading this software will be possible via ComPair or via USB (see section Software Upgrading Example: STDBY_1.2.3.4.
Ambilight SW. Displays the MOP ambient light SW.
LED dimming SW. Displays the LED dimming EPLD SW (for sets with LED backlight).
Local contrast SW. Displays the MOP local contrast SW version.
Quality items
Signal quality. Poor/average/good
Child lock. Not active/active. This is a combined item for locks. If any lock (Preset lock, child lock, lock after or parental lock) is active, the item shall show “active”.
HDMI HDCP key. Indicates of the HDMI keys (or HDCP keys) are valid or not. In case these keys are not valid and the consumer wants to make use of the HDMI functionality, the SSB has to be replaced.
Ethernet MAC address. Displays the MAC address present in the SSB.
Wireless MAC address. Displays the wireless MAC address to support the Wi-Fi functionality.
BDS key. Indicates if the “BDS level 1” key is valid or not.
CI slot present. If the common interface module is detected the result will be “YES”, else “NO”.
HDMI input format. The detected input format of the HDMI.
HDMI audio input stream. The HDMI audio input stream is displayed: present / not present.
HDMI video input stream. The HDMI video input stream is displayed: present / not present.
How to Exit CSM
Press “MENU” (or HOME)/ ”Back” key on the RC-transmitter.
).
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Service Modes, Error Codes, and Fault Finding
EN 17Q548.1E LB 5.

5.3 Step by step Start-up

When the TV is in a protection state due to an error detected by stand-by software (error blinking is displayed) and SDM is activated via short cutting the pins on the SSB, the TV starts up until it reaches the situation just before protection. So, this is a kind of automatic step by step start-up. In combination with the start-up diagrams below, it is shown which supplies are present at a certain moment. Important to know is, that if e.g. the 3V3 detection fails and thus layer 2 error = 18 is blinking while the TV is restarted via SDM, the Stand-by Processor will enable the 3V3, but the TV set will not go to protection now. The TV will stay in this situation until it is reset (Mains/AC Power supply interrupted). Caution: in case the start-up in this mode with a faulty FET 7101-1 is done, all ICs supplied by the +3V3 could be destroyed, due to over voltage (12V on 3V3-line). It is recommended to measure first the FET 7101-1 or others FETs on short-circuit before activating SDM via the service pads.
The abbreviations “SP” and “MP” in the figures stand for:
SP: protection or error detected by the Stand-by Processor.
MP: protection or error detected by the MIPS Main Processor.
St by
Hibernate
Mains
off
- WakeUp requested
- Acquisition needed
- Tact switch pushed
- stby requested and no data Acquisition required
Tact switch
pushed
- Tact switch pushed
- last status is hibernate after mains ON
Mains
on
Semi St by
GoToProtection
WakeUp
requested
-St by requested
- tact SW pushed
WakeUp
requested
(SDM)
Protection
Active
GoToProtection

Figure 5-3 Transition diagram

18440_215_090227.eps
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EN 18 Q548.1E LB5.
Detect2 should be polled on the standard 40ms interval and startup should becontinuedwhen detect2 becomes high.
This enables the +3V3and+5V converter. Asa result, also+5V-tuner, +2V5, +1V8-PNX8541 and +1V8-PNX5100 (if present) become available.
Delayof50ms needed becauseofthelatency of the detect-1 circuit. This delayisalsoneededfor the PNX5100. The reset of the PNX5100 should only be released 10msafter powering the IC.
Service Modes, Error Codes, and Fault Finding
Off
Mains isapplied
Standby Supply starts running.
All standby supply voltagesbecome available.
st-byµPresets
InitialiseI/Opins of the st-byµP:
- Switch reset-AVC LOW (reset state)
- Switch WP-NandFlash LOW (protected)
- Switch reset-system LOW (reset state)
- Switch reset-5100 LOW (reset state)
- Switch reset-Ethernet LOW (reset state)
-keepreset-NVM high, Audio-reset and Audio-Mute-Up HIGH
start keyboard scanning, RC detection. Wake upreasonsare
Switch ON Platform and display supply by switching
isswitched on, followed by the +1V2 DCDC converter
Delay1.5secondbefore checking detect2 line
No
off.
Reset detect2_delay_flag
LOW the Standby line.
+12V, +24Vs,ALand Bolt-on power
if the detect2_delay_flagisset
Detect2 high received
within 2 seconds?
Yes
Wait fixed time of 15ms
Detect2 high?
Yes
Reset detect2_delay_flag
Enable the DCDC converter for +3V3and
+5V. (ENABLE-3V3)
Wait 50ms
No
Enter protection
Stand byor
Protec tio n
If the protection state was left by short circuiting the
SDM pins, detection of a protection condition during
startup will stall the startup. Protection conditions in a
playing set will be ignored. The protection mode will
not be entered.
- Switch Audio-Reset high.
It is low in the standbymodeifthestandby
mode lasted longer than10s.
Carefull we don’t hit this error
directly if the delayflagisset.
Power-OK error:
Layer1: 3
Layer2: 16
If the supply is hicking, the firstdetect2could
bepositive(12V still present), followed by
negative Supply-fault (already low). Adding a
fixed delay bringsusbehindthis delaygap.
Confirmation received from NXP that there does not need to be a delay between the rise of the +1V2 and the +3V3.Only requirement is to have the +1V2 before or atthesame time
as the +3V3.150ms delayisdeleted.
Set detect2_delay_flag
Detect-1 I/O line
High?
Yes
Yes
Enable the supply detection algorithm
Set I²C slave address
of StandbyµPto(A0h)
Switch LOW the RESET-NVM line to allow access to NVM. (Add a 2ms delay before trying to address the NVM to allow correct NVM
No
initialization, this is no issueinthissetup,the delayisautomatically
covered bythearchitecturalsetup)
Switch HIGH the WP-NandFlashto
allow access to NAND Flash
ReleaseReset-PNX5100.
PNX5100 will start booting.
Wait 10 ms
Detect EJTAG debugprobe
(pulling pin of the probeinterfaceto
ground byinsertingEJTAG probe)
EJTAG probe
connected ?
No
Cold boot?
Yes
Release AVC system reset
Feed cold boot script
ReleaseAVCsystemreset
Feed warm boot script
No
No
Detect-2 I/O line
High?
Yes
Wait 50ms
Detect-1 I/O line
High?
No
Detect-2 I/O line
High?
Yes
Voltage outputerror:
Layer1: 2
Layer2: 18
Yes
ReleaseAVCsystemreset Feed initializing boot script
disable alive mechanism
No
Only usefull in case of PNX5100 present. To avoid diversity in standbyµP,thereset-PNX5100will still be switched bythestandbyµP.
This 10ms delayisstill present to give some relaxation to the supplies. (The PCI arbiter on the PNX5100 is never used and is not the reason anymore)
An EJTAG probe (e.g. WindPower ICE probe) can be connected for Linux Kernel debugging purposes.
Disable 3V3, switch standby line high and wait 4 seconds
Thesechecks prevent the set from going in to standbyonthefalse error condition where the
Becauseofthis reappearance, the 12V check
is OK which would cause protection. If we wait
No
Enter protection
This will allow access to NVM and NAND FLASH and cannotbedone earlier becausetheFLASH needs to
be in Write Protect as long as the suppliesare not available.
first 3V3 is negative becauseofahickup, although the 12V was abouttoreappear.
50ms,the3V3should be back as well.
2009-Dec-18
To: 18440_216b_090227.eps
To: 18440_216b_090227.eps

Figure 5-4 “Off/Stand-by” to “Semi Stand-by” flowchart (part 1)

18440_216a_090227.eps
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EN 19Q548.1E LB 5.
From : 18440_216a_090227.eps
3-th try?
Yes
Blink Code as
error code
Enter pro tection
Reset-system is connected to the Micronas MultiStandard decoder.
This cannot be done through the bootscript, the I/O is on the standbyµP
Timing need to be updated if more mature info isavailable.
No
Code =
Layer1: 2
Layer2: 15
Switch AVC PNX8543
in reset (active low)
Wait 10ms
Switch the NVM reset
line HIGH.
Disable all supply related protectionsand
switch off the +3V3 +5V DC/DC converter.
Wait 5ms
switch off the remaining DC/DC
converters
Switch Standby I/O line high
and wait 4 seconds
No
Code =
Layer1: 2
Layer2: 53
From : 18440_216a_090227.eps
Reset-system isswitched HIGH bythe
AVC at the end of the bootscript
AVC releases Reset-Ethernet when the
end of the AVC boot-script is detected
Reset-Audio and Audio-Mute-Up are
switched byMIPS code later on in the
startupprocess
Bootscript ready
in 1250 ms?
Yes
Set I²C slave address
of Standby µP to (60h)
RPC start (comm. protocol)
FlashtoRam
image transfer succeeded
within 30s?
Yes
SW initialization
No
succeeded within 20s?
Yes
Enable Alive check mechanism
MIPS reads the wake upreason
from standbyµP.
5100 SW start
Wake upreason
coldboot & not semi-
standby?
yes
Startup screen cfg file
present?
yes
MIPSsends displayparametersand
No
No
Bitmapto5100
MIPS triggers 5100 to displaythe
startup screen
Startup screen visible
Reset-system isswitched HIGH bythe
AVC attheendofthebootscript
AVC releases Reset-Ethernet when the
end of the AVC boot-script is detected
Reset-Audio and Audio-Mute-Up are
switched by MIPS code later on in the
startupprocess
Timing needs to be updated if more mature info is available.
Timing needs to be updated if more mature info is available.
Wait until AVC starts to
communicate
Startup screen shall only bevisible when there isacoldboot to an active state end situation. The startup screen shall not
bevisible when waking upforreboot reasons or waking upto semi-standby conditions.
The first time after the option turn on of the startup screen or when the set is virgin, the cfg file is not present and hence the startup screen will not be shown.
To keep this flowchart readable, the exact displayturn on description is not copied here. Please see the Semi-standby to On description for the detailed display startup sequence. During the complete displaytimeoftheStartup screen, the preheat condition of 100% PWM is valid.
Initialize audio
Switch on the displayincaseofa LED backlight
display by sending the TurnOnDisplay(1) (I²C)
command to the PNX5100
Enable the PWM outputtowards the displayLVDS
cable in caseofa LED Backlight set.
(CTRL4-PNX5100)
Init ialize tuner and Multi Standard decoder
Initialize source selection
Initialize video processing IC's
-local contrast FPGA
- PNX5100 (if present)
Init ialize AutoTV
Initialize Ambilight with Lights off.
:
In caseofa LED backlight display, a LED DIM panel is present which is fed by the Vdisplay. To power the LED DIM Panel, the Vdisplay switch driven by the PNX5100 must beclosed. The display startup sequence is taken care of bytheLEDDIM panel. Secondly, this cmd will alsoenable the LVDS outputof the 5100 towards the LED DIM panel.
In caseofa LED backlight display, the PWM-dimming signal needs to beroutedtotheLVDS cable. This routing is not
allowed in non-LED sets (see alsodisplayconfiguration)
Semi-Standby

Figure 5-5 “Off/Stand-by” to “Semi Stand-by” flowchart (part 2)

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EN 20 Q548.1E LB5.
Service Modes, Error Codes, and Fault Finding
Constraints taken into account:
- Display may only be started when valid LVDS output clock can be delivered by the AVC.
- To have a reliable operation of the backlight, the backlight should be driven with a PWM duty cycle of 100% during the first seconds. Only after this first one or two seconds, the PWM may be set to the required output level (Note that the PWM output should be present before the backlight is switched on). To minimize the artefacts, the picture should only be unblanked after these first seconds.
The assumption here is that a fast toggle (<2s) can
only happen during ON->SEMI ->ON. In these states,
the AVC is still active and can provide the 2s delay. A
transition ON->SEMI->STBY->SEMI->ON cannot be
made in less than 2s, because the standby state will
CPipe already generates a valid output clock in the semi-standby state: display
startup can start immediately when leaving
Switch on the display power by
The exact timings to
switch on the
display (LVDS delay, lamp delay) are defined in the
display file.
The sum of the LVDS delay and the Lamp delay needs
to be used because the Lamp delay is specified with
the appearance of the LVDS on the display as
reference. This moment is not known by ceplf, only the
switch on of the LCD power is known. The delta
The complete algorithm description is
removed here.
Only the start of the algorithm
is mentioned here as reminder.
switching LCD-PWR-ON low
Wait x ms
Switch on LVDS output in 8543
between both is the LVDS delay.
be maintained for at least 4s.
the semi-standby state.
No
Start POK line detection
algorithm
return
Semi Standby
Wait until previous on-state is left more than 2
seconds ago. (to prevent LCD display problems)
Assert RGB video blanking
and audio mute
Display already on?
(splash screen)
No
PNX5100 present?
Yes
Switch on the display by sending the
TurnOnDisplay(1) (I²C) cmd to the PNX5100
Delay Lamp-on with the sum of the LVDS delay and
the Lamp delay indicated in the display file
Switch off the dimming backlight feature, set
the BOOST control to nominal and make sure
PWM output is set to 100%
Switch on LCD backlight (Lamp-ON)
Wait until valid and stable audio and video, corresponding to the
requested output is delivered by the AVC
the backlight has been switched on for at least the time which is
indicated in the display file as preheat time.
AND
Yes
Initialize audio and video
processing IC's and functions
according needed use case.
Switch Audio-Reset low and wait 5ms
Release audio mute and wait 100ms before any other audio
handling is done (e.g. volume change)
The higher level requirement is that audio and video should be demuted without transient effects and that the audio should be demuted maximum 1s before or
at the same time as the unblanking of the video.
The higher level requirement is that the
ambilight functionality may not be switched on
before the backlight is turned on in case the
set contains a CE IPB inverter supply.
Restore dimming backlight feature, PWM and BOOST output
Switch on the Ambilight functionality according the last status
Yes
and unblank the video.
settings.
Startup screen Option and Installation setting
Photoscreen ON?
Display cfg file present
and up to date, according
correct display option?
Prepare Start screen Display config
file and copy to Flash
Active

Figure 5-6 “Semi Stand-by” to “Active” flowchart

Yes
No
No
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Service Modes, Error Codes, and Fault Finding
Active
Mute all sound outputs via softmute
Wait 100ms
Set main amplifier mute (I/O: audio-mute)
EN 21Q548.1E LB 5.
Switch off LVDS output in 8543
Wait x ms
No
Force ext audio outputs to ground
(I/O: audio reset)
Switch off Ambilight
Wait until Ambilight has faded out: Output power
Observer on PNX5100 should be zero
Switch off POK line detection
Switch off LCD backlight
Mute all video outputs
Wait x ms (display file)
PNX5100 present?
Switch off the display by sending:
- TurnOnDisplay(0) (I²C) command to the PNX5100
- or sending OUTPUT-ENABLE(0) to the LED DIM panel in case of a LED BL set.
and wait 5ms
algorithm
Yes
The higher level requirement is that the
backlight may not be switched off before the
ambilight functionality is turned off in case the
set contains a CE IPB inverter supply.
The exact timings to
switch off the
display (LVDS
delay, lamp delay)
are defined in the
display file.
Switch off the display power by
switching LCD-PWR-ON high
Semi Standby

Figure 5-7 “Active” to “Semi Stand-by” flowchart

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Service Modes, Error Codes, and Fault Finding
Semi Stand by
If ambientlight functionality was used in semi-standby
(lampadaire mode), switch off ambient light
Delay transition until ramping down of ambient light is
finished. *)
Transfer Wake up reasons to the Stand by µP.
Switch Memories to self-refresh (this creates a more
stable condition when switching off the power).
Switch AVC system in reset state (reset-system and
reset-AVC lines) Switch reset-PNX5100 LOW Switch Reset-Ethernet LOW
Wait 10ms
Switch the NVM reset line HIGH
Switch WP-Nandflash LOW
Disable all supply related protections and switch off
the DC/DC converters (ENABLE-3V3)
Wait 5ms
*) If this is not performed and the set is switched to standby when the switch off of the ambilights is still ongoing, the lights will switch off abruptly when the supply is cut.
Important remarks:
release reset audio 10 sec after entering
standby to save power
Also here, the standby state has to be
maintained for at least 4s before starting
another state transition.
2009-Dec-18
Switch OFF all supplies by switching HIGH the
Standby I/O line
Stand by

Figure 5-8 “Semi Stand-by” to “Stand-by” flowchart

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Service Modes, Error Codes, and Fault Finding
EN 23Q548.1E LB 5.

5.4 Service Tools

5.4.1 ComPair

Introduction
ComPair (Computer Aided Repair) is a Service tool for Philips Consumer Electronics products. and offers the following:
1. ComPair helps to quickly get an understanding on how to repair the chassis in a short and effective way.
2. ComPair allows very detailed diagnostics and is therefore capable of accurately indicating problem areas. No knowledge on I because ComPair takes care of this.
3. ComPair speeds up the repair time since it can automatically communicate with the chassis (when the uP is working) and all repair information is directly available.
4. ComPair features TV software up possibilities.
Specifications
ComPair consists of a Windows based fault finding program and an interface box between PC and the (defective) product. The ComPair II interface box is connected to the PC via an USB cable. For the TV chassis, the ComPair interface box and the TV communicate via a bi-directional cable via the service connector(s). The ComPair fault finding program is able to determine the problem of the defective television, by a combination of automatic diagnostics and an interactive question/answer procedure.
How to Connect
This is described in the chassis fault finding database in ComPair.
ComPair II
Figure 5-9 ComPair II interface connection
Caution: It is compulsory to connect the TV to the PC as
shown in the picture above (with the ComPair interface in between), as the ComPair interface acts as a level shifter. If one connects the TV directly to the PC (via UART), ICs will be blown!
How to Order
ComPair II order codes:
ComPair II interface: 3122 785 91020.
Software is available via the Philips Service web portal.
ComPair serial interface cable for Q54x.x. (using 3.5 mm Mini Jack connectors): 3138 188 75051.
Note: When having problems, please contact your local support desk.
RC in
2
C or UART commands is necessary,
TO TV
TO
UART SERVICE
I2C SERVICE
CONNECTOR
Multi
function
2
C
I
PC
ComPair II Developed by Philips Brugge
Optional power
5V DC
TO
CONNECTOR
RS232 /UART
10000_036_090121.eps
Optional
Switch
Power ModeLink/
Activity
HDMI
2
C only
I
UART SERVICE
CONNECTOR
RC out
TO
091118

5.5 Error Codes

5.5.1 Introduction

The error code buffer contains all detected errors since the last time the buffer was erased. The buffer is written from left to right, new errors are logged at the left side, and all other errors shift one position to the right. When an error occurs, it is added to the list of errors, provided the list is not full. When an error occurs and the error buffer is full, then the new error is not added, and the error buffer stays intact (history is maintained). To prevent that an occasional error stays in the list forever, the error is removed from the list after more than 50 hrs. of operation. When multiple errors occur (errors occurred within a short time span), there is a high probability that there is some relation between them. New in this chassis is the way errors can be displayed:
There is a simple blinking LED procedure for board level repair (home repair) so called LAYER 1 errors next to the existing errors which are LAYER 2 errors (see Table 5-3
– LAYER 1 errors are one digit errors – LAYER 2 errors are two digit errors.
In protection mode. – From consumer mode: LAYER 1. – From SDM mode: LAYER 2.
Fatal errors, if I and SAM are not selectable. – From consumer mode: LAYER 1. – From SDM mode: LAYER 2.
Important remark: For all errors detected by MIPS which are fatal => rebooting of the TV set (reboot starts after LAYER 1 error blinking), one should short the solder paths at start-up from the power OFF state by mains interruption and not via the power button to trigger the SDM via the hardware pins.
In CSM mode – When entering CSM: error LAYER 1 will be displayed
by blinking LED. Only the latest error is shown.
In SDM mode – When SDM is entered via Remote Control code or the
hardware pins, LAYER 2 is displayed via blinking LED.
In the ON state – In “Display error mode”, set with the RC commands
“mute_06250X _OK” LAYER 2 errors are displayed via blinking LED.
Error display on screen. – In CSM no error codes are displayed on screen. – In SAM the complete error list is shown.
Basically there are three kinds of errors:
Errors detected by the Stand-by software which lead to protection. These errors will always lead to protection and an automatic start of the blinking LED LAYER 1 error. (see section 5.6 The Blinking LED Procedure
Errors detected by the Stand-by software which not lead to protection. In this case the front LED should blink the involved error. See also section Extra Information that it can take up several minutes before the TV starts blinking the error (e.g. LAYER 1 error = 2, LAYER 2 error = 15 or 53).
Errors detected by main software (MIPS). In this case the error will be logged into the error buffer and can be read out via ComPair, via blinking LED method LAYER 1-2 error, or in case picture is visible, via SAM.
2
C bus is blocked and the set re-boots, CSM
).
).
. Note
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EN 24 Q548.1E LB5.
Service Modes, Error Codes, and Fault Finding

5.5.2 How to Read the Error Buffer

Use one of the following methods:
On screen via the SAM (only when a picture is visible). E.g.: – 00 00 00 00 00: No errors detected – 23 00 00 00 00: Error code 23 is the last and only
detected error.
37 23 00 00 00: Error code 23 was first detected and
error code 37 is the last detected error.
– Note that no protection errors can be logged in the
error buffer.
Via the blinking LED procedure. See section 5.5.3 How to Clear the Error Buffer.
•Via ComPair.

5.5.3 How to Clear the Error Buffer

Use one of the following methods:
By activation of the “RESET ERROR BUFFER” command in the SAM menu.
With a normal RC, key in sequence “MUTE” followed by “062599” and “OK”.
If the content of the error buffer has not changed for 50+ hours, it resets automatically.

5.5.4 Error Buffer

In case of non-intermittent faults, clear the error buffer before starting to repair (before clearing the buffer, write down the
content, as this history can give significant information). This to ensure that old error codes are no longer present. If possible, check the entire contents of the error buffer. In some situations, an error code is only the result of another error code and not the actual cause (e.g. a fault in the protection detection circuitry can also lead to a protection).
There are several mechanisms of error detection:
Via error bits in the status registers of ICs.
Via polling on I/O pins going to the stand-by processor.
Via sensing of analogue values on the stand-by processor or the PNX8543.
Via a “not acknowledge” of an I
2
C communication.
Take notice that some errors need several minutes before they start blinking or before they will be logged. So in case of problems wait 2 minutes from start-up onwards, and then check if the front LED is blinking or if an error is logged.
Table 5-2 Layer 1 code overview (multi chassis overview)
LAYER 1 codes
SSB 2
Display supply 3
Platform supply 4 Only for display option 196 and 197
Fan 7
AmbiLight or DC/DC or 3D LED dim panel 8
Table 5-3 Error code overview (multi chassis overview)
Description
Main NVM 2 0 MIPS I Temp. protection 3 12 MIPS I
LAYER 1 error
LAYER 2 error
Monitored
Medium
2
2
Error/Prot.
EB: in Error Buffer
BL: Blinking LED
C1 E x STM24C128 SSB TV shut down with red LED blinking 2.
Device
Defective board
C4 P BL/EB Supply I2C3213MIPSI2C3 E BL/EB SSB SSB I2C2214MIPSI2C2 E BL/EB SSB SSB
PNX does not boot (HW cause) PNX 5100 does not boot
12V 3 16 St-by µP I/O P BL Supply
12V 3 16 St-by µP I/O P BL Platform Supply
Inverter or display supply 3 17 Mips I/O E EB Supply
Only for display option 196 and 197 4 17 Mips I/O E EB Display Supply
1V2, 1V2, 3V3, 5V to low 2 18 St-by µP I/O P BL SSB PNX 5100 2 21 MIPS I
HDMI MUX 2 23 MIPS I
215St-by µP I
2
C1 P BL SSB SSB
2
C3 E EB PNX 5100 SSB
2
C3 E EB TDA9996 SSB I2C switch 2 24 Mips I2C2 E EB PCA9540 SSB
Boot-NVM PNX5120 2 25 MIPS
Multi Standard demodulator (Micronas IF) 2 27 MIPS I
ARM (AL) 8 28 MIPS
FPGA (Local contrast) 2 29 MIPS Tuner1 2 34 MIPS I
2
FAN I
C expander 7 41 MIPS I2C2 E EB PCA 9533 FAN mod.
T× sensor 7 42 MIPS I
FAN 1 7 43 MIPS
FAN 2 7 44 MIPS MIPS does not boot (SW cause) 2 53 St-by µP I
Display 5 64 MIPS
FPGA LED dim 2D 2 65 MIPS FPGA LED dim 3D 8 65 MIPS I
I2C3 E EB STM24C08 SSB
2
C3 E EB DRX3616K
DRX3626K
SSB
I2C3 E EB NXP LPC2103 AL mod. or DC/DC I2C3 E EB Altera SSB
2
C3 E EB UV1783S
2
C2 E EB LM 75 T×sensor
HD1816
SSB
I2C2EEB FAN I2C2EEB FAN
2
C1 P BL PNX8543 SSB TV is rebooting endlessly with white LED blinking.
I2C2 E BL/EB Altera Display I2C3 E EB Xilinx SSB
2
C2 E EB Altera SSB
Special Remarks
TV is rebooting endlessly with red LED blinking “2”.
TV is rebooting endlessly with red LED blinking “2”
TV shut down with red LED blinking “3”.
TV still in normal operation mode, but without backlights. Enter CSM Layer 1 red LED blinking “3”.
TV shut down with red LED blinking “2”.
TV is rebooting endlessly, with red LED blinking “2” (shown every 20 second).
Activate CSM red LED blinking “2”.
TV is rebooting endlessly, with red LED blinking “2” (shown every minute).
TV is in normal operation but without video displayed (RF).
TV is in normal operation but without AMBILIGHT “on”.
TV is in normal operation but without video displayed (RF).
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Service Modes, Error Codes, and Fault Finding
EN 25Q548.1E LB 5.
Extra Information
Rebooting. When a TV is constantly rebooting due to internal problems, most of the time no errors will be logged or blinked. This rebooting can be recognized via a ComPair interface and Hyperterminal (for Hyperterminal settings, see section 5.8.6 UART Logging
). It’s shown that the loggings which are generated by the main software keep continuing. In this case diagnose has to be done via ComPair.
Main NVM. When there is no I
2
C communication towards the main NVM, LAYER 1 error = “2” will be displayed via the blinking LED procedure. In SDM, LAYER 2 error can be “19”. Check the logging for keywords like “I
Error 13 (I
2
C bus 3 blocked). When this error occurs, the
2
C bus blocked”.
TV will constantly reboot due to the blocked bus. The best way for further diagnosis here, is to use ComPair.
Error 15 (PNX8543 doesn’t boot). Indicates that the main processor was not able to read his bootscript. This error will point to a hardware problem around the PNX8543 (supplies not OK, PNX 8541 completely dead, I between PNX and Stand-by Processor broken, etc...). When error 15 occurs it is also possible that I blocked (NVM). I
2
C2 can be indicated in the schematics as
2
C link
2
C2 bus is
follows: SCL-UP-MIPS, SDA-UP-MIPS, SCL-2 or SDA-2. Other root causes for this error can be due to hardware problems with: NVM PNX5120, PNX5120 itself, or DDRs.
Error 16 (12V). This voltage is made in the power supply and results in protection (LAYER 1 error = “3”). When SDM is activated we see blinking LED LAYER 2 error = “16”.
Error 17 (POK). The display is switched “on” with the signal “Lamp On”. If the inverter starts (or 24V display is OK) the POK line becomes “high”. If the POK line is not “high”, the set backlight will be switched “off” and “on” again for 3 times (start-up). If the set POK line becomes “high” after the retries, no error is logged; if the POK stays “low”, error is logged: LAYER 1 error = “3”, LAYER 2 error = “17”. No protection is required, the start-up goes on.
Error 18 (1V2-3V3-5V too low). All these supplies are generated by the DC/DC supply on the SSB. If one of these supplies is too low, protection occurs and blinking LED LAYER 1 error = “2” will be displayed automatically. In SDM this gives LAYER 2 error = “18”.
Error 21 (PNX5120). When there is no I
2
C communication towards the PNX5120 after start-up (power “off” by disconnection of the mains cord), LAYER 2 error will blink continuously via the blinking LED procedure in SDM. (start­up the TV with the solder paths short to activate SDM).
Error 23 (HDMI). When there is no I
2
C communication towards the HDMI multiplexer after start up, LAYER 2 error = “23” will be logged and displayed via the blinking LED procedure if SDM is switched “on”.
Error 25 (Boot-NVM PNX5120). When there is no I
2
C communication towards the PNX5120 NVM after start-up, TV is rebooting endlessly with blinking LAYER 1 error = 2 (shown every minute). When SDM is activated we see blinking LED LAYER 2 error = “25”.
Error 27 (Multi Standard demodulator). When there is no
2
I
C communication towards the Multi Standard demodulator after start up, LAYER 2 error = “27” will be logged and displayed via the blinking LED procedure when SDM is switched “on”.
Error 28 (FPGA ambilight). When there is no I
2
C communication towards the FPGA ambilight after start up, LAYER 2 error = “28” will be logged and displayed via the blinking LED procedure if SDM is switched “on”. Note that it can take up several minutes before the TV starts blinking LAYER 1 error = “2” in CSM or in SDM, LAYER 2 error = “28”.
Error 29 (FPGA local contrast). Incorrect or false error logging, LAYER 2 = “29” can be displayed in the error buffer due to a software bug in the first SW release patches. To solve this problem, upgrade the main software with the latest release version.
Error 34 (Tuner). When there is no I
2
C communication
towards the tuner after start up, LAYER 2 error = “34” will
be logged and displayed via the blinking LED procedure when SDM is switched on.
Error 53. This error will indicate that the PNX8543 has read his bootscript (when this would have failed, error 15 would blink) but initialization was never completed because of hardware problems (NAND flash,...) or software initialization problems. Possible cause could be that there is no valid software loaded (try to upgrade to the latest main software version). Note that it can take up to 2 minutes before the TV starts blinking LAYER 1 error = “2” or in SDM, LAYER 2 error = “53”.

5.6 The Blinking LED Procedure

5.6.1 Introduction

The blinking LED procedure can be split up into two situations:
Blinking LED procedure LAYER 1 error. In this case the error is automatically blinked when the TV is put in CSM. This will be only one digit error, namely the one that is referring to the defective board (see table 5-3 Error code overview (multi chassis overview)) which causes the failure of the TV. This approach will especially be used for home repair and call centres. The aim here is to have service diagnosis from a distance.
Blinking LED procedure LAYER 2 error. Via this procedure, the contents of the error buffer can be made visible via the front LED. In this case the error contains 2 digits (see table 5-3 Error code overview (multi chassis overview) be displayed when SDM (hardware pins) is activated. This is especially useful for fault finding and gives more details regarding the failure of the defective board.
Important remark: For all errors detected by MIPS which are fatal (rebooting of the TV set, with reboot starts after LAYER 1 error blinking), one should short the SDM solder paths at start­up from the power OFF state by mains interruption and not via the power button, to trigger the SDM via the hardware pins.
When one of the blinking LED procedures is activated, the front LED will show (blink) the contents of the error-buffer. Error codes greater then 10 are shown as follows:
1. “n” long blinks (where “n” = 1 to 9) indicating decimal digit
2. A pause of 1.5 s
3. “n” short blinks (where “n”= 1 to 9)
4. A pause of approximately 3 s,
5. When all the error codes are displayed, the sequence finishes with a LED blink of 3 s
6. The sequence starts again.
Example: Error 12 8 6 0 0. After activation of the SDM, the front LED will show:
1. One long blink of 750 ms (which is an indication of the decimal digit) followed by a pause of 1.5 s
2. Two short blinks of 250 ms followed by a pause of 3 s
3. Eight short blinks followed by a pause of 3 s
4. Six short blinks followed by a pause of 3 s
5. One long blink of 3 s to finish the sequence
6. The sequence starts again.

5.6.2 How to Activate

Use one of the following methods:
Activate the CSM. The blinking front LED will show only the latest layer 1 error, this works in “normal operation” mode or automatically when the error/protection is monitored by the stand-by processor. At the time of this release, this layer 1 error blinking was not working as expected.
and will
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In case no picture is shown and there is no LED blinking, read the logging to detect whether “error devices” are mentioned. (see section 5.8.6 UART Logging
Activate the SDM. The blinking front LED will show the entire contents of the layer 2 error buffer, this works in “normal operation” mode or when SDM (via hardware pins) is activated when the tv set is in protection.
Important remark:
For all errors detected by MIPS which are fatal => rebooting of the TV set (reboot starts after LAYER 1 error blinking), one should short the solder paths at start-up from the power OFF state by mains interruption and not via the power button to trigger the SDM via the hardware pins.
Transmit the commands “MUTE” - “062500” - “OK” with a normal RC. The complete error buffer is shown. Take notice that it takes some seconds before the blinking LED starts.
Transmit the commands “MUTE” - “06250x” - “OK” with a normal RC (where “x” is a number between 1 and 5). When x = 1 the last detected error is shown, x = 2
the second last error, etc.... Take notice that it takes some
seconds before the blinking LED starts.

5.7 Protections

5.7.1 Software Protections

Most of the protections and errors use either the stand-by microprocessor or the MIPS controller as detection device. Since in these cases, checking of observers, polling of ADCs, and filtering of input values are all heavily software based, these protections are referred to as software protections. There are several types of software related protections, solving a variety of fault conditions:
Protections related to supplies: check of the 12V, +5V, +3V3 and 1V2.
Protections related to breakdown of the safety check mechanism. E.g. since the protection detections are done by means of software, failing of the software will have to initiate a protection mode since safety cannot be guaranteed any more.
Remark on the Supply Errors
The detection of a supply dip or supply loss during the normal playing of the set does not lead to a protection, but to a cold reboot of the set. If the supply is still missing after the reboot, the TV will go to protection.
Protections during Start-up
During TV start-up, some voltages and IC observers are actively monitored to be able to optimise the start-up speed, and to assure good operation of all components. If these monitors do not respond in a defined way, this indicates a malfunction of the system and leads to a protection. As the observers are only used during start-up, they are described in the start-up flow in detail (see section 5.3 Step by step Start­up).

5.7.2 Hardware Protections

The only real hardware protection in this chassis appears in case of an audio problem e.g. DC voltage on the speakers. This protection will only affect the Class D (7L10) and puts the amplifier in a continuous burst mode (cyclus approximately 2 seconds).
Repair Tips
There will be still picture available but no sound. While the Class D amplifier tries to start-up again, the cone of the loudspeakers will move slowly in one or the other direction until the initial failure shuts the amplifier down, this cyclus starts over and over again.

5.7.3 Important remark regarding the blinking LED indication

).
As for the blinking LED indication, the blinking LED of layer 1 error displaying can be switched “off” by pushing the power button on the keyboard. This condition is not valid after the set was unpowered (via mains interruption). The blinking LED starts again and can only be switched “off” by unplugging the mains connection. This can be explained by the fact that the MIPS can not load the keyboard functionality from software during the start-up and does not recognise the keyboard commands at this time.

5.8 Fault Finding and Repair Tips

Read also section “5.5 Error Codes, 5.5.4 Error Buffer, Extra Information”.

5.8.1 Ambilight

Due to degeneration process of the AmbiLights, there can be a difference in the colour and/or light output of the spare ambilight module in comparison with the originals ones contained in the TV set. Via ComPair, the light output can be adjusted.

5.8.2 CSM

When CSM is activated and there is a USB stick connected to the TV, the software will dump the complete CSM content to the USB stick. The file (Csm.txt) will be saved in the root of the USB stick. If this mechanism works it can be concluded that a large part of the operating system is already working (MIPS, USB...)

5.8.3 Exit “Factory Mode”

When an “F” is displayed in the screen’s right corner, this means the set is in “Factory” mode, and it normally happens after a new SSB is mounted. To exit this mode, push the “VOLUME minus” button on the TV’s local keyboard for 10 seconds (this disables the continuous mode). Then push the “SOURCE” button on the TV’s local keyboard for 10 seconds until the “F” disappears from the screen.

5.8.4 DC/DC Converter

Introduction
The best way to find a failure in the DC-DC converters is to check their starting-up sequence at “power-on via the mains cord”, presuming that the stand-by microprocessor is operational.
If the input voltage of DC-DC converters is around 12.7 V (measured on decoupling capacitors 2107 and 2123 and the enable signals are “low” (active), then the output voltages should have their normal values. The +12V and +5VPOD supplies start-up first (enabled by PODMODE signal from the stand-by microprocessor). There is a supplementary condition for 12V to start-up: if the +5V­POD does not start up due to a local defect, then +12V will not be available as well. The +5V-ON supply is enabled by the ONMODE signal (coming also from the stand-by microprocessor). The +1V2 supply starts up when the +12V appears, then at least 100 ms later, the +3V3 will be activated via the ENABLE-3V3 signal from the stand-by microprocessor. If the +12V value is less than 10 V, the last enumerated voltages will not show up due to the under­voltage detection circuit 7105-1 + 6101 and surrounding components. Furthermore, if the +12V is less than 8 V, then also the +1V2 will not be available. The +5V5-TUN generator 7202 (present only for the analogue version of China platforms) will start to operate as soon as the 12V (PSU) is present.
2009-Dec-18
Service Modes, Error Codes, and Fault Finding
EN 27Q548.1E LB 5.
The consumption of controller IC 7103 is around 19 mA (that means almost 200 mV drop voltage across resistor
3108).
The current capability of DC-DC converters is quite high (short-circuit current is 7 to 10 A).
The DETECT1 signal (active “low”) is an internal protection (error 18) of the DC-DC convertor and will occur if the output voltage of any DC-DC convertor is out of limits (10% of the normal value).
Fault Finding
Symptom: +1V2 not present (even for a short while ~10 ms) – Check 12 V availability (resistor 3108, MOS-FETs
7101 and 7102), value of +12 V, and surrounding
components) – Check the voltage on pin 9 (1.5 V), – Check for +1V2 output voltage short-circuit to GND that
can generate pulsed over-currents 7...10 A through coil
5103.
– Check the over-current detection circuit (2106 or 3131
interrupted).
Symptom: +1V2 present for about 100ms, +3V3 not rising. – Check the ENABLE-3V3 signal (active “low”), – Check the voltage on pin 8 (1.5 V), – Check the under-voltage detection circuit (the voltage
on collector of transistor 7105-1 should be less than
0.8 V),
– Check for output voltages short-circuits to GND (+3V3)
that can generate pulsed over currents 7...10 A through coil 5101,
– Check the over-current detection circuit (2105 or 3127
interrupted).
Symptom: +1V2 OK, +3V3 present for about 100 ms. Possible cause: SUPPLY-FAULT line stays “low” even though the +3V3 and +1V2 is available - the stand-by microprocessor is detecting that and switching “off” all supply voltages. – Check the drop voltage across resistor 3108 (they
could be too high, meaning a defective controller IC or MOS-FETs),
– Check if the boost voltage on pin 4 of controller IC 7103
is less than 14 V (should be 19 V),
– Check if +1V2 or +3V3 are higher than their normal
values - that can be due to defective DC feedback of the respective DC-DC convertor (ex. 3152, 3144).
Symptom: +1V2 and +3V3 show a high level of ripple voltage (audible noise can come from the filtering coils 5101, 5103). Possible cause: instability of the frequency and/or duty cycle of a DC-DC converter or stabiliser. – Check the resistor 3164, capacitors 2102 and 2103,
input and output decoupling capacitors.
– Check AC feedback circuits (2120, 2129, 3141, 3153,
2110, 2114 and 3135).
Symptom: +1V2, +3V3 ok, no +5V5-TUN (analogue sets only). Possible cause: the “+5V5-TUN GENERATOR” circuit (7202 and surroundings components) is defective: check transistor 7202 (it has to have gate voltage pulses of about 10 V amplitude and drain voltage pulses of about 35 V amplitude) and surrounding components. A high consumption (more than 6 mA) from +5V5-TUN voltage can cause also +5V5-TUN voltage to be too low or zero.
Note: when a pair of power MOSFETs (7101 or 7102) becomes defective, the controller IC 7103 should be replaced as well.

5.8.5 Fan self test (only for sets with LED backlight)

In case fans are present, a softest can be done by pushing the red coloured button on the remote control while the TV set is in CSM. Exit CSM and check the status of the fans in the error buffer by entering SAM (062596 + info button on the RC). In case of failure (fully red screen) more detailed information is available in the error buffer (error 41, 42, 43, 44).

5.8.6 UART Logging

When something is wrong with the TV set (f.i.the set is rebooting) checking the UART logging using hyperterminal can be done to find more information. Hyperterminal is a standard Windows application. It can be found via Programs, Accessories, Communications, Hyperterminal. Connect a “ComPair UART”-cable (3138 188 75051) from the Service connector in the TV set, via the ComPair interface (this is compulsory, otherwise ICs are blown in the PC), to the “COMx”-port of the PC. After start-up of Hyperterminal, fill in a name (f.i. “logging”) in the “Connection Description” box, then apply the following settings:
1. COMx
2. Bits per second = 115200
3. Data bits = 8
4. Parity = none
5. Stop bits = 1
6. Flow control = none During the start-up of the TV set, the logging will be displayed. This is also the case during rebooting of the TV set (the same logging appears time after time). Also available in the logging is the “Display Option Code” (useful when there is no picture), look for item “DisplayRawNumber” in the beginning of the logging. Tip: When there is no picture available during reboot, it is possible to check for “error devices” in the logging (LAYER 2 error). This can be very helpful to determine the failure cause of the reboot. For protection state, there is no logging.

5.8.7 Loudspeakers

Make sure that the volume is set to minimum during disconnecting the speakers in the “on” state of the TV. The audio amplifier can be damaged by disconnecting the speakers during “on” state of the set! Sometimes the set can go into protection, but that is not always the case.

5.8.8 Tuner

Attention: In case the tuner is replaced, always check the tuner options!

5.8.9 Display option code

Attention: In case the SSB is replaced, always check the display option code in SAM, even when picture is available. Performance with the incorrect display option code can lead to unwanted side-effects for certain conditions. See also Table 6-3

5.8.10 Upgrade HDMI EDID NVM

To upgrade the HDMI EDID, see ComPair for further instructions.
for the code.
2009-Dec-18
EN 28 Q548.1E LB5.

5.8.11 Upgrade VGA EDID NVM

To upgrade the VGA EDID NVM, pin 7 of the EDID NVM [2] has to be short circuited to ground. See ComPair for further instructions.
Service Modes, Error Codes, and Fault Finding
SDM2EDID
Figure 5-10 VGA EDID NVM
1
18440_201_090225.eps
090306
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Service Modes, Error Codes, and Fault Finding
EN 29Q548.1E LB 5.

5.8.12 SSB Replacement

Follow the instructions in the flowchart in case a SSB has to be replaced. See Figure 5-11
. In the unlikely event that the set
starts up in Factory mode, first refer to Figure 5-12
Before starting:
- prepare a USB memory stick with the latest software
- download the latest Main Software (Fus) from www.p4c.philips.com
- unzip this file
- create a folder ”upgrades” in the root of a USB stick (size > 50 MB) and save the autorun.upg file in this "upgrades" folder. Note: it is possible to rename this file, e.g."Q54x_SW_version.upg"; this in case there are more than one "autorun.upg" files on the USB stick.
Due to a possible wrong display option code in the received Service SSB (NVM), it’s possible that no picture is displayed. Due to this the download application will not be shown either. This tree enables you to load the main software step-by-step via the UART logging on the PC (this for visual feedback).
1) Start up the TV set, equiped with the Service and enable the UART logging on the PC.
2) The TV set will start-up automatically in the
download application if main TV software is not loaded.
3) Plug the prepared USB stick into the TV set. Follow the
instructions in the UART log file, press Right cursor key to enter
the list. Navigate to the “autorun.upg file in the UART logging
printout via the cursor keys on the remote control. When the
correct file is selected, press
4) Press "Down" cursor and Ok to start flashing the main TV software. Printouts like: “L: 1-100%, V: 1-100% and
P: 1-100%” should be visible now in the UART logging.
5) Wait until the message “Operation successful !” is logged in
the UART log and remove all inserted media. Restart the TV set.
SSB,
Ok”.
Figure 5-11
5.8.3 Exit “Factory Mode” Service SSB delivered without main software loaded.
and then to
Ins truction note SSB replacement Q543.x - Q548.x - Q549.x
START
Set is stil l operating?
Yes
C onn ect the U SB sti ck to the set,
go to SAM and save the current TV settings via Upload to USB
1.
Discon nect the WiF i module f rom the PC I conn ector (only for Q549.x SSB)
2. Replace the SSB by a Service SSB.
3. Place the WiFi module in the PCI connector.
4. Mount the Service SSB in the set.
Start-up the set
No pic ture displayed
1) Plug the USB stick into the TV set a the “autorun .upg file in the displayed browser.
2) Now the main software will be loaded automatically,
3) Wait until the message Operation successful !” is displayed and remove all inserted media. Restar t the TV set.
Set behaviour?
Pic ture displayed
Set is starting up with software upgrade menu appearing on screen
supported by a progress bar.
Pic ture displayed
Set is starting up without software upgrade menu appearing on screen
nd select
. Additional information you can find in sections
, 6.5 Reset of Repaired SSB and 6.6
No
No
Connect PC via the ComPair interface to Service connector.
Start TV in Jett mode (DVD I + (OSD))
Open ComPair browser Q54x
Program set type number, serial number, and di
Attention point for Net TV: If the set type and serial number are not filled in, the Net TV functionality will not work. It will not be possible to connect to the internet.
Program E - DFU if needed.
splay 12 NC
Set the correct Display code via “06259
xxx is the 3 digit display panel code (see sticker on the side
After entering the Display Option code, the set is going to
Check and perform alignments in SAM according to the Service Manual. Option codes, colour temperature, etc.
or bottom of the cabinet)
(= validation of code)
Restart the set
Saved settings on USB stick?
Go to SAM and reload settings
via Download from USB function.
If not already done:
Check latest software on Service website.
Update main and Stand-by software via USB.
Final check of all menus
Special attention for HDMI Keys and Mac address.
Check if E - D F U is present.
8 -HOME- xxx where
Standby
Yes
in CSM.
End
In case of settings reloaded from USB, the set type, serial number, display 12 NC, are automatically stored when entering display options.
- Check if correct display option code is programmed.
- Verify option codes” according to sticker inside the set. settings for white drive > see Service Manual.
- Default
Q54x.E SSB Board swap – VDS Updated 19-08-2009
H_16771_007a.eps
091119
Figure 5-11 SSB replacement flowchart
2009-Dec-18
EN 30 Q548.1E LB5.
Service Modes, Error Codes, and Fault Finding
Set is starting up in F actory m ode
Set is starting up in Factory m ode?
Noisy picture with bands/lines is visible and the
RED LED is continuous on.
- Press the volume minus” button on the TVs local keyboard for 10
- Press the “SOURCE button for 10 seconds until the F disappears from the screen or the noise on the screen is replaced by “blue mute
The noise on the screen is replaced
with the blu
e mute or the F is disappeared!
Unplug the mainscord to verify the correct
disabling of the factory-mode.
seconds
An F is displayed and the HDMI 1
input is displayed.
2009-Dec-18
Program display option code
via 062598 MENU, followed by
the 3 digits code of the display
(this code can be found
on a sticker inside the set).
After entering display option code, the set is
going in stand-by mode (= validation of code)
Resta rt the set
Figure 5-12 SSB replacement flowchart - set starting up in Factory Mode
H_16771_007b.eps
091119
Service Modes, Error Codes, and Fault Finding
EN 31Q548.1E LB 5.

5.9 Software Upgrading

5.9.1 Introduction

The set software and security keys are stored in a NAND­Flash, which is connected to the PNX8543 via the PCI bus.
It is possible for the user to upgrade the main software via the USB port. This allows replacement of a software image in a stand alone set, without the need of an E-JTAG debugger. A description on how to upgrade the main software can be found in the DFU.
Important: When the NAND-Flash must be replaced, a new SSB must be ordered, due to the presence of the security keys! (copy protection keys, MAC address, ...). It is not possible anymore to replace the NAND-Flash with another one from a scrap-board. Perform the following actions after SSB replacement:
1. Set the correct option codes (see sticker inside the TV).
2. Update the TV software (see the DFU for instructions).
3. Perform the alignments as described in section Reset of
Repaired SSB.
4. Check in CSM if the HDMI keys are valid.
For the correct order number of a new SSB, always refer to the Spare Parts list, available on the Philips Spare Part web portal.

5.9.2 Main Software Upgrade

The “UpgradeAll.upg” file is only used in the factory.
The “FlashUtils.upg” file is only used by Service centres that are allowed to do component level repair on the SSB.
Automatic Software Upgrade
In “normal” conditions, so when there is no major problem with the TV, the main software and the default software upgrade application can be upgraded with the “AUTORUN.UPG” (FUS part of the one-zip file: e.g. FUS _Q5481E_
1.25.5.0_commercial.zip). This can also be done by the
consumers themselves, but they will have to get their software from the commercial Philips website or via the Software Update Assistant in the user menu (see DFU). The “autorun.upg” file must be placed in the root of the USB stick. How to upgrade:
1. Copy “AUTORUN.UPG” to the root of the USB stick.
2. Insert USB stick in the set while the set is in ON MODE. The set will restart and the upgrading will start automatically. As soon as the programming is finished, a message is shown to remove the USB stick and restart the set.
Manual Software Upgrade
In case that the software upgrade application does not start automatically, it can also be started manually. How to start the software upgrade application manually:
1. Disconnect the TV from the Mains/AC Power.
2. Press the “OK” button on a Philips TV remote control or a Philips DVD RC-6 remote control (it is also possible to use a TV remote in “DVD” mode). Keep the “OK” button pressed while reconnecting the TV to the Mains/AC Power.
3. The software upgrade application will start.
Attention!
In case the download application has been started manually, the “autorun.upg” will maybe not be recognized. What to do in this case:
1. Create a directory “UPGRADES” on the USB stick.
2. Rename the “autorun.upg” to something else, e.g. to “software.upg”. Do not use long or complicated names, keep it simple. Make sure that “AUTORUN.UPG” is no longer present in the root of the USB stick.
3. Copy the renamed “upg” file into this directory.
4. Insert USB stick into the TV.
5. The renamed “upg” file will be visible and selectable in the upgrade application.
Back-up Software Upgrade Application
If the default software upgrade application does not start (could be due to a corrupted boot 2 sector) via the above described method, try activating the “back-up software upgrade application”. How to start the “back-up software upgrade application” manually:
1. Disconnect the TV from the Mains/AC Power.
2. Press the “INFO”-button on a Philips remote control or “CURSOR DOWN” button on a Philips DVD RC-6 remote control (it is also possible to use a TV remote in “DVD” mode). Keep the “INFO”-button (or “cursor down” button) pressed while reconnecting the TV to the Mains/AC Power.
3. The software upgrade application will start.

5.9.3 Stand-by Software Upgrade via USB

In this chassis it is possible to upgrade the Stand-by software via a USB stick. The method is similar to upgrading the main software via USB. Use the following steps:
1. Create a directory “UPGRADES” on the USB stick.
2. Copy the Stand-by software (part of the one-zip file, e.g. StandbySW_CFT69_84.0.0.0.upg) into this directory.
3. Insert the USB stick into the TV.
4. Start the download application manually (see section Manual Software Upgrade
.
5. Select the appropriate file and press the “red” button to upgrade.

5.9.4 Content and Usage of the One-Zip Software File

Below the content of the One-Zip file is explained, and instructions on how and when to use it.
File name Description
EDID_Q5481_x.x.x.x.zip Contains the EDID content of the different
EJTAGDownload_Q5481_x.x.x.x.zip Only used by service centra which are
FUS_Q5481_vx.x.x.x.zip Contains the “autorun.upg” which is
VGA_HD_EDID_TV543_x.x.x.x.zip Contains the EDID content of the different
processNVM_Q5481_x.x.x.x.zip Default NVM content. Must be programmed
Software_history_vx.x.x.x.pdf Contains a history overview of the software.
StandbySW_CFT73_x.x.x.x.zip Contains the Stand-by software in “upg”
VGA_FHD_EDID_TV543_x.x.x.x.zip Contains the EDID content of the different
VGA NVM. See ComPair for further instructions.
allowed to do Component Level Repair.
needed to upgrade the TV main software and the software download application.
(HD) VGA NVM. See ComPair for further instructions.
via ComPair.
and “hex” format.
- The “StandbySW_xxxxx_prod.upg” file can be used to upgrade the Stand-by software via USB.
- The “StandbySW_xxxxx.hex” file can be used to upgrade the Stand-by software vi a ComPair.
- The files “StandbySW_xxxxx_exhex.hex” and “StandbySW_xxxxx_dev.upg” may not be used by Service technicians (only for development purposes).
(FHD) VGA NVM. See ComPair for further instructions.
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EN 32 Q548.1E LB6.

6. Alignments

Alignments
Index of this chapter:

6.1 General Alignment Conditions

6.2 Hardware Alignments

6.3 Software Alignments

6.4 Option Settings
6.5 Reset of Repaired SSB
6.6 Service SSB delivered without main software loaded
6.7 Total Overview SAM modes
6.1 General Alignment Conditions
Perform all electrical adjustments under the following conditions:
Power supply voltage (depends on region): – AP-NTSC: 120 VAC or 230 V – AP-PAL-multi: 120 - 230 V – EU: 230 V
/ 50 Hz (± 10%).
AC
LATAM-NTSC: 120 - 230 V – US: 120 V
/ 60 Hz (± 10%).
AC
/ 50 Hz (± 10%).
AC
/ 50 Hz (± 10%).
AC
/ 50 Hz (± 10%).
AC
Connect the set to the mains via an isolation transformer with low internal resistance.
Allow the set to warm up for approximately 15 minutes.
Measure voltages and waveforms in relation to correct ground (e.g. measure audio signals in relation to AUDIO_GND). Caution: It is not allowed to use heat sinks as ground.
Test probe: R
> 10 MΩ, Ci < 20 pF.
i
Use an isolated trimmer/screwdriver to perform alignments.

6.1.1 Alignment Sequence

First, set the correct options: – In SAM, select “Options”, and then “Option numbers”. – Fill in the option settings for “Group 1” and “Group 2”
according to the set sticker (see also section Option
Settings).
– Press OK on the remote control before the cursor is
moved to the left.
– In submenu “Option numbers” select “Store” and press
OK on the RC.
•OR: – In main menu, select “Store” again and press OK on
the RC.
– Switch the set to Stand-by.
Warming up (>15 minutes).
6.2 Hardware Alignments
Not applicable.
6.3 Software Alignments
Put the set in SAM mode (see chapter 5. Service Modes, Error Codes, and Fault Finding). The SAM menu will now appear on the screen. Select ALIGNMENTS and go to one of the sub menus. The alignments are explained below. The following items can be aligned:
Tuner AGC.
White point.
To store the data:
Press OK on the RC before the cursor is moved to the left.
In main menu select “Store” and press OK on the RC.
Press MENU on the RC to switch back to the main menu.
Switch the set to stand-by mode.
For the next alignments, supply the following test signals via a video generator to the RF input:
EU/AP-PAL models: a PAL B/G TV-signal with a signal strength of at least 1 mV and a frequency of 475.25 MHz
US/AP-NTSC models: an NTSC M/N TV-signal with a signal strength of at least 1 mV and a frequency of 61.25 MHz (channel 3).
LATAM models: an NTSC M TV-signal with a signal strength of at least 1 mV and a frequency of 61.25 MHz (channel 3).

6.3.1 Tuner AGC (RF AGC Take Over Point Adjustment)

Purpose: To keep the tuner output signal constant as the input signal amplitude varies. No alignment is necessary, as the AGC alignment is done automatically (standard value: “80”). Store settings and exit SAM.

6.3.2 White Point

Set “Active control” to “Off”.
Choose “TV menu”, “TV Settings” and then “Picture” and set picture settings as follows:
Picture Setting
Dynamic backlight Off
Dynamic Contrast Off
Colour Enhancement Off
Picture Format Un scaled
Light Sensor Off
Brightness 50
Colour 0
Contrast 100
Go to the SAM and select “Alignments”-> “White point”.
White point alignment LCD screens:
Use a 100% white screen as input signal and set the following values: – “Colour temperature”: “Normal”. – All “White point” values to: “127”. – “Red BL offset” values to “7”. – “Green BL offset” values to “7”.
In case you have a colour analyser:
Measure with a calibrated contactless colour analyser in the centre of the screen. Consequently, the measurement needs to be done in a dark environment.
Adjust the correct x, y coordinates (while holding one of the White point registers R, G or B on 127) by means of decreasing the value of one or two other white points to the correct x, y coordinates (see Table 6-1
). Tolerance: dx: ±
0.004, dy: ± 0.004.
Repeat this step for the other colour temperatures that need to be aligned.
When finished press OK on the RC and then press STORE (in the SAM root menu) to store the aligned values to the NVM.
Restore the initial picture settings after the alignments.
Table 6-1 White D alignment values
Value Cool (11000K) Normal (9000K) Warm (6500K)
x 0.277 0.288 0.318
y 0.290 0.298 0.337
If you do not have a colour analyser, you can use the default values. This is the next best solution. The default values are average values coming from production.
2009-Dec-18
Alignments
EN 33Q548.1E LB 6.
Select a COLOUR TEMPERATURE (e.g. COOL, NORMAL, or WARM).
Set the RED, GREEN and BLUE default values according to the values in Table 6-1
.
When finished press OK on the RC, then press STORE (in the SAM root menu) to store the aligned values to the NVM.
Restore the initial picture settings after the alignments.
Table 6-2 White tone default settings 40" Frame sets
White Tone Black level offset
Colour Temp R G B R G
Normal 127 114 114 8 8
Cool 123 122 126 8 8
Warm 127 110 67 8 8

6.4 Option Settings

6.4.1 Introduction

The microprocessor communicates with a large number of I ICs in the set. To ensure good communication and to make digital diagnosis possible, the microprocessor has to know which ICs to address. The presence / absence of these PNX5120 ICs (back-end advanced video picture improvement IC which offers motion estimation and compensation features (commercially called HDNM) plus integrated Ambilight control) is made known by the option codes.
Notes:
After changing the option(s), save them by pressing the OK button on the RC before the cursor is moved to the left, select STORE in the SAM root menu and press OK on the RC.
The new option setting is only active after the TV is switched “off” / “stand-by” and “on” again with the mains switch (the NVM is then read again).

6.4.2 Dealer Options

For dealer options, in SAM select “Dealer options”. See Table 6-5

6.4.3 (Service) Options

.
Diversity
Not all sets with the same Commercial Type Number (CTN) necessarily have the same option code! Use of Alternative BOM An alternative BOM number usually indicates the use of an alternative display or power supply. This results in another display code thus in another Option code. For the power supply there is no difference. Refer to Chapter 3. Precautions, Notes, and Abbreviation List.

6.4.5 Option Code Overview

Table 6-3 Option and display code overview
CTN (Alt. BOM#)
40PFL8664H/12 12307 00642 02031 45288 30689 28850 08867 00000 225
40PFL7664H/12 12291 00642 02031 45288 30689 28850 08867 00000 225
Options Group 1 Options Group 2 Disp.
code
Important: after having edited the option numbers as
described above, you must press OK on the remote control
2
C
before the cursor is moved to the left!
BBE & WMA Functionality
Some sets have the possibility to switch “on” the “BBE” and/or “WMA” functionality for an enhanced audio experience. This has to be executed via ComPair via “option 9”.
Table 6-4 “Option 9” overview
CTN (Alt. BOM#)
40PFL8664H/12 00057
40PFL7664H/12 00057
Option 9

6.5 Reset of Repaired SSB

A very important issue towards a repaired SSB from a service repair shop implies the reset of the NVM on the SSB. A repaired SSB in service should get the service Set type “00PF0000000000” and Production code “00000000000000”. Also the virgin bit is to be set. To set all this, you can use the ComPair tool. In case of a display replacement, reset the “Operation hours” to “0”, or to the operation hours of the replacement display.
Select the sub menu's to set the initialisation codes (options) of the model number via text menus. See Table 6-5

6.4.4 Opt. No. (Option numbers)

Select this sub menu to set all options at once (expressed in two long strings of numbers). An option number (or “option byte”) represents a number of different options. When you change these numbers directly, you can set all options very quickly. All options are controlled via eight option numbers. When the NVM is replaced, all options will require resetting. To be certain that the factory settings are reproduced exactly, you must set both option number lines. You can find the correct option numbers on a sticker inside the TV set and in Table 6-3 Example: The options sticker gives the following option numbers:
08192 00133 01387 45160
12232 04256 00164 00000
The first line (group 1) indicates hardware options 1 to 4, the second line (group 2) indicate software options 5 to 8. Every 5-digit number represents 16 bits (so the maximum value will be 65536 if all options are set). When all the correct options are set, the sum of the decimal values of each Option Byte (OB) will give the option number. See Table 6-3
for the options.

6.5.1 SSB identification

.
Whenever ordering a new SSB, it should ne noted that the correct ordering number (12nc) of a SSB is located on a sticker on the SSB. The format is <12nc SSB><serial number>. The ordering number of a “Service” SSB is the same as the ordering number of an initial “factory” SSB.
.
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EN 34 Q548.1E LB6.
Alignments
18310_221_090318.eps
090319
Figure 6-1 SSB identification

6.6 Service SSB delivered without main software loaded

Due to a changed manufacturing process, new Service SSBs can be delivered to the warehouse without main TV software loaded. Below you find the steps to follow when such
an SSB is received. Additional information you will find in section 5.8.12 SSB Replacement

6.6.1 When a picture is available

1. Mount the Service SSB into the TV set. After start-up,
normally the download application will appear on the screen.
2. Download the latest main software (FUS) from the
www.p4c.philips.com
3. Create a folder "upgrades" in the root of a USB stick (size
> 50 MB) and save the "autorun.upg" file in this "upgrades" folder. Note: it is possible to rename this file, e.g.
.
website.
"Q549_SW_version.upg", this in case there are more than one "autorun.upg" files on your USB stick
4. Plug the prepared USB stick into the TV set, and select the "autorun" file in the displayed browser on the screen
5. Now the main TV software will be loaded automatically, supported by a progress bar
6. Set the correct "display code" via "062598-HOME-xxx", where "xxx" is the 3-digit display panel code (see sticker on the side/bottom of the cabinet).

6.6.2 When no picture is available

Due to a possible wrong display option code in the received Service SSB (NVM), no picture can be available at start-up and thus no download application will be visible. Here you can proceed and finalize step by step to load the main TV software via the UART logging on the PC (for visual feedback).
1. Start-up the TV set, equipped with the Service SSB, and enable the UART logging on the PC (see for settings 5.8
Fault Finding and Repair Tips 5.8.6 UART Logging)
2. The TV set will start-up automatically in the download application if main TV software is not loaded
3. Plug the prepared USB stick into the TV set, press cursor "Right" to enter the list, and navigate to the "autorun" file in the UART logging printout via the cursor keys on the remote control. When the correct file is selected, press "OK"
4. Press cursor "Down" and "OK" to start the flashing of the main TV software. Printouts like: "L: 1-100% , V: 1-100% and P: 1-100%" should be visible now in the UART logging
5. Wait until the message "Operation successful!” is displayed and remove all inserted media. Restart the TV set
6. Set the correct "display code" via "062598-HOME-xxx", where "xxx" is the 3-digit display panel code (see sticker on the side/bottom of the cabinet).

6.6.3 Use of repaired SSBs instead of new

Repaired SSBs on stock will obviously already contain main TV software. This implies that only a main software upgrade is required if you use a “repaired” SSB for board swap instead of a “new” SSB.

6.7 Total Overview SAM modes

Table 6-5 SAM mode overview

Main Menu Sub-menu 1 Sub-menu 2 Sub-menu 3 Description
Hardware Information A. SW version e.g. “Q5431_0.26.10.0” Display TV & Stand-by SW version and CTN serial
B. Stand-by processor version e.g. “STDBY_84.69.0.0”
C. Production code e.g. “See type plate”
Operation hours Displays the accumulated total of operation hours.TV
Error Displayed the most recent error.
Reset error buffer Clears all content in the error buffer.
Alignment Tuner AGC RF-AGC Take over point adjustment (AGC default
White point Colour temperature Normal 3 difference modes of colour temperature can be se-
number.
switched “on/off” & every 0.5 hours is increase one
value is 64)
Warn
Cool
White point red LCD White Point Alignment. For values,
White point green
White point blue
Red black level offset
Green black level offset
lected
see Table 6-1.
2009-Dec-18
Alignments
Main Menu Sub-menu 1 Sub-menu 2 Sub-menu 3 Description
Dealer options Picture mute Off/On Select Picture mute On/Off. Picture is muted / not
Virgin mode Off/On
E-sticker Off/On Select E-sticker On/Off (USPs on-screen)
Auto store mode None Autostore mode disabled (not in installation menu)
PDC/VPS Autostore mode via ATS (PDC/VPS) enabled
TXT page Autostore mode via ACI enabled
PDC/VPS/TXT Autostore mode via ACI or ATS enabled
Options Digital broadcast DVB Off/On Select DVB On/Off
DVB - T installation Off/On or Country dependent Select DVB T installation On/Off or by country
DVB - T light Off/On Select DVB T light On/Off
DVB - C Off/On Select DVB C On/Off
DVB - C installation Off/On or Country dependent Select DVB C installation On/Off or by country
Over the air download Off/On or Country dependent Select Over the air download On/Off or by country
8 days EPG Off/On Select 8 day EPG On/Off
Digital features USB Off/On Select USB On/Off
Ethernet Off/On Select Ethernet On/Off
Wi-Fi Off/On Select Wi-Fi On/Off
DLNA Off/On Select DLNA On/Off
On-line service Off On-line ser vice is Off
PTP (Picture Transfer Protocol) Off/On Select PTP On/Off
Update assistant Off/On Select Update assistant On/Off
Internet software update Off Internet software update is Off
Display Screen 201 / LCD LGD WUE SBA1 37" Displayed the panel code & type model.
LightGuide Off/On Select LightGuide On/Off
Display fans Not present/Present Select Display fans Present/Not present.
Temperature sensor No sensor N.A
Temperature LUT 0 N.A
E-box & monitor Off/On Select E-box & monitor On/Off
Video reproduction Picture processing None/PNX5120 Select Picture processing None/PNX5120 (Q543.xE
MOP local contrast Off/On Select MOP local contrast On/Off
Light sensor Off/On Select Light sensor On/Off
Light sensor type 0/1/2/3 Select Light sensor type form 0 to 3 (for difference
Pixel Plus type Pixel Plus HD Select type of picture improvement.
Perfect Pixel HD
Pixel Precise HD
Pixel Plus HD (used in Q543.xE)
Pixel Precise HD (used in Q548.1E)
Ambilight None, Select type of Ambilight modules use.
2 sided 2/2
2 sided 4/4
3 sided 2/3/2
3 sided 4/3/4
3 sided 4/5/4
4 sided 4/3/4/3
Ambilight technology LED/Future use Ambi light technology LED is in use.
MOP ambilight Off/On Select MOP ambilight On/Off
muted in case no input signal is detected at input con­nectors.
Select Virgin mode On/Off. TV starts up / does not start up (once) with a language selection menu after the mains switch is turned “on” for the first time (virgin mode)
chassis).
styling).
For 8400 series only
EN 35Q548.1E LB 6.
2009-Dec-18
EN 36 Q548.1E LB6.
Main Menu Sub-menu 1 Sub-menu 2 Sub-menu 3 Description
Audio reproduction Acoustic system Cabinet design used for setting dynamic audio pa-
Source selection EXT1/AV1 type SCART CBVS RGB LR Select input source when connected with external
Miscellaneous Region Europe/AP-PAL-MULTI/Australia Select Region/country.
Option number Group 1 e.g. “08192.02181.01387.45160” The first line (group 1) indicates hardware options 1
Group 2 e.g. “10185.12448.00164.00000” The second line (group 2) indicates software options
Store Store after changing.
Initialise NVM N.A
Store
Software maintenance Software events Display Display information is for development purposes.
Hardware events Display Display information is for development purposes.
Operation hours display 0003 In case the display must be swapped for repair, you
Test setting Digital information QAM modulation: 64-QAM Display information is for development purposes.
Install start frequency 000 Install start frequency from 0 MHz
Install end frequency 999 Install end frequency as 999 MHz
Default install frequency
Installation Digital only Select Digital only or Digital + Analogue before instal-
Alignments
rameters.
equipment.
CVBS Y/C YPbPr LR
CVBS Y/C YPbPr HV LR
(CVBS) YPbPr LR
EXT2/AV2 type SCART CBVS RGB LR Select input source when connected with external
CVBS Y/C LR
(CVBS) YPbPr LR
CVBS Y/C LR
EXT3/AV3 type None Select input source when connected with external
CVBS
CVBS LR
YPbPr
YPbPr LR
YPbPr HV LR
VGA Off/On Select VGA On/Off
SIDE I/O Off/On Select SIDE I/O On/Off
HDMI 1 Off/On Select HDMI 1 On/Off
HDMI 2 Off/On Select HDMI 2 On/Off
HDMI 3 Off/On Select HDMI 3 On/Off
HDMI 4 Off/On Select HDMI 4 On/Off
HDMI side Off/On Select HDMI side On/Off
HDMI CEC Off/On Select HDMI CEC On/Off
HDMI CEC RC pass through Off/On Select HDMI CEC RC pass through On/Off
HDMI CEC Pixel Plus link Off/On Select Pixel Plus link On/Off
Tuner type HD1816-MK1/TD1716-MK4/
System RC support Off/On Select System RC support On/Off.
Embedded user manual Off/On Select Embedded user manual On/Off.
Start-up screen Off/On Select Start-up screen On/Off.
Wallpaper Off/On Select Wallpaper On/Off.
Hotel mode Off Hotel mode is Off.
Clear
Test reboot
Test reboot is to restart the TV.
Clear
Symbol rate: 23:29
Original network ID: 12817
Network ID:12817
Transport stream ID: 2
Service ID: 3
Hierarchical modulation: 0
Selected video PID: 35
Selected main audio PID: 99
Selected 2nd audio PID: -1
Digital + Analogue
TD1716-MK3/HD1816-MK2
equipment.
equipment.
Select type of Tuner used.
to 4.
5 to 8.
Select Store in the SAM root menu after making any changes.
can reset the “Display operation ho urs” to “0”. So, this one does keeps up the lifetime of the display itself (mainly to compensate the degeneration behaviour).
lation.
2009-Dec-18
Alignments
Main Menu Sub-menu 1 Sub-menu 2 Sub-menu 3 Description
Development file ver­sions
Upload to USB Channel list To upload several settings from the TV to an USB
Download from USB Channel list To download several settings from the USB stick to
Development 1 file version Display parameters DISPT 4.0.8.11 Display information is for development purposes.
Acoustics parameters ACSTS 3.0.6.1
PQF - Fixed settings 1 “4.54.34.32.34”
PQS - Profile set 1 “4.57.34.32.34”
PQU - User styles 1 “4.56.34.32.34”
Development 2 file version 12NC one zip software Display information is for development purposes.
Initial main software
NVM version Q5431_0.4.3.0
Flash units SW Q5431_0.16.48.24
Personal settings
Option codes
Display-related alignment
History list
Personal settings
Option codes
Display-related alignment
stick
the TV.
EN 37Q548.1E LB 6.
2009-Dec-18
EN 38 Q548.1E LB7.

7. Circuit Descriptions

Circuit Descriptions
Index of this chapter:

7.1 Introduction

7.2 Power Supply
7.3 DC-DC Converter
7.4 Front-End
7.5 HDMI
7.6 Video and Audio Processing - PNX8543
7.7 Common Interface CI+
Notes:
•Only new circuits (circuits that are not published recently) are described.
Figures can deviate slightly from the actual situation, due to different set executions.
For a good understanding of the following circuit descriptions, please use the wiring, block (see chapter 9.
Block Diagrams) and circuit diagrams (see chapter
10. Circuit Diagrams and PWB Layouts).Where necessary, you will find a separate drawing for clarification.
7.1 Introduction
The Q548.1E LB chassis (platform name TV543/82) is a derivative from the Q548.1E LA chassis.
Main differences with the previous chassis are the application of:
an “edge-lit” LCD panel
a temperature sensor for temperature control
an FSP dual Power Supply Unit. The sets are equipped with Ambilight.
Only the Power Supply Units are described in this chassis. For all other circuitry, refer to the Q548.1E LA Service Manual.

7.1.1 Implementation

Key components of this chassis are:
PNX8543 Digital Colour Decoder
HD1816AF Hybrid Tuner
DRX3926K Demodulator
TDA9996 HDMI Switch
TPA3123D2PWP Class D Power Amplifier
PNX5120 Video Back-End Processor.

7.1.2 TV543 Architecture Overview

For details about the chassis block diagrams refer to chapter 9. Block Diagrams. An overview of the TV543 architecture can be found in Figure 7-1
.
2009-Dec-18
Figure 7-1 Architecture of TV543/82 platform
18670_200_090828.eps
090828

7.1.3 SSB Cell Layout

Circuit Descriptions
EN 39Q548.1E LB 7.
Figure 7-2 SSB layout cells (top view)
18540_201_090327.eps
091112
2009-Dec-18
EN 40 Q548.1E LB7.

7.2 Power Supply

All power supplies described below are a “black box” for Service. When defective, a new board must be ordered and the defective one must be returned, unless the main fuse of the board is broken. Always replace a defective fuse with one with the correct specifications! This part is available in the regular market. Consult the Service Spare Parts website for the order codes of the boards.

7.2.1 Specifications

Circuit Descriptions
Sets in this chassis use the “FSP202-5F01” dual-Power Supply Unit from FSP Technology Inc. In this Service Manual, no detailed information is available for design protection reasons.
The display used in the sets uses LEDs as backlight. The drivers for these LEDS are integrated on the PSUs.

7.2.2 Application Block Diagram

PSU 1
1M99
1M95
EMI-filter, PFC
(power fact. corr.),
3V3standby LED-driver part I
1316 Connector to backlight
1308
1350
1351
Interfacing between the 2 PWBs
1350
1M59
Main converter 12Vssb 24Vsound/bolt-on 18V_bolt-on LED-driver part II
1351
18670_201_090908.eps
Figure 7-3 Block Diagram PSU

7.2.3 Control

PSU 2
1M83
1M84
1319 Connector to backlight
090908
LED-Drive +Vbolt-on
18670_202_090908.eps
090908
Figure 7-4 Rise-and-fall sequence PSU

7.2.4 Connector Pin Assignments

1308 CN1
1M95
CN4
SND
Pin no.
1 N 3V3stdby +12V AL_I2C_
2 L Standby +12V GND GND GND
3 - GND1 GND1 AL_I2C_
4 - GND1 GND1 n.c. GND +3.3V
5 - GND1 BL_ON_
6 - +12V DIM +3.3V +3.3V +3.3V
7 - +12V Boost GND GND GND
8 - +12V n.c. - n.c. n.c.
9 - +Vsnd INVOK - n.c. n.c.
10 - GND_
11 - n.c. n.c. - Vbolt-on2 Vbolt-on2
12 - - n.c. - GND1 GND1
13 - - - - Vbolt-on1 Vbolt-on1
14 - - - - GND1 GND1
Connector
1M99
CN5
OFF
n.c. - n.c. n.c.
1M59
CN6
SCL
SDA
n.c. GND GND
1M83
CN7
AL_I2C_
SCL
AL_I2C_
SDA
1M84
AL_I2C_
AL_I2C_
CN8
SCL
SDA
The Power Supply Unit is controlled via a digital input signal consisting of the “STANDBY”, “DIM”, “BLON” and “BOOST” lines. When the LED driver outputs are activated, the PSU will generate an INVOK signal from LOW to HIGH. When the LED driver outputs are de-activated, the generated INVOK signal is LOW. The definitions of LOW and HIGH are:
LOW: < 0.4 V
HIGH: > 2.4 V.
2009-Dec-18
Connector
Pin no.
1 GND Vcc CC1A CA2
2 3V3s HV- CC2A CA2
3 BLON n.c. CC3A CC8B
4 STB HV+ CC4A CC7B
5 PWM-D - CC5A CC6B
6 Vref - CC6A CC5B
7 SCP - CC7A CC4B
8 B-V - CC8A CC3B
9 15V - CA1 CC2B
10 GND - CA1 CC1B
11GND---
12 37V - - -
13 37V - - -
1351
CN-S-1(-A)
1350
CN-P-1(-A)
1316 CN2
1319
CN3

8. IC Data Sheets

IC Data Sheets
EN 41Q548.1E LB 8.
This chapter shows the internal block diagrams and pin configurations of ICs that are drawn as “black boxes” in the
electrical diagrams (with the exception of “memory” and “logic” ICs).

8.1 Diagram SSB: DC/DC +3V3 +1V2 B01A, NCP5422AD (IC 7103)

Block Diagram
+
V
CC
+
+
+
+
+
+
0.25 V
A
5.0
IS+1
IS−1
IS+2
IS−2
8.6 V
7.8 V
70 mV
70 mV
+
S
Set
Dominant
R
1.0 V
Q
+
V
CC
BIAS
FAULT
E/A OFF
R
+
E/A1
OSC
CURRENT
SOURCE
OSC
PWM Comparator 1
0.425 V
PWM Comparator 2
GEN
CLK1
CLK2
RAMP1
0.425 V
FAULT
− +
FAULT
RAMP2
E/A OFF
+
+
E/A2
1.0 V
1.2 mA
RAMP1
S
Reset Dominant
R
FAULT
S
Reset Dominant
R
FAULT
non−overlap
non−overlap
FAULT
RAMP2
V
BST
V
BST
CC
CC
BST
GATE(H)1
GATE(L)1
GATE(H)
GATE(L)2
GND
2
Pin Configuration
GATE(H)1
GATE(L)1

Figure 8-1 Internal block diagram and pin configuration

V
COMP1
FB1
V
FB2
SO−16
16
N
A
C
W
45P 2 2
WWYL
A
GND
BST
IS+1
IS−1
V
FB1
1
COMP1
A= Assembly Location WL = Wafer Lot Y= Year WW = Work Week
GATE(H)2 GATE(L)2 V
CC
R
OSC
IS+2
IS−2
V
FB2
COMP2
COMP2
F_15400_129.eps
240505
2009-Dec-18
EN 42 Q548.1E LB8.
IC Data Sheets

8.2 Diagram SSB: DC/DC +3V3-Stdby +1V2-Stdby B01B, ST1S10PH (IC 7202/7222)

Block Diagram
Pin Configuration
2009-Dec-18
DFN8 (4x4)

Figure 8-2 Internal block diagram and pin configuration

PowerSO-8
I_18010_083.eps
130608
IC Data Sheets

8.3 Diagram SSB: DC/DC +3V3-Stdby +1V2-Stdby B01B, LD3985M (IC 7201)

Block Diagram
EN 43Q548.1E LB 8.
Pin Configuration
TSOT23-5L/SOT23-5L Flip-Chip

Figure 8-3 Internal block diagram and pin configuration

G_16290_084.eps
020206
2009-Dec-18
EN 44 Q548.1E LB8.
IC Data Sheets

8.4 Diagram SSB: Front End B02A, DRX3926K (IC 7303)

Block Diagram
RF AGC
Main
Tuner
2
C
I
Pin Configuration
VSSAL_AFE2
VDDAL_AFE2
PDP
PDN
48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33
49XI
50XO
51VSSAH_OSC
52VDDAH_OSC
53VDDH
54VSSH
55VSSL
56VDDL
57TDO
58TMS
59TCK
60TDI
61I2C_SDA2
62I2C_SCL2
63I2S_CL
64I2S_DA
123 45678 910111213 14 15 16
I2S_WS
VDDL
VSSL
SAW
Integrated Tuner
VDDAH_CVBS
SIF
GPIO1
MSTRT
MERR
VSSAH_CVBS
CVBS
VSSH
VDDH
IF AGC
DRXK
INP
MCLK
INN
VSSAH_AFE1
MD0
MVAL
ADCIF AMP
Presaw
Sense
VDDAH_AFE1
VDDAL_AFE1
MD2
MD1
VSSAL_AFE1
IF_AGC
RF_AGC
19
VDDL
VSSL
MD3
RSTN32
SAW_SW31
GPIO230
VSYNC29
VSSL28
VDDL27
VDDH26
VSSH25
I2C_SDA124
I2C_SCL123
MD722
MD621
MD520
MD4
VDDH18
VSSH17
DVB-T/QAM/ATV
Demodulator
Stereo Decoder
System Controller
DVB-T/QAM
FEC
DAC
DAC
MPEG-2 TS
CVBS
SIF
2
S Audio
I
2
C
I
GPIO
18440_300_090303.eps
090303
2009-Dec-18

Figure 8-4 Pin configuration

IC Data Sheets

8.5 Diagram SSB: PNX8543 - Power B03A-B03H, PNX8543 (IC7600)

Block Diagram
TS in from
channel decoder
TS out/in for
PCMCIA
DV-ITU-656
CVBS, Y/C,
RGB
Low-IF
SSIF, LR
Dual SPDIF
I2S
Dual HDMI
PNX8543x
CI/CA
VIDEO
DECODER
DIGITAL IF
AUDIO DEMOD
AND DECODE
AUDIO IN
HDMI
RECEIVER
SYSTEM
CONTROLLER
(8051)
MPEG
SYSTEM
PROCESSOR
DV INPUT
3D COMB
MPEG/H.264
VIDEO
DECODER
300 MHz
MIPS32 4KEc
CPU
MEMORY
CONTROLLER
PRIMARY
VIDEO
OUTPUT
AV-PIP
SUB-PICTURE
SECONDARY
VIDEO
OUTPUT
SCALER,
DE-INTERLACE
AND NOISE REDUCTION
AUDIO DSP
300 MHz
AV-D SP
DRAWING
ENGINE
DMA BLOCK
LVD S
VIDEO
ENCODER
AUDIO DACS
AUDIO OUT
LVD S for flat panel display (single or dual channel)
analog CVBS
analog audio
2
S
I
SPDIF
EN 45Q548.1E LB 8.
PWM
I2C
Pin Configuration
ball A1 index area
A
B
C
D
E
F
G
H
J
K
L
M
N
P
R
T
U
V
W
Y
AA
AB
AC
AD
AE
AF
AG
AH
AJ
AK
AL
AM
AN
AP
GPIO IR ADC UART I2C GPIO Flash
SPI
USB 2.0 CA
01 x22 x
426121018 26412 22308 20 28614
1917253 11 19 2771523513 21 29
PNX8543xEH
Transparent top view
PCI 2.2
32
34
33
31
18440_301_090303.eps
090303

Figure 8-5 Internal block diagram and pin configuration

2009-Dec-18
EN 46 Q548.1E LB8.
IC Data Sheets

8.6 Diagram SSB: Ethernet B05B, LAN9420 (IC7N04)

Block Diagram
PCI Host
LAN9420/LAN9420i
EEPROM (optional)
Magnetics
To Ethernet
PCI Bus
PCI Device
PCI Device
Pin Configuration
External
25MHz Crystal
GPIOs/LEDs
(optional)
2009-Dec-18

Figure 8-6 Internal block diagram and pin configuration

18561_300_090717.eps
090717

8.7 Diagram SSB: Class-D B06A, TPA3123D (IC 7L10)

Block Diagram
1F
LIN
RIN
1F
1F
BYPASS
AGND
IC Data Sheets
0.22 F
BSR
ROUT
PGNDR
PGNDL
LOUT
BSL
0.68 F
0.68 F
0.22 F
22 H
22 H
EN 47Q548.1E LB 8.
470 F
470 F
PVCCL
PVCCR
VCLAMP
GAIN0
GAIN1
1F
}
Control
Shutdown
Control
AVC C
SD
MUTE
Pin Configuration
PVCCL
SD
PVCCL
MUTE
LIN
RIN
BYPASS
AGND AGND
PVCCR
VCLAMP
PVCCR
TERMINAL
NAME
SD
RIN 6 I Audio input for right channel
LIN 5 I Audio input for left channel
GAIN0 18 I Gain select least-significant bit. TTL logic levels with compliance to AVCC
GAIN1 17 I Gain select most-significant bit. TTL logic levels with compliance to AVCC
MUTE 4 I
BSL 21 I/O Bootstrap I/O for left channel
PVCCL 1, 3 P Power supply for left-channel H-bridge, not internally connected to PVCCR or AVCC
LOUT 22 O Class-D 1/2-H-bridge positive output for left channel
PGNDL 23, 24 P Power ground for left-channel H-bridge
VCLAMP 11 P Internally generated voltage supply for bootstrap capacitors
BSR 16 I/O Bootstrap I/O for right channel
ROUT 15 O Class-D 1/2-H-bridge negative output for right channel
PGNDR 13, 14 P Power ground for right-channel H-bridge.
PVCCR 10, 12 P Power supply for right-channel H-bridge, not connected to PVCCL or AVCC
AGND 9 P Analog ground for digital/analog cells in core
AGND 8 P Analog ground for analog cells in core
BYPASS 7 O
AVCC 19, 20 P High-voltage analog power supply. Not internally connected to PVCCR or PVCCL
Thermal pad Die pad P
24-PIN (PWP)
I/O/P DESCRIPTION
2I
Shutdown signal for IC (low = disabled, high = operational). TTL logic levels with compliance to AVCC
Mute signal for quick disable/enable of outputs (high = outputs switch at 50% duty cycle, low = outputs enabled). TTL logic levels with compliance to AVCC
Reference for preamplifier inputs. Nominally equal to AVCC/8. Also controls start-up time via external capacitor sizing.
Connect to ground. Thermal pad should be soldered down on all applications to properly secure device to printed wiring board.
1 2 3
4 5 6 7 8 9
10 11 12
24 23 22
21 20 19 18 17 16
15 14 13
PGNDL PGNDL LOUT BSL AVC C AVC C GAIN0 GAIN1 BSR ROUT PGNDR PGNDR
18440_302_090303.eps
090303

Figure 8-7 Internal block diagram and pin configuration

2009-Dec-18
EN 48 Q548.1E LB8.
IC Data Sheets
2009-Dec-18

9. Block Diagrams

B
n
o
S
P
h
o n
3/8
G
5
5
p
P
h
o n
1
G50
p
1
M
7
1
4
p
epses
o

Wiring Diagram 40" (Edge LIT)

Block Diagrams
EN 49Q548.1E LB 9.
S ide
c o n r
o l
1317
8316
6
131
131
7
8319
1M84
1M84
LP 5/5 Dim 370 x25
CN3
Heatsink
1 M
8 3
8395
1M951M99
12p
11p
1M20
8p
1G51
51p
1G50
41p
1M59
7p
8171
1351
13p
CN-S-1
8351
1M01
1735
Woofer
4p
p
3
Y P
b P r
Temp
sensor
1M9
5
11p
CN4
8399
1M99
12p
CN5
FSP
CN1
1308
2p3
4p3
1 3 5 0
CN-P-1
SSB: TV 543/82
VGA
Conditionnal access
8350
8735
c e
2p3
Inlet
8408
Ethernet
1M10
5p
S e rvi
HDMI
USB
P h o
SVHS
no
8151
Cinch ( x3)
Temp sensor
1 M
7 1
4p
Fan control
1F
3p
A 1
1 FA2
3p
Fan control
8307
13 5
1
13P
CN-S-1-A
1 35
0
For a pinning overview see chapter 7 Circuit Descriptions
4p3
CN-P-1-A
PSU 1
For a pinning overview see chapter 7 Circuit Descriptions
LP 5
/
5 Dim 37
0 x2
5
6
10p
1
CN2
13
8684
FSP
PSU 2
8159
1M59
7p
CN6
14p
CN7
1M83
8584
14p
CN8
1M8
4
51p
41p
1M83
T-con
R
8150
8120
LED& Control
1M01
1M20
2009-Dec-18
L
USB
18670_400_090908.eps
091013

Block Diagram Video

VIDEO
FRONT END
B02A
1301
B05A
HD1816AF/BHXP
MAIN HYBRID
TUNER
HDMI
1
19
HDMI SIDE
CONNECTOR
1
19
HDMI 1
CONNECTOR
1
19
HDMI 2
CONNECTOR
1
19
HDMI 3
CONNECTOR
18 2
18 2
18 2
18 2
CRX2+
CRX2-
CRX1+
CRX1-
CRX0+
CRX0-
CRXC+
CRXC-
BRX2+
BRX2-
BRX1+
BRX1-
BRX0+
BRX0-
BRXC+
BRXC-
ARX2+
ARX2-
ARX1+
ARX1-
ARX0+
ARX0-
ARXC+
ARXC-
IF-OUT1
IF-OUT2
RF-AGC
1H03
1H01
1H00
1H02
1
3
4
6
7
9 10
12
1
3
4
6
7
9 10
12
1
3
4
6
7
9 10
12
1
3
4
6
7
9 10
12
72
71
69
68
66
65
63
62
42
41
39
39
36
35
33
32
23
22
20
19
17
16
14
13
10
11
3
7H11 TDA9996
SWITCH
RXB
RXA
HDMI
4302
4303
+5V-TUNER
VDDx_1V8
VDDO_3V3
VDDx_3V3
VDDH_3V3
3301
RXDRXC
C_+
D0_+
D0_-
D1_+
D1_-
D2_+
D2_-
C_-
1303
1
2
SAW 36M125
DRX2+
DRX2-
DRX1+
DRX1-
DRX0+
DRX0-
DRXC+
DRXC-
CRX2+
CRX2-
CRX1+
CRX1-
CRX0+
CRX0-
CRXC+
CRXC-
BRX2+
BRX2-
BRX1+
BRX1-
BRX0+
BRX0-
BRXC+
BRXC-
ARX2+
ARX2-
ARX1+
ARX1-
ARX0+
ARX0-
ARXC+
ARXC-
90
89
87
86
84
83
81
80
8,45,91,24, 75,95 4
46,55
15,21,34,40, 64,70,85,88
2 3
99
100 96
97
93
94
DRX2+
DRX2-
DRX1+
DRX1-
DRX0+
DRX0-
DRXC+
DRXC-
2364
2367
2306
5
2307
4
VDD_1V8 VDDO_3V3
VDDS_3V3
VDDH_3V3
33AA3306
33AC
5311
+5V-TUNER
2365
2368
7302 UPC3221GV
AGC AMPLIFIER
1
VCC
2
3
IN
4
AGC CONTROL
+3V3A
IF-AGC
RF-AGC
ANALOG IO - SCART 1&2
B04B
1
EXT 1
EXT 2
B04C
EXT 3
SIDE
7
11
15
16
20
21
SCART1
1
7
11
15
16
20
21
SCART2
YPBR / SIDE IO / S-VIDEO
10
15
5
1
6
11
VGA
CONNECTOR
PR
Y
PB
CVBS
I/O
5
SVHS IN
Block Diagrams
B05C
3303
7
3304
6
OUT
3305
14
7F03
8
7
11
7F04
7
7F05
8
1
2
3
7
12
9
2
3
4
1G22
1G20
1G37
1F01
1F02
1G30
19
16
15
20
19
15
11
20
16
13
14
1
2
PCMCIA
CONDITIONAL
PDP
PDN
IF-N
IF-P
1304
27M
7F02 74HC4053PW
16
MDX
5
1
9,10,11
7F06
PCMCIA
ACCESS
7303 DRX3926K
47
PD_P
48
PD_N
DEMODULATOR
39
40
49
XI
50
XO
34
IF_AGC
33
RF_AGC
+5V
CVBS-TER-OUT
Y_CVBS-MON-OUT-SC
7F01
AV1_STATUS
AV2-PB_SC2-B
AV2-PR_SC2-R
AV2-Y_SC2-G
AV2-BLK_LCD-SDA
H-SYNC-VGA
V-SYNC-VGA
FRONT-Y_CVBS
1K00
68P
17
18
33 51
52
SIF
CVBS
VDDL
VDDAL_AFE
REGIMBEAU_CVBS-SWITCH
AV1_ BLK
SC1-R
SC1-B
SC1-G
CVBS1
CVBS2
AV2-STATUS
R-VGA
G-VGA
B-VGA
AV3- PR
AV3-Y
AV3-PB
FRONT-C
RXC+
RXC-
RX0+
RX0-
RX1+
RX1-
RX2+
RX2-
MDO(0-7)
3311
44
3348
43
8,18,26,53
2,16,27,56 37
42
52
36,46
7K04-7K05 74LVC245APW
BUFFER
CA-MDI(0-7)
PCMCIA-VCC-VPP
FE-DATA(0-7)
7345
4314
4315
+3V3BVDDH
+1V2 +3V3AVDDAH_AFE1
+3V3EVDDAH_CVBS
+3V3DVDDAH_OSC
+1V2A
7F07-7F08
B03H
CONTROL
B03H
CONTROL
B03H
B03H
CONTROL
B03H
CONTROL
20
CA-MDO(0-7)
CVBS
CVBS-TER-OUT
Y-CVBS-MON-OUT
RREF-PNX85XX
EN 50Q548.1E LB 9.
PNX8543
B03
+3V3
SIF
7600 PNX85433EH/M2A
B03B
CA_MD0
CA_MDI
TNR_TSDI
B03E
F2
AI51
H3
AI44
TUN_CA
ANALOG VIDEO
B03B
LVD S
LOUT2_A_P LOUT2_A_N LOUT2_B_P LOUT2_B_N LOUT2_C_P LOUT2_C_N LOUT2_D_P LOUT2_D_N LOUT2_E_P
LOUT2_E_N LOUT2_CLK_P LOUT2_CLK_N
IREF_LVDS
A_P A_N B_P B_N C_P C_N D_P D_N E_P
E_N CLK_P CLK_N
AP18 AN18 AL18 AK18 AP19 AN19 AP20 AN20 AM20 AL20 AM19 AL19
AP22 AN22 AL22 AK22 AP23 AN23 AP24 AN24 AM24 AL24 AM23 AL23
AK19
RX51001A+
RX51001A-
RX51001B+
RX51001B-
RX51001C+
RX51001C-
RX51001D+
RX51001D-
RX51001E+
RX51001E-
RX51001CLK+
RX51001CLK-
RX51002A+
RX51002A-
RX51002B+
RX51002B-
RX51002C+
RX5100C-
RX51002D+
RX51002D-
RX51002E+
RX51002E-
RX51002CLK+
RX51002CLK-
VDDA-LVDS
PNX8543
H264
A3
3H64
CVBS1Y_P
J2
AI32
L2
AI22
N2
AI12
G4
AI41
L3
AI23
J3
AI33
N3
AI13
H1
AI42
K4
PC3_AI3
P4
PC1_AI3
M4
PC2_AI3
T1
HSYNCIN
T2
VSYNCIN
K1
PC3_AI1
P1
PC1_AI1
M1
PC2_AI1
H2
AI43
G1
AI54
B05A
A14
HDMI_RXC_B_N
A15
HDMI_RXC_B_P
B13
HDMI_RX0_B_N
B14
HDMI_RX0_B_P
A12
HDMI_RX1_B_N
A13
HDMI_RX1_B_P
B11
HDMI_RX2_B_N
B12
HDMI_RX2_B_P
C16
HDMI_RREF
HDMI_DV
USB 2.0
VDD
B03A
VDDA_3V3_AADC
VDDA_3V3_ADAC
VDD_3V3_LVDS
VDDA_HDMI_3V3_BIAS
VDD_3V3_SBPER
VDD_1V2_CORE
VDD_1V2_SBCORE
VDD_3V3_PER
VDD_1V8_DDR
CONROL
B03G
USB_FAULT
USB_DM
USB_DP
USB_RPU
USB_VBUS
PCI
B03G
MEMORY
B03F
M_IREF
M_VREF
M_DQ
PCI
M_A
AJ6
AK12
AK20
F16
AC6
AJ12
AF5
AJ21
AG30
B03G
AL16
AN16
AP16
3M21
AM17
3M23
AN17
PCI-AD<->NAND-AD
B03F
3B03
AA31 AB32
DDR2-D(0-15)
DDR2-A(0-12)
VDDA-DAC
VDDA-ADC
VDDA-LVDS
RREF-PNX85XX
+3V3-STANDBY
+1V2-PNX85XX
1V2-STANDBY
+3V3-PER
1V8-PMNX85XX
PNX8543 - CONTROL MIPS/FLASH/PCI
+5V
USB-OC
3M31
+3V3-PER
+3V3-PER
PNX8543 - SDRAM
+1V8-PNX85XX DDR2-VREF-CTRL
(0-12)
(16-31)
PNX5100 - LVDS IN/OUT
B08D
7C00 PNX5100EH/M2
B08D
AE20
AF20 AC20 AD20 AC19 AD19 AE19
AF19 AE18
PNX5100
AF18 AC18 AD18
AE17
AF17
FHD 100Hz
AC17 AD17 AC16 AD16 AE16
AF16 AE15
AF15 AC15 AD15
+T
7M00 NAND01GW3B2BN6F
NAND
FLASH
1G
12,37
VCC
7B01 EDE1116AEBG
SDRAM
J1
VDDL
J2
7B00 EDE1116AEBG
SDRAM
J1
VDDL
J2
VREF
LVD S RX
HD-NM
USB20-DM
USB20-DP
+3V3-NAND
+1V8-PNX85XX DDR2-VREF-DDRVREF
+1V8-PNX85XX DDR2-VREF-DDR
B08D
B08A
SUPPLY
B08B
LVD S TX
DDR2
VREF
1M09
D
A
1
2 3
4
B07B
E17
+3V3
E14
+3V3
AB20
+3V3
AA5
+1V2-PNX5100
L16
+1V8-PNX5100
P22
+1V2-PNX5100-DDR-PLL1
AB18
+3V3-PNX5100-LVDS-IN
J5
+1V2-PNX-TRI-PLL1
L5
+1V2-PNX-TRI-PLL2
T5
+1V2-PNX-TRI-PLL3
M22
+1V2-PNX5100-DLL
AE25
+3V3-PNX5100-DDR-PLL0
E15
+1V2-PNX5100-LVDS-PLL
B15
+3V3-PNX5100-LVDS-PLL
AE14
+1V2-PNX5100-CLOCK
AD14
+3V3-PNX5100-CLOCK
B08B
P24
PNX5100-DDR2-VREF-CTRL
PNX5100-DDR2-D(0-15)
PNX5100-DDR2-A(0-12)
CONNECTOR SIDE
SW UPLOAD
4321
DISPLAY INTERFACE
TX1
TX2
QUAD LVDS
1920x1080 100/120HZ
TX3
TX4
+VDISP-OUT
I2C
N.C.
I2C
PNX5100 - SDRAM
7C01 EDE5116AJBG
(0-12)
(16-31)
USB 2.0
JPEG
MP3
DDR2
SDRAM
VDDL VREF
7C02 EDE5116AJBG
DDR2
SDRAM
VDDL VREF
1G50
1
2
3
TO DISPLAY
1080p 50/60Hz
37
38
39
40
41
1G51
51
50
49
40
TO DISPLAY
11
1080p 100/120Hz
5
4
3
2
1
J1
+1V8-PNX5100
J2
PNX5100-DDR2-VREF-DDR
J1
+1V8-PNX5100
J2
PNX5100-DDR2-VREF-DDR
18560_403_090326.eps
090326
2009-Dec-18

Block Diagram Audio

AUDIO
FRONT END
B02A
1301
B05A
HD1816AF/BHXP
MAIN HYBRID
TUNER
HDMI
1
19
HDMI SIDE
CONNECTOR
1
19
HDMI 1
CONNECTOR
1
19
HDMI 2
CONNECTOR
1
19
HDMI 3
CONNECTOR
18 2
18 2
18 2
18 2
CRX2+
CRX2-
CRX1+
CRX1-
CRX0+
CRX0-
CRXC+
CRXC-
BRX2+
BRX2-
BRX1+
BRX1-
BRX0+
BRX0-
BRXC+
BRXC-
ARX2+
ARX2-
ARX1+
ARX1-
ARX0+
ARX0-
ARXC+
ARXC-
IF-OUT1
IF-OUT2
RF-AGC
1H03
1
3
4
6
7
9 10
12
1H01
1
3
4
6
7
9 10
12
1H00
1
3
4
6
7
9 10
12
1H02
1
3
4
6
7
9 10
12
RES FOR /32
72
71
69
68
66
65
63
62
42
41
39
39
36
35
33
32
23
22
20
19
17
16
14
13
10
11
3
7H11 TDA9996
HDMI
SWITCH
RXB
RXA
4302
4303
+3V3A
RXDRXC
VDDx_1V8
VDDO_3V3
VDDx_3V3
VDDH_3V3
D0_+
D0_-
D1_+
D1_-
D2_+
D2_-
3305
C_+
C_-
1303
1
2
SAW 36M125
DRX2+
DRX2-
DRX1+
DRX1-
DRX0+
DRX0-
DRXC+
DRXC-
CRX2+
CRX2-
CRX1+
CRX1-
CRX0+
CRX0-
CRXC+
CRXC-
BRX2+
BRX2-
BRX1+
BRX1-
BRX0+
BRX0-
BRXC+
BRXC-
ARX2+
ARX2-
ARX1+
ARX1-
ARX0+
ARX0-
ARXC+
ARXC-
90
89
87
86
84
83
81
80
8,45,91,24, 75,95 4
46,55
15,21,34,40, 64,70,85,88
2 3
99
100 96
97
93
94
DRX2+
DRX2-
DRX1+
DRX1-
DRX0+
DRX0-
DRXC+
DRXC-
2364
2367
2306
5
2307
4
VDD_1V8 VDDO_3V3
VDDS_3V3
VDDH_3V3
5311
2365
33AA3306
2368
33AC
7302 UPC3221GV
+5V-TUN
AGC AMPLIFIER
1
VCC
2
3
IN
4
AGC CONTROL
IF-AGC
RF-AGC
ANALOG - SCART 1&2
B04B
EXT 1
SCART1
EXT 2
YPBR / SIDE IO / S-VIDEO
B04C
DIGITAL
AUDIO
AUDIO OUT
AUDIO IN
EXT 3
AUDIO IN
SIDE
I/O
AUDIO IN
DVI -> HDMI
16
20
16
20
SCART2
OUT
L+R
L+R
L+R
Block Diagrams
PCMCIA
B05C
PCMCIA
CONDITIONAL
ACCESS
7303 DRX3926K
47
PDP
PDN
3303
7
6
OUT
+3V3A
3305
1F01
3
1
1
7
11
6
15
2
21
1F02
1
3
7
1
11
6
15
2
21
1G25
1G22
1G20
1G18
3304
2
4
6
5
3
5
8
2
3
1
IF-N
IF-P
1304
27M
AP-SCART-OUT-L
AP-SCART-OUT-R
AP-SCART-OUT-L
AP-SCART-OUT-R
AUDIO-IN2-L
AUDIO-IN2-R
AUDIO-OUT-L
AUDIO-OUT-R
AUDIO-IN3-L
AUDIO-IN3-R
AUDIO-IN5-L
AUDIO-IN5-R
HDMIB-RXC+
HDMIB-RXC-
HDMIB-RX0+
HDMIB-RX0-
HDMIB-RX1+
HDMIB-RX1-
HDMIB-RX2+
HDMIB-RX2-
48
39
40
49
50
34
33
PD_P
PD_N
XI
XO
IF_AGC
RF_AGC
1K00
DEMODULATOR
CVBS
3F00
3F02
7F00
A-PLOP
7G01
EF
7G00
A-PLOP
17
18
33 51
52
SIF
68P
MDO(0-7)
3311
44
3348
43
8,18,26,53
2,16,27,56 37
42
52
36,46
AUDIO-CL-L
AUDIO-CL-R
A-PLOP
A-PLOP
7K04-7K05 74LVC245APW
BUFFER
CA-MDI(0-7)
PCMCIA-VCC-VPP
FE-DATA(0-7)
7345
4314
+3V3BVDDH
+1V2VDDL +3V3AVDDAH_AFE1
+3V3EVDDAH_CVBS
+3V3DVDDAH_OSC
+1V2AVDDAL_AFE
B03C
7803-1/2
173
AUDIO-IN1-L
AUDIO-IN1-R
B03C
7803-3/4
8
14
B03C
AUDIO-IN4-L
AUDIO-IN4-R
20
+3V3
CA-MDO(0-7)
SIF
CVBS
PNX8543 - AUDIO AMPLIFIER
ADAC(7)
ADAC(8)
5
SPDIF-OUT-1
ADAC(5)
10
ADAC(6)
12
RREF-PNX85XX
3H64
B03
7H00 PNX85439EH/M2
B03B
CA_MD0
CA_MDI
TNR_TSDI
B03E
F2
AI51
H3
AI44
B03D
AL9
ADAC7
AL8
ADAC8
AN7
AIN_1_L
AP7
AIN_1_R
AK6
AIN_2_L
AL6
AIN_2_R
V1
SPDIF_OUT
AN11
ADAC5
AP10
ADAC6
AM6
AIN_3_L
AN6
AIN_3_R
AN5
AIN_5_L
AP5
AIN_5_R
AP6
AIN_4_L
AM5
AIN_4_R
B04H
A14
HDMI_RXC_B_N
A15
HDMI_RXC_B_P
B13
HDMI_RX0_B_N
B14
HDMI_RX0_B_P
A12
HDMI_RX1_B_N
A13
HDMI_RX1_B_P
B11
HDMI_RX2_B_N
B12
HDMI_RX2_B_P
C16
HDMI_RREF
EN 51Q548.1E LB 9.
PNX8543
TUNER_CA
ANALOG VIDEO
AUDIO
DIGITAL VIDEO IN
PNX8543
H264
USB 2.0
B03D
B03G
B03G
B03F
AUDIO
VREF_POS
VDDA_3V3_DAC
ADAC1
ADAC2
STANDBY
B03H
ADAC3
ADAC4
CONROL
USB_FAULT
USB_DM USB_DP
USB_RPU
USB_VBUS
PCI
MEMORY
M_IREF
M_VREF
AADC
PO_7
PO_6
PCI
M_DQ
M_A
5902
AN8
5900
AM9
AK9
AN14
AP13
AC5
AD1
AM12
AM11
AL16
AN16
AP16
3M21
AM17
3M23
AN17
PCI-AD24<->NAND-AD
3B03
AA31 AB32
DDR2-D(0-15)
DDR2-A(0-12)
CLASS-D
B06A
VDDA-AUDIO
VDDA-DAC
ADAC(1)
ADAC(2)
AUDIO-MUTE
PNX8543 - AUDIO AMPLIFIER
B03C
AUDIO-RESET
ADAC(3)
ADAC(4)
PNX8543 - CONTROL MIPS/FLASH/PCI
B03G
+3V3-PER
+3V3-PER
B03F
(0-12)
USB-OC
USB20-DM
USB20-DP
7M00 NAND01GW3B2BN6F
FLASH
PNX8543 - SDRAM
+1V8-PNX85XX DDR2-VREF-CTRL
7B01 EDE1116AEBG
SDRAM
7B00 EDE1116AEBG
+5V
3M31
NAND
1G
+T
12,37
J1 J2
SDRAM
(16-31)
J1 J2
A-STBY
3L17
7807-1 7807-2
+3V3-NAND
+1V8-PNX85XX DDR2-VREF-DDR
+1V8-PNX85XX DDR2-VREF-DDR
MUTE
A-STBY
AUDIO-RESET
1M09
1
2 3
4
1M10
1
2 3
4
5
7L10 TPA3123D2PWP
PVCC_L
PVCC_R
5
OUT-L
IN-L
CLASS D
POWER
AMPLIFIER
6
IN-R
OUT-R
2
SD
4
MUTE
A-PLOP
7830 TPA6111A2DGN
HEADPHONE
AMPLIFIER
5
SHUTDOWN
2
IN-1
6
IN-2
USB 2.0
CONNECTOR ON SSB
SW UPLOAD
4321
JPEG
MP3
TO USB 2.0
CONNECTOR SIDE
SW UPLOAD
JPEG
MP3
ONLY SSB 31391236443.3
VO_1
VO_2
VDD
B04B
B04C
1,3
10,12
22
15
1
7
8
5L07
5L08
7L03
STANDBY &
PROTECTION
+3V3
+AUDIO-POWER
LEFT-SPEAKER
RIGHT-SPEAKER
YPBR / SIDE IO / S-VIDEO
B04C
HP_LOUT
HP_ROUT
1G21
2
3
1
5L09
5L10
1735
1
2
SPEAKER L
3
4
SPEAKER R
1736
1
2
3
SUBWOOFER
(OPTIONAL)
HEADPHONE
OUT 3.5mm
18540_404_090311.eps
091014
2009-Dec-18

Block Diagram Control & Clock Signals

CONTROL + CLOCK SIGNALS
B05B
ETHERNET
1N00
ETHERNET
CONNECTOR
PCI-CLK-ETHERNET
B03G
RESET-ETHERNET
B03H
1N00
ETHERNET
CONNECTOR
PCI-CLK-ETHERNET
B03G
RESET-ETHERNET
B03H
OPTIONAL
B08
PNX5100
7C00 PNX5100EH/M2
CONTROL
B08C
PNX5100
PCI_XIO
B08C
DDR2
B08B
GPIO
B08C
B07B
DISPLAY INTERFACE
3P24
BACKLIGHT-IN BACKLIGHT-OUT
7N04 DP83816AVNGNOPB
ETHERNET
CONTROLLER
60
62
7N04 LAN9420
ETHERNET
CONTROLLER
16
15
AF24
AE13
27M
1CD0
AF13
L3
B08B
PNX5100-DDR2-D(0-31)
DDR2-A(0-12)
PNX5100-DDR2-CLK_P
P26
PNX5100-DDR2-CLK_N
P25
B23
B07A
DISPLAY INTERFACE (COMMON)
CONTROL
17
25M
1N02
18
61
IRQ-PCI
SSB_31391236443.1
120
25M
1N02
119
14
IRQ-PCI
SSB_31391236443.3
RESET-PNX5100
PCI-CLK-PNX5100
PNX5100 - SDRAM
J8
K8
PNX5100-BL-CTRL
PCI-AD(0-31)
PCI-AD(0-31)
B03H
B03G
7C01 EDE5116AJBG
7C02
EDE5116AJBG
SDRAM
B01B
Block Diagrams
B02A
FRONT END
B03G
B05C
PCMCIA
PCMCIA
CONDITIONAL
ACCESS
B03G
PNX8543 - CONTROL MIPS/FLASH/PCI
WP-NANDFLASH
AND KEYBOARD CONTROL
B03H
PNX8543 - STANDBY-CONTROL / DEBUG
B05A
HDMI
1K00
1
COMMON INTERFACE
68
USB 2.0
CONNECTOR
ON SSB
TO IR/LED PANEL
1
2
18
19
4x HDMI
CONNECTOR
7M00 NAND01GW3B2BN6F
19
TO PIN:
1H02-13 1H00-13 1H01-13 1H03-13
1H02-15 1H00-15
1H01-15 1H03-15
RESET-SYSTEM
CA-MDI(0-7)
PCMCIA-D(0-7)
PCMCIA-A(0-14)
NAND
FLASH
(1G)
1M09
1
2
3
4 3 21
4
1M20
1
2
3
4
5
6
7
8
ARX-DDC-CLK BRX-DDC-CLK
CRX-DDC-CLK
DRX-DDC-CLK
7303 DRX3926K-XK-A3
49
DEMODULATOR
27M
1304
50
32
MOCLKA
MDO(0-7) CA-MDO(0-7)
IRQ-CA
IRQ-PCI
NAND-AD(0-7) <-- PCI-AD(24-31)
7
9
7K04-7K05
7K03
7K00 7K01
TO 1M10 FOR USB 2.0
CONNECTOR SIDE
PCI-AD(24-31)
9 10 5
CA-MICLK
CA-DATADIR CA-DATAEN
CA-ADDEN
PCI-AD(0-14)
B03H
RC
LED2
+3V3-STAN D B Y
+5V
CEC
7M81
DETECT-12V
B01B
B01A
B03G
B04B
B04B
B04B
B04B
+3V3-STAN D B Y
7D05 NCP303LSN30G
2
INP
3
GND
7H09
CONTROL
7H11 TDA9996
57
SWITCH
12 31
61
79
OUTP
HDMI
LED1
1
EN 52Q548.1E LB 9.
FE-DATA(0-7)
FE-CLK
FE-VALID
FE-SOP
CA-MOCLK_VS2
PCI-AD(0-31)PCI-AD(0-31) PCI-AD(0-31)
XIO-ACK
XIO-SEL-NAND
IRQ-CA
IRQ-PC1
USB-OC
USB20-DM
USB20-DP
LIGHT-SENSOR
4D00
RC_uP
KEYBOARD
4D09
DETECT2
DETECT1
RESET-SYSTEM
AV1- BLK
AV2-BLK_LCD-SDA
AV1- STATU S
AV2- STATU S
RESET-STBY
CEC-HDMI
B03
PNX8543
7600 PNX85433EH/M2A/
TUN_CA
B03B
TNR_TSDI
B10
TNR_MICLK
C10
TNR_MIVAL
B9
TNR_MISTRT
H32
CA_MICLK
CA_MDI
A34
CA_VSN_0
H31
CA_MOCLK
CA_MDO
D31
CA_DATA_DIR
A31
CA_DATA_EN
B31
CA_ADD_EN
J34
CA_RDY
B03G
PCI_AD
A20
XIO_ACK
B20
XIO_SEL_0
B03G
L34
GPIO_3
U4
GPIO_2
AL16
USB_FAULT
AN16
USB_DM
AP16
USB_DP
B03H
AD2
P0_5
AN2
CADC_1
AF2
P1_0
AJ2
PWM_1
AJ3
PWM_0
AN3
CADC_0
AD3
P2_5
AD4
P2_4
AH3
P3_3
AH1
P3_5
AH2
P
AP2
CADC_2
AP1
CADC_3
AF3
RESET_IN
AG4
P1_2
B05A
RX
HDMI_RX
PNX8543
PCI
CONTROL
STANDBY
3_4
HDMI_DV
LOUT2_CLK_N
LOUT2_CLK_P
CLK_N
CLK_P
MEMORY
B03F
M_CLK_P
M_CLK_N
PLL_OUT
TRDY_CLK
RESET_SYS
GPIO_2
GPIO_6
GPIO_4
GPIO_5
UA_RX_0
UA_TX_1
XTAL_I
XTAL_O
SPI_CLK
SPI_CSB
SPI_SDO
SPI_SDI
M_DQ
M_A
P1_7
P6_4
P0_1
P6_5
P2_2
P2_7
P1_1
P2_6
P0_6
P0_7
P2_3
AL23
AM23
AL19
AM19
AB34
AB33
AP28
A30
AN28
U3
V2
L32
L31
AG1
AH5
AG2
AK2
AC1
W1
W2
AJ1
AK4
AK3 AJ4
AK1
AE1
AE4
AF1
AE5
AD1
AC5
AD5
B8D
PNX5100 - LVDS IN/OUT
7C00 PNX5100EH/M2
DDR2
B08B
PNX5100
RX51002CLK-
RX51002CLK+
RX51001CLK-
RX51001CLK+
B03F
PNX8543 - SDRAM
DDR2-D(0-31)(0-15)
DDR2-A(0-12)
DDR2-CLK_P
DDR2-CLK_N
B03G
PNX8543 - CONTROL MIPS/FLASH/PCI
PCI-CLK-OUT
PCI-CLK-PNX8543
WC-EEPROM-PNX5100_SPI-DI
PNX8543-LCD-PWR-ON_SPI-DI
B03H
PNX8543 - STANDBY-CONTROL / DEBUG
SDM
SPI-PROG
27M
1D00
SPI-SDI
REGIMBEAU_CVBS-SWITCH
AE16
AD16
AD19
AC19
7B00 EDE1116AEBG
7B01
EDE1116AEBG
J8
K8
3M30
PCI-CLK-PNX5100
3M46
RESET-SYSTEM
RXD-MIPS
TXD-MIPS
RXD-UP
TXD-UP
RESET-NVM
SPI-CLK
SPI-WP
SPI-CSB SPI-SDO
LAMP-ON-OUT
ENABLE-3V3
POWER-OK
AUDIO-RESET
AUDIO-MUTE
STANDBY
SDRAM
7D07
B02A
B04C
B07B
B01A
B04B
B03C
B06A
E18
E19
E20
E21
E10
E11
E12
E13
B08C
B03H
SPI-PROG
7D06 M24C64-WDW6P
8
7D09 M25P05-AVMN6P
6
3
1 5
2
B01B
2D08
SDM
2D07
EEPROM
(8Kx8)
512K
FLASH
B07B
DISPLAY INTERFACE
1G50
1M04
2
3
1
25
24
1G51
33
32
17
16
1M01
RES
1M99
1M95
TX1CLK-
TX1CLK+
TX2CLK-
TX2CLK+
TX3CLK-
TX3CLK+
TX4CLK-
TX4CLK+
B01B
DC / DC +3V3-STANDBY_+1V2-STANDBY
BACKLIGHT-OUT
B07A
BACKLIGHT-BOOST
N.C.
9
DISPLAY
8
DISPLAY
UART
SERVICE
CONNECTOR
3
1
FOR
FACTORY USE
2
ONLY
4
5
TO
6
POWER SUPPLY
7
9
TO
2
POWER SUPPLY
18560_405_090326.eps
TO
TO
091014
2009-Dec-18

Block Diagram I2C

I²C
PNX8543 - CONTROL MIPS/FLASH/PCI
B03G
7600 PNX85433EH/M2A
G32
SDA 3
D33
SCL 3
PNX8543
B03F
MEMORY
M_DQ
M_A
B05A
HDMI_DV
DDC_SDA_B
DDC_SCL_B
B03G
D15
C15
PCI
PCI_AD
SDA3
SCL3
ERR
13
DDR2-D
DDR2-A
PCI-AD
SSB BUS
400 kHz
PNX8543 - SDRAM
B03F
7B01 EDE1116AEBG
7B00 EDE1116AEBG
PNX8543 - CONTROL
B03G
MIPS/FLASH/PCI
7M00 NAND01GW3B2
3M19
3M18
SDRAM
FLASH
1G
+3V3-PER
DDC-SDA
DDC-SCL
3M27
3M26
B05A
3H01
+5V
Block Diagrams
HDMI
3H66
49 50
TDA9996
3H02
6
5
7H11
HDMI
MUX
ERR
23
3H65
EN 53Q548.1E LB 9.
FRONT END
B02A
SDA-SSB
SCL-SSB
ARX-5V
3H08
3H07
3H09
3H13
3H11
ARX-DDC-DAT
ARX-DDC-CLK
BRX-DDC-DAT
BRX-DDC-CLK
CRX-DDC-DAT
CRX-DDC-CLK
DRX-DDC-DAT
DRX-DDC-CLK
11
12
BRX-5V
3H10
30
31
CRX-5V
3H14
60
61
DRX-5V
3H12
78
79
1H02
16
15
1H00
16
15
1H01
16
15
1H03
16
15
HDMI
CONNECTOR 3
HDMI
CONNECTOR 2
HDMI
CONNECTOR 1
HDMI
CONNECTOR
SIDE
3399
3398
24 23
7303
DRX3926K-XK
DEMODULATOR
MICRONAS
ERR
27
+3V3B
3388
61
62
3365
TUNER BUS
400 kHz
SDA-TUNER
SCL-TUNER
3317
3316
76
1301
HD1816AF
MAIN
TUNER
ERR
34
PNX5100 - CONTROL / PCI / DEBUG
B08C
3CDD
3CDC
56
7CD0
M24C08
EEPROM
ERR
25
3CD8
3CD9
K1 K2
7C00
PNX5100EH
PNX5100
ERR15ERR
21
B08E
3CDA
L1
L2
3388
3CD9
B08B
PNX5100-DDR2-D(0-31)
PNX5100-DDR2-A(0-12)
PNX5100 - AMBILIGHT
+3V3
AMBILIGHT BUS
3365
SDA-AMBI-3V3
SCL-AMBI-3V3
5CE5
+3V3
PNX5100 - SDRAM
7C01 EDE5116AJBG
7C02 EDE5116AJBG
SDRAM
30 kHz
1CE2
T1.0A
1M59
3
1
2
4
5
7
6
TO AMBILIGHT
(OPTIONAL)
B03H
STANDBY
ERR
SDA 2
SCL 2
SDA 1
SCL 1
MC_SDA
MC_SCL
PO_1
53
B33
D32
H33
F33
AK5
AL5
AC1
SDA2
SCL2
ERR
14
SDA1
SCL1
RESET-NVM
SET BUS
100 kHz
3M91
SDA-SET
3M90
SCL-SET
STANDBY BUS
400 kHz
3M15
SDA-UP-MIPS
3M14
SCL-UP-MIPS
PNX8543 - STANDBY - CONTROL / DEBUG
B03H
3D46
SDA-UP-MIPS
3D45
SCL-UP-MIPS
+3V3-PER
3D56-1
7D09 M25P05
512K
FLASH
3D56-2
7D07
56
7D06
8
M24C64
EEPROM
(NVM)
+3V3-PER
3M93
3M92
+3V3-PER
3M25
3M24
+3V3-STANDBY
3D39
3D38
RES
+3V3-STANDBY
DC / DC +3V3-STANDBY_+1V2-STANDBY
B01B
1M99
4202
4201
PNX8543 - CONTROL MIPS/FLASH/PCI
B03G
11
10
RES
TO POWER SUPPLY
ANALOG IO - SCART 1&2
B04B
3F55
+3V3
RES
3F54
3F56
3F57
1M71
1
TEMPERATURE
3
TO
SENSOR
YPBR / SIDE IO / S-VIDEO
B04C
10
15
5
1
6
11
VGA
CONNECTOR
B03G
1G30
12
15
WC-EEPROM-PNX5100_SPI-DI
3G60
+5V
3G56
DATA - SDA
CLK-SCL
7G32
3G63
+3V3
3G61
56
7G31
M24C02
7
EEPROM
256x8
3G58
UA_RX_0
UA_TX_1
GPIO_4
GPIO_5
AG1
AH5
L32
L31
RXD-UP
TXD-UP
RXD-MIPS
TXD-MIPS
3D21
3D22
+3V3-PER
3M09
3M10
B04A
4E18
4E19
BOLT-ON
RXD
TXD
3M74
3M73
3M76
3M75
1M04
3
2
1
1M01
RES
3
1
2
4
FOR
FACTORY USE
ONLY
UART
SERVICE
CONNECTOR
2009-Dec-18
18560_406_090326.eps
091014

Supply Lines Overview

SUPPLY LINES OVERVIEW
+12V
+12V
GND1
GND1
BL-ON_OFF
DIM
BOOST
N.C.
PSU-2
INV_OK
3V3_ST
STANDBY
GND1
GND1
GND1
+12V
+12V
+12V
+VSND
GND_SND
B01B
1M99
11
22
33
44
55
66
77
88
99
1M95
11
22
33
44
55
66
77
88
99
10 10
11 11
B08a
1M99
1M95
5221
N.C.N.C.
SENCE+1V2-PNX5100
B01A
B03a
B01b
SENSE+1V2-PNX85XX
+12V
7103 NCP5422ADG
Dual
Synchronous
Step-Down
Controller
Block Diagrams
DC / DC +3V3-STANDBY_+1V2-STAND BY
+12VD
LAMP-ON-OUT
BACKLIGHT-OUT
BACKLIGHT-BOOST
POWER-OK
7201
IN OUT
COM
STANDBY
7202
52045203
VOLT.
REG.
7222
VOLT.
REG.
DC / DC +3V3_+1V2
5104
3108
14
7101-1
1
5101
7U01-2
2
7102-1
16
5103
7102-2
15
B03H
CONTROL
B07A
CONTROL
N.C.
B03H
CONTROL
+3V3-STAN D B Y
+1V2-STANDBY
B03H
CONTROL
+12V
6217
+5V
+5V5-TUN
+1V2-PNX5100
+AUDIO-POWER
SENCE+1V2-PNX5100
SENSE+1V2-PNX85XX
+12V
+12VF
12V/3V3
COVERSION
+3V3
+3V3F
5105
12V/1V2
COVERSION
+1V2-PNX85XX
B07a
B03a,g,h, B04a,B05a,
B03a
B01a,B02a, B04a,b
B02a, B03d,g,h, B04a,b,c, B05a,c, B07a
B02a
B03h,B08a
B03c,B06a
B01a
B01b
B01b
B01b
B01a
B01b
B01a
B01b
B01a
B03d
B03a
B03a
B01b
B03a
B01a
B01b
B03a
B03a
B02a, B03a,c,d,g,h, B04b,c,B05a,b,c, B07a,b, B08a,c,d,e
B03a,B08a
B03a,h
EN 54Q548.1E LB 9.
FRONT END
B02A
7308
IN OUT
COM
7309
IN OUT
COM
7307
IN OUT
COM
PNX8543 - POWER
B03A
+1V2-PNX85XX
+1V2-STANDBY
+3V3F
+3V3
PNX8543 - VIDEO STREAMS/LVDS OUTPUT
B03B
+3V3-PER
PNX8543 - AUDIO AMPLIFIER
B03C
+AUDIO-POWER
4801
3819
7802
+3V3
PNX8543 - AUDIO
B03D
+5V
PNX8543 - SDRAM
B03F
+1V8-PNX85XX
CONTROL
5304
5307
5306
5305
7315
7601
IN OUT
COM
5612
5600
5615
5621
5622
7801
7900
IN OUT
COM
3B47
3B48
3389
+3V3+3V3
+1V2
+1V2A
+5V+5V
3V3B
3V3A
3V3D
3V3E
+5V5-TUN+5V5-TUN
+5V-TUNER
ANTENNA-SUPPLY
+12V+12V
+1V2-PNX85XX
SENSE+1V2-PNX85XX
+1V2-STANDBY
+3V3F
+1V8-PNX85XX
+3V3-STANDBY+3V3-STANDBY
+3V3
+3V3-PER
RREF-PNX85xx
VDDA-LVDS
VDDA-AUDIOVDDA-AUDIO
VDDA-DAC
VDDA-ADC
VDDA-LVDSVDDA-LVDS
+3V3-PER
+AUDIO-POWER
RES
AUDIO-VDD
+3V3
+3V3+3V3
+5V
VDDA-AUDIO
VDDA-DACVDDA-DAC
+1V8-PNX85XX
DDR2-VREF-CTRL
DDR2-VREF-DDR
RES
B01a
B03a
B01b
B01b
B01a
B01b
B01b
B01a
B03a B01b
B01b
B01b
B01b
B01b
B01a
B01b
B01a
B01b
B01a
B03a
B01b
B01b
B03a
B01a
B01a
B01b
B01A
B03f,B05a
B03b,g,h
B05a
B03b
B03d
B03a
PNX8543 - CONTROL MIPS/FLASH/PCI
B03G
5M00
+3V3-PER
+3V3-STANDBY
+5V
5M84
5M88
PNX8543 - STANDBY-CONTROL/DEBUG
B03H
+1V2-PNX85XX
+1V2-PNX5100
+3V3-STANDBY
+3V3
+3V3-PER
+5V
BOLT-ON
B04A
+3V3-STANDBY
+5V
+12V
ANALOG IO - SCART 1&2
B04B
+5V
+3V3
+12V
YPBR / SIDE IO / S-VIDEO
B04C
+3V3
+5V
HDMI
B05A
+3V3
5H01
5H06
5H03
+1V8-PNX85XX
5H00
+3V3-STANDBY
+5V
+5V
1H02
HDMI 3
HDMI 2
HDMI 1
18
1H00
18
1H03
18
1H01
18
ETHERNET
PCMCIA
5N06
5N07
5K00
3K00
+T
CONNECTOR
CONNECTOR
HDMI SIDE
CONNECTOR
CONNECTOR
B05B
+3V3
B05C
+3V3
+5V
+3V3+3V3
+3V3-NAND
+3V3-PER
+3V3-STANDBY
+5V
1M20
+1V2-PNX8541
+1V2-PNX5100
+3V3-STAN D B Y
+3V3
+3V3-PER
+5V
+3V3-STANDBY
+5V
+12V
RES
+5V
+3V3
+12V
3V3
+
+5V
+3V3
VDDO_3V3
VDDS_3V3
VDDH_3V3
+1V8-PNX85XX
VDD_1V8
+3V3-STANDBY
+5V
+5V
RREF-PMX85XXRREF-PMX85XX
ARX-5V
BRX-5V
DRX-5V
CRX-5V
+3V3
+3V3-ET-DIG
+3V3-ET-ANA
+3V3
+3V3_BUF
+5V
PCMCIA-VCC-VPP
CLASS-D
B06A
B01b
5
8
B01a
B01b
B01b
B01a
B07a
B01b
B01a
B01a
B08a
B01a
B01a
B01a
TO IR/LED PANEL
DISPLAY INTERFACING (COMMOM)
B07A
4P26
+12VD
DISPLAY SUPPLY
B07B
7P02
7P03 PNX8543-LCD-PWR-ON_SPI-DI
PNX5100 - POWER
B08A
+1V2-PNX5100
+3V3
+3V3F
PNX5100 - SDRAM
B08B
PNX5100 - CONTROL / PCI / DEBUG
B08C
PNX5100 - LVDS IN / OUT
B08D
+3V3
PNX5100 - AMBILIGHT
B08E
+3V3
4P29
CC60
7C60
IN OUT
5C60
5C61
5C62
5C63
5C64
5C65
5C66
5C67
5C68
5C69
5C70
COM
3C20
3C22
+AUDIO-POWER+AUDIO-POWER
+3V3+3V3
+5V+5V
4P28
4P39
+VDISP-IN
RES
4P30
4P31
+12VD
+3V3+3V3
+VDISP-IN+VDISP-IN
+VDISP-OUT
+1V2-PNX5100
+1V2-PNX5100-CLOCK
+1V2-PNX5100-TRI-PLL1
+1V2-PNX5100-TRI-PLL2
+1V2-PNX5100-TRI-PLL3
+1V2-PNX5100-DDR-PLL1
+1V2-PNX5100-LVDS-PLL
+1V2-PNX5100-DLL
SENSE+1V2-PNX5100
+3V3
+3V3-PNX5100-LVDS-IN
+3V3-PNX5100-CLOCK
+3V3-PNX5100-DDR-PLL0
+3V3-PNX5100-LVDS-PLL
+3V3F
+1V8-PNX5100
+1V8-PNX5100+1V8-PNX5100
PNX5100-DDR2-VREF-CTRL
PNX5100-DDR2-VREF-DDR
+3V3+3V3
+3V3
+3V3
1M59
6
TO AMBI-LIGHT
(OPTIONAL)
18670_40x_090911.eps
B07b
B01b
B08b
090911
2009-Dec-18
Circuit Diagrams and PWB Layouts

10. Circuit Diagrams and PWB Layouts

10-LED: Microcontroller Block

EN 55Q548.1E LB 10.
owner.
is prohibited without the written consent of the copyright
All rights reserved. Reproduction in whole or in parts
M
F101
2102
100n
7
10K
2
3101-2
10K
10K
27
3116
3104-2
3104-33 6
10K
3130
F112
9106
RES
2103
10K
273105-2
10K
3 6
3105-3
11
8
+1V8
4u7
10K
27
3106-2
3105-4 4 5
10K
10K
1 8
3106-1
I110
RES
2118
100p
7116-2 A12 9101 E5 9102 F5 9103 F5 9104 F5 9106 H8 9107 A5 9108 A5 9109 A5 9110 B5 9111 A3 9112 B2 9113 B3 9114 B2 9119 H6 9121 G4 C140 B10 F101 A8 F102 F5 F103 H7 F104 F5 F105 D7 F106 B12 F107 C7 F108 D7 F109 G3 F112 G8 F116 A10 F117 B13 F118 C11 F120 A1 F121 A1 F122 A1 F123 A1 F124 B1 F125 B1 F126 B1 F127 B1 F128 B1 F129 B1 F130 B1 F131 B1 F132 B1 F133 E1 F134 F1 F135 E1 F136 F1 F137 F1 F138 F1 F139 F1 I110 G8 I111 G8 I113 G10 I114 G10 I115 G10 I124 E11 I125 E11 I126 F11
20
A
B
C
D
E
F
G
H
I
J
K
L
M
18
19
1101 E4 1105 B5 1M1A C1 1M2A G1 1M83 A1 1M84 E1 2101 A6 2102 A7 2103 A8 2104 B7 2105 B10 2106 B13 2107 B11
A
2108 B12 2109 D7 2110 D7 2111 G4 2112 H7 2113 H7 2114 F9 2115 F9 2116 F9 2117 F9 2118 H8 2119 H6
B
2120 H6 2121 H6 2122 F9 2123 F10 2124 F10 2125 B3 2126 F10 2127 B1 2128 B1 2129 B2 2130 F2 2131 F10
C
3101-2 D7 3101-3 D9 3101-4 E9 3102-1 D9 3102-2 D9 3102-3 E9 3102-4 D9 3103-1 E9 3103-2 G10 3103-3 G11 3103-4 G10
D
3104-1 D8 3104-2 E8 3104-3 E8 3104-4 D9 3105-1 E9 3105-2 D8 3105-3 E8 3105-4 D8 3106-1 E8 3106-2 D8 3106-3 E8 3107 C7
E
3108 C7 3109 D7 3110 D7 3111 B10 3112 D9 3113 D8 3114 E8 3115 E8 3116 E8 3117 E7 3118 E5 3119 F4
F
3120 F5 3123 C11 3124-1 E11 3124-2 E11 3124-3 E11 3124-4 E11 3125-1 F11 3125-2 F11 3125-4 F11 3126-1 F11 3126-2 F11
G
3126-4 F11 3127-1 F11 3127-4 F11 3128 E11 3129 E11 3130 G8 3131 G7 3132 H8 3133 H8 3134 A13 3135 A11 3136 A12
H
3137 B11 3138 B13 3139 B12 3140 C11 3141 C13 3142 F11
7101 A7 7102 E6 7110 F4 7116-1 B11
1%
1K5
RES
10K
1%1K5
RES
F118
RES
1K8 1%
45
1 8
3 6 1 8
27 45 27 45
1 8
1 8
3103-3
3
11975
7116-1 LM393PT
3
2
100R 100R 100R 100R 100R 100R 100R 100R 100R 100R
100R 100R
100R
100R 100R
6
15
10K
+3V3
I124
I125
I126
84
16
12 13
+3V3
3136
10n
2108
100n
2107
3139
1
PWM-CLOCK-BUF
SPI-CLOCK-BUF
SPI-DATA-RETURN
SPI-DATA-IN
SPI-LATCH
SPI-LATCH-2
TEMP-SENSOR
EEPROM-CS
BLANK-BUF
PROG
CONTROL-2
SCL
+3V3
1%1K5
F106
1K5 1%
12
13
14
10
+3V3
3135
F116
10K
10n
3137
2105
3111
-T
C140
+3V3
3140
+3V3
10K
10K
3 6
3106-3
3133
10K
10K
1 8
1 8
10K
RES
3104-4 4 5
3102-1
3104-1
3113
10K
10K
10K
RES
1 8
3114
3115
3105-1
RES
2115
2114
100p
I111
10K
10K
3132
10K
3101-33 6
3112
10K
100p
10K
10K
10K
3102-2 2 7
3102-4 4 5
10K
8
10K
3 6
45
3103-1
3102-3
3101-4
100p
2116
2117
10K
1
RES
RES
2123
100p
2122
2126
100p
100p
100p
2124
I113
3103-4 I114 I115
3103-2
4
100p
2
2131
3123
3124-4 3128
3129 3124-1 3124-2 2 7 3124-3 3125-1 3142 3125-2 3125-4 3126-2 3126-4
3126-1
3127-1 3127-4 4 5
100p
5
10K
7
10K
100K
7116-2 LM393PT
5
6
10n
47K
10K
TEMP-SENSOR
17
3134
RES
+3V3
8
7
4
F117
2106
RES
3138
RES
3141
RES
1
A
2
3
1
4
2
5
3
6
4
7
8 9
10
6
MICROCONTROLLER BLOCK OSRAM
B
A
C
B
D
E
C
F
IN
1M83
F120
1
F121
2
F122
3
F123
4
F124
5
F125
6
F126
7
F127
8
F128
9
F129
10
F130
11
F131
12
F132
13 14
15 16
1M1A
1 2
3
4 5 6 7
8
9 10 11 12 13 14
15 16
1u0
2127
+3V3
VLED1
VLED2
35V
2128
2129
10u
10u35V
+3V3
VLED1
VLED2
9111 RES
9113
RES
9112
9114
TEMP-SENSOR
33p
2125
TEMP-SENSOR
SPI-DATA-IN
CONTROL-1 CONTROL-2
BLANK
EEPROM-CS
PROG
CONTROL-1 CONTROL-2
EEPROM-CS
PROG
SCL
SDA
SCL
SDA
SCL SPI-DATA-RETURN
CONTROL-1 CONTROL-2
VLED1
9107 9108
9109 9110
1105
T1.5A
SPI-CLOCK
SDA
SPI-LATCH
PWM-CLOCK
+3V3
VLED1-F
D
7101
LD2985BM18R
1
3
1u0
2101
F107
F108
F105
INH BP
COM
+3V3
3108
3109
5
OUTIN
4
10n
2104
2
+3V3
10K
10K
3107
3110
100R
100R
G
100p
100p
2109
7102
LPC2103FBD48
H
E
OUT
1M84
F133
1
F135
2
F136
3
F139
4
F137
I
F
J
G
K
L
H
5
6
F138
7
F134
8
9 10 11 12 13 14
15 16
1M2A
1
2
3
4
5
6
7
8
9 10 11 12 13 14
15 16
VLED1
VLED2
+3V3
VLED1
VLED2
1u0
2130
SPI-CLOCK-BUF
SPI-DATA-OUT
SPI-DATA-RETURN
PI-LATCH
S
PWM-CLOCK-BUF
+3V3
BLANK-BUF
EEPROM-CS
TEMP-SENSOR
PROG
SPI-CLOCK-BUF
SPI-DATA-OUT
SPI-DATA-RETURN
SPI-LATCH
PWM-CLOCK-BUF
BLANK-BUF
EEPROM-CS
TEMP-SENSOR
PROG
+3V3
10K
3119
F109
2
3
RES
5
9121
100n
2111
1101
7110
NCP303LSN10T1
IN
RST
GND
NC
CD
16M9
9101
+3V3
1
4
3118
10K
RES
9102
9103RES 9104 RES
F104
+3V3
10K
3120
7
19
VSS
11
X1
MICRO-
12
CTRL
X2
20
RTXC1
25
RTXC2
26
RTCK
4
VBAT
F102
27
DBGSEL
6
RST
VDD_1V8
5
+3V3
+1V8
2120
2119
100n
31
43
VSSA
Φ
P0.0|TXD0|MAT3.1
P0.1|RXD0|MAT3.2
P0.2|SCL0|CAP0.0 P0.3|SDA0|MAT0.0 P0.4|SCK0|CAP0.1
P0.5|MISO0|MAT0.1
P0.6|MOSI0|CAP0.2
P0.7|SSEL0|MAT2.0
P0.8|TXD1|MAT2.1
P0.9|RXD1|MAT2.2 P0.10|RTS1|CAP1.0|AD0.3 P0.11|CTS1|CAP1.1|AD0.4
P0.12|DSR1|MAT1.0|AD0.5
P0.13|DTR1|MAT1.1
P0.14|DCD1|SCK1|EINT1
P0.15|RI1|EINT2
P0.16|EINT0|MAT0.2
P0.17|CAP1.2|SCL1
P0.18|CAP1.3|SDA1 P0.19|MAT1.2|MISO1 P0.20|MAT1.3|MOSI1 P0.21|SSEL1|MAT3.0
P0.22|AD0.0 P0.23|AD0.1 P0.24|AD0.2 P0.25|AD0.6 P0.26|AD0.7
P0.27|TRST|CAP2.0
P0.28|TMS|CAP2.1 P0.29|TCK|CAP2.2
P0.30|TDI|MAT3.3
P0.31|TDO
VDD_3V3
VDDA
42
17
40
9119
F103
100n
100n
2121
2113
2110
13 14 18 21 22 23 24 28 29
30 35 36 37
41 44 45 46 47 48
1 2
3 32 33 34 38 39
8
9 10 15 16
100n
3117
22R
3131
100R
2112
100n
123 45678 9 10111213
N
N
1X03
REF EMC HOLE
2008-06-10
2008-08-08
2008-10-24
O
P
A2
090910
O
345
1
2
P
1
2
4
5
6
7
8
103
119
12
13
14
CLASS_NO
2008-08-08
2008-10-24
NAME
Peter Van Hove
2
3
15
SETNAMECHN
DRIVER 6LED OSRAM
2K9
SUPERS.
2008-06-02
DATECHECK
16
17
8204 000 8884
C
ROYAL PHILIPS ELECTRONICS N.V. 2008
18
130
19
1
2
3
13
20
18670_600_090910.eps
2009-Dec-18
Circuit Diagrams and PWB Layouts

10-LED: Microcontroller Block

EN 56Q548.1E LB 10.
1
A
123 45678
32 8
4
5
6
7
10
11
12
13 19
14
15
169
9 10111213
MICROCONTROLLER BLOCK OSRAM
9209
3209
9211
3211
9213
74HCT125PW
F205
F206
RES
74HCT125PW
F207
RES
2
1
7201-4
74HCT125PW
12
5
4
7201-3 74HCT125PW
8
INPUT BUFFER
9208 RES
+3V3
7201-1
14
EN
7
9210 RES
+3V3
EN
+3V3
7201-2
14
EN
7
RES9214
+3V3
14
EN
7
3
100p
22172218
100p
6
100p
2219
9
F208
10
A
B
C
B
PDTC144EU
1
D
PDTC144EU
C
1
+3V3
10K
3213
7212
7209
7210
PDTC144EU
3
2
3
2
10K
3203
F203
RES
3205
10K
5
D
6
C
1
S
3 11
W
7214
VCC
(64K)
M95010-WDW6
GND
+3V3
2214
100n
+3V3
33p
2201
8
2
Φ
Q
3204
7
HOLD
4
+3V3
10K
1K0
E E
+3V3
33p
2203
D
F
G
1K0
RES
100p
2220
E
H
F
I
+3V3
17
18
20
2201 B8 2202 C8 2203 D8 2209 B2 2210 G6 2211 I6 2214 A6 2215 F7 2216 F7
A
2217 B12 2218 C12 2219 D12 2220 E9
3121 D9 3203 B5 3204 B7 3205 C5 3207 B9 3209 C9 3210 B3
B
3211 C9 3212 D11 3213 B3 3214 H6 3215 H6 3216 H6 3217 H6 3218 H6 3219 B11 3220 C11 3221 H11 3222 I8
C
3223 C11 3224 H11
6216 I8 7201-1 A10 7201-2 C10 7201-3 D10 7201-4 B10 7209 B2 7210 C2 7212 B3 7214 B6 7215 G7
D
9208 A10 9209 B9 9210 B10 9211 C9 9212 C10 9213 D9 9214 D10 F202 B3 F203 C5 F204 H6 F205 B10
E
F206 C10 F207 C10 F208 D10 F209 H11 F210 G9 F211 G9 F212 G9 F213 H9 F214 H9 F215 H9
F
A
B
C
D
F
G
H
I
J
K
is prohibited without the written consent of the copyright
All rights reserved. Reproduction in whole or in parts
owner.
L
M
N
O
P
G
H
I
123 456
12
7215
TLC5946PWP
2210
33p
RES
3218 3215
1K2
3216
3214
+3V3
3
5
6 15
7 8
F204
1K2
100R
10K
28
VCC
Φ
LED DRIVER
25
2
6
27
3
4 5 24
GSCLK
BLANK
MODE
IREF
XLAT
SCLK SIN SOUT
XHALF
GND GND_HS
PWM CONTROL
OUT
VIA
1
29
30
31
XERR
32
7
0
8
1
9
2
10
3
11
4
12
5
13
6
14
7
15
8
16
9
17
10
18
11
19
12
20
13
21
14
22
15
2326
33
3222
470R
+3V3
F210
F211
F212
F214
F215
F209
+3V3
3K3
3K3
3221
3224
7 8 910111213
CLASS_NO
SETNAMECHN
DRIVER 6LED OSRAM
2
2008-08-08
3
2008-10-24
Peter Van Hove
NAME
9
10
11
12
13
14
CHECK
SUPERS.
DATE
16
2K9
2008-06-02
C
17 18
G
H
I
8204 000 8884
23
ROYAL PHILIPS ELECTRONICS N.V. 2008
130
J
K
L
M
N
O
2008-06-10
1
2008-08-08
2
2008-10-23
3
P
A2
20194
18670_601_090910.eps
090910
2009-Dec-18

10-LED: LED Block

Circuit Diagrams and PWB Layouts
EN 57Q548.1E LB 10.
A
B
C
D
E
F
G
H
K
All rights reserved. Reproduction in whole or in parts
is prohibited without the written consent of the copyright
owner.
L
M
N
1
3
4
5
123
6
8
9
10
4567
11
8
12 132
9
14
10 11
LED OSRAM
A
9307
9308
B
VLED2
9309-4
9309-1
1 8
45
7003
LRTB-GFTG
RED
3
GREEN
BLUE
65
4
21
5
9320-1 81
5
3
F343
LRTB-GFTG
RED
GREEN
BLUE
7000
6
RED
GREEN
4
21
BLUE
VLED1-F
10K
3332
VLED1-F
3326
10K
VLED1-F
3327
3330
RED
GREEN
BLUE
F307
7307 BC847BW
F308
F303
3328
1K0
10K
3333
1K0
10K
7305 BC847BW
7306 BC847BW
F305
9317
F302
9305-445
1 8
9305-1
9306-336
Place jumper 9314, 9316, 9317
9314
F304
9316
if VLED < 17V
9301
9302
C
F341F340
D
I
J
3338
560R
3340
560R
3343
560R
E
3352
560R
3355
560R
3369
560R
3370
560R
3371
F
560R
3372
560R
3373
560R
3374
560R
F342
3336
390R 3337
390R
3347
1K5 3350
1K5 3353
1K5 3356
1K5 3384
1K5 3385
1K5 3386
1K5
3388
1K5 3389
1K5 3390
1K5
3339
390R
G
H
9318-1
9318-3
6
9318-4
9310-2
27
18
3
45
RED
GREEN
BLUE
VLED1-F
3301
3303
10K
10K
VLED1-F
3306
10K
VLED1-F
3307
3309
9319-1
1 8
3302
1K0
10K
10K
9303-445
3 6
9303-3
1 8
9303-1
9319-445
9319-3
3 6
7317 BC847BW
3305
1K0
F330
9312-33 6
9304-11 8
45
9304-4
9325
F327
7316 BC847BW
9312-11 8
7005
LRTB-GFTG
RED
GREEN
3
BLUE
I
15
65
4
Place jumper 9325, 9326, 9327
if VLED < 17V
1 8
21
R
G
B
9315-1
390R
390R
390R
390R
16
12
3335
3345
3348
3351
9313-2
9313-445
9313-1
1 8
27
G
B
F344
B
3310
3313
3314
3316
3317
3318
3319
3322
3323
F347
17
13
R
F345
F346
RG
1K5
1K5
1K5
1K5
1K5
1K5
1K5
1K5
1K5
3357
560R
3358
560R
3359
560R
3360
560R
3361
560R
3363
560R
3364
560R
3365
560R
3366
560R
3367
560R
3368
560R
F348
9311-33 6
9311-11 8
9310-2 B8 9310-4 B8 9311-1 H13 9311-3 H13 9311-4 H12 9312-1 B10 9312-3 B10 9312-4 B10 9313-1 B12 9313-2 B12 9313-4 B12 9314 G5 9315-1 C12 9315-2 C12 9315-4 C12 9316 H5 9317 F5 9318-1 C8 9318-3 C8 9318-4 C8 9319-1 D9 9319-3 D9 9319-4 D9 9320-1 D7 9320-2 D7 9320-4 D7 9325 F10 9326 G10 9327 H10 F302 G5 F303 G4 F304 H5 F305 H5 F307 F5 F308 F4 F325 F10 F326 F9 F327 G10 F328 G9 F329 H10 F330 H10 F340 D1 F341 D1 F342 D1 F343 D2 F344 D12 F345 D12 F346 D13 F347 G12 F348 G13 F349 G13
20
A
B
C
D
E
F
G
H
I
J
K
L
M
N
18
F349
197
3301 F9 3302 F9 3303 F9 3304 G9 3305 G9 3306 H9 3307 H9 3308 H9 3309 I9 3310 D12 3311 D12
A
3312 E12 3313 E12 3314 E12 3315 E12 3316 E12 3317 F12 3318 F12 3319 F12 3320 F12 3321 G12 3322 G12 3323 G12
B
3325 G4 3326 H4 3327 H4 3328 G4 3330 I4 3331 F4 3332 F4 3333 H4 3334 F4 3335 D12 3336 D2 3337 D2
C
3338 D1 3339 D2 3340 D1 3341 D1 3342 E2 3343 D1 3344 D1 3345 D12 3346 E1 3347 D1 3348 E12
D
3349 E1 3350 E1 3351 E12 3352 E1 3353 E1 3354 D13 3355 E1 3356 E1 3357 D13 3358 E13 3359 E13 3360 E13
E
3361 E13 3362 E13 3363 F13 3364 F13 3365 F13 3366 F13 3367 G13 3368 G13 3369 F1 3370 F1 3371 F1 3372 F1
F
3373 F1 3374 G1 3384 E1 3385 F1 3386 F1 3387 F1 3388 F1 3389 F1 3390 G1 3391 G1
7000 C2
G
7001 C3 7002 C4 7003 C6 7004 C8 7005 C11 7305 G4 7306 H5 7307 F4 7315 G9 7316 H10 7317 F9 9301 C1
H
9302 C1 9303-1 C10 9303-3 C10 9303-4 C10 9304-1 E10 9304-2 E10 9304-4 E10 9305-1 C6 9305-2 C6 9305-4 C6 9306-1 D5 9306-3 D5
I
9306-4 D5 9307 A6 9308 A6 9309-1 B6 9309-2 B6 9309-4 B6 9310-1 B8
1
2
3
O
P
1 8
2
4
5
456
63
7
9
7 8 910
CHN
CLASS_NO
11
12
SETNAME
13
DRIVER 6LED OSRAM
2008-08-08
2
3
2008-10-24
NAME
Peter Van Hove
10 18
11
12
13
1514
SUPERS.
DATECHECK
16
2K9
2008-06-02
17
8204 000 8884
C
ROYAL PHILIPS ELECTRONICS N.V. 2008
130
19
33
O
1
2008-06-10
2008-08-08
2
2008-10-24
3
P
A2
20
18670_603_090910.eps
090910
2009-Dec-18

10-LED: LED Drive

Circuit Diagrams and PWB Layouts
EN 58Q548.1E LB 10.
1
45
67
8 20
9
10
A
1
B
C
A
D
B
2 3 456
LED DRIVE
RED
GREEN
BLUE
RED
GREEN
BLUE
RED
GREEN
BLUE
RED
GREEN
BLUE
E
F
C
G
D
11
1312
142 3
15
17
18 1916
A
7
8
9
10
1M3A E2 1M85 D2
3536 E9 3537 E9 3538 E7 3539 E9 3540 E7 3541 E8 3542 E9 3543 E7 3544 E8 3546 E7 3547 E8 3549 F7
A
3550 E8 3552 F7 3553 F8 3555 F7 3556 F8 3569 F7 3570 F7 3571 G7 3572 G7 3573 G7 3574 G7 3584 F8
B
3585 F8 3586 F8 3587 G8 3588 G8 3589 G8 3590 G8 3591 G8
7006 A2 7007 A4 7008 A5 7009 A6
C
B
C
D
E
F
G
D
H
J
K
All rights reserved. Reproduction in whole or in parts
is prohibited without the written consent of the copyright
owner.
L
M
H
E
I
F
E
I
F
J
K
3588
G
1K5
G
L
12
3
4
5678 910
M
NN
O
CLASS_NO
EMANTESNHC
O
P
P
SUPERS.
3
4
5
67
8 121112
9
10
13
14
15
16
17
2009-Dec-18
C
18
19
20
18670_603_090910.eps
090910

Layout 10-LED Ambilight

2125
9109
9111
9112
9113
2211
3216
3221
6216
3222
2203
1105
9212
3211
9208
3219
3207
2217
9209
3223
2219
2201
2220
7001
9213
3342 3339
3374
3338
3369
3340
3373
3343
3372
3346
3371
3349
3370
3352 3355
7000
3337 3336
1M83 1M841M85
9110
9114
2130
9107
2202
9302
3385
3389
3384
3390
3121
3391
3356 3350
3386
3212
9214
3347
3387 3388
3344
3220
2218
9210
7201
3353
3341
3209
9301
9211
9108
Circuit Diagrams and PWB Layouts
2109
3107
3108
3109
3128
3110
2110
3224
3214
2216 2215
3215
3218
7215
2210
3325
3326
3328
3217
9316
9314
7305
21282129
2101
2102
2103
7101
2104
3332
3331
3334
9308 9307
9317
3327
3333
3330
7307
7306
9305
9309
9306
3103
3124
2131
7002
9103
3101
3142
9104
3129
I113
1101
I114
I115
3130 2120
2123
7102
3102
2114
3118
9101
3132 3133
I110
9102
2119
I111
EN 59Q548.1E LB 10.
9313
3357
3358
3359
3367
3363
3366
3368
3313
3311
3312
3315
3322
3321
3318
3323
7005
3362
3360
3361
3354
3345
3348
3351
3310
3335
3572
3573
3569
3574
3570
3571
3555
8204_000_88741_GREEN_1
8204_000_88843_GREEN_1
8204_000_88741_RED_1
8204_000_88843_RED_1
9311
8204_000_88741_BLUE_1
8204_000_88843_BLUE_1
7006
7007
3552
7008
3591
3587
3588
3553
3590
3589
3586
3549
3546
3543
3540
3538
3556
3550
3584
3585
3541
3547
3544
3539
3536
3537
7009
3542
3364
3120 3119
9121
3127
3106
3117
3114
3113
7110
2111
2117 2116
3115
3131
3126
2126
9106
2112 3116 9119
2113
2124 2121
3104
2122
3125
3105
2115
2118
3112
2209
7210
7209
3213
7212
2214
3204
3210
7214
7003
3203
3205
3136
3138
C140
2106
3139
3111
2108
3137
2105
2107
3135
3140
3134
3123
3141
7116
9320
9318
9310
3306
9326
7004
2127
3304
3309
3307
3308
3301
3302
3303
3305
9325
9327
7315
7316
7317
9303
9312
3365
9315
3317
3316
3314
3320
3319
9304
9319
Top-side View
3104 313 6309.2
F135
F346
F347F348 F349
F3
45
F344
Bottom-side View
F132
F107 F108
F215
F214
F116
F213
F326
F328
F330
F325
F327
F329
F106
F118
F133
F202 F203
F136
F209
F109
I126
F134
F112
F117
F105
F104
I124
I125
F103
F102
F130
F137
F212
F101
F308
F307
F210
F305
F211
F303
F304
F204
F302
F123
F127
F139
F126
1M1A1M2A1M3A
F131
F207
F129
F138
F208
F125
F205
F120
F122
F128
F121
F124
F206
F340
F343
F342
F341
18670_605_090911
090911
2009-Dec-18

SSB: DC/DC +3V3 +1V2

Circuit Diagrams and PWB Layouts
EN 60Q548.1E LB 10.
C
D
G
H
owner.
All rights reserved. Reproduction in whole or in parts
is prohibited without the written consent of the copyright
19
20
A
B
C
A
2107 B6 2108 B5 2109 C6 2110 C8 2111 C8 2112 C9 2113 C7
2
2114 C8 2115 D7 2116 E9 2117 E9 2118 E9 2119 E9 2120 E8
2121 E8 2122 B11 2123 B11 2124 C12 2125 E12 2127 E12 2128 F7
2129 F8 2130 F7 2131 F7 2132 F5 2133 H2 2134 H2
4
2140 C9 2141 C9
3100 B2 3101 B2 3102 C2 3103 C1 3105 C1
5
3106 C2 3107 C3 3108 B4 3109 C5 3110 C5 3113 C5 3114 C5
3115 C6 3116 C5 3117 D1 3118 E1 3119 E4 3120 E4 3121 E4
6
3122 F2 3124 C6 3125 D6 3126 D6 3127 D6 3128 D5 3129 D5
7
3130 E5 3131 E6 3132 C7 3133 C8 3134 C8 3135 D8 3136 D7
3137 D6 3138 E9 3139 E7 3140 E8 3141 E8 3142 E6 3143 E6
8
3144 F8 3145 E11 3146 E10 3147 F11 3148 F10 3149 F11 3150 F11
9
3151 G11 3152 G11 3153 F8 3154 F8 3155 F8 3156 F7 3157 F7
3158 F3 3159 H1 3160 H1 3164 D4
5100 B8 5101 C8 5102 E82135 H2
10
5104 B11 5105 E11 6100 E6
6102 G7 6103 F7
11
6104 B2 7100-1 C2 7100-2 B1
7101-2 C6 7102-1 C7 7102-2 D6
7103 C4 7104 D2 7105-1 E3 7105-2 E4 7106 F7 7107-1 E10 7107-2 F10
12
F100 C4 F101 C7 F102 D6 F103 D6 F104 E7 F105 F4 F106 C2
1
2100 B2
A
2101 B4 2102 D1 2103 D4 2104 B6 2105 D6 2106 E5
133
F107 B7 F108 D10 F109 E10 F110 F10 F111 E12 F112 D9 F113 F7
F114 D4 F115 D4 I100 B3 I101 B1 I102 C1 I103 B4 I106 D4
I107 D3 I108 D4 I109 C2 I111 D5 I112 B5 I113 C5 I114 D8
15
I115 C5 I116 D5 I117 D5 I118 D6 I119 D6 I120 D6 I121 C6
I122 E55103 E8 I124 E4 I125 F3 I126 F5 I127 F26101 F5 I128 D1 I129 E6
16
I130 F7 I131 E8 I132 E8 I133 F87101-1 B5 I134 F8 I136 E9 I137 E11
1714
I138 F11 I141 H2 I143 C8 I144 C8 I146 E5 I147 F7 I148 C8
18
B
678123 45
910111213
14
DC / DC +3V3_+1V2
A
D
25V
220u
+12VF
+12V
+3V3
+1V2-PNX85XX
+3V3F
SENSE+1V2-PNX85XX
ENABLE-3V3
PROT-DC
B
E
F
C
G
D
H
E
I
J
F
K
G
L
RES
B
E
F
C
D
E
I
4
RES
BC847BPN
7100-2
I101
3
10K
3103
I102
RES
10K
3105
RES
2102
GND-SIG
I128
3117
33K
3118
GND-SIG
J
F
3100
22K
100n
2100RES
RES 3101
RES
5
22K
6104RES
I100
BAS316
RES
I109
F106
3102
6
RES
100R 7100-1 BC847BPN
1
3
2
3122
10K
3V3
22K
10K
3107
3106
RES
RES
BC857BS
I127
0V
2
100n
7104 BC847BW
1
33K
GND-SIG
3V3-ST
RES
RES
7105-1
DETECT1
GND-SIG
NCP5422ADR2G
F100
F114
F115
I106
I107
I108
100n
2103
GND-SIG
GND-SIG
RES
I124
RES
1
6
4
7105-2
BC857BS
2
I125
3
RES
3158
100K
10R
3108
I103
1u0
2101
22R
3109
7103
14
Φ
VCC
4
BST
7
1
VFB
10
2
8
1
COMP
9
2
ROSC
39K
3164
GND-SIG
3119
330R
RES
3120
5
F105
1
H1
GATE
2
L1
16
H2
GATE
15
L2
5
+1
6
-1
IS
1213
+2
11
-2
GND
3
I146
RES
1K0
3121
1K0
I126
6101RES
PDZ9.1-B
K
12V UNDER-VOLTAGE DETECTION
7101-1
I112
22R3110
I115
I116
7 8
FDS6930B
2
1
2108
3n3
I113
4
4R7
4R7
3113
3114
3115
3116
22R
I117
I118
I120
I111
2105
3128
2K7
3129
I122
1K0
2106
100n
3130
2K7
+12VF
2132
5
3
22R
3126
100n
F103
3131
BAS316
6100
1u0
6
7101-2
FDS6930B
3124
4R7
3125
4R7
1K0
10u
22u
RES
2107
2104
VSW
I121
2
2109
3n3
7102-2
56
4
3
I119
FDS6930B
F102
2K2
3127
3137
6K8
F104
2K2
I129
3142
68R
3143
68R
I147
6103
I130
3
7106
BC817-25W
2
BOOSTER
+1V2-PNX85XX
7 8
FDS6930B
1
BAS316
F107
12V/3V3 CONVERSION
F101
22R
7102-1
3136
6K8
3132
RES
I144
1n0
RES
I114
1n0
2115RES 2113
12V/1V2 CONVERSION
3139
2131
100n 3156
470R
3157
470R
1
RES
2128
F113
RES RES2130
6102
PDZ18-B
RES 5100
10u
5101
10u
22u
22u
22R
3133RES
3134
I143
2114
100n
I148
1K0
3135
RES 5102
10u
5103
10u
14133513
6K8
22R
22R
3140
RES
I131
I132
1n0
100n
2129
I133
I134
1n0
1K0
3154
15K
GND-SIG
2112
2111
2110
F112
2119
10u
3n3
2120
1u0
2121
3144
120R
1%
1K0
3155
1%
GND-SIG
3n3
6K8
22u
22u
2141
2140
RES
F108
RES
RES
RES3138
2117
2116
2118
*
10R
10u
10u
10u
RES
F109
RES
3146
10K
BC847BS
3148RES
10K
BC847BS
I136
RES 7107-1
F110
RES 7107-2
RES
6
3145
100R
2
I137
1
1K0
3147
RES
3
I138
5
4
RES
3150
G
5104
10u
10u
22u
2123
2122
RES
25V
2124RES
220u
2125
330u 6.3V
F111
5105
22u
2127
RES
3149
3K3
2K2
3151
1%
1K0
3152
120R 1%
L
2133
100p
2134
M
H
GND-SIG
4K7
3160
3159
470R
1%
GND-SIG
I141
100p
2135
100n
GND-SIG
MULTI 12NC : 3139_123_64423 BD 12NC : 3139_123_64433
CELL 12C : 8239_125_14773
H
N
9
O
1X05
REF EMC HOLE
1X06
REF EMC HOLE
1X12
REF EMC HOLE
1X02
REF EMC HOLE
1X07
REF EMC HOLE REF EMC HOLE
1X03
REF EMC HOLE
10
1X08
P
Round screw hole of 4.02mm
1
2
3
4
5
6 12
Round screw hole of 4.5mm
10
11
Oval screw hole of 5mm x 4.02mm
13
112 3 45678
" X100 ~ X199 "
DC394240
CLASS_NO
3PC332
1
-- -- --
2
2008-10-17
3
2009-01-16
NAME
Kailash
SV
14
15
12 13 141
********SETNAMECHN
PCB SB SSB BD
TV543_2K9
**** *** *****
SUPERS.
DATECHECK
2008-10-17
16987
17
3
3139 123 6443
01
19
03101
20
18670_500_090911.eps
25
C
ROYAL PHILIPS ELECTRONICS N.V. 2008
18
2009-06-18
2009-02-252
M
N
O
P
A2
090911
2009-Dec-18
Circuit Diagrams and PWB Layouts

SSB: DC/DC +3V3-Stdby +1V2-Stdby

EN 61Q548.1E LB 10.
A
B
C
D
E
F
G
H
K
All rights reserved. Reproduction in whole or in parts
owner.
is prohibited without the written consent of the copyright
L
5
6
7 8
102
114
12
13
1514
16
171
18
193
209
A
1M95 D1 1M99 B1 2200 C1 2201 C1 2202 C2
2203 C2 2204 D2 2205 D3 2206 E1 2207 E2
2208 E2 2209 B5 2210 B6 2211 D4 2212 B9
2213 B9 2214 B9 2215 B12 2216 C13 2217 B12
2218 B12 2219 C10 2220 D2 2221 F9 2222 F9
12
2223 F9
2225 F12 2226 F13 2227 F13
2228 F13 2229 F13 2230 E2 2231 C1 2232 C2
2233 B6 2235 C2 2236 C2 2237 C3
3200 B2
3201 B2 3204 D2 3207 B10 3208 C11 3210 C12
3211 C12 3212 B14 3213 B13 3214 C13 3215 C14
3222 G12 3223 F13 3224 F12 3225 C5
3226 C5 3227 C6 3228 D6 3229 D6 3230 D6
3231 D6 3232 D4 3233 E4 3234 E5 3235 B3
3 456
4201 C2 4202 C22224 F12 5203 B9 5204 B11 5221 F9
5222 F11 6217 B12 6225 D4 7201 A6 7202-1 B10
7202-2 C10 7203 B14 7204 D10 7222-1 E10 7222-2 F10
7223-1 D5 7223-2 C6 7224-1 E6 7224-2 C7 F201 B1
F202 B13221 G12 F203 B1 F204 B1 F205 B1 F206 B1
F207 D1 F208 D1 F209 D1 F210 D1 F211 D1
F212 D1 F213 E1 F214 E1 F215 E1 F216 E1
F217 E1 F218 B6 F219 B12 F220 B14 F221 D14
F222 F12 F223 B1 F224 C1 F225 C1 F226 C1
7 8 91011
F227 D6 F228 B1 F229 B12 F230 B15 F231 F12
12 13 14 15
I202 B6 I203 B9 I204 B10 I205 B11 I206 B14
I207 D11 I210 F9 I212 C5 I213 D5 I214 D4
I215 E5 I216 D5 I217 D6 I218 C6 I219 C6
B
C
DC / DC +3V3-STANDBY_+1V2-STANDBY
D
A
A
DC / DC
7201
+3V3-STANDBY
1M99
F228
1
F201
2
3
4 5 6
FROM PSU
7
8
9 10 11 12
1-1735446-2
1M95
1 2
3
4 5 6 7
8
FROM PSU
9 10 11
1-1735446-1
F202
F203 F204 F205 F206 F223 F224 F225 F226
2201
RES 100p
RES 2200 100p
RES 2231 100p
F207 F208 F209 F210 F211 F212 F213
F214
F215
F216
F217
RES
2206
100n
GNDSND
2207
RES
RES 4201 RES 4202
2232
RES 100p
100n
2220
RES
2208
RES
GNDSND
68R3200 68R3201
10n2236
RES 100p2203
1n0
3204 68R
RES
2204 1n0
1n0
100n
RES
2230
2202 10n
RES 10n2235
BACKLIGHT
RES 2237 100p
BOOST
+3V3-STANDBY
RES
2205 1n0
+AUDIO-POWER
B
C
D
I
E
J
100R3235
+12V
+12VD
LAMP-ON-OUT
BACKLIGHT-OUT
BACKLIGHT-BOOST
POWER-OK
STANDBY
+1V2-STANDBY
SCL-SET SDA-SET
1u0
2209
+12V
3225
3226
6225
I214
1K0
3232
3233
10K
PDZ8.2-B
2211
2
1u0
6
7223-1 BC847BPN(COL)
1
I216
3234
22K
F
1
3
10K
I212
5
10K
I213
6
I215
1
BC847BPN(COL)
LD3985M122
OUTIN
INH BP
COM
2
4
7223-2
BC847BPN(COL)
I218
3227
3
220K
6K8
3228
10K
3230
I217
2
7224-1
F230
ENABLE-3V3
+5V5-TUN
+5V
PROT-DC
7202-1
1
5
I202
4
2233
100n
2210
RES
10K
3229
3K3
3231
I219
F218
F227
1u0
5
+1V2-STANDBY
4
7224-2
BC847BPN(COL)
3V3-ST
3
DETECT-12V
+12V
5203
33R
2212
I203
10u
10u
2213
2214
RES 3207
100K
10u
PDTC144EU
RES
7204
ST1S10PH
I204
ST1S10PH
2
INH
SYNCSWVFB
4
7202-2
10 11
2219
6
A
SW
VIN
GND
HSPA
8
9
VIA
3208
100K
100n
5204
+3V3
F219
10u
10u
2215
RES
3210
I205
7
35
I207
6217 SS36
10u
2217
F229
1%
1K0
3211
18K
25V220u
2218
RES
2216
4n7
3214
1%
100K
RES
I206
3213
3K9
1K0
RES
3215
F221
F220
RES 7203 BC847BW
RES 3212
10K
RES
E
B
F
C
G
H
D
I
DC / DC
+12V
5221
33R
2221
7222-1
I210
10u
10u
2222
2223
ST1S10PH
10u
INH
SYNCSWVFB
7222-2
ST1S10PH
10 11
1
6
A
SW
VIN
GND
HSPA
4
928
VIA
5222
7
35
F222
2u0
4n7
2225
4K7
3221
22u2224
1%
3224
100K
RES
F231
1%
3222
1K0
2227
220u 25V
2226 22u
3223
2229 22u
RES 22u2228
RES
1%470R
+1V2-PNX5100
SENSE+1V2-PNX5100
E
J
K
F
L
G
M
H
N
MULTI 12NC : 3139_123_64423
G
M
H
N
BD 12NC : 3139_123_64433
CELL 12C : 8239_125_14773
O
123 4
5678 9
P
2
3 1715
4
5
6
7
8
10
119
2009-Dec-18
12
10 11 12 13
DC394240
CLASS_NO
" X200 ~ X299 "
13
14
3PC332
-- -- --
2008-10-17
2009-01-1623
Kailash
NAME
SV
1
PCB SB SSB BD
CHECK DATE
SUPERS.
TV543_2K9
16
**** *** *****
2008-10-17
********EMANTESNHC
3
2 2009-02-25
14 15
O
2009-06-18
3139 123 6443
P
10
25
C
ROYAL PHILIPS ELECTRONICS N.V. 2008
18
02
130
191
A2
20
18670_501_090911.eps
090911

SSB: Front End

1
1
A
B
C
D
E
F
G
H
I
J
K
L
A
B
C
D
E
1301
*
HD1816 MK1
RF-IN
41
F
DC_PWR
RF_AGC
SDA
TUNER
XTAL_OUT
G
IF_OUT1 IF_OUT2
31
H
RES 4327
RES 4326
*
RF-IN
13
DC_PWR
I
RF_AGC
SDA
TUNER
XTAL_OUT
IF_OUT1 IF_OUT2
J
K
All rights reserved. Reproduction in whole or in parts
is prohibited without the written consent of the copyright
owner.
L
M
N
O
P
MULTI 12NC : 3139_123_64423 BD 12NC : 3139_123_64433
CELL 12C : 8239_125_14773
1
14567
+5V5-TUN
* I…C ADRESS C0
15
1 2
NC1
3
4
NC2
5
AS
6
SCL
7
8
9
+5V
10 11
MT MT
12
A312
1306
HD1816
MK2
14
MT
1 2
NC1
3
4
NC2
5
AS
6
SCL
7
8
9
+5V
10 11
MT
12
2
3386
4R7
7307
LK112SM50
54
OUTIN
1
SHDN BP
COM
1u0
2336
2
ANTENNA-SUPPLY
2302
*
4n7
F317 F318 F319 F320 F321 F322 F323 F324 F325 A310 A311
2
Circuit Diagrams and PWB Layouts
43
3
4
5
FRONT END
+5V
3
RES
4316
2358 4n7
*
RES 2363 4u7
*
*
F306
100n
2337
4n72359
2360 10n
4302
*
4303
*
RES 5302
820n
3
4u7
RES
5309
2u2
2369
+5V-TUNER
2304
100n
4304
RES
1
I
2
3
GND
OFWX6966M
4323
3306
0R05
RES
3307
510R
3
+5V-TUNER
5301
2305
1303
36M125
4
30R
16V47u
O1 O2IGND
+5V-TUNER
3301
2301
RES
5310
30R
5 4
2307 10n
RES
6K8
22n
A328 A329
4307
*
not in Arch2K8
UPC3221GV-E1
10n2306
4320
2364
10n
2367
10n
5
2362
*
2349 100n
*
2350 100n
*
4308
*
5311
820n
100n
4306
*
4312
*
4313
*
7302
2 INPUT1
3 INPUT2
4 VAGC
4321
RES
4322
RES
EN 62Q548.1E LB 10.
1300 E6
6785
6
7
8
9
10
91011
11
12
13
14
1512 13 14
152
16
17
18
19
16
20
A
A
B
I324
7308
OUTIN
COM
1
F301
TDO
F302
TCK
F303
TMS
F304
TDI
F305
DRX3926K-XK-A3
2331
12p
27M
1304
2332
12p
I322 I323
100n
47R 47R3399
RES 3370
F337
10K
RES 10K3376
10u
10u
10u
2311
2313
3318
RES
49
50
40 39
47 48
32
31
23 24
62 61
59 60 57 58
4 30
66 67 85 68 69 70 71 72 73 74 75 76 77 78
80 81 82 83
2312
120R
+3V3E
+3V3A
7303
37
425236468
XI
XO
VDDAH_AFE1
VDDAH_CVBS
P
PD
N
RSTN
SAW_SW
SCL1
I2C
SDA1
SCL2
I2C
SDA2
TCK TDI TDO TMS
GPIO1 GPIO2
VIA
VSSAH_AFE1
VSSAH_CVBS
415135
38
SIF-GND
2314
5305
30R
2321
5306
30R
2323
2325
+3V3B
+3V3D
+1V2A
26
18
VDDH VDDL
VDDAH_OSC
VDDAL_AFE1
VDDAL_AFE2
Φ
DEMODULATOR
VSSHVSSL
VSSAL_AFE1
VSSAL_AFE2
VSSAH_OSC
7
45
172554
100n
2315
100n
100n
2322
100n
2324
2326
100n
+1V2
53
21627
3
28
15
5304
10u
2317
100n
100n
2316
2u2
2u2
5307
10u
2u2
2u2
100n
2327
2328
56
MSTRT
5
MSTRT
MERR
6
MERR
9
MCLK
MCLK
10
MVAL
MVAL
11
MD0
0
12
MD1
1
13
MD2
2
14
MD3
3
19
55
MD
RF_AGC
IF_AGC
I2S
VSYNC
CVBS
MD4
4
MD5
20
5
21
MD6
6
22
MD7
7
33 34
44
SIF
43
64
DA
63
CL
1
WS
29
84
86 87 88 89
90 91 92
VIA
93 94 95 96 9779 98
99 100 101
GND_HS
65
2318
2u2
2329
10K
10K
3393
3394
F339
I301
RES 2353 100n
RES
2346
22u
150R
100n
100n
2319
2330
100n
+3V3B
10K
10K
10K
3396
3397
3395
RES
RES 3357
10K
I307
3345
10K
3349
F308
2u2
2320
F309
F310
F311
RES3355 18K
3348
18K
2
+1V2
+1V2A
+3V3E
+3V3D
+3V3A
3308-4
45
3308-3 3308-2
27
3308-1
1 8
3309-4 3309-3
3 6 3309-2 3309-1 3310-4
45
3310-3
3 6 3310-2
2 7 47R 3310-1
1 8
2
RES 3358
150R
3311 100R
+5V-TUNER
7345-2
BC847BPN(COL)
3346
470R
I308
5
6
7345-1 BC847BPN(COL)
1
3347
150R
I306
RES
3356
6
RES 7312-1 BC847BPN
1
47R 47R3 6 47R 47R 47R45
FE-DATA(0) FE-DATA(1)
47R 47R2
7
FE-DATA(2)
8
47R1
FE-DATA(3)
47R
FE-DATA(4)
47R
FE-DATA(5) FE-DATA(6)
47R
FE-DATA(7)
4
470R
I303
5
3
RES 3359
150R
2354
22u
2345
4
3
3391
18R
F315
4314
BC857BS
RES
7314-1
3362
RES
2
100R
4315
F314
RES 3363
5
100R
RES BC847BPN 7312-2
3p3
+5V-TUNER
RES3360 150R
1
6
4 BC857BS
7314-2
RES
3
+5V-TUNER
I325
RES 150R3361
FE-SOP
FE-CLK
FE-VALID
FE-DATA(0:7)
RF-AGC
IF-AGC
3392
CVBS
68R
CVBS-TER-OUT
SIF
B
C
C
D
E
D
F
E
G
F
H
I
G
J
H
K
L
I
M
J
N
K
DC394240
CLASS_NO
3PC332
-- -- --
2008-10-17
2009-01-1623
NAME
Wang Bing Bing
SV
1
CHECK DATE
15
********EMANTESNHC
PCB SB SSB BD
TV543_2K9
SUPERS.
**** *** *****
2008-10-17
6141
13
17
14
3
2 2009-02-25
3139 123 6443
25
25
C
ROYAL PHILIPS ELECTRONICS N.V. 2008
18
13010
19
03
03
20
15 16
2009-06-18
O
P
A2
L
18670_502_090911.eps
5313
RES
10K3350
RES
4319
F312 F313
6302
BZX384-C6V8
RES
+5V-TUNER
3387
RES
I328
27K
3372
RES
I329
4K7
3375
RES
RES30R5308
30R
3302 10K
ANTENNA-SUPPLY
100n
2355
RES
RES
100K
3377
100K
+12V
8
2
4
+12V
8
6
4
LD1117DT12
3 2
2344
100n
3354
22R
2334
RES
3398
I327
RES 7316-1 LM393PT3
1
RES 7316-2 LM393PT5
7
*
33AA
560R
33AC
560R
100n
2351 100n
2361
AGC CONTROL
F327
F332 F333 F334 A322 A323 F335
*
+5V-TUNER
1 2
3
4 5 6 7
8
9 10 11 12
100n2352
A325
*
1
VCC
GND15GND2
8
470R
33AB
13
ANT_PWR B1 RF_AGC
SCL SDA
B2 VTU_TP NC IF_AGC DIF2 DIF1 AIF
14
2365
10n
2368
10n
+1V2-PNX85XX
+3V3
7309
+5V
I313 I314
1300
1516
MTMT
*
TDTC-G321D
LG1
Pend new 12nc
3316
47R 47R3317
18p
18p
2342
2341
TUNER
4318
4317
100n
2300
*
*
I318
I319
RES 4324
4325
LGI
RFS
N
Y N
Y
N
Y N
Y Y
N
Y
N
Y
N
N
Y Y
N
Y
N Y
N
Y
N Y
N
Y
N Y
N
Y
N N
Y YN
N
Y
N
Y Y
N N
Y4318
3303
220R
22p
2370
2308
3304
220R
6K8
3305
22n
22K
3313
3312
2335
RES
RES
PDN
7OUTPUT1
6OUTPUT2
+5V-TUNER
+3V3A
A327
100n
RES 2366
*
1300 1301 2302 2349 2350 2351 2352 2358 2359 2360 2361 2362 4302 4303 4304 4306 4307 4308 4312 4313 4317
A324
2p2
5303
A326
220K
ANTENNA-CTRL
2309
100p
680n
2310
100p
F316
I321
1
1u0
2371
RF-AGC
SCL-TUNER SDA-TUNER
IF-AGC
+12V
RES
2357
RES
F338
IF-N
IF-P
PDP
SHDN BP
COM
3364
4K7
22n
OUTIN
2
3
2372
100n
IF-P IF-N
PDP
PDN RESET-SYSTEM
SCL-SSB SDA-SSB
SCL-TUNER SDA-TUNER
ANTENNA-CTRL
RESERVED
+5V-TUNER
2
1
7315 BCP56
3
RES 6301
BAS316
+3V3
LK112M33TR
54
+3V3B
2u2
2373
TUNER BOUNDARY SCAN
+3V3B
3351 10K
3352 10K
3353 10K
+3V3B
3388 4K7
18p2347
RES
RES
3366
+3V3B
4K7
2356
100n
4
RES
RES
RES
I326
3389
2R2
3367
RES
2R2
3369
220R
RES
RES3368
I331
RES3371
RES 3373
RES 3374
4K73365
RES
2348 18p
F336
220R
27K
10K
2K7
" X300 ~ X399 "
6
7
8
9
10
8
11
12
132
9 101112
1301 D1 1303 G3 1304 E11 1306 F1 2300 F6 2301 C4 2302 E2 2304 D3 2305 D3 2306 G4 2307 G4 2308 G7 2309 G8 2310 G8 2311 C12 2312 C12 2313 C12 2314 C13 2315 C13 2316 C13 2317 C13 2318 C14 2319 C14 2320 C14 2321 C13 2322 C13 2323 C13 2324 C13 2325 D13 2326 D13 2327 D13 2328 D13 2329 D14 2330 D14 2331 E11 2332 E11 2334 F11 2335 H7 2336 C2 2337 C2 2341 E7 2342 E7 2344 C11 2345 H15 2346 H14 2347 G10 2348 G10 2349 E5 2350 E5 2351 F5 2352 F5 2353 F14 2354 G16 2355 H10 2356 H9 2357 H8 2358 E2 2359 E2 2360 E2 2361 F5 2362 E5 2363 E2 2364 H4 2365 H6 2366 H6 2367 H4 2368 H6 2369 C3 2370 G7 2371 C8 2372 C9 2373 C9
3301 C4 3302 E10 3303 G7 3304 G7 3305 H7 3306 H3 3307 H3 3308-1 E15 3308-2 E15 3308-3 E15 3308-4 E15 3309-1 F15 3309-2 F15 3309-3 E15 3309-4 E15 3310-1 F15 3310-2 F15 3310-3 F15 3310-4 F15 3311 G15 3312 H7 3313 H7 3316 D7 3317 D7 3318 C12 3345 I14 3346 H15 3347 I15 3348 H15 3349 I14 3350 D10 3351 D10 3352 D10 3353 D10 3354 D11 3355 F15 3356 F15 3357 G14 3358 G15 3359 G15 3360 I16 3361 I16 3362 I15 3363 J15 3364 H9 3365 E10 3366 G10 3367 I10 3368 I9 3369 I10 3370 I11 3371 I10 3372 I10 3373 J10 3374 J10 3375 J10 3376 I11 3377 H10 3386 B2 3387 H10 3388 E10 3389 H10 3391 I15 3392 I16 3393 E14 3394 E14 3395 E14 3396 E14 3397 E14
3398 F11 3399 F11 33AA H5 33AB H5 33AC H5
4302 E2 4303 F2 4304 F3 4306 E5 4307 F4 4308 F5 4312 E5 4313 F5 4314 I15 4315 J15 4316 E2 4317 F7 4318 F7 4319 F10 4320 H4 4321 H5 4322 I5 4323 G3 4324 G7 4325 G7 4326 F1 4327 F1 5301 D3 5302 G3 5303 G8 5304 B14 5305 C12 5306 C12 5307 D14 5308 B11 5309 B3 5310 D4 5311 H4 5313 B10 6301 H9 6302 H10 7302 G5 7303 E12 7307 B2 7308 B11 7309 B9 7312-1 G15 7312-2 G16 7314-1 I15 7314-2 J16 7315 H9 7316-1 I11 7316-2 J11 7345-1 I15 7345-2 H15 A310 E2 A311 F2 A312 F1 A322 E5 A323 F5 A324 G7 A325 F6 A326 G7 A327 G6 A328 E4 A329 F4 F301 D11 F302 D11 F303 D11 F304 D11 F305 D11 F306 B3 F308 B15 F309 C15 F310 C15 F311 D15 F312 F10 F313 F10 F314 J16 F315 I16 F316 H8 F317 E2 F318 E2 F319 E2 F320 E2 F321 E2 F322 E2 F323 E2 F324 E2 F325 E2 F327 E5 F332 E5 F333 E5 F334 E5 F335 F5 F336 G10 F337 I11 F338 J8 F339 E14 I301 F14 I303 F15 I306 I15 I307 H14 I308 H15 I313 D7 I314 D7 I318 G6 I319 G6 I321 H8 I322 F11 I323 F11 I324 B11 I325 G16 I326 H9 I327 H11 I328 I10 I329 J10 I331 I9
090911
2009-Dec-18

SSB: PNX8543 - Power

Circuit Diagrams and PWB Layouts
EN 63Q548.1E LB 10.
123 45678 9 101112
1
A
A
2 8 154
PNX8543 - POWER
B
B
7601
C
+3V3F
2603
C
D
D
E
+1V8-PNX85XX
F
+1V2-PNX85XX
5600
+3V3
33R
E
LD1117DT18
3 2
10u
100n
2601
I600
1u0
100n
2605
2604
6.3V
2606
330u
F601
C600
6.3V330u
2607
OUTIN
COM
1
F600
22u
2602
RREF-PNX85XX
SENSE+1V2-PNX85XX
10u
2600
+3V3
+1V2-PNX85XX
+1V2-PNX85XX
G
F
H
I
G
7600-10
U6
V15
V16
J
H
K
All rights reserved. Reproduction in whole or in parts
owner.
is prohibited without the written consent of the copyright
I
L
M
J
PNX85439E
AA14 AA15 AA16 AA17 AA18 AA19 AA20 AA21 P18 AA5 AB31 AB4 AB5 AC31 AC33 AE6 AF33 AG31 AH29 AH6 AJ15 AJ24 AJ25 AJ29 AJ33 AJ5 AJ9 AK10 AK13 AK23 AK25 AL1 AL2 AL3 AL30 AM1 AM18
N
K
L
O
P
MULTI 12NC : 3139_123_64423
BD 12NC : 3139_123_64433
CELL 12C : 8239_125_14773
1
V17
V14
VSS
AM2
AM22
AM21
2
W18
V18
AM31
W19
V19
W14
W15
W16
W20
W17
V20
VSS
AN1
AP33
AP34
AN32
AN33
AN34
AM32
AM33
AM34
3
I615
Y17
Y20
Y15
Y16
Y18
Y19
Y33Y5Y6
Y14
VSS
VSS
E4
E3
F21
E18
E12
B34
D13
D17
D12
D18
123 4
+1V8-PNX85XX
+3V3
RREF-PNX85XX
F22
F30
F27
F29
53
+1V2-PNX85XX
+1V2-STANDBY
7602
LD1117
5603
33R
10u
2697
RES 5626
33R
5605
33R
5607
33R
F8
F5
F7
H6
G6
G5
G29
2 4
3
OUTIN
COM
3601
1
F605
100n
100n
2632
2633
F606
100n
100n
2635
2634
L5 M2 N5
P14 P15 P16 P17
P19
P2
P20 P21
P33 R14 R15 R16 R17 R18
VSS
R19 R20
T14
T15
T16
T17
T18
T19
T20
T31 U14 U15 U16 U17 U18 U19 U20 U33
K2
L33
6
56
2608
2621
100R
1u0
2609
1u0
2622
+3V3-STANDBY
+1V2-PNX85XX
+3V3
+3V3
7
2612
2610
100n
100n
2691
RES
100n
2611
RES
5609
33R
100n
100n
2693
RES
5602
5627
5601
5604
2636
+1V2-PNX85XX
100n
100n
2614
2615
RES 2613
RES
RES
100n
1u0
RES
100n
2623
2625
2624
33R
2627
100n
33R
100n
26A4
26A3
33R
2629
100n
2628
33R
2631
100n
10u
22u
2630
2626
26A1
F607
1u0
2637
100n
+1V2-PNX85XX
+1V2-PNX85XX
F609
1u0
2641
100n
2640
8
100n
100n
2692
+3V3
+3V3
+3V3
5608
33R
75
7 8 9 10111213 14 15
100n
2699
26A2
+3V3-PER
5611
33R
9
100n
100n
100n
2616
2618
2617
RES
RES
100n
F602
10u
I616
10u
F625
10u
F603
10u
100n
5610
F608
33R
1u0
2638
2639
F610
1u0
2643
2642
RES
9
10
100n
100n
2620
2619
7600-9
PNX85439E
AJ12 AJ13 AJ14 AJ20 AJ23 F18 F19 F20 F25 F26 F9 K30 L30 U30 V30 V6
AF5 AF6 AG5 AG6
AC6 AD6
P6 R6 H5
T5
F604
100n
T3 L6 M6 N6 T6
D16 E17 F16 E16 C13 C17
E13
E14
AJ26
100n
F17
D4
K6
VDD_1V2_CORE
VDD_1V2_SBCORE
VDD_3V3_SBPER
VDDA_3V3_VID_1_1
VDDA_3V3_VID_1_2 VDDA_3V3_VID_4 VDDA_3V3_DCSCCO
VDDA_1V2_DCS_A
VDDA_1V2_VID
VSS_CL
VDDA_1V2_HDMI_EQ
VDD_3V3_HDMI_TERM_2
VDDA_HDMI_3V3_BIAS
VDDA_3V3_HDMI_PLL_2
VDD_1V2_HDMI_1
VDD_1V2_HDMI_2
VDDA_1V2_HDMI_EQ
VDD_3V3_HDMI_TERM_1
VDDA_3V3_HDMI_PLL_1
VPP_ID_8542
VPP_ID_8543
VDDA_3V3_VIDOUT
VDDA_1V2_ADC4A
11
1110
12
VDD
" X600 ~ X699 "
13
13
AH30
AG30
VDD_1V8_DDR
R21
+3V3-PER
VDD_3V3_PER
VDDA_1V2_CAB
VDDA_3V3_MCAB
JTAG_VSST1
VDDA_1V2_USB_PLL
VDDA_3V3_USB
GNDA_USB
VDDA_1V2_LVDS_PLL
VDD_3V3_LVDS
VDDA_3V3_LVDS
VDDA_1V2_AADC VDDA_3V3_AADC
VDDA_3V3_ACT
VDDA_3V3_ADAC
VDDA_1V2_DLL
VDDA_3V3_DDRPLL0
VSSA_DDRPLL0
VDD_1V2_DDRPLL0
VSS_DDRPLL
VSSA_DLL
T21
T30
Y21
V21
R30
U21
W21
14
144
0 1 4 7
AJ21 AJ22 AJ27 AJ28
AJ8 F10 F23 F24 F28
H29 J29
W6
AA6
AB6
AM3
AK17
AJ17 AJ16
AJ18 AK20 AK21 AK24
AL21
AJ19
AJ7 AJ6 AK8 AK12
Y30 AJ30
P30
AF30D14
AC30 AD30
AB30 AA30
W30 AK30 N30 AE30
F6
J6
-- -- --
2008-10-17
2009-01-16
NAME
SV
2682
100n
CLASS_NO
3PC332
Vincent Yap / Lee CW
100n
RES
2644
2683
DC394240
100n
RES
RES
2645
2684
100n
100n
1
2
3
15
13 14
16
100n
100n
RES
2647
2646
I614
2694
2695
100n
100n
100n
100n
RES
RES
RES
2650
2649
2648
5618
33R
100n
2657
2664
100n
2667
RES
RES
F619
2668
100n
2686
2696
2685
100n
100n
100n
********SETNAMECHN
PCB SB SSB BD
TV543_2K9
SUPERS.
**** *** *****
DATECHECK
2008-10-17
16
100n
RES
2651
+1V2-PNX85XX
100n
100n
2665
1u0
2669
VDDA-DAC
VDDA-ADC
100n
2674
2687
100n
100n
15 16 17
17
186
19
20
A
F611
5612
+3V3
33R
100n
100n
2653
2652
I613
F616
100n
2666
1u02656
100n
100n
2654
2655
F612
5617
+3V3
33R
1u0
100n
2659
2658
5616
+1V2-PNX85XX
33R
2663
100n
5620
+1V2-PNX85XX
33R
VDDA-LVDS
F617
F618
RES
2670
5613
+1V2-PNX85XX
33R
1u0
100n
2660
2661
F615
5614
+3V3
33R
2662
100n
5615
+3V3
33R
5619
+3V3
33R
1u0
2671
100n
B
C
D
E
F
F620
2673 100n
100n
2676
2675
100n
2678
100n2680
2689
2688
100n
33R5621
VDDA-AUDIO
33R5622
F621
100n
2672
F622
100n
100n
2677
F623
1u0
2679
F624
100n2681
F626
2690
1u0
1u0
VDDA-AUDIO
G
5623
+1V2-PNX85XX
33R
5624
+3V3
33R
5625
+1V2-PNX85XX
33R
+1V8-PNX85XX
H
I
J
K
L
M
N
O
3
2009-06-18
2
2009-02-25
3139 123 6443
P
A2
17
25
C
ROYAL PHILIPS ELECTRONICS N.V. 2008
1812
19
04
03101
20
16 17
2600 C4 2601 C2 2602 C4 2603 C2 2604 D2 2605 D3 2606 D2 2607 E2 2608 A6 2609 A6
A
2610 A6 2611 A6 2612 A7 2613 A7 2614 A7 2615 A7 2616 A7 2617 A8 2618 A8 2619 A8 2620 A8 2621 B6
B
2622 B6 2623 C7 2624 C7 2625 C7 2626 E7 2627 C7 2628 D7 2629 D7 2630 E7 2631 D7 2632 E5 2633 E5
C
2634 F5 2635 F5 2636 F7 2637 F7 2638 F8 2639 F8 2640 G7 2641 G7 2642 G8 2643 G8 2644 B12
D
2645 B13 2646 B13 2647 B13 2648 B13 2649 B13 2650 B14 2651 B14 2652 B14 2653 B14 2654 B15 2655 B15 2656 B15
E
2657 C13 2658 C14 2659 C15 2660 B16 2661 B16 2662 C16 2663 C15 2664 D14 2665 D14 2666 D14 2667 D14 2668 D14
F
2669 D14 2670 D16 2671 D16 2672 F15 2673 F14 2674 F14 2675 F14 2676 F14 2677 F15 2678 G14 2679 G15
G
2680 H14 2681 H15 2682 H12 2683 H12 2684 H13 2685 H13 2686 H14 2687 H14 2688 H14 2689 H14 2690 H15 2691 B6
H
2692 B6 2693 B7 2694 H13 2695 H13 2696 H13 2697 D5 2699 C7 26A1 E7 26A2 D7 26A3 C7 26A4 C7 3601 D6
I
5600 C2 5601 D7 5602 C7 5603 D4 5604 D7 5605 E5 5607 F5 5608 E6 5609 F6 5610 F8 5611 G7
J
5612 A15 5613 B16 5614 C16 5615 D16 5616 C15 5617 B15 5618 B14 5619 D16 5620 D15 5621 E15 5622 E15 5623 F15
K
5624 G15 5625 G15 5626 E5 5627 C7 7600-10 G2 7600-9 B9 7601 B3 7602 D5 C600 E3 F600 C4 F601 E2 F602 C8
L
F603 D8 F604 E8 F605 E6 F606 F6 F607 E7 F608 F8
18670_503_090911.eps
F609 F7 F610 G8 F611 A15 F612 B15 F615 C16 F616 C14 F617 D15 F618 D15 F619 D14 F620 E14 F621 E15 F622 F15 F623 G15 F624 G15 F625 D8 F626 H15 I600 C3 I613 B14 I614 B13 I615 G4 I616 C8
090911
2009-Dec-18
Circuit Diagrams and PWB Layouts

SSB: PNX8543 - Video stream/LVDS out

EN 64Q548.1E LB 10.
1
3
4
52
6
7
8 1615
9
10 11
12
1413
A
123 4
B
PNX8543 - VIDEO STREAMS / LVDS OUTPUT
56
7
8 910
11 12
A
C
7600-5
PNX85439E
LVDS
B B
D
E
C
F
7600-11
Y29
AB29
PNX85439E
Y4 R2 C4 R4 T4 W4
W5 F11 F12 F13 F14 F15 C14 AJ11 AL12 AK15
AD29
W29
AA29
AC29
AE29
NC NC
AL17
AL25
AP21
AN21
AN25
AM25
AM30R5AN30
AN31
AF29
AG29
AP30
AP31
AP32
M30
AM26
AN26
AP26
AM27
AN27
K31
AK28 AL28
AM28
AK29
AL29 AM29 AN29
K29 L29
M29
N29 P29 R29 T29 U29 V29
NC
NC
NC
AL26
AP25
AK26
D
G
IREF_LVDS
CLK
LOUT2_A
LOUT2_B
LOUT2_C
LOUT2_D
LOUT2_E
LOUT2_CLK
VDDA-LVDS
12K
3700
F700
AK19
AN18
N
AP18
A
P
AK18
N
AL18
B
P
AN19
N
AP19
C
P
AN20
N
AP20
D
P
AL20
N
AM20
E
P
AL19
N
AM19
P
AN22
N
AP22
P
AK22
N
AL22
P
AN23
N
AP23
P
AN24
N
AP24
P
AL24
N
AM24
P
AL23
N
AM23
P
RX51001A­RX51001A+
RX51001B­RX51001B+
RX51001C-
RX51001C+
RX51001D-
RX51001D+
RX51001E­RX51001E+
RX51001CLK-
RX51001CLK+
F702
RX51002A-
F703
RX51002A+
F704
RX51002B-
F705
RX51002B+
F706
RX51002C-
F707
RX51002C+
F708
RX51002D-
F709
RX51002D+
F710
RX51002E-
F711
RX51002E+
F712
RX51002CLK-
F713
RX51002CLK+
17
18
19
20
A
3700 B6 3707-1 F6 3707-2 F6 3707-3 F6 3707-4 F6 3708-1 F6 3708-2 F6 3708-3 F6 3708-4 F6
A
3709-1 F8 3709-2 G8 3709-3 F6 3709-4 G6 3710 G7 3711 H1 3714 H2
4700 H6 4701 H2 4702 G4 7600-11 B2 7600-12 F5 7600-5 B5 F700 B6 F701 H2 F702 C7 F703 C7 F704 D7 F705 D7 F706 D7 F707 D7 F708 D7 F709 D7 F710 D7
C
F711 D7 F712 D7 F713 E7
B
C
D
E
F
D
G
H
K
All rights reserved. Reproduction in whole or in parts
owner.
is prohibited without the written consent of the copyright
L
M
N
E
7600-12
CA-MDO(0:7)
I
F
J
G
F701
+3V3-PER
H
3711
4K7
4701
3714
FE-ERR FE-ERR
RES
10K
CA-MDO(0) CA-MDO(1) CA-MDO(2) CA-MDO(3) CA-MDO(4) CA-MDO(5) CA-MDO(6) CA-MDO(7)
CA-MOSTRT
CA-MOVAL
CA-MOCLK_VS2
FE-DATA(0:7)
FE-DATA(0) FE-DATA(1) FE-DATA(2) FE-DATA(3) FE-DATA(4) FE-DATA(5) FE-DATA(6) FE-DATA(7)
FE-CLK
FE-SOP
FE-VALID
4702
E33 C32 B32 J30 K34 K33 H30 J33
E34
D34
D10 E10 A9 A11 C11 D11 E11 A10
C12
B10
B9
C10
PNX85439E
0 1 2
3
CA_MDO
4 5 6 7
CA_MOSTRT
CA_MOVAL
CA_MOCLK
0 1 2
3
TNR_TSDI
4 5 6 7
TNR_ERROR
TNR_MICLK
TNR_MISTRT
TNR_MIVAL
TUN_CA
CA_DATA
CA_MDI
CA_MISTRT
CA_MIVAL
CA_MICLK
CA_ADD_EN
CA_CDN
CA_OOB_EN
CA_RDY
CA_RST
CA_VCCEN
CA_VPPEN
CA_VSN
G33
0
G31
1
G30
2
H3
3
F34
4
F32
5
F31
6
G34
7
J31
E32
H32H31
B31
K32
0
A32
1
D31
DIR
A31
EN
C31
J34
C34
C33
A33
J32
0
A34
1
3 6
3708-3 47R
4
27
3708-2
4700
53708-4 47R4
47R3708-1 1 8
3707-4 3707-1 47R1
47R
3709-3
3709-4
2 7 47R3707-2
3 6847R3707-3
6
5
47R4
47R3
45
47R
10R3710
CA-MDI0 CA-MDI1 CA-MDI2 CA-MDI3 CA-MDI4 CA-MDI5 CA-MDI6 CA-MDI7
CA-MISTRT
CA-MIVAL
CA-MICLK
CA-ADDEN
CA-CD1 CA-CD2
CA-DATADIR
CA-DATAEN
IRQ-CA
CA-RST
CA-VS1
CA-MOCLK_VS2
NC
3709-1 47R8 1
3709-2
72
NC
47R
E
H
I
F
J
G
K
H
L
M
I
MULTI 12NC : 3139_123_64423
BD 12NC : 3139_123_64433
CELL 12C : 8239_125_14773
123 4
567
8 9
10
11 12
I
N
2009-06-18
2009-02-252
O
P
A2
090911
O
P
" X700 ~ X799 "
1
2
543
6
7 8
9
10
11
12
1413
CLASS_NO
3PC332
-- -- --
2008-10-17
2009-01-16
Vincent Yap / Lee CW
NAME
SV
DC394240
********SETNAMECHN
1
2
3
PCB SB SSB BD
TV543_2K9
**** *** *****
SUPERS.
DATECHECK
2008-10-17
1615
17
3139 123 6443
19
03101
05
25
C
ROYAL PHILIPS ELECTRONICS N.V. 2008
18
3
20
18670_504_090911.eps
2009-Dec-18
Circuit Diagrams and PWB Layouts

SSB: PNX8543 - Audio Amplifier

EN 65Q548.1E LB 10.
A
B
C
D
E
G
H
K
All rights reserved. Reproduction in whole or in parts
owner.
is prohibited without the written consent of the copyright
M
N
12
A
+AUDIO-POWER
B
C
F
D
E
RESERVED FOR ITV
I
F
J
BATHROOM SPEAKER
1 2
G
3
45
502382-0370
L
H
MULTI 12NC : 3139_123_64423 BD 12NC : 3139_123_64433
CELL 12C : 8239_125_14773
3
1
2
3
5
6
4
5 6 10 11
8
9
7 8 9
PNX8543 - AUDIO AMPLIFIER
3835-4 22K4
28371u0
1 8
3839
10K
I814
2826
220p
3816-2
27
10K
I815
2827
220p
3816-3
3 6
10K
I816
2830
220p
3n3
2811
3817-1
1 8
10K
I817
2831
220p
3n3
2812
3817-3
3
10K
I847
22K3835-1
I848
5
I849
ADAC(7)
3819-2
27
22K
I822
RES
3812
5K6
4801 RES
22K
I819
BC847BW
3818
4R7
RES 1800
F800
RES
RES
3822 100R
100R3821
1
I818
1u0
6801
2800
BZX384-C6V8
3819-3
3 6
I821
10K
3820
AUDIO-VDD
10K
RES
3810
I810
RES
I811
7808
BC847BW
3814
470R
RES
F801
F802
1n0
1n0
EMC
EMC
2825
2824
RES
RES
2 3 45
BC807-25W
22K
3819-1
1 8
7802 BC847BW
I823
22K
3819-4
45
AUDIO-VDD
10K
RES
3811
I813
RES
7809
3815
470R
RES
F812
7801
I812
AUDIO-VDD
ADAC(8)
ADAC(5)
ADAC(6)
RES 3813
5K6
ADAC(3)
ADAC(4)
28321u0
ADAC(3)
ADAC(4)
AUDIO-RESET
I845
I846
1u02833
678 9
0174
AUDIO-VDD
4
3
I833
2
11
3816-1
1 8
10K
2823
33p
AUDIO-VDD
4
5
I835
6
11
3816-4
54
10K
2808
33p
AUDIO-VDD
4
10
I836
9
11
3817-2
27
10K
2809
33p
AUDIO-VDD
4
12
I837
13
11
3817-4
6
54
10K
2810
33p
2835 33p
3835-2 22K27
TPA6111A2DGN
7830
2
6
5
3
33p2836
Φ
AMPLIFIER
1
IN-
2
SHUTDOWN
BYPASS
GND_HS
GND
4
9
7803-1 LM324
7803-2 LM324
7803-3 LM324
7803-4 LM324
22K3835-33 6
VDD
11
12
13
14
15
16
12
2806
100n
1
7
8
14
8
1
VO
2
10
VIA
11
+3V3
F809
1K0
3831
RES
F803
1K0
RES 3832
F804
1K0
3840RES
F805
1K0
3834
RES
1u0
2834
1
7
AUDIO-OUT-L
AUDIO-OUT-R
I850
I851
AUDIO-CL-L
AUDIO-CL-R
HP_LOUT
HP_ROUT
AUDIO-RESET
10K
3833
7807-1 BC847BPN(COL)
F808
3830-4
5
4
63
22K
22K
3830-3
I839
3841
0R
2
1n0
2822
3830-2
6
22K
1
17
13 14
+AUDIO-POWER
8
22K
3830-1
1
27
I840
5
13
4
7807-2
BC847BPN(COL)
F811
3
18
A-PLOP
A-STBY
41211101
19
1800 G1 2800 B2 2806 A8 2808 C8 2809 E8 2810 F8 2811 D7 2812 E7 2822 C12 2823 B8 2824 G2 2825 G2 2826 A7 2827 B7
A
2830 D7 2831 E7 2832 H6 2833 H6 2834 G8 2835 G7 2836 G7 2837 H6
3810 F2 3811 F3 3812 F3 3813 F4
B
3814 G2 3815 G3 3816-1 B8 3816-2 B7 3816-3 C7 3816-4 C8 3817-1 D7 3817-2 D8 3817-3 F7 3817-4 F8 3818 B2
C
3819-1 B3 3819-2 B3 3819-3 C3 3819-4 C3 3820 C2 3821 G1 3822 G1 3830-1 B13 3830-2 C13 3830-3 C11 3830-4 C11 3831 A9
D
3832 C9 3833 B12 3834 E9 3835-1 H6 3835-2 G7 3835-3 F7 3835-4 H6 3839 H7 3840 D9 3841 C11
4801 A3 6801 B2
E
7801 B4 7802 C3 7803-1 A8 7803-2 B8 7803-3 D8 7803-4 E8 7807-1 C12 7807-2 C14 7808 F2 7809 F3 7830 G7
F
F800 G1 F801 G2 F802 G2 F803 B9 F804 D9 F805 E9 F808 C11 F809 A9 F811 C14 F812 B4 I810 F2 I811 F3
G
I812 F4 I813 F3 I814 A7 I815 B7 I816 D7 I817 E7 I818 B2 I819 B3 I821 C2 I822 C3 I823 C3 I833 A7
H
I835 B7 I836 D7 I837 E7 I839 C12 I840 C13 I845 H6 I846 H6 I847 H7 I848 H7 I849 H7
20
I850 H9 I851 H9
A
B
C
D
E
F
G
H
I
J
K
L
M
N
2009-06-18
2009-02-252
O
P
A2
090911
O
P
1
3
4
5 11
6
7
8
9
10
" X800 ~ X899 "
122
13
14
CLASS_NO
3PC332
-- -- --
2008-10-17
2009-01-16
NAME
SV
DC394240
Hor Siew Lee
1
2
3
15
********SETNAMECHN
PCB SB SSB BD
TV543_2K9
SUPERS.
**** *** *****
DATECHECK
2008-10-17
16
17
3
3139 123 6443
19
03101
06
20
25
C
ROYAL PHILIPS ELECTRONICS N.V. 2008
18
18670_505_090911.eps
2009-Dec-18

SSB: PNX8543 - Audio

Circuit Diagrams and PWB Layouts
EN 66Q548.1E LB 10.
A
B
C
D
E
F
G
H
J
K
owner.
is prohibited without the written consent of the copyright
All rights reserved. Reproduction in whole or in parts
L
M
1
3
4
5
6
87
10
11 201992
123 45678 9
12
13
10 11 12
PNX8543 - AUDIO
A
I901
1u0
2926
I902
2927
I903
2928
4901
*
I904
2929
4902
*
I905
4905
*
I906
2931
I907
29321u0
4903
4906
**
I908
2933
I909
2934
4904
I910
*
2935
45678 9
33p
RES
2900
1u0
33p
2901
RES
1u0
33p
2902
RES
1u0
290333p
RES
1u02930
33p
RES
2904
1u0
33p
RES
2905
33p
RES
2906
1u0
33p
RES
2907
1u0
33p
RES
2908
1u0
33p
RES
2909
VDDA-AUDIO
RES
47K
RES
3932
SPDIF-IN
47K
RES
3933
10u
4K7
4K7
3906
2925
100n
2924
3907
3908
5902
I921
1
I916
2910-2 2910-1
27 8
2912
PNX85439E
I917
I918
I919
75R
33R
100n
5900
33R
100n
I914
10u
100n
2910-4
45
7600-7
AK7 AL7
AM8 AM9
AP8 AN8
AN7 AP7
AK6 AL6
AM6 AN6
AP6 AM5
AN5 AP5
U5 C19
AN15 AL14
AK14 AP15 AM15 AL15
AM14
B1
AM7
C1
D3
VDDA-AUDIO
VDDA-AUDIO
100n
2910-3
3 6
L
VREF_AADC
R
NEG
VREF
POS
VRNEG AADC
L
AIN_1
R
L
AIN_2
R
L
AIN_3
R
L
AIN_4
R
L
AIN_5
R
1
SPDIF_IN
2
OSCLK
SCK
SD1 SD2
I2S_IN
SD3 SD4
I2S_IN_WS
RESREF
VCOM_ADC
AOUT
AGND1
AADC
I2S_IN
AUDIO
VDDA_3V3_DAC
VSSA_ADAC
ADAC1
ADAC3
ADAC6 N
ADAC7BUF ADAC8BUF
ADAC
SPDIF_OUT
OSCLK
I2S_OUT
I2S_OUT_SD
I2S_OUT_WS
VDDA-AUDIO
I911
100n
2915-2
2915-1
VDDA-DAC
1 8
27
AK9
AJ10
AN14 AP14
N
AL13
P
AP13 AN13
NADAC2
AM13
P
AM12 AN12
N
AP12
P
AM11
AL11
NADAC4
AK11
P
AN11 AP11
NADAC5
AL10
P
AP10 AN10 AM10
P
AP9 AN9
AL9
7
AL8
8
V1
AA2
Y2
SCK
Y3
1
AA1
2
AA3
3
AA4
4
Y1
3911-4
3912-4
3912-2 33R
AUD_GND
3912-1
391333RRES
3911-2 33R
I920
3915 68R
100n
5
7
8
2915-3
3 6
100n
100n
2915-4
45
33R
4
33R3911-3
36
33R
45
33R3912-3
36
2
33R
1
33R3914 RES
27
18
33R3911-1
5901
F901
F902
10u
2919
ADAC(1)
ADAC(2)
ADAC(3)
ADAC(4)
ADAC(5)
ADAC(6)
ADAC(7) ADAC(8)
ADAC(7) ADAC(8)
SPDIF-OUT-1
AUD_GND
I922
2920
33R
10
12V
6901
CDS4C12GTA
12V
6900
CDS4C12GTA
PnS SS
YESX
X
33K 33K 33K 33KX33K
22K 100K
X X
3900-4 4 5 33K
3900-1 33K1 8
*
3 63904-333K
*
3903-4 33K45
*
*
1 8
3924-1 33K
*
2733K3924-2
*
*
27
3926-2 33K
*
OTHERS
X
X
X
33K 33K 33K
33K 33K 33K 33K
33K
3900-3
3 6
33K
3900-2
27
33K3904-4 4 5
5
33K
*
3905-4
4
6
33K
*
3905-3
3
33K
3923-4
*
45
33K3903-2 2 7
33K
*
3923-1
1 8
33K
*
3925-1
1 8
33K
*
3925-2
27
8
33K3926-1 1
33K
3927-1
*
33K
*
3927-2
728 1
AUDIO-IN1-L
AUDIO-IN1-R
B
C
D
AUDIO-IN2-L
AUDIO-IN2-R
AUDIO-IN3-L
AUDIO-IN3-R
AUDIO-IN4-L
AUDIO-IN4-R
AUDIO-IN5-L
E
AUDIO-IN5-R
FLAVORS 32"/42"
FLAVORS 22"
*
YES
4901 & 4902
4903 & 4904
4905 & 4906
3904
I
F
3905 3903 3923 3924 3925 3926 3927
X
X
YES
YES
33K
X X
33K
15K
22K
220K
100K
XX
X
X X 33K X
33K
G
H
MULTI 12NC : 3139_123_64423 BD 12NC : 3139_123_64433
CELL 12C : 8239_125_14773
123
LD2985BM33R
5
OUT IN
4
10n
ADAC(1) ADAC(2) ADAC(3) ADAC(4)
ADAC(8) ADAC(7)
14
7900
1
3
INHBP
COM
2
3n3
2936
3n3
2922
11 12
I913
3909
2937
2923
2921
22K
3n3
2938
AUD_GND
3n3
10u
3910
22K
3n3
AUD_GND
15
I905 C4 I906 C4 I907 D4 I908 D4 I909 E4 I910 E4 I911 C9 I913 C11 I914 C7 I916 B7 I917 F7 I918 F7 I919 G7 I920 F9 I921 B7 I922 C10
18
A
B
C
D
E
F
G
H
I
J
K
L
16
+5V
+3V3
3n3
2939
17
2900 B5 2901 B5 2902 B5 2903 C5 2904 C5 2905 D5 2906 D5 2907 E5 2908 E5
A
2909 E5 2910-1 B7 2910-2 B7 2910-3 C7 2910-4 C7 2912 C7 2915-1 C9 2915-2 C9 2915-3 C9 2915-4 C9 2919 C10 2920 C10
B
2921 C11 2922 E11 2923 E11 2924 G5 2925 G6 2926 A4 2927 B4 2928 B4 2929 C4 2930 C4 2931 C4 2932 D4
C
2933 D4 2934 E4 2935 E4 2936 E11 2937 E11 2938 E11 2939 E12
3900-1 B2 3900-2 B3 3900-3 A3 3900-4 A2
D
3903-2 C2 3903-4 C2 3904-3 C2 3904-4 B2 3905-3 C3 3905-4 B3 3906 G6 3907 G6 3908 G6 3909 C11 3910 C11 3911-1 F9
E
3911-2 F9 3911-3 D9 3911-4 D9 3912-1 E9 3912-2 E9 3912-3 E9 3912-4 D9 3913 F9 3914 F9 3915 F9 3923-1 D3 3923-4 C3
F
3924-1 D2 3924-2 D2 3925-1 D3 3925-2 E3 3926-1 E2 3926-2 E2 3927-1 E3 3927-2 E3 3932 F6 3933 F6
4901 B4
G
4902 C4 4903 D3 4904 E4 4905 C4 4906 D4 5900 B7 5901 C10 5902 B7 6900 E2 6901 D2 7600-7 C7 7900 B11
H
F901 C10 F902 F10 I901 A4 I902 B4 I903 B4 I904 C4
M
N
O
P
" X900 ~ X999"
21
3 10
4
5
6
7
8
9 15
11
12 13
14
CLASS_NO
3PC332
-- -- --
2008-10-17
2009-01-16
NAME
SV
DC394240
Hor Siew Lee
1
2
3
PCB SB SSB BD
********SETNAMECHN
TV543_2K9
SUPERS.
**** *** *****
DATECHECK
2008-10-17
16
17
3
3139 123 6443
25
C
ROYAL PHILIPS ELECTRONICS N.V. 2008
18
03101
07
2019
18670_506_090911.eps
2009-06-18
2009-02-252
N
O
P
A2
090911
2009-Dec-18
Circuit Diagrams and PWB Layouts

SSB: PNX8543 - Analogue AV

EN 67Q548.1E LB 10.
A
B
C
D
E
F
G
H
K
owner.
All rights reserved. Reproduction in whole or in parts
is prohibited without the written consent of the copyright
M
N
1
2A02 D3 2A03 E3 2A04 F2 2A06 B6 2A07 C6 2A08 D6 2A09 D5
2A10 E11 2A11 E11 2A12 D11 2A13 E6 2A14 E6 2A15 E6 2A16 E6
2A17 F6 2A18 F6 2A19 F6 2A20 F6 2A21 F6
2A23 G6
12
32
2A24 G6 2A25 G6 2A26 H6 2A27 H6 2A28 H6 2A29 H6 2A30 H6
4
2A31 F12 2A32 C11 2A33 C12 2A34 C12 2A35 B11 2A36 B12 2A37 B12 2A77 D6
2A38 C11 2A39 C12 2A40 C12 2A41 F11 2A42 F12 2A43 F12 2A44 E11
2A45 E12 2A46 E12 2A47 D11 2A48 D12 2A49 D12 2A50 F11 2A51 G6
3
6
2A52 G11 2A53 H11 2A54 A7 2A55 B7 2A56 A7 2A57 G11 2A59 H12
4
7
2A60 H11 2A65 E9 2A66 E10 2A67 E10 2A68 F11 2A69 F11 2A70 E10
2A71 G6 2A72 C5 2A73 C6 2A74 C5 2A75 C6 2A76 D5
56
8
3A06 E3 3A07 E3 3A08 E3 3A09 F3 3A10 F2 3A11 F2 3A13 D3
3A14 B5 3A15 C6 3A16 C5 3A17 C6 3A18 D5 3A19 D6 3A20 F14
9
3A21 F12 3A22 C13 3A23 C12 3A24 B13 3A25 B12 3A26 C13 3A27 C12
7 8
105
3A28 F13 3A29 F12 3A30 E13 3A31 E12 3A32 D13 3A33 D12 3A34 G14
3A35 G12 3A36 G14 3A37 G12 3A38 H14 3A39 H12 3A40 A6 3A41 A6
11
3A42 B6 3A43 B7 3A44 A6 3A45 B7 3A46 G14 3A47 H12 3A49 H11
12
3A50 D3 3A51 F3 3A52 E2 3A53 E2 3A54 B5 3A55 C5 3A56 D5
9
13
4A01 D12 4A02 E12 4A03 E12 4A04 E5 4A05 E5 4A06 F5 5A00 C12
5A01 B12 5A02 C12 5A03 F12 5A04 E12 5A05 D12 5A06 B6 5A07 C6
10 11 12 13 14
14
5A08 D6 7600-1 D3 CA01 H10 FA11 C6 FA13 B6 FA14 D3 IA03 E3
IA04 E3 IA05 F3 IA06 F3 IA07 F3 IA09 F6 IA11 G6 IA12 G5
15
IA13 G6 IA14 H5 IA15 H5 IA16 H5 IA17 C12 IA18 C13 IA19 F13
16
IA20 E12 IA21 F12 IA22 C12 IA24 D12 IA25 F12 IA27 H12 IA28 A6
IA29 A6
IA30 G12 IA33 F12 IA35 E3 IA43 E13 IA44 D132A22 G6 IA45 H11
17
IA46 H12
18
19
15
20
A
B
PNX8543 - ANALOG AV
C
D
E
F
G
H
I
J
K
L
M
N
3A44
3A4218R
RES 2A73
2A75
RES
2A77
RES
3A40
10n2A13
22n2A14 22n
22n
22n2A19
22n2A20
22n2A22
22n2A25
22n2A26
22n2A27 22n2A28
IA28
IA29
FA13
56R
100p
3A15
FA11
56R
100p
3A17
56R
100p
3A19
IA09
IA11
IA13
100p2A71
SIF-GND
2A06
2A07
2A08
56R
22n
22n
22n
56R
56R
3A41
22n 2A56
3A45
3A43
2A5422n
2A5522n
SCART
CINCH
N
Y
2A10
Y
2A11 2A12 2A41 2A44 2A47 2A65 2A66 2A67 2A68 2A69 2A70
Y
N N N N Y YYN
N Y N
N N
Y Y Y Y N
N Y
22n
2A65
2A66 22n
*
*
2A67 22n
2A70 22n
*
*
CA01
SIF-GND
22n2A68
22n
2A69
**
2A60 12p
SCART
2A32
2A12 22n
*
2A47 22n
*
2A11
* *
2A10 22n
*
2A41
*
2A35
22n
2A38
22n
22n
22n
22n2A44
22n
2A50
2A57 22n
2A53 22n
IA45
3A49 390R
2A31
5A01
1u8
56R
150p
2A36
3A25
IA22
5A02
1u8
56R
150p
2A39
3A27
5A00
IA17
1u8
56R
150p
2A33
3A23
FOR CINCH
IA24
**
2A48
3A33
RES 4A02
IA20
**
3A31
2A45
FOR CINCH
IA21
**
3A29
2A42
22n
IA33
47R
3A21
22n
IA25
47R
3A35
22n2A52
47R
3A37
IA30
47R
3A47
IA27
47R
3A39
IA46
2A37
2A40
2A34
4A01RES
5A05
1u8
150p
FOR SCART
FOR CINCH
5A04
1u8
150p
FOR SCART
4A03RES
5A03
1u8
150p
FOR SCART
2A59
3A24
18R
150p
3A26
18R
150p
IA18
3A22
18R
150p
IA44
3A32
**
SCART
**
18R
150p
2A49
IA43
**
3A30
150p
2A46
3A28
**
IA19
150p
2A43
100n
3A28 3A29 3A30 3A31 3A32 3A33
3A20
3A34
3A46 27R
3A38 27R
56R 18R 56R 18R 56R
27R
27R
27R3A36
AV2-Y_SC2-G
CINCH 18R 56R 18R 56R 18R 56R
AV2-PB_SC2-B
AV2-PR_SC2-R
FRONT-Y_CVBS
SC1-G
SC1-B
SC1-R
CVBS1
CVBS2
CVBS
FRONT-C
SIF
A
B
C
D
E
F
G
H
A
R-VGA
B-VGA
G-VGA
18R
18R
B
AV3-PR
SYNC_IN_1 SYNC_IN_2
PC1_AI1 PC1_AI2 PC1_AI3 PC1_AID
PC2_AI1 PC2_AI2 PC2_AI3 PC2_AID
PC3_AI1 PC3_AI2 PC3_AI3 PC3_AID
AI1N_IF AI1P_IF AI2P_IF AI2N_IF
REF 1
REF 2
REF 3
REF 4
REF 5
AV3-PB
AV3-Y
2A09
R1 R3
P3 P4 P5 N1
AI11
N2
AI12
N3
AI13
N4
M1
M3 M4 M5 L1
AI21
L2
AI22
L3
AI23
L4
K1
K3 K4 K5 J1
AI31
J2
AI32
J3
AI33
J4
G3
AI4N
G4
AI41
H1
AI42
H2
AI43
H3
AI44
H4
F1
AI5N
F2
AI51
F3
AI52
F4
AI53
G1
AI54
G2
D2 D1
E1
E2
C
FA14
Y_CVBS-MON-OUT
D
3A50
270p
3A13
180R
180R
2A02
RES
7600-1 PNX85439E
ANALOG_VIDEO
H-SYNC-VGA
E
I
J
V-SYNC-VGA
RES RES
3A10 3A11RES
2A04
270p
F
3A53 100R
2A03
3A06
3A07
3A08 3A51
3A09
75R
75R
100R3A52
T1 P1
T2
IA03
U1
22n
IA35
A1
10K
IA04
4K7
C3
4K7
C2
180R
A3
180R
B3
IA05
A2
IA06
B2
IA07
HSYNCIN
IN OUT
CURREF
BIAS
AGC
P
CVBS1Y
N
P
CVBS2C
N
VSYN
DAC
G
L
J5
GND_A3_TG
3A14
18R
RES
5A06
3A54
RES
18R
330n
100p
2A72RES
3A16
18R
5A07
RES
3A55RES
18R
330n
100p
2A74
RES
3A18
18R
18R
5A08RES
330n
100p
2A76RES
RES
2A15
2A16 22n
2A17 22n
RES
2A18
RES 2A21 22n
IA12
2A23 22n
2A24 22n
2A51 22n
IA14
IA15
2A29 22n
IA16
2A3022n
RES3A56
10n
4A04
4A05
4A06
H
MULTI 12NC : 3139_123_64423 BD 12NC : 3139_123_64433
CELL 12C : 8239_125_14773
123 45
76
O
P
1
2
3
4
5
6
7
8
9
8 910
" XA00 ~ XA99 "
11 12
13
11
DC394240
CLASS_NO
3PC332
-- -- --
2008-10-17
2009-01-16
NAME
Vincent Yap / Lee CW
SV
1410
12 13
1
2
3
PCB SB SSB BD
SUPERS.
DATECHECK
15
********SETNAMECHN
TV543_2K9
**** *** *****
2008-10-17
14
3139 123 6443
25
10
C
ROYAL PHILIPS ELECTRONICS N.V. 2008
1716
18
130
19
15
O
2009-06-18
3
2009-02-252
P
08
A2
20
18670_507_090911.eps
090911
2009-Dec-18

SSB: PNX8543 - SDRAM

Circuit Diagrams and PWB Layouts
EN 68Q548.1E LB 10.
A
B
C
D
E
F
G
H
K
All rights reserved. Reproduction in whole or in parts
owner.
is prohibited without the written consent of the copyright
L
M
2B21 100n
10
115
7
DDR2-D0 DDR2-D1 DDR2-D3 DDR2-D2 DDR2-D6 DDR2-D5 DDR2-D4 DDR2-D7 DDR2-D8
DDR2-D9 DDR2-D10 DDR2-D11 DDR2-D12 DDR2-D13 DDR2-D14 DDR2-D15 DDR2-D16 DDR2-D17 DDR2-D19 DDR2-D18 DDR2-D22 DDR2-D23 DDR2-D20 DDR2-D21 DDR2-D24 DDR2-D30 DDR2-D26 DDR2-D25 DDR2-D28 DDR2-D31 DDR2-D27 DDR2-D29
+1V8-PNX85XX
3B03
FB02
5K6
2B00
3B04
820R
100n
DDR2-VREF-CTRL
2B01
100n
DDR2-ODT
DDR2-RAS
DDR2-WE
22u
100n
100n
100n
2B17
RES
33R
33R
33R
33R
33R
33R
2B18
RES
3B10
3B12
3B14
3B1633R
3B18
3B20
3B22
3B24
100n
2B20
RES
RES 2B19
33R
33R
33R
33R
33R
33R
33R
33R
DDR2-VREF-DDR
DDR2-ODT DDR2-CKE DDR2-WE DDR2-CS
DDR2-BA2 DDR2-BA2
DDR2-RAS DDR2-CAS
DDR2-BA0
DDR2-D0
DDR2-BA1 DDR2-D1 DDR2-D3
DDR2-A0 DDR2-D2
DDR2-A1 DDR2-D4
DDR2-A2 DDR2-D5
DDR2-A3 DDR2-D6
DDR2-A4 DDR2-D7
DDR2-A5 DDR2-D8
DDR2-A6 DDR2-D9
DDR2-A7
DDR2-D10
DDR2-A8
DDR2-D11
DDR2-A9
DDR2-D12
DDR2-A10
DDR2-D13
DDR2-A11
DDR2-D14
DDR2-A12
DDR2-D15
DDR2-CLK_P
DDR2-CLK_N
DDR2-DQM1 DDR2-DQM0
DDR2-DQS2_P DDR2-DQS2_N
DDR2-DQS3_P DDR2-DQS3_N
2B25
12
8
100n
100n
100n
2B27
2B28
2B26
3B27
33R
100n
100n
2B29
2B30
3B26 RES
3B29
33R
33R
13
9
DDR2-VREF-CTRL
100n
100n
2B31
2B32
HYB18TC512160B2F-3S
220R
3B28
33R
3B30
14
15
10
+1V8-PNX85XX
1%1K0
6.3V
3B47
2B22
330u
A1E1J9M9R1
BA
A
CK
LDQS
UDQS
A3
E3
3B49
+1V8-PNX85XX
VDD
J3
N1
RES
1K0 1%
J1
SDRAM
P9J7A7
DDR2-VREF-DDR
6.3V330u
2B23
2B24
RES
A9G9C1C3C7C9E9G1G3
VDDL
Φ
VSSDL
B2
B8
D2
VDDQ
1u0
QSSVSSV
F2
E7
D8
FB01
100n
100n
2B33
7B00
K9
ODT
K2
CKE
K3
WE
L8
CS
K7
RAS
L7
CAS
L2
0
L3
1
M8
0
M3
1
M7
2
N2
3
N8
4
N3
5
N7
6
P2
7
P8
8
P3
9
M2
10
P7
11
R2
12
J8 K8
F7 E8
B7 A8
16
11
+1V8-PNX85XX
FB00
100n
2B34
2B35
G7
A2 E2
L1
NC
R3 R7 R8
G8
0
G2
1
H7
2
H3
3
H1
4
H9
5
F1
6
F9
7
DQ
C8
8
C2
9
D7
10
D3
11
D1
12
D9
13
B1
14
B9
15
B3
UDM
F3
LDM
J2
VREF
F8
H8
H2
17
12 13
1K0 1%
1%
3B50 3B48
1K0
100n
100n
100n
2B38RES
2B37
2B36
RES
3B32
33R
3B33
33R
3B35 33R
3B36
33R
3B38
33R
3B40
33R
3B42
33R
3B44
33R
3B46
33R
2B42 100n
100n
2B39
RES
3B31
100n
100n
2B40
RES
33R
3B3433R
3B37
33R
3B39
33R
3B41
33R
3B43
33R
3B45
33R
DDR2-VREF-DDR
2B41
RES
22u
DDR2-D16 DDR2-D17 DDR2-D19 DDR2-D18 DDR2-D20 DDR2-D21 DDR2-D22 DDR2-D23 DDR2-D24 DDR2-D30 DDR2-D26 DDR2-D25 DDR2-D28 DDR2-D29 DDR2-D27 DDR2-D31
DDR2-DQM3 DDR2-DQM2
19
20
2B00 D7
2B01 D6 2B02 E5
2B03 E5 2B04 F1 2B05 F2 2B06 F2 2B07 F2
2B08 F2
2B09 F2
2B10 F3
2B11 F3
A
2B12 F3 2B13 F5 2B14 F5 2B15 F6
2B16 F6 2B17 F6 2B18 F6 2B19 F6
2B20 F7
2B21 H6
2B22 B10
2B23 E10
B
2B24 E10 2B25 F8
2B26 F8
2B27 F8
2B28 F8 2B29 F8
2B30 F9
2B31 F9
2B32 F9 2B33 F9 2B34 F11
C
2B35 F11 2B36 F12 2B37 F12 2B38 F12
2B39 F12 2B40 F12 2B41 F13
2B42 H12
3B00 C3
3B03 C7 3B04 D7
3B05 H2
D
3B06 H2
3B07 H3
3B08 H2
3B09 H3
3B10 G6
3B11 G6
3B12 G6
3B13 G6
3B14 G6
3B15 G6 3B16 G6 3B17 G6
E
3B18 G6
3B19 G6
3B20 H6 3B21 H6 3B22 H6 3B23 H6 3B24 H6
3B25 H6
3B26 H8 3B27 H8 3B28 H9
F
3B29 H8 3B30 H9 3B31 G12 3B32 G12
3B33 G12
3B34 G12
3B35 G12
3B36 G12
3B37 G12
3B38 G12
3B39 G12
3B40 G12
G
3B41 H12 3B42 H12 3B43 H12
3B44 H12
3B45 H12
3B46 H12
3B47 B10
3B48 B12
3B49 B10
3B50 B12
7600-2 A5 7B00 F10
H
7B01 F3 FB00 B11 FB01 B10 FB02 C6
A
B
C
D
E
F
G
H
I
J
K
L
M
1
2
3
1
4
2 3
6
7
8 18
9
456
PNX8543 - SDRAM
7600-2
2B02
RES
C7C9E9G1G3
C3
VDDQ
B8
D2
PNX85439E
MEMORY
AA34
0
AE33
1
AA33
2
AD31
3
Y34
4
AD32
5
W33
M_A
6
AC32
7
W34
8
Y31
9
AD34
10
V33
11
Y32
12
AC34
0
AD33
M_BA
1
AA32
2
W32
M_CASB
AE31
M_CKE
AB33
N
AB34
M_CLK
P
W31
M_CSB
AJ34
0
AJ31
1
M_DQM
R34
2
R31
3
AG33
N
AG34
M_DQS0
P
AH31
N
M_DQS1
AH32
P
N34
N
N33
M_DQS2
P
N31
N
N32
M_DQS3
P
1u0
2B03
330u 6.3V
2B13
G7
A2 E2 L1
NC
R3 R7 R8
G8
0
G2
1
H7
2
H3
3
H1
4
H9
5
F1
6
F9
7
DQ
C8
8
C2
9
D7
10
D3
11
D1
12
D9
13
B1
14
B9
15
B3
UDM
F3
LDM
J2
VREF
QSSVSSV
F2
F8
E7
H8
D8
H2
AH34
0
AK33
1
AH33
2
AL34
3
AL33
4
AE34
5
AK34
6
AF34
7
AG32
8
AK31
9
AJ32
10
AL32
11
AL31
12
AF31
13
AK32
14
AF32
15
P34
M_DQ
16
T34
17
R33
18
U34
19
V34
20
M33
21
T33
22
M34
23
P31
24
T32
25
P32
26
U31
27
U32
28
M31
29
R32
30
M32
31
AA31
IREF
V31
ODT
V32
M
RASB
AB32
VREF
AE32
WEB
100n
100n
100n
2B15
2B16RES
2B14
3B11
3B13
3B15
3B17
3B19
3B21
3B23
3B25
33R
A
B
C
D
DDR2-A0 DDR2-A1 DDR2-A2 DDR2-A3 DDR2-A4 DDR2-A5 DDR2-A6 DDR2-A7 DDR2-A8 DDR2-A9 DDR2-A10 DDR2-A11 DDR2-A12
DDR2-BA0 DDR2-BA1 DDR2-BA2
DDR2-CAS
DDR2-CKE
DDR2-CLK_N DDR2-CLK_P
DDR2-CS
DDR2-DQM0 DDR2-DQM1 DDR2-DQM2 DDR2-DQM3
DDR2-DQS0_N DDR2-DQS0_P
DDR2-DQS1_N DDR2-DQS1_P
DDR2-DQS2_N DDR2-DQS2_P
DDR2-DQS3_N DDR2-DQS3_P
3B00
220R
+1V8-PNX85XX
E
I
F
DDR2-ODT DDR2-CKE
J
G
H
DDR2-WE DDR2-CS DDR2-RAS DDR2-CAS
DDR2-BA0 DDR2-BA1
DDR2-A0 DDR2-A1 DDR2-A2 DDR2-A3 DDR2-A4 DDR2-A5 DDR2-A6 DDR2-A7 DDR2-A8 DDR2-A9 DDR2-A10 DDR2-A11 DDR2-A12
DDR2-CLK_P DDR2-CLK_N
DDR2-DQS0_P DDR2-DQS0_N
DDR2-DQS1_P DDR2-DQS1_N
2B04
100n
100n
2B05
3B06
3B08
100n
100n
100n
100n
2B09
2B06
2B07
33R
33R
2B10
2B08
RES3B05
220R
3B07
33R
3B09
33R
100n
100n
100n
2B12
2B11
HYB18TC512160B2F-3S
7B01
K9
ODT
K2
CKE
K3
WE
L8
CS
K7
RAS
L7
CAS
L2
0
BA
L3
1
M8
0
M3
1
M7
2
N2
3
N8
4
N3
5
N7
6
P2
7
P8
8
P3
9
M2
10
P7
11
R2
12
J8
CK
K8
F7
LDQS
E8
B7
UDQS
A8
A1E1J9M9R1J1A9G9C1
VDD
VDDL
Φ
SDRAM
A
VSSDL
J3
P9J7A7
A3
E3
N1
B2
I
N
MULTI 12NC : 3139_123_64423
I
N
BD 12NC : 3139_123_64433
CELL 12C : 8239_125_14773
O
12
3
P
1
2
3
4
5
6 20
456
8
97
2009-Dec-18
10
7
11
8 910
DC394240
CLASS_NO
3PC332
-- -- --
1
2
2008-10-17
3
2009-01-16
Vincent Yap / Lee CW
" XB00 ~ XB99 "
12
13
NAME
SV
1514
11 12 13
********SETNAMECHN
PCB SB SSB BD
TV543_2K9
17
25
C
ROYAL PHILIPS ELECTRONICS N.V. 2008
SUPERS.
DATECHECK
16
**** *** *****
2008-10-17
3139 123 6443
9003101
1918
O
2009-06-18
3
2
2009-02-25
P
A2
18670_508_090911.eps
090911
Circuit Diagrams and PWB Layouts

SSB: PNX8543 - Cntrl MIPS/Flash/PCI

1
2
21
A
A
B
B
C
C
D
D
E
+3V3-PER
RES3M77
+3V3-PER
RES3M12 RES3M13 10K
+3V3-PER
RES
3M01-4 10K
RES
RES3M01-1 10K
RES3M05
3M07
10K
3M08 10K 3M09
10K 10K3M10
3M11
10K 10K 10K
3M78
10K3M85
10K
45 3 6 1 8
10K
PNX8543-BL-BOOST_S
PNX8543-LCD-PWR-ON_SPI-DI
F
E
G
F
H
I
G
J
H
K
owner.
is prohibited without the written consent of the copyright
All rights reserved. Reproduction in whole or in parts
I
J
L
DEBUG / RS232 INTERFACE
M
FOR FACTORY USE ONLY
TXD-UP
RXD-UP
N
TXD
K
O
P
L
1
RXD
FOR UART SERVICE CONNECTOR
MULTI 12NC : 3139_123_64423 BD 12NC : 3139_123_64433
CELL 12C : 8239_125_14773
1
2
2
3 4
3
PNX8543 - CONTROL MIPS/FLASH/PCI
BOOTMODE_PNX8543-BL-CTRL
10K3M01-2 2 7
K01SER 3M01-3
100p
2M92
SPI-DO_I2C-SDA
RESET-SYSTEM
EJTAG-TCK
EJTAG-TCK
EJTAG-TDI
EJTAG-TDI
EJTAG-TDO
EJTAG-TDO
EJTAG-TMS
EJTAG-TMS
EJTAG-TRSTN
EJTAG-TRSTN
BOOTMODE_PNX8543-BL-CTRL
WC-EEPROM-PNX5100_SPI-DI IRQ-PCIIRQ-PCI
IRQ-CA
IRQ-CA RXD-MIPS
RXD-MIPS
TXD-MIPS
TXD-MIPS
PNX8543-LCD-PWR-ON_SPI-DI
PI-CLK
PNX8543-BL-BOOST_SPI-CLK
SPI-DO_I2C-SDA PBS-I2C-SCL
PBS-I2C-SCL
TXD-MIPS2
TXD-MIPS2
RXD-MIPS2
RXD-MIPS2
SCL2
SDA2
PCI-AD0 PCI-AD1 PCI-AD2 PCI-AD3 PCI-AD4 PCI-AD5 PCI-AD6 PCI-AD7 PCI-AD8 PCI-AD9 PCI-AD10 PCI-AD11 PCI-AD12 PCI-AD13 PCI-AD14 PCI-AD15 PCI-AD16 PCI-AD17 PCI-AD18 PCI-AD19 PCI-AD20 PCI-AD21 PCI-AD22 PCI-AD23 PCI-AD24 PCI-AD25 PCI-AD26 PCI-AD27 PCI-AD28 PCI-AD29 PCI-AD30 PCI-AD31
3M73 100R 3M74 100R
3M75 100R
3M76 100R
100p
2M93
FM21
FM22
CDS4C12GTA
CDS4C12GTA
6M02
RES
6M01
RES
FM23
FM24
FM25
CDS4C12GTA
CDS4C12GTA
6M03
6M00
3
3 45
5
+3V3-PER
10K
10K
PNX85439E
3M06
3M00
FM39
4M02
FM28
FM40 FM41 FM42 FM43
IM19
3M14
100R
3M15
100R
3M16
RES
100R
100R
3M18
100R
3M19
100R
3M90
100R
3M91
100R
FM37
1M04
5 4 2
3
7
8
1
MSJ-035-10A B AG PPO
5
7600-8
AP27
BL_PWM
AN28
RESET_SYS
AN4
TCK
AP3
TDI
AP4
TDO
AM4 AL4
TRSTN
U2
GPIO_0
U3
GPIO_1
IM21
U4
GPIO_2
L34
GPIO_3
L32
GPIO_4
L31
GPIO_5
V2
GPIO_6
V3
GPIO_7
V4
GPIO_8
V5
GPIO_9
AK27
UA2_TX
AL27
UA2_RX
AP29
CLK_27_OUT
SCL-UP-MIPSSCL1
SDA-UP-MIPSSDA1
SCL-UP-MIPSSCL2
SDA-UP-MIPSSDA2
SCL-SSBSCL3
SDA-SSBSDA3
SCL-SET
SDA-SET
A29
0
B29
1
C29
2
D29
3
A28
4
B28
5
C28
6
D28
7
E28
8
A27
9
B27
10
C27
11
D27
12
E27
13
A26
14
B26
15
PCI_AD
E24
16
D24
17
C24
18
B24
19
A24
20
E23
21
D23
22
C23
23
B23
24
A23
25
E22
26
D22
27
C22
28
B22
29
A22
30
E21
31
4
RES
4M03
RES3M17
RES
1M01
1 2
3
4
56
S4B-PH-SM4-TB(LF)
45
CONTROL
EJTAG
USB
SCL-UP-MIPS
SDA-UP-MIPS
SCL-SSB
SDA-SSB
SCL-SET
SDA-SET
PCI
TRDY
+3V3
+3V3
+3V3
6
SDA
SCL SDA
SCL SDA
FAULT
PWR_EN
RREF
USB_RPU
USB_ID
USB_VBUS
7600-3
PNX85439E
PCI_CBE
DEVSEL
FRAME
IDSEL
INTA_OUT
PERR
SERR STOP
TRDY
REQ_B GNT_B
PLL_OUT
XIO_ACK
XIO_AD25
XIO_SEL
RES
6
7
F33
1SCL
H33
1
D32
2
B33
2
D33
3SMT
G32
3
AN16
DM
AP16
DP
AL16 AK16
IM2
3
AM16
3M20
IM24
3M21
AM17
IM25
AP17
IM26
3M23 10K
AN17
3M24
2K7
3M25
2K7
FM34
3M26
1K2
FM35
3M92
4K7
3M93
4K7
D21
0
C21
1
B21
2
A21
3
IM20
A30
CLK
A25
C26
B30
3M34
30
C D26
IRDY
E25
PAR
C25 D25
B25 E26
D30
REQ
E30
GNT
E31 E29
IM08
3M29 27R
AP28
0R FOR /82
A20 B19
IM28
B20
0
C20 D20
E20
100R
LIGHT-SENSOR
LED2
LED1
1 2
3
3M79
100K
3M80
10K
3M81
10K
7 8 91011
8
SCL1
SDA1
SCL2
SDA2
SCL3
SDA3
15K3M94
3M95
15K
USB20-DM
USB20-DP
USB-OC
12K
1K5
+3V3-PER
10K3M22
+3V3-PER
+3V3-PER
+3V3-PER
3M27
1K2
+3V3-PER
PCI-CBE0 PCI-CBE1 PCI-CBE2 PCI-CBE3
PCI-CLK-PNX8543
PCI-DEVSEL
PCI-FRAME
100R
PCI-AD24
IM07
PCI-IRDY
PCI-PAR PCI-PERR PCI-SERR PCI-STOP PCI-TRDY
PCI-REQ
PCI-GNT
PCI-REQ-B PCI-GNT-B
PCI-CLK-OUT
XIO-ACK
3M35
XIO-SEL-NAND
LIGHT-SENSOR
RC
IM85
LED2
IM84
LED1
KEYBOARD
678 9
6
7
4M84
RES 3M84
10K
RES 4M83
3M97
10K
USB
USB-OC
USB20-DM USB20-DP
PCI-DEVSEL PCI-FRAME
PCI-IRDY PCI-TRDY
PCI-STOP PCI-PERR PCI-SERR
PCI-REQ PCI-GNT
PCI-REQ-B PCI-GNT-B
EN 69Q548.1E LB 10.
11109
+5V
10n
10n
2M01
2M00
2M02
EMC
EMC
EMC
0R4
3M31
IM18
5M01
+T
30R
56K
3M32
FM36
100K
3M33
SERSER
RES
3M83
RES
3M96
3M36-2 10K27
3M36-4 10K4
IM86
IM87
10K
IM88
+3V3-STANDBY
10K
IM89
IM90
NUP1301ML3
5
+3V3-PER
10K36
10K3M38-1 18
PCI-CLK-OUT
2M95
3M88
18
3M86
100R
3M87
220R
47n
NUP1301ML3
4M07
FOR /82 ONLY
+3V3
RES
3M82
RES 7M80 BC847BW
+5V
3M99
7M81 BC847BW
3M38-3
3M38-2 10K27
3M38-4 45 10K
+3V3-STANDBY
10K
+3V3-STANDBY
10K
8 91011
10n
10n
2M04
2M03
EMC
EMC
2M05
47u 6.3V
RES
10n2M16
50M640M6
10K3M36-1 10K3M36-336
3M37-3 10K36
54
3M37-4 10K
100p
2M91
100p
2M90
100R
2M89
4M88
2M88
3M89
100R
2M87
3M98
10R
2M86
10n
CONNECTOR
FM38 FM08 FM09 FM10
27 10K3M37-2
RESERVED
CDCVF2505
RES
3M40
IM31
33R
5M80
100p
5M81 5M82 5M83 5M84 5M85 5M87 5M88
100p
+5V
100p
100p
TO LED PANEL
1110
502382-0570
USB
+3V3-PER
RES
7M02
1M10
1M09
292303-4
1 2
3
4 5
67
1 2
3
4
+3V3-PER
VDD3.3V
CLKI
3M3
0
*
3M43
*
3M46
*
RES
2M17
10n
RES
2M18
100n
6
GND
4
30R 30R 30R 30R 30R 30R 30R 30R
CLKO
2M21
RES
81
10p
RES
2M19
3
0
10p
2
1
IM32
1Y
2
3
FM00
FM01
FM02 FM03 FM04 FM05 FM06 FM07
5
7
1M20
1735446-8
RES
IM33
IM34
RES
1 2
3
4 5 6 7
8
" XM00 ~ XM99 "
5M82 J10
12 13
15141312
16
14 15
17
16
1918
17
20
A
B
FLASH
5M00
33R
3M68
10K
3M58-1 100R1 3M58-2 100R 3M58-3 3M58-4 100R45 3M59-1 1 8 3M59-2 100R 3M59-3 3M59-4 100R45
3M54-2
3M54-4 100R 3M54-1
RESERVED
1
2
3
+3V3-NAND
+3V3-NAND
8
27
27
3M66
2K2
3M67
10K
3 63M54-3 45 1 8
SCL-SET
SDA-SET
EJTAG-TRSTN EJTAG-DETECT EJTAG-TDI
EJTAG-TDO
EJTAG-TMS
EJTAG-TCK
NAND-AD(0) NAND-AD(1)
100R3 6
NAND-AD(2) NAND-AD(3)
100R
NAND-AD(4) NAND-AD(5)
100R3 6
NAND-AD(6) NAND-AD(7)
WP-NANDFLASH
FM45
7
100R2 100R
100R
10K
3M44-3
3M44-1
3 6
********SETNAMECHN
PCB SB SSB BD
TV543_2K9
SUPERS.
**** *** *****
DATECHECK
2008-10-17
XIO-ACK
NAND-CLE NAND-ALE NAND-WEn NAND-REn
+3V3
+3V3
1
27
3M44-2
8
RES
3M45 100K
3M44-4
4
5
+3V3
XIO-SEL-NAND
PCI-AD24 PCI-AD25 PCI-AD26 PCI-AD27 PCI-AD28 PCI-AD29 PCI-AD30 PCI-AD31
+3V3-NAND
+3V3-NAND
PCI-AD0 PCI-AD1 PCI-CBE1 PCI-CBE2
*
3M43 3M46
RES
3M39
2M20
RES
3M41
3M42
+5V
/32 N.S.3M30 N.S. 0R
33R
15p
33R
33R
FOR LIGHT GUIDE
502382-0470
/82 27R N.S. 27R
PCI-CLK-PNX8543
PCI-CLK-ETHERNET
PCI-CLK-PNX5100
IM35
1P09
1 2
3
4
56
/82 ROAD RUNNER
27R 27R 27R
DC394240
CLASS_NO
3PC332
-- -- --
2008-10-17
2009-01-16
NAME
She King Chuang
SV
+3V3-NAND
NAND01GW3B2BN6F
NAND-AD(0) NAND-AD(1) NAND-AD(2) NAND-AD(3) NAND-AD(4) NAND-AD(5) NAND-AD(6) NAND-AD(7)
NAND-CLE NAND-ALE
IM13
XIO-SEL-NAND NAND-REn NAND-WEn WP-NANDFLASH
IM14
XIO-ACK
100p
2M12
RES
RES 7M01
PCA9540B
INP FIL
RESERVED FOR DISPLAY
+3V3
+3V3
FOR BOUNDARY SCAN
10K
RES
3M71 10K
3M70
10K
RES
RES
3M72 22R
3M47
25
14 15
12
13 14
FM33
100n
1 2
3
4 5
6 10 11 14 15 20 21 22 23 24 25 26 27 28
33 34 35 38 39
40 45 46 47 48
FM11
FM12 FM13
FM17
FM14
FM15
FM16
2M10
SCL-DISP
SDA-DISP
FOR FACTORY
USE ONLY
+3V3
53261-0871
3
29
30 31 32
41 42 43 44
16 17 9
8
18 19 7
+3V3
3
VDD
I2C
-BUS CTRL
VSS
6
RES 4M05 RES 4M06
7M00
12
37
VCC
Φ
[FLASH]
1G
0 1 2
3
IO
4 5 6 7
NC
CLE ALE CE RE WE WP R B
VSS
36
13
5
SC0
8SC1
40DSLCS1
7SD12 SDA
3139 123 6443
10
C
ROYAL PHILIPS ELECTRONICS N.V. 2008
8171613121
03101
19 20
15 16 17
2M11
RES
1M03
10
2009-06-18
2009-02-252
C
100n
D
E
F
G
H
I
J
K
L
1 2
M
3
4 5 6 7
8
9
N
O
P
A2
1M01 J4 1M03 J17 1M04 K4 1M09 D10 1M20 J11 1P09 I12 2M00 C8 2M01 C8 2M02 C9 2M03 C9
A
2M04 C9 2M05 D9 2M10 C16 2M11 C17 2M12 G15 2M16 D9 2M17 G10 2M18 G10 2M19 H11 2M20 H11 2M21 H11 2M86 K9
B
2M87 K9 2M88 J9 2M89 J9 2M90 I9 2M91 I9 2M92 K2 2M93 K3 2M95 I8
3M00 B4 3M01-1 C2 3M01-2 B2 3M01-3 B2
C
3M01-4 B2 3M05 C2 3M06 B4 3M07 C2 3M08 C2 3M09 C2 3M10 C2 3M11 C2 3M12 D2 3M13 D2 3M14 D4
D
3M15 D4 3M16 D4 3M17 E4 3M18 E4 3M19 E4 3M20 C6 3M21 D6 3M22 D6 3M23 D6 3M24 D6 3M25 D6 3M26 E6
E
3M27 E6 3M29 G6 3M30 G11 3M31 C8 3M32 D8 3M33 D8 3M34 F6 3M35 H7 3M36-1 E8 3M36-2 E8 3M36-3 E8 3M36-4 E8
F
3M37-2 F9 3M37-3 F9 3M37-4 F9 3M38-1 G8 3M38-2 G8 3M38-3 G8 3M38-4 G8 3M39 H11 3M40 H9 3M41 H11 3M42 H11
G
3M43 G11 3M44-1 I14 3M44-2 I14 3M44-3 I14 3M44-4 I14 3M45 K14 3M46 G11 3M47 K15 3M54-1 F13 3M54-2 F13 3M54-3 F13 3M54-4 F13
H
3M58-1 D13 3M58-2 D13 3M58-3 D13 3M58-4 D13 3M59-1 D13 3M59-2 D13 3M59-3 D13 3M59-4 D13 3M66 D13 3M67 E13 3M68 C13 3M70 J14
I
3M71 J15 3M72 K14 3M73 J3 3M74 J3 3M75 K3 3M76 K3 3M77 C2 3M78 C2 3M79 I6 3M80 J6 3M81 K6
J
3M82 I8 3M83 I8 3M84 J7 3M85 C2 3M86 I9 3M87 I9 3M88 J8 3M89 K9 3M90 E4 3M91 E4 3M92 E6 3M93 E6
K
3M94 C7 3M95 C7 3M96 J8 3M97 K7 3M98 K9 3M99 J8
4M02 B5 4M03 C4 4M05 H15 4M06 H15 4M07 F8 4M83 K7
L
4M84 J7 4M88 J9 5M00 C13 5M01 C9 5M80 J10 5M81 J10
18670_509_090911.eps
5M83 J10 5M84 J10 5M85 J10 5M87 J10 5M88 J10 6M00 K4 6M01 J3 6M02 J4 6M03 K3 6M04 E8 6M05 E9 7600-3 E6 7600-8 B5 7M00 C15 7M01 G15 7M02 G10 7M80 J8 7M81 K8 FM00 J10 FM01 J10 FM02 J10 FM03 J10 FM04 J10 FM05 J10 FM06 J10 FM07 J10 FM08 E9 FM09 E9 FM10 E9 FM11 J16 FM12 J16 FM13 J16 FM14 J16 FM15 J16 FM16 J16 FM17 J16 FM21 J4 FM22 J3 FM23 K3 FM24 K3 FM25 K4 FM28 B4 FM33 C15 FM34 E6 FM35 E6 FM36 D8 FM37 J4 FM38 E9 FM39 B4 FM40 C5 FM41 C5 FM42 C5 FM43 C5 FM45 E14 IM07 F7 IM08 G6 IM13 E15 IM14 E15 IM18 C8 IM19 D5 IM20 F6 IM21 C5 IM23 C6 IM24 D6 IM25 D6 IM26 D6 IM28 H6 IM31 H10 IM32 H11 IM33 H11 IM34 H11 IM35 I12 IM84 K7 IM85 J7 IM86 I8 IM87 I8 IM88 J8 IM89 K8 IM90 K8
090911
2009-Dec-18
Circuit Diagrams and PWB Layouts

SSB: PNX8543 - Stdby-Cntrl/Debug

EN 70Q548.1E LB 10.
A
B
C
D
E
F
G
H
K
owner.
All rights reserved. Reproduction in whole or in parts
is prohibited without the written consent of the copyright
M
1 8
2
3
4
5 20
6
123 456
PNX8543 - STANDBY-CONTROL / DEBUG
A
+3V3-STANDBY
B
+3V3-STANDBY
+3V3
+3V3-STANDBY
C
+3V3-STANDBY
D
E
I
F
J
G
H
L
I
MULTI 12NC : 3139_123_64423 BD 12NC : 3139_123_64433
CELL 12C : 8239_125_14773
ID40
4D00
RC_uP
+3V3
+5V
+1V2-PNX85XX
+1V2-PNX5100
RES 4D02
RES FOR ITV
3D00 3D01
RES RES
3D02 3D03
RES
3D04
RES
3D05
RES
3D06
3D08
3D10
RES
3D68
RES
RES 10K
3D13 3D14 3D15 3D16
RES3D17
3D18
RES
3D19RES 3D20
3D21 3D22
3D23
RES 10K
3D24
RES
3D25
3D26 10K 3D27
ID47
ID49
FOR /82
10KRES 10K 10K 10K 10K 10K 4K7
10K3D07
10K 10K3D09 27K
100K3D11
10K3D12
10K
10K 4K7
10K 100K 100K 10K 10K
3D36
RES 4D01
REGIMBEAU_CVBS-SWITCH
10K 10K
FD22
10K
100K
10K
3D62
4K7
4K7
RC
RC1
RC2
BOLT-ON-TS-ENn
RESET-PNX5100
UART-SWITCH
WP-NANDFLASH
AUDIO-RESET
AUDIO-MUTE
2D09
1n0
EJTAG-DETECT
LAMP-ON-OUT
RESET-SYSTEM
2D02
100n
3D29
33K
3D33
33K
ID50
RESET-NVM
CEC-HDMI
STANDBY DETECT1 DETECT2
POWER-OK
ENABLE-3V3
BOLT-ON-IO
KEYBOARD
SPI-PROG
12
22p
2D00
22p
2D01
BOLT-ON-TS-ENn RESET-NVM RESET-PNX5100 RESET-ETHERNETRESET-ETHERNET UART-SWITCH WP-NANDFLASH AUDIO-RESET AUDIO-MUTE
RC_uP
RC_uP REGIMBEAU_CVBS-SWITCH CEC-HDMI
PI_3
PI_3
SDM
SDM
LCD-SCL
LCD-SCL
EJTAG-DETECT LAMP-ON-OUT STANDBY DETECT1 DETECT2 POWER-OK ENABLE-3V3
RXD-UP
RXD-UP
TXD-UP
TXD-UP BOLT-ON-IO
RESET-SYSTEM AV2-BLK_LCD-SDA AV1-BLK KEYBOARD LIGHT-SENSOR AV1-STATUS AV2-STATUS
SPI-PROG
SPI-WP
SPI-WP
ID18
18K
3D30
ID20
10K
3D34
10K
3D35
ID23
10K
3D67
3 4
1D00
6D01
27M
FD00
2
5
2
5
BAS316
ID22
3D52 100R
10K
3D28-1
1 8
ID17
6
7D00-1 BC847BS(COL)
1
ID19
3
7D00-2 BC847BS(COL)
4
6
7D02-1 BC847BS(COL)
1
ID51
3
7D02-2 BC847BS(COL)
4
W1
W2
FD19
ID52
FD20
FD21
+3V3-STANDBY
1
2D03
1u0
4D08
PNX85439E
10K
3D28-2
27
3
7D01
PDTC114EU
2
FOR /32
7600-6
5
W3
AC2 AC1 AB3 AB2 AB1 AD2 AD1 AC5
AF2 AF1 AG4 AG3 AG2
AC4 AC3 AE1 AD5 AD4 AD3 AE5 AE4
AG1 AH5 AH4 AH3 AH2 AH1
AN3 AN2 AP2 AP1
AK2 AK4
7
STANDBY
I
XTAL
O
VSS_XTAL
0 1 2
3
P0
4 5 6 7
0 1 2
P1
3
7
0 1 2
3
P2
4 5 6 7
UA_RX
0
UA_TX
1 2
P3
3
4 5
0 1
CADC
2
3
4
P6
5
CLK CSB
SPI
SDO
SCL
MC
SDA
PWM
PSEN
RESET_IN
DETECT1
9
11
12
13
14
15
7 8 91011
+3V3-STANDBY
4K7
10K
4K7
RES
RES
3D38
3D39
AJ1 AK3 AK1
SDI
AJ4
AL5 AK5
AJ3
0
AJ2
1
AE2
AE3
ALE
AF4
EA
AF3
DETECT2
3D45
3D47 100R 3D48
3D49
3D50 100R
3D51
RES
+3V3-STANDBY
6
3D37
100R 100R3D46
RES 2D17 100n
100R
100n2D14
RES
100R
100R
4D09
FD12
RES
10K
3D63
RES
7D10 NCP303LSN30
1
OUTP
GND
7 8 91011
10K3D44
10K
10K
RES
3D40
3D42 10K
3D43 10K
3D41
INP
CD
NC
3
4
2
5
SPI-CLK SPI-CSB
SPI-SDI
SPI-SDO
SCL-UP-MIPS SDA-UP-MIPS
RESET-STBY
+3V3-STANDBY
RES
ID44
ID45
100n
2D15
RES
SPI-SDO SPI-SDI
SPI-CLK
SPI-CSB
SPI-WP
LED1 LED2
+3V3-STANDBY
PSEN
ALE
EA
4K7
RES
3D66
6D02
ID46
BAS316
3K3
3D65
RES
M25P05-AVMN6
FD13
FD15
FD16
FD17
RES
3D64
10K
RES
2D16
DEBUG
RESET-SYSTEM
RESERVED FOR DEVT PURPOSE
100n
7D09
5
D
512K
6
C
FLASH
1
S
3
W
7
HOLD
DETECT-12V
+3V3-STANDBY
2D04
84
VCC
Φ
VSS
RESET-NVM
100n
RES
FD14
2
Q
+3V3-STANDBY
4D06
FD03
1
4D07
RES
+3V3-PER
RES
3D57
RES
6D00
FD05
RES 7D08 PDTC114EU
3D56-1
1
10K
ID31
330R
SML-310
12
NCP303LSN30
2D05
+3V3-PER
7
3D56-2
2
8
+3V3-PER
3D56-3
3 6
1 2
3
16
7D05
2
INP
5
CD
100n
10K
FD04
7D06 M24C64-WDW6
10K
0 1 2 SDA
OUTP
GND
NC
4
FD11
(8Kx8)
EEPROM
ADR
3
8
Φ
4
1710
13 14
+3V3-STANDBY
10K
3D58
1
7D07
BC857BW
2D06
RES
100n
3D56-4
45
7
WC
6
SCL
5
FD08
FD02
10K
FD06
FD07
MAIN NVM
SPI-PROG
SDM
TSTPOINT FOR DEBUG
SPI-PROG
TSTPOINT
FOR DEBUG
SDM
FD09
FD10
1
2
RES
1D01
SKHU
3
4
100p
TSTPOINT
GND
FOR DEBUG
2D08
100p
RES2D07
FD18
RES
12 13 14
18
RESET-STBY
SCL-UP-MIPS
SDA-UP-MIPS
19
1D00 A3 1D01 H13 2D00 A3 2D01 B3 2D02 D2 2D03 G5 2D04 A10 2D05 D12 2D06 E13 2D07 H14 2D08 I14 2D09 B3
A
2D14 B7 2D15 F8 2D16 F9 2D17 B7
3D00 B2 3D01 B2 3D02 B2 3D03 B2 3D04 B2 3D05 B2 3D06 B2 3D07 B2
B
3D08 C2 3D09 C2 3D10 C2 3D11 C2 3D12 C2 3D13 C2 3D14 C2 3D15 C2 3D16 C2 3D17 C2 3D18 C2
C
3D19 C2 3D20 C2 3D21 D2 3D22 D2 3D23 D2 3D24 D2 3D25 D2 3D26 E2 3D27 E2 3D28-1 F4 3D28-2 F5 3D29 F3
D
3D30 F3 3D33 G3 3D34 H3 3D35 H3 3D36 H2 3D37 A7 3D38 A7 3D39 A7 3D40 A7 3D41 A7 3D42 A8 3D43 A8
E
3D44 A8 3D45 B7 3D46 B7 3D47 B7 3D48 B7 3D49 B7 3D50 C7 3D51 C7 3D52 C4 3D56-1 E12 3D56-2 E12
F
3D56-3 F12 3D56-4 E13 3D57 H11 3D58 C13 3D62 H2 3D63 F7 3D64 F9 3D65 F8 3D66 F8 3D67 I3 3D68 C2
4D00 A2
G
4D01 A2 4D02 B2 4D06 C11 4D07 D11 4D08 H4 4D09 E7 6D00 H11 6D01 G3 6D02 F9 7600-6 A5 7D00-1 F4 7D00-2 G4
H
7D01 F5 7D02-1 H4 7D02-2 H4 7D05 C12 7D06 E12 7D07 E13 7D08 I11 7D09 A10 7D10 F7 FD00 A4 FD02 C14
I
FD03 C11 FD04 E12 FD05 E11 FD06 F13 FD07 F14 FD08 F13 FD09 H13 FD10 I13 FD11 E13
FD12 E7 FD13 B9 FD14 B11 FD15 B9 FD16 B9 FD17 B9 FD18 H14 FD19 B4 FD20 B4 FD21 C4 FD22 D2 ID17 F4 ID18 F3 ID19 F4 ID20 G3 ID22 H4 ID23 H3 ID31 F12 ID40 A1 ID44 F8 ID45 F8 ID46 F9 ID47 F2 ID49 G2 ID50 H2 ID51 H4 ID52 B4
A
B
C
D
E
F
G
H
I
J
K
L
M
NN
O
P
" XD00 ~ XD99 "
1
2
3
4
5
6
7
8
9
10
11
12
13
14
DC394240
CLASS_NO
3PC332
-- -- --
2008-10-17
2009-01-1623
NAME
She King Chuang
SV
1
CHECK DATE
15
********EMANTESNHC
PCB SB SSB BD
TV543_2K9
SUPERS.
**** *** *****
2008-10-17
16
17
3
2 2009-02-25
3139 123 6443
25
C
ROYAL PHILIPS ELECTRONICS N.V. 2008
18
13010
19
11
11
20
18670_510_090911.eps
O
2009-06-18
P
A2
090911
2009-Dec-18

SSB: Bolt-on

Circuit Diagrams and PWB Layouts
EN 71Q548.1E LB 10.
2 20
A
123 45678 9
3
4
5
6
BOLT-ON
B
C C
D
E
F
G
H
A
2E23
RES
1E01
1 2
FE25
3
4 5
10
1 2
3
4 5 6 7
8
9
67
RES 1E02
11 12
FE14
B
C
RES RES 100R RES3E39 100R
FE11 FE12
FE29
FOR FLAVORS
RES
RES
FE15 FE30 FE17
FE18 FE19
100p
2E08
RES
RES
100n
5E02 33R
3E38
RES
5E04
2E2410RES
100n
5E06 33R
33R
33R5E03
+3V3-STANDBY
+5V
+3V3
+3V3-STANDBY
100p
100p
2E12
2E11
RES
RES
100p
100p
100p
2E10
2E13
RES 2E09
RES
RES
3E18
100R
RES RES
3E19
100R
RES
3E20
100R
RES
3E21 3E22
RES 100R
3E23 100R
RES
3E24 100R
RES
100R
LCD-SCL
AV2-BLK_LCD-SDA
RXD-BOLT-ON
TXD-BOLT-ON
SCL-SSB SDA-SSB
AV1-STATUS
STANDBY
CVBS-OUT-SC1-PBS
RXD-BOLT-ON
TXD-BOLT-ON
RC
D
E
71
8
RESERVED FOR ITV
RES
4E09
RES
4E10
RES
4E11
RES
4E12
RXD-MIPS
TXD-MIPS
IE37
RXD-UP
IE38
TXD-UP
9
10
11
13
14
15
10 11
1612
12 13
17
RESERVED FOR ITV
+3V3-STANDBY
33R
RES
RXD
TXD
STANDBY
FE27
FE48
FE49
4E18
10K
3E40
RES
FE26
4E19
RES 7E09 PDTC144EU
IE39
RES
7E07-1
74HC4066PW
1
13
RES
7E07-2
74HC4066PW
4
5
RES 7E07-3
74HC4066PW
8
6
RES 7E07-4
74HC4066PW
11
12
5E05
14
1
X1
7
1
X1
714
1
X1
714
1
X1
714
3E41RES
10K
RES 7E08 PDTC144EU
IE31
1
1
1
1
RES
2E22
100n
2
3
9
10
FE50
FE51
RXD-UP
RXD-MIPS
TXD-UP
TXD-MIPS
18
19
1E01 A1 1E02 C1 1E04 G1 2E08 C1 2E09 D2 2E10 D3 2E11 D2 2E12 D2 2E13 D2 2E22 B9 2E23 A2 2E24 B2
A
3E18 C3 3E19 C3 3E20 C3 3E21 C3 3E22 C3 3E23 C3 3E24 C3 3E38 B2 3E39 B2 3E40 C8 3E41 D9
4E09 B5
B
4E10 B5 4E11 C5 4E12 C5 4E18 B7 4E19 D7 4E20 G5 4E21 G5 5E02 B2 5E03 C2 5E04 B2 5E05 B8 5E06 C2
C
7E07-1 B8 7E07-2 C8 7E07-3 C8 7E07-4 D8 7E08 E8 7E09 E8 FE11 B1 FE12 C1 FE14 C1 FE15 C1 FE17 C1
D
FE18 C1 FE19 C1 FE25 B1 FE26 C8 FE27 E7 FE29 C1 FE30 C1 FE48 B7 FE49 C7 FE50 C9 FE51 D9 IE31 B9
E
IE37 C5 IE38 C5 IE39 D8
A
B
D
E
F
G
H
K
owner.
is prohibited without the written consent of the copyright
All rights reserved. Reproduction in whole or in parts
M
N
O
P
I
F
J
G
L
H
RESERVED FOR ITV
RES
1E04
9
502382-0870
1 2
3
4 5 6 7
8
+12V
PBS_SPI_DI
PNX8543-BL-BOOST_SPI-CLK
SPI-DO_I2C-SDA
PBS-I2C-SCL
F
RES
PBS_SPI_DI
RC1 RC2
4E20
RES
4E21
WC-EEPROM-PNX5100_SPI-DI
PNX8543-LCD-PWR-ON_SPI-DI
G
H
I
J
K
L
MULTI 12NC : 3139_123_64423 BD 12NC : 3139_123_64433
CELL 12C : 8239_125_14773
12
3 456
7
8
910
11 12
13
M
N
DC394240
CLASS_NO
3PC332
1
-- -- --
2
2008-10-17
3
2009-01-16
NAME
" XE00 ~ XE99 "
1
2 13
3
4
5
6 1514
9
10
11
12
Vincent Yap / Lee CW
SV
PCB SB SSB BD
CHECK
********SETNAMECHN
TV543_2K9
SUPERS.
**** *** *****
2008-10-17********
DATE
3
3139 123 6443
12
19
03101
207
25
C
ROYAL PHILIPS ELECTRONICS N.V. 2008
178 16
18
2009-06-18
2009-02-252
O
P
A2
18561_500_090708.eps
090708
2009-Dec-18
Circuit Diagrams and PWB Layouts

SSB: Analog IO - Scart 1 & 2

12
2 3
A
A
B
B
C
C
D
SCART
D
E
F
E
+5V
100n
2F03
F
G
H
16
VDD
MDX
G4
14
4X1 4X2
15
4
VEEVSS
8
I
G
+5V
IF12
J
3F05
100R
7F03 BC847BW
H
K
owner.
All rights reserved. Reproduction in whole or in parts
is prohibited without the written consent of the copyright
I
L
+5V
IF14
3F07
100R
7F04 BC847BW
M
J
N
K
O
P
MULTI 12NC : 3139_123_64423
BD 12NC : 3139_123_64433
L
CELL 12C : 8239_125_14773
1
2
123 4
3 45
ANALOG IO - SCART 1&2
IF02
3F01
2
6K8
IF03
3F03
5
6K8
2F00
IF04
7F02 74HC4053PW
6
13
1
12
2
11
1 2
10
3
5 9
7
100n
2F04
FF27
3F06
390R
100n
2F05
FF28
3F08
390R
6
7F00-1 BC847BS(COL)
1
3
7F00-2 BC847BS(COL)
4
+5V
8K2
100n
IF06
3
3F04
3F00
150R
3F02
150R
3
4F00
RES
IF00
FF26
IF01
FF00
PDTC114EU
2
7F01
4
2F01
10u
AP-SCART-OUT-L
2F02
10u
AP-SCART-OUT-R
REGIMBEAU_CVBS-SWITCH
1
FF38
Y_CVBS-MON-OUT-SC
CVBS-TER-OUT
CVBS-OUT-SC1-PBS
FOR CINCH OUT
RES
CVBS-OUT-SC1
Y_CVBS-MON-OUT-SC
Y_CVBS-MON-OUT
4
5 191
AUDIO-CL-L
6
AP-SCART-OUT-R
AUDIO-IN2-R
AUDIO-CL-R
AP-SCART-OUT-L
A-PLOP
AUDIO-IN2-L
AV2-PB_SC2-B
FF31
AV2-STATUS
AV2-Y_SC2-G
AV2-PR_SC2-R
3F20
68R
FF32
AV2-BLK-BO
AV2-BLK_LCD-SDA
CVBS2
CVBS-OUT-SC2
68R
3F26
SCART
5F00
BC847BW
5
+5V
7F08
30R
1n0
EMC
2F35
+5V
2F38
3
2
3F52
560R
2F36
100n
IF30
3F48
1
100R
RES
4F01
6
56
EN 72Q548.1E LB 10.
RES3F54
RES 2F46
75R
DC394240
15
+3V3
4K7
3F55
RES
10p
2F47
RES
0001
1F19
1F20
1F21
1
CHECK
15
13
TEMPERATURE
4K7
100R3F56
3F57 100R
+3V3
10p
2F48
FF14
FF15
FF16
FF17
FF18
FF19
FF20
FF21
FF22
FF23
FF24
FF25
0001
100p
0001
2F45
PCB SB SSB BD
13
6
7 14
3F09
470R
RES
100p
2F07
3F10
100K
RES
FF29
3F11
1K0
100p
2F09
RES
3F13
470R
RES
RES
100p
3F14
2F11
100K
FF30
3F15
1K0
100p
2F13
RES
100p
2F14
SCART
FOR SCART
4F07
SCART
FF33
3F18
8K2
3K3
330p
3F19
2F15
2F16
2F17
7F05
BC847BW
8
6F00
0001
1F00
CDS4C12GTA
RES
6F01
0001
1F22
CDS4C12GTA
RES
6F02
0001
1F23
CDS4C12GTA
RES
6F03
0001
1F03
CDS4C12GTA
RES
0001
1F04
6F04
CDS4C12GTA
RES
6F05
0001
1F05
2F43
CDS4C12GTA
RES
100p
0001
6F06
1F06
CDS4C12GTA
RES
0001
100p
6F07
1F07
CDS4C12GTA
RES
+3V3
4K7
100n
2F18
3F22
3
3F23
1
IF16
2
10K
9
FF01
1n0
2F06
FF02
1n0
2F08
FF03
1n0
2F10
1n0
2F12
1
4F03RES
FOR CINCH
0001
4F04
FOR CINCH
RES
FF05
FF06
FF08
FF09
FF10
FF11
FF12
FF13
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
FF04
100p
75R
1F08
3F24
6F08
CDS4C12GTA
RES
10
SCART2
(AV2)
1F02
MRC-021H-09 PC
9
11
AP-SCART-OUT-R
AUDIO-IN1-R
AP-SCART-OUT-L
AUDIO-IN1-L
SC1-B
AV1-STATUS
SC1-G
FF34
SC1-R
107 8
FOR SCART
12
SCART
FF35
4F05
AV1-BLK-BO
0001
1F09
1F10
IF26
33R
3F45
4
IF28
5
3
BC847BPN(COL)
3F49
330R
10K
3F50
1u0
6F09
CDS4C12GTA
RES
6F10
CDS4C12GTA
RES
100n
2F37
7F07-2
BC847BPN(COL)
IF31
IF27
7 17
100p
2F19
100p
2F44
0001
AV1-BLK
4F06
FOR CINCH
RES
CVBS1
22K
1K0
3F47
3F46
6
IF29
2
7F07-1
1
IF32
3F51
330R
8 14
4u7
18K
3F53
2F39
9
10
7 8 9
CVBS-OUT-SC1
12
10
11
13
TEMPERATURE SENSOR CIRCUIT
SCL-SET
SDA-SET
SCART
FF37
FF36
3F27 470R
3F29 1K0
0001
1F11
RES
0001
6F12 6F11
1F12
RES
470R3F31
0001
6F13
1F13
RES
1K03F33
0001
6F14
1F14
RES
100p
3F28
2F21
100K
RES
RES
RES
100p
2F23
100p
3F32
2F25
100K
RES
RES
100p
2F27
RES
SCART
0001
1F15
6F15
RES
0001
1F16
RES 6F16
0001
1F17
6F17
RES
0001
1F18
RES 6F18
100n
2F33
IF25
3F41
1
10K
100p
2F34
2F29
FF39
SCART
330p
BC847BW
3F36
8K2
3K3
3F37
+3V3
4K7
3F40
3
7F06
2
3F44
68R
" XF00 ~ XF99 "
13
11 12
12
CDS4C12GTA
2F22
CDS4C12GTA
2F24
CDS4C12GTA
CDS4C12GTA
2F20
1n0
1n0
1n0
1n0
2F26
100p
2F28
CDS4C12GTA
100p
2F42
CDS4C12GTA
100p
2F30
CDS4C12GTA
100p
2F31
CDS4C12GTA
6F19
CDS4C12GTA
RES
6F20
CDS4C12GTA
RES
6F21
CDS4C12GTA
RES
CLASS_NO
3PC332
-- -- --
2008-10-17
2009-01-1623
Vincent Yap / Lee CW
NAME
SV
3F42
16
TO
SENSOR
1M71
1 2
3
4
56
502386-0470
100n
SCART1
(AV1)
1F01
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
MRC-021H-09 PC
********EMANTESNHC
TV543_2K9
**** *** *****
SUPERS.
2008-10-17
DATE
16
14 15 16 17
1u0
1u0
7FA4 PDTC114EU
RES 4FA1
1
2
3
5
2FA3
2FA6
10K
7FA2
BC857BW
10K
RES 4FA2
1K0
3FC3RES
1u0
1u0
3FA9
22K
2FA7
TACHO1
TACHO2
3FB8
RES
1K0
RES 4FA3
FAN1-OUT
TACHO1-INV
TACHO2-INV
20
1FA1
1 2
3
45
502386-0370
1FA2
1 2
3
45
502386-0370
3FC6
100R
10u
2FA8
RES
1K0
2009-06-18
3
2 2009-02-25
17
FAN CIRCUIT
FAN1-DRV TACHO1
FAN2-DRV TACHO2
FAN1-DRV
FAN2-DRV
FAN1-OUT
TACHO1-INV
TACHO2-INV
SDA-SET
SCL-SET
SCL-SET
SDA-SET
18
3FA3
10R
3FA5
10R
RES3FA6
10R
2FA9
2FB1
+3V3
3FB7
RES
6FA2
RES
RES 100R3FB9
RES3FC1 100R
3FC5 100R
+12V
RES
3FA1
RES
6FA1
RES 7FA3
BCP53 1
100n
3FB3
+3V3
3FB4
RES
100n
3FB5
1K0
SML-310
3
1
2
7FA8
PCA9533
100R3FC4
6
7
1K0
SML-310
4
4
+3V3
3FB1
RES
PDTA114EU
10K
PDTA114EU
1K0
10K
OS
SDA
SCL
SCL
SDA
+12V
100p
2FA1
2FA2
+12V
100p
2FA4
2FA5
+12V
7FA1
BCP53
3
2
3
2
10K
3FB2
3FB6
3FA2
3FA4
1
100R
RES
3FA7
100R
+12V
+3V3
3FA8
+12V
7FA5
27K
+12V
7FA6
27K
100n
2FB2
RES
RES
8
7FA7 LM75ADP
+VS
7
A0
6
A1
5
A2
GND
4
RES3FC2
+3V3
100n
2FB3
84
VDD
LED0
Φ
LED1
LED2
LED3
VSS
3139 123 6443
25
C
ROYAL PHILIPS ELECTRONICS N.V. 2008
18
1514
19
13
13010
2011
16
17
1F00 A7 1F01 D14 1F02 D9 1F03 D7 1F04 D7 1F05 E7 1F06 F7 1F07 G7 1F08 H8 1F09 I7
A
1F10 I7
A
B
C
D
E
F
2u2
G
H
I
J
K
L
M
N
O
P
A2
1F11 D12 1F12 E12 1F13 E12 1F14 F12 1F15 G12 1F16 G12 1F17 H12 1F18 H12 1F19 J13 1F20 J13 1F21 K13
B
1F22 B7 1F23 C7 1FA1 B17 1FA2 B17 1M71 B14 2F00 D3 2F01 A4 2F02 B4 2F03 D2 2F04 G3 2F05 I3 2F06 A8
C
2F07 A6 2F08 B8 2F09 B6 2F10 C7 2F11 C6 2F12 D7 2F13 D6 2F14 D6 2F15 E6 2F16 F6 2F17 G6
D
2F18 H7 2F19 I7 2F20 D12 2F21 D11 2F22 E12 2F23 E11 2F24 E12 2F25 E11 2F26 F12 2F27 F11 2F28 G12 2F29 G11
E
2F30 H12 2F31 H12 2F33 I11 2F34 J12 2F35 J5 2F36 J6 2F37 J6 2F38 K5 2F39 K8 2F42 G12 2F43 E7 2F44 I7
F
2F45 K13 2F46 B13 2F47 B13 2F48 B13 2FA1 B16 2FA2 B16 2FA3 B16 2FA4 C16 2FA5 C16 2FA6 C16 2FA7 E17
G
2FA8 E17 2FA9 F15 2FB1 G15 2FB2 H16 2FB3 I16
3F00 A3 3F01 B2 3F02 B3 3F03 B2 3F04 D3 3F05 H2 3F06 H2
H
3F07 I2 3F08 I2 3F09 A6 3F10 A6 3F11 B6 3F13 C6 3F14 C6 3F15 C6 3F18 E6 3F19 E6 3F20 G4 3F22 H7
I
3F23 H7 3F24 H8 3F26 I5 3F27 D11 3F28 D11 3F29 E11 3F31 E11 3F32 E11 3F33 F11 3F36 G11 3F37 G11
J
3F40 I11 3F41 I12 3F42 J12 3F44 K11 3F45 J6 3F46 J7 3F47 J8 3F48 K6 3F49 K7 3F50 L6 3F51 L7 3F52 L5
K
3F53 K8 3F54 A13 3F55 A13 3F56 B13 3F57 B13 3FA1 C15 3FA2 C16 3FA3 C15 3FA4 D16 3FA5 D15 3FA6 D15 3FA7 D16
L
3FA8 E16 3FA9 E16 3FB1 E15 3FB2 F16 3FB3 F15 3FB4 F15
18561_501_090709.eps
3FB5 G15 3FB6 G16 3FB7 H15 3FB8 H17 3FB9 H15 3FC1 H15 3FC2 I16 3FC3 I16 3FC4 J15 3FC5 J15 3FC6 D17
4F00 I3 4F01 L5 4F03 D8 4F04 D8 4F05 H10 4F06 J10 4F07 F6 4FA1 H16 4FA2 H16 4FA3 I17 5F00 J5 6F00 A7 6F01 B7 6F02 C7 6F03 D7 6F04 D7 6F05 E7 6F06 F7 6F07 G7 6F08 H7 6F09 I6 6F10 I6 6F11 D12 6F12 E12 6F13 E12 6F14 F12 6F15 G12 6F16 G12 6F17 H12 6F18 H12 6F19 J12 6F20 J12 6F21 K12 6FA1 C15 6FA2 H15 7F00-1 B3 7F00-2 B3 7F01 D4 7F02 E2 7F03 H2 7F04 I2 7F05 H7 7F06 I11 7F07-1 K7 7F07-2 K6 7F08 K5 7FA1 C16 7FA2 D16 7FA3 D15 7FA4 E16 7FA5 F16 7FA6 F16 7FA7 H16 7FA8 J15 FF00 B4 FF01 A8 FF02 B8 FF03 C8 FF04 D7 FF05 E8 FF06 E8 FF08 E8 FF09 F8 FF10 F8 FF11 G8 FF12 G8 FF13 G8 FF14 D13 FF15 D13 FF16 E13 FF17 E13 FF18 E13 FF19 E13 FF20 F13 FF21 F13 FF22 F13 FF23 G13 FF24 G13 FF25 G13 FF26 B4 FF27 H3 FF28 I3 FF29 B6 FF30 C6 FF31 E6 FF32 F6 FF33 H6 FF34 H10 FF35 G10 FF36 F11 FF37 E11 FF38 D4 FF39 I11 IF00 A4 IF01 B4 IF02 B3 IF03 B3 IF04 D3 IF06 E3 IF12 H2 IF14 I2 IF16 H7 IF25 I11 IF26 J7 IF27 K6 IF28 K7 IF29 K7 IF30 K5 IF31 K6 IF32 K7
090709
2009-Dec-18
Circuit Diagrams and PWB Layouts

SSB: YPbPr / Side I/O / S-video

1
A
A
B
B
C
C
D
D
E
F
E
G
F
H
I
G
J
H
K
is prohibited without the written consent of the copyright
owner.
All rights reserved. Reproduction in whole or in parts
I
L
M
J
N
K
L
O
P
MULTI 12NC : 3139_123_64423 BD 12NC : 3139_123_64433
CELL 12C : 8239_125_14773
123 45
1
MSJ-035-29D PPO (PHT)
DVI AUDIO INPUT
SIDE IO
5
MDC-013V1-B
1
2 3
2
FG00
1G18
FG27
1
1n0
3
2
2G01
FG01
1n0
2G03
SVHS IN
2
C
4
Y/CVBS
3
FG03
1
1G37
CVBS
MTJ-032-37BAA-432 NI
2
1G20-1
1
YELLOW
LEFT
MTJ-032-37BAA-432 NI
WHITE
RIGHT
MTJ-032-37BAA-432 NI
1G20-3
RED
HEADPHONE
5
1G21
4 2
3
7
8
1
MSJ-035-10A B AG PPO
2
YPBR / SIDE IO / S-VIDEO
1G00
1G01
FG02
FG04
(YELLOW)
(WHITE)
6 451G20-2
(RED)
8
9 7
FG07
FG42
FG10
EN 73Q548.1E LB 10.
6G12 C9
4
CDS4C12GTA
CDS4C12GTA
4
3G00
1K0
3G02
1K0
1G02
IG00
100p
RES
2G02
IG01
100p
RES
2G00
100p
6G02
2G04
CDS4C12GTA
RES
3
6G00
RES
6G01
RES
567
5
AUDIO-IN4-R
AUDIO-IN4-L
6 17
7
8
1G22
MSP-636H2-01
12 11 10
9
8
7
6
5
4
3
2 1
8 910111213 14
AUDIO-OUT-L
AUDIO-OUT-R
A-PLOP
14
IG20
2G33
100n
4G08
RES
FOR FLAVORS
FG47
4
3G28-4
2G25
1u0
3G22
6K8
2G28
1u0
3G26
6K8
2G32
10p
5
4K7
15 16
IG12
IG13
3G20
150R
6
IG16
2
1 7G00-1 BC847BS(COL)
IG14
IG15
3G24
150R
3
IG17
5
4 7G00-2 BC847BS(COL)
+3V3
100n
2G31
4K7
3G28-1
8 1
IG18
4K7
3G28-3
3 6
3G30
RES
RES
7G01 BC847BW
IG22
180R
100p
2G26
100p
2G29
3G29
47R
9
10
1G10
1G11
1G12
FG15
1n0
2G15
1G131G14
6G12RES
FG16
1n0
2G17
RES 6G13
11
FG12
CDS4C12GTA
CDS4C12GTA
CDS4C12GTA
2G12
FG13
2G13
FG14
2G14
3G18
1K0
RES
3G19
3G41
1K0
RES
3G42
6G09
RES
6G10
RES
6G11
RES
CDS4C12GTA
CDS4C12GTA
12
150p
150p
150p
IG10
2G16
100p
RES
100K
IG11
RES
2G18
100p
100K
13
AV3-Y
AV3-PB
AV3-PR
AUDIO-IN3-L
AUDIO-IN3-R
SPDIF-OUT-1
SPDIF-OUT
3G21
FG24
470R
1n0
RES
2G27
6G14
RES
FG25
3G25
470R
1n0
RES
2G30
6G15
RES
2G34
100n
IG21
22p
2G35RES
CDS4C12GTA
CDS4C12GTA
IG19
3G31
RES
120R
15
1G15
1G16
5G02
33R
18
1G25-2 WHITE
MSP-303H-BBB-132-03
4
3
1G25-3
RED
MSP-303H-BBB-132-03
6
5
FG41
6G16
CDS4C12GTA
2G36 12p
RES
19
MSP-303H-BBB-132-03
FG28
1G17
16
2
1
1G25-1 BLACK
17
20
A
B
C
D
E
F
G
FRONT-Y_CVBS
FRONT-C
100p
6G37
2G49
1G36
1G04
1G05
6G04RES
1G06
6G05
RES
FOR ITV
FG08
1G07
4G00
RES
FOR ITV
4G07
FOR ITV
RES
FG09
1G08
RES
CDS4C12GTA
RES
IG02
FG05
3G06
1K0
1n0
2G06
CDS4C12GTA
FG06
3G08
1K0
1n0
2G08
CDS4C12GTA
RES3G10
100R
CDS4C12GTA
RES
6G06
LEFT
RIGHT
1G09
22n
1K0
2G10
CDS4C12GTA
6G07
3G11
FOR ITV
RES
6G08
2G07
2G09
RES
FG11
3G12
CDS4C12GTA
100p
RES
IG03
100p
RC1
RC2
3G62-2
27
3G62-1
1
3G62-3
3 6
45
3G62-4
22n
1K0
2G11
AUDIO-IN5-L
AUDIO-IN5-R
LCD-SCL
HP_LOUT
HP_ROUT
AUDIO-OUT-L AUDIO-MUTE AUDIO-OUT-R
CVBS-OUT-SC2
4V
4V100u
2G50
2G51
100u
IG04
IG05
33R 33R
8
33R 33R
RESERVED
100p
2G19
100p
RES
RES 2G20
RES 2G21
FG17
FG18
RES
3G44
RES
3G43
RES
3G45
RES
3G27
100R
FG20
47R
FG29
47R 47R
FG23
100p
FG19
FG21
FG22
RES
RES
100p
2G22
RES
RES
1M36
1-1735446-1
100p
2G37
RES
100p
2G24
RES
4G04
RES
4G05
RES
3G13 100R
3G14
1 2
3
4 5
TO SIDE I/O
6 7
8
9 10 11
RES
5G00
30R
RES
5G01
30R
FRONT-C
FRONT-Y_CVBS
AUDIO-IN5-L
100R
AUDIO-IN5-R
" XG00 ~ XG99"
3
4
5
6
7
678 9
8
9 19
10
11
12
10
FOR /32 & /82
VGA
CONNECTOR
1G30
16 1 9 2
10
3
11
4
12
5
13
6
14
7
15
8
1226-02B-15S-FAE-02
13
FG31 FG32 FG33
FG34
FG35
FG36
FG37
FG38
FG39
17
14
11 12
6G36
BAT54
CLK-SCL
DATA-SDA
DC394240
CLASS_NO
3PC332
-- -- --
2008-10-17
2009-01-1623
Vincent Yap / Lee CW / Hor SL
NAME
SV
1G31
RES 6G17
6G18
1G32
RES
1G33
6G19
RES
1G34
+5V
2G48
1
6G20
RES
6G35
1G35
100n
RES
5G32
+5VDCOUT
2G46
PCB SB SSB BD
CHECK DATE
5G31
100n
15
13 14
47p
2G41
CDS4C12GTA
47p
2G42
CDS4C12GTA
47p
2G43
CDS4C12GTA
47p
2G44
CDS4C12GTA
47p
2G45
CDS4C12GTA
600R
600R
4u7
2G47
6G31
TV543_2K9
**** *** *****
SUPERS.
2008-10-17
16
3G49
3G50
BAS321
********EMANTESNHC
4K7
4K7
3G56
6G32
4K7
BAS321
17
R-VGA
G-VGA
B-VGA
H-SYNC-VGA
V-SYNC-VGA
EDID NVM VGA
M24C02-WDW6
1 2
IG32
3
25
WC-EEPROM-PNX5100_SPI-DI
3G63RES
+3V3
22K
FG46
7G31
8
Φ
(256x8)
WC
EEPROM
0 1 2 SDA
3G58
100R
SCL
ADR
4
3139 123 6443
C
ROYAL PHILIPS ELECTRONICS N.V. 2008
18
15
RES 7G32
BC847BW
10K
3G59
FG43
7
FG44
6
FG45
5
14
13010
3G60
4G09
RES
3G61
100R
6G34
3
2 2009-02-25
20
16 17
4K7
6G33
BAS321
2009-06-18
H
I
J
K
L
BAS321
M
N
O
P
A2
1G00 C3 1G01 D3 1G02 E3 1G04 F3 1G05 G4 1G06 H4 1G07 I4 1G08 J4 1G09 J5 1G10 A9
A
1G11 B9 1G12 C9 1G13 C9 1G14 D9 1G15 B15 1G16 C15 1G17 E16 1G18 C2 1G20-1 G3 1G20-2 G3 1G20-3 H3 1G21 I2
B
1G22 A7 1G25-1 D16 1G25-2 A15 1G25-3 C15 1G30 H11 1G31 F13 1G32 G13 1G33 G13 1G34 H13 1G35 H13 1G36 F4 1G37 F2
C
1M36 G9 2G00 D4 2G01 C3 2G02 C4 2G03 D3 2G04 E4 2G06 G5 2G07 G5 2G08 H5 2G09 H5 2G10 J4
D
2G11 J6 2G12 A10 2G13 B10 2G14 C10 2G15 C8 2G16 C10 2G17 D8 2G18 D10 2G19 G8 2G20 G8 2G21 G9 2G22 G9
E
2G24 I9 2G25 B12 2G26 B13 2G27 B14 2G28 C12 2G29 C13 2G30 C14 2G31 D13 2G32 D12 2G33 D12 2G34 E14 2G35 E14
F
2G36 E15 2G37 I9 2G41 F14 2G42 G14 2G43 G14 2G44 H14 2G45 H14 2G46 I13 2G47 I14 2G48 H13 2G49 F4
G
2G50 I7 2G51 I7
3G00 C4 3G02 D4 3G06 G5 3G08 H5 3G10 I4 3G11 J4 3G12 J5 3G13 G9 3G14 G9 3G18 C9
H
3G19 C10 3G20 B13 3G21 B14 3G22 B12 3G24 C13 3G25 C14 3G26 C12 3G27 H8 3G28-1 D13 3G28-3 E13 3G28-4 D12 3G29 E14
I
3G30 E13 3G31 E15 3G41 D9 3G42 D10 3G43 H8 3G44 H8 3G45 H8 3G49 H14 3G50 H14 3G56 I14 3G58 J15
J
3G59 I16 3G60 I17 3G61 J16 3G62-1 J6 3G62-2 J6 3G62-3 J6 3G62-4 J6 3G63 I15
4G00 J3 4G04 F9 4G05 G9 4G07 J3
K
4G08 E12 4G09 I16 5G00 I9 5G01 I9 5G02 E15 5G31 I13 5G32 I13 6G00 C3 6G01 D3 6G02 E4 6G04 G4 6G05 H4
L
6G06 I4 6G07 J4 6G08 J5 6G09 A9 6G10 B9 6G11 C9
18670_513_090911.eps
6G13 D9 6G14 B14 6G15 C14 6G16 E15 6G17 F13 6G18 G13 6G19 G13 6G20 H13 6G31 I14 6G32 J14 6G33 I17 6G34 J17 6G35 H13 6G36 H12 6G37 F4 7G00-1 B13 7G00-2 C13 7G01 D13 7G31 I15 7G32 I16 FG00 C3 FG01 D3 FG02 E3 FG03 F3 FG04 F3 FG05 G4 FG06 H4 FG07 H3 FG08 I4 FG09 J4 FG10 J3 FG11 J5 FG12 A9 FG13 B9 FG14 C9 FG15 C8 FG16 D8 FG17 G8 FG18 G8 FG19 G9 FG20 G8 FG21 H9 FG22 I9 FG23 I9 FG24 B14 FG25 C14 FG27 C2 FG28 E16 FG29 H9 FG31 H12 FG32 H12 FG33 H12 FG34 H12 FG35 I12 FG36 I12 FG37 I12 FG38 I12 FG39 I12 FG41 E15 FG42 J3 FG43 I16 FG44 J16 FG45 J16 FG46 I15 FG47 E12 IG00 C4 IG01 D4 IG02 G6 IG03 H6 IG04 I7 IG05 I7 IG10 C10 IG11 D10 IG12 A13 IG13 A13 IG14 C13 IG15 C13 IG16 B13 IG17 C13 IG18 D13 IG19 E15 IG20 D12 IG21 E14 IG22 E13 IG32 J15
090911
2009-Dec-18

SSB: HDMI

Circuit Diagrams and PWB Layouts
EN 74Q548.1E LB 10.
12
1
A
A
2
B
B
C
C
D
For FLAVORS
D
E
F
E
G
F
H
RES
1H04
1 2
3
4 5 6 7
8
9 10 11 12 13 14 15 16 17 18 19
2021 2223
DC1R019JBAR190
RES
4H03-4
45
RES
4H03-33 6
RES
4H03-227
RES
4H03-11
RES
4H04-4
45
RES
4H04-33 6
RES
4H04-227
RES
4H04-1
1 8
HDMI CONNECTOR SIDE
I
G
J
H
K
All rights reserved. Reproduction in whole or in parts
is prohibited without the written consent of the copyright
owner.
I
L
M
J
For FLAVORS
RES
1H05
1
2
3
4
5
6
7
8
9 10 11 12 13 14 15 16 17 18 19
DC1R019JBAR190
2021 2223
RES
45
4H01-4
RES
4H01-33
RES
27
4H01-2
RES
4H01-11
RES
45
4H02-4
RES
4H02-33 6
RES
27
4H02-2
RES
4H02-11 8
N
CONNECTOR
ITEM NO
HORIZONTAL
HDMI SIDE
HDMI 1
HORIZONTAL HORIZONTAL
HDMI 2
K
L
HDMI 1 HDMI 2 HDMI 3
O
P
MULTI 12NC : 3139_123_64423 BD 12NC : 3139_123_64433 CELL 12C : 8239_125_14773
1
VERTICAL VERTICAL VERTICAL
1H03 1H05 1H04
1H01 1H00 1H02
2
3 4
3
4
HDMI
HDMI CONNECTOR 3
1H02
1 2
3
4 5 6 7
8
9 10 11 12 13 14 15 16 17 18 19
FH27
DC1R019WBER220
HDMI CONNECTOR 2
1 2
3
4 5 6
8
7
8
9 10 11 12 13 14 15 16 17 18 19
DC1R019WBER220
1 2
3
4 5 6 7
8
9 10 11 12 13 14 15 16 17 18 19
FH08
DC1R019JBAR190
HDMI CONNECTOR 1
1
2
3
6
4
5
6
8
7
8
9 10 11 12 13 14 15 16 17 18 19
FH32
DC1R019WBER220
HDMI PNS 1+1
Y N N
Y N N
2021 2223 2425
26
1H00
2021 2223 2425
26
1H03
2021 2223
1H01
21
20 2223 2425
26
HDMI PNS 2+1
Y N N
Y Y N
FH26
FH21
FH09
FH33
HDMI FRAME 3+1
FH22 FH23
FH24 FH25
3H07
FH16
FH17 FH18
FH19
FH20
3H09
FH04 FH05
FH06 FH07
3H11
FH28 FH29
FH30
FH31
3H13
Y N N
Y Y Y
3 17
ARX-DDC-DAT
47K
47K
3H08
BRX-DDC-DAT
47K
47K
3H10
DRX-DDC-CLK DRX-DDC-DAT
47K
47K
3H12
CRX-DDC-CLK CRX-DDC-DAT
47K
47K
3H14
FLAVORS 2+1 32"_42"
4
ARX2+
ARX2-
ARX1+
ARX1-
ARX0+
ARX0-
ARXC+
ARXC-
ARX-DDC-CLK
ARX-5V ARX-5V
ARX-HPD
BRX2+
BRX2-
BRX1+
BRX1-
BRX0+
BRX0-
BRXC+
BRXC-
BRX-DDC-CLK
BRX-5V BRX-5V
BRX-HPD
DRX2+
DRX2-
DRX1+
DRX1-
DRX0+
DRX0-
DRXC+
DRXC-
DRX-5V DRX-5V
DRX-HPD
CRX2+
CRX2-
CRX1+
CRX1-
CRX0+
CRX0-
CRXC+
CRXC-
CRX-5V CRX-5V
CRX-HPD
Y Y Y
N N N
5678
6
RESERVED
10u
100n
2H38
2H40
RES
RES
470n
100n
2H47
1H06
22 23 24 25 26 27 28 29
FI-RE21S-VF-R1300
N
Y Y
N N N
RES
2H02
2H00
1 2
3
4 5 6 7
8
9 10 11 12 13 14 15 16 17 18 19 20 21
67
RES
7H01
LD1117DT18
3 2
OUTIN
COM
1
5H00
30R
22u 16V
RES 1H07
1 2
3
45
502382-0370
+3V3
FH38
2H39
RES
CEC
CEC
CEC
CEC
5
+3V3
+1V8-PNX85XX
HDMI-ITV
BRX2+
BRX2­BRX1+
BRX1­BRX0+
BRX0­BRXC+
BRXC­CEC
BRX-DDC-CLK BRX-DDC-DAT
BRX-5V BRX-HPD
FLAVORS 2+0 22"
5
22u
SCL-SSB SDA-SSB
ARXC+ ARXC­ARX0+ ARX0­ARX1+ ARX1­ARX2+ ARX2-
BRXC+ BRXC­BRX0+ BRX0­BRX1+ BRX1­BRX2+ BRX2-
CRXC+ CRXC­CRX0+ CRX0­CRX1+ CRX1­CRX2+ CRX2-
DRXC+ DRXC­DRX0+ DRX0­DRX1+ DRX1­DRX2+ DRX2-
9 10111213 14 15
100n
2H19
DDC-SCL DDC-SDA
VDDH_3V3
ARX-5V
ARX-DDC-CLK ARX-DDC-DAT
ARX-HPD
BRX-5V
BRX-DDC-CLK BRX-DDC-DAT
BRX-HPD
CRX-5V CRX-DDC-CLK CRX-DDC-DAT
CRX-HPD
DRX-5V DRX-DDC-CLK DRX-DDC-DAT
DRX-HPD
4H13RES
IH34
14
100n
100n
2H20
RXC+ RXC­RX0+
RX0-
RX1+
RX1-
RX2+
RX2-
DDC-SDA DDC-SCL
CEC
BAT54 COL
6n8
2H34
3H68
4R7
RES
4H12
1413
+5V
3H01
6H01
RES
+5V
100R3H59
CLASS_NO
3PC332
-- -- --
2008-10-17
2009-01-1623
Dave Tan YH
NAME
SV
33K
3H02
2H35
FH15
DC394240
15
33K
100n
1
15
PCB SB SSB BD
CHECK DATE
87
10u
2H37
RES
100n
2H04
2H03
3H65 3H66
9
30R
RES 5H04
FH00
22u
1u0
2H01
2H43
100n
100n
100n
2H10
2H11
2H09
4H19
TDA9996
51
100R
100R
1K03H20RES
52
50 49
FH37
53
47
14 13 17 16 20 19 23 22
33 32 36 35 39 38
42 41
63 62 66 65 69 68 72 71
81 80 84 83 87 86
90 89
10
VDD_1V8
VDD_1V8
100n
100n
2H12
7H11
845914624
IN
OUT
SCL SDA
0
SEL
1 INT HP_CTRL
MODE
+
C
­+
D0
­+
D1
­+
D2
-
+
C
­+
D0
­+
D1
­+
D2
-
+
C
­+
D0
­+
D1
­+
D2
-
+
C
­+
D0
­+
D1
­+
D2
-
75
XTAL
VDDC_1V8
VDDH_1V8
I2C
RXA
RXB
RXC
RXD
1
FH36
11
+3V3
25V
470n
2H05
2H06
220u
VDDH_3V3
34
40
15
21
95
VDDO_1V8
7
18
647082
VDDH_3V3
Φ
VDDC_3V3
VSS
37
98
43
85
92
26
56
67
73
CEC-HDMI
CEC
+3V3-STANDBY
12
5H01
30R
Code 3198 021 32290 (22R) in ECM for 5H06
5H06
30R
5H03
30R
100n
100n
2H13
2H14
VDDO_3V3
VDDS_3V3
2u2
2H21
2H23
4
55
88
VDDS_3V3
VDDO_3V3
+
C
-
+
D0
-
+
D1
OUT
-
+
D2
-
CLK
DDC
DAT
PD
R12K
5V
CLK
RXA DDC
DAT
HPD
5V
CLK
RXB DDC
DAT
HPD
5V
CLK
RXC DDC
DAT
HPD
5V
CLK
RXD DDC
DAT
HPD
DDC
CDEC
STBY
CEC
TEST
NC
RES
3H58 100R
4H10
RES
7H10
BC847BW
4H11
3H60
RES
22K
13
FH01
VDDO_3V3
1u0
2H07
FH40
VDDS_3V3
2u2
2H42
FH41
VDDH_3V3
1u0
2H36
100n
100n
FH46
100K
RES
3H67
2H16
2H22
3H15
2H27
2H26 100n
2H28
FH43 FH44
FH42
FH47
2H45 100n
2H44 1n0
RES
IH48
100n
2H18
2H17
100n
FH49 FH50
1%12K
100n
100n2H25
100n
5H07
33R
4H08
7H09
BSH111
2
3
1
2H15
2u2
2
3
99
100
96 97 93 94
5 6
48
74
10 12 11
9
29
31 30
28
59 61 60 58
77 79 78 76
44 54
57
27
25
" XH00 ~ XH99 "
8
9
10
11
12
16
********EMANTESNHC
TV543_2K9
**** *** *****
SUPERS.
2008-10-17
16
17
DDC-SCL DDC-SDA
RREF-PNX85XX
RX0­RX0+
RX1­RX1+
RX2­RX2+
RXC­RXC+
25
18
7600-4
PNX85439E
C18 E19
C15 D15
FH48
3H64
C16
1%
12K
B18 B17
A17 A16
B16 B15
A19 A18
B14 B13
A13 A12
B12 B11
A15 A14
D19 E15
3139 123 6443
C
ROYAL PHILIPS ELECTRONICS N.V. 2008
18
16 17
19
HDMI_DV
DDC_SCL_A DDC_SDA_A
DDC_SCL_B DDC_SDA_B
HDMI_RREF
P
HDMI_RX0_A
N
P
HDMI_RX1_A
N
P
HDMI_RX2_A
N
P
HDMI_RXC_A
N
P
HDMI_RX0_B
N
P
HDMI_RX1_B
N
P
HDMI_RX2_B
N
P
HDMI_RXC_B
N
HOT_PLUG_A HOT_PLUG_B
13010
CLK
DV
FID
HS
0 1 2
3
4
DV_UVIN
5 6 7
8
9
DV_VALID
DV_VS
0 1 2
3
4
DV_YIN
5 6 7
8
9
15
19
20
B8 C9 D9
B6 A6 E7 D7 C7 B7 A7 E8 D8 C8
A8 E9
B4 A4 E5 D5 C5 B5 A5 E6 D6 C6
2009-06-18
3
2 2009-02-25
20
A
B
C
D
E
F
G
H
I
J
K
L
M
N
O
P
A2
1H00 D3 1H01 H3 1H02 B3 1H03 F3 1H04 D2 1H05 H2 1H06 D5 1H07 D7 2H00 B5 2H01 B8
A
2H02 B6 2H03 D7 2H04 D7 2H05 B10 2H06 B9 2H07 A11 2H09 D8 2H10 D8 2H11 D8 2H12 D8 2H13 C10 2H14 C10
B
2H15 C11 2H16 C11 2H17 C11 2H18 C11 2H19 C11 2H20 C12 2H21 D10 2H22 D11 2H23 D10 2H25 G11 2H26 F11 2H27 F11
C
2H28 G11 2H34 H12 2H35 H12 2H36 B11 2H37 A7 2H38 A6 2H39 A7 2H40 A5 2H42 B11 2H43 B8 2H44 H11
D
2H45 H11 2H47 B5
3H01 E12 3H02 E13 3H07 C4 3H08 C4 3H09 E4 3H10 E4 3H11 H4 3H12 H4 3H13 J4 3H14 J4
E
3H15 F11 3H20 E7 3H58 J10 3H59 J12 3H60 J10 3H64 I15 3H65 E7 3H66 E7 3H67 H11 3H68 H12
4H01-1 I2 4H01-2 I2
F
4H01-3 I2 4H01-4 H2 4H02-1 I2 4H02-2 I2 4H02-3 I2 4H02-4 I2 4H03-1 D2 4H03-2 D2 4H03-3 D2 4H03-4 D2 4H04-1 E2
G
4H04-2 E2 4H04-3 E2 4H04-4 E2 4H08 J11 4H10 J10 4H11 J10 4H12 J12 4H13 H11 4H19 D8 5H00 B6 5H01 A10 5H03 B10
H
5H04 A7 5H06 B10 5H07 H11 6H01 G12 7600-4 H16 7H01 A6 7H09 J11 7H10 J10 7H11 D8 FH00 B8 FH01 A11 FH04 G4
I
FH05 G4 FH06 G4 FH07 H4 FH08 H3 FH09 H3 FH15 J13 FH16 E4 FH17 E4 FH18 E4 FH19 E4 FH20 E4
J
FH21 F3 FH22 C4 FH23 C4 FH24 C4 FH25 C4 FH26 C3 FH27 C3 FH28 I4 FH29 J4 FH30 J4 FH31 J4 FH32 J3
K
FH33 J3 FH36 H9 FH37 E8 FH38 A7 FH40 B11 FH41 B11 FH42 H11 FH43 G11 FH44 G11 FH46 F11 FH47 H11 FH48 I15
L
FH49 E11 FH50 E11 IH34 J11 IH48 J11
123 4
5
6
7 8 9101112
13
14 15 16 17
18670_514_090911.eps
090911
2009-Dec-18

SSB: Ethernet

Circuit Diagrams and PWB Layouts
EN 75Q548.1E LB 10.
A
B
C
D
E
G
H
K
owner.
All rights reserved. Reproduction in whole or in parts
is prohibited without the written consent of the copyright
M
N
1 10
3
4
5
7
8
123 45678
ETHERNET
A
2N1D
+3V3-ET-ANA
5N08
220R
10n
4u7
100n
2N1F
2N1E
RES
+3V3-ET-DIG
B
7N04
103
107
100n
2N11
117
116
PLL TX VDD33
(BIAS)
VDD18
4
11
12
10
100n
100n
2N0Y
2N10
111
2027354249
LAN9420
VDD33A
PCICLK
48
FRAME
88
0
87
1
86
2
85
3
84
4
79
5
78
6
77
7
75
8
72
9
71
10
70
11
69
12
68
13
65
14
62
15
46
AD
16
45
17
44
18
41
19
40
20
39
21
38
22
37
23
31
24
30
25
29
26
26
27
25
28
24
29
23
30
22
31
15
PCIRST
76
0
61
1
47
CBE
2
33
3
52
IRDY
53
TRDY
55
STOP
100n
100n
2N12
2N13
5N06
220R
5N07
220R
IN01
100n
2N0P
2N0Q
12
IN18
2N0V
4u7
12
2N0W
PCI-AD0 PCI-AD1 PCI-AD2 PCI-AD3 PCI-AD4 PCI-AD5 PCI-AD6 PCI-AD7 PCI-AD8 PCI-AD9 PCI-AD10 PCI-AD11 PCI-AD12 PCI-AD13 PCI-AD14 PCI-AD15 PCI-AD16 PCI-AD17 PCI-AD18 PCI-AD19 PCI-AD20 PCI-AD21 PCI-AD22 PCI-AD23 PCI-AD24 PCI-AD25 PCI-AD26 PCI-AD27 PCI-AD28 PCI-AD29 PCI-AD30 PCI-AD31
IN17
100n
6.3V22u
2N17
100n
100n
2N0D
2N0C
100n
100n
100n
2N14
2N16
2N15
+3V3-ET-ANA
100n
PCI-CLK-ETHERNET PCI-FRAME
C
D
IN19
3N0Y
E
I
F
+3V3-ET-DIG
RESET-ETHERNET
10K
J
RESET-ETHERNET PCI-CBE0 PCI-CBE1 PCI-CBE2 PCI-CBE3 PCI-IRDY PCI-TRDY PCI-STOP
+3V3
G
+3V3
H
L
3
5671321
100n
2N0Z
283643
VSS
50
57
66
808389
73
100n
100n
2N0A
2N0B
I
MULTI 12NC : 3139_123_64423
BD 12NC : 3139_123_64433
CELL 12C : 8239_125_14773
2N1G
51
9
100n
2N18
74
58
67
99
102
108
+3V3-ET-DIG
10n
100n
RES 2N1H
81
90
8
VDD18VDD33
(CORE)(IO)
DEVSEL
PERR SERR
IDSEL
PWRGOOD
VAUXDET
EEDIO
GPO3
EECLK|GPO4
GPO4
LED
GPIO<0:2>
AUTOMDIX_EN
TPO
TPI
EXRES
110
118
9
EECS
12 16
13
14
15116
17
182
910111213
A
4u7
2N1K
B
82
54 6016
PAR
56 59 14
INT
34 18
REQ
17
GNT
19
PME
121 122
IN02
92
IN03
94
IN04
95
123
1
1
2
2
3
115 120
XI
119
XO
101
+
100
­106
+
104
-
IN0K
109
32 63 64 91 93 96
NC
97
98 105 112 113 114 124 125 126 127 128
PCI-DEVSEL
PCI-PAR PCI-PERR PCI-SERR
IRQ-PCI
100R3N0G
PCI-AD23
PCI-REQ
RES
PCI-GNT
+3V3-ET-DIG
3N0E 10K
1%12K43N0W
30p
2N0L
+3V3-ET-DIG
3N0V
1M0
1N02
25M
30p
2N0K
IN0W
IN0Y
IN0Z
47p
2N1A
RES
1K0
3N0H
RES
1%
49R9
3N0A
6N02
NUP1301ML3
5N10
11n
15p
2N0E
0R
3N0L
3N0J
RES
270R 6N00
RES
BAS316
6N01
RES
BAS316
47p
47p
2N1B
2N1C
RES
RES
EMC
49R9 1%
3N0B
6N03
NUP1301ML3
5N11 5N12
11n
15p
2N0F
EMC
0R
3N0M
IN10
+3V3-ET-ANA
3N0C
2N0G
3N0N
IN22 IN23IN21IN20
1%
49R9
11n
15p
IN0A
RES
IN11
3N0K
220R
IN0B
1%
3N0D
49R9 1%
6N04
0R
6N05
NUP1301ML3
5N13
2N0H
NUP1301ML3
11n
15p
0R
3N0P
10R
3N0F
1N00
2N0M
IN05 IN06 IN15 IN07
IN08
IN09
22n
470p
820p
2N1L
ETHERNET CONNECTOR
RES 2N1J
13 14
1840420-1
1 2
3
4 5 6 7
8
C
D
E
F
G
H
IN0V
IN0P
IN0NIN0C
IN0T
COMMON TEST JIG
19
1N00 F13 1N02 D9 2N0A G6 2N0B G6 2N0C H4 2N0D H4 2N0E G9 2N0F G10 2N0G G11 2N0H G11 2N0K E9 2N0L E9 2N0M F12 2N0P G4 2N0Q G3 2N0V H3 2N0W H4 2N0Y G6 2N0Z G6 2N10 G5 2N11 G5 2N12 G5 2N13 G5 2N14 G5 2N15 G4 2N16 G4 2N17 G4 2N18 A7 2N1A D10 2N1B D10 2N1C D10 2N1D A6 2N1E A6 2N1F A6 2N1G A6 2N1H A7 2N1J F12 2N1K A7 2N1L F12
3N0A E9 3N0B E10 3N0C E11 3N0D E11 3N0E D8 3N0F E12 3N0G C8 3N0H D9 3N0J C10 3N0K D11 3N0L G9 3N0M G10 3N0N G11 3N0P G11 3N0V D9 3N0W E8 3N0Y E2
5N06 G3 5N07 G3 5N08 A6 5N10 F9 5N11 F10 5N12 F11 5N13 F11 6N00 D10 6N01 D10 6N02 E10 6N03 E10 6N04 E11 6N05 E11 7N04 B5 IN01 B4 IN02 C8 IN03 C8 IN04 C8 IN05 F13 IN06 F13 IN07 F13 IN08 F13 IN09 F13 IN0A D11 IN0B D11 IN0C H11 IN0K D8 IN0N H12 IN0P H12 IN0T H12 IN0V H12 IN0W C10 IN0Y D10 IN0Z D10 IN10 D11 IN11 D11 IN15 F13 IN17 G4 IN18 G4 IN19 E2 IN20 H9 IN21 H10 IN22 H11 IN23 H11
20
A
B
C
D
E
FF
G
H
I
J
K
L
M
I
N
********SETNAMECHN
**** *** *****
13
O
2009-06-18
3
2009-02-252
3139 123 6443
P
25
C
ROYAL PHILIPS ELECTRONICS N.V. 2008
182
03101
16
A2
201910
1
2 3 4
O
P
31 9
4
5
5678 9
7
8
11
10 11 12
DC394240
CLASS_NO
3PC332
-- -- --
1
2008-10-17
2
3
2009-01-16
Dave Tan YH
14
NAME
SV
156
" XN00 ~ XNZZ "
12 17
13
PCB SB SSB BD
CHECK
TV543_2K9
SUPERS.
DATE
2008-10-17
16
18561_502_090709.eps
090709
2009-Dec-18

SSB: PCMCIA

Circuit Diagrams and PWB Layouts
EN 76Q548.1E LB 10.
A
B
C
D
E
F
G
H
K
owner.
All rights reserved. Reproduction in whole or in parts
is prohibited without the written consent of the copyright
L
M
1
3
1
A
POD : SUPPLY / CONTROL
(POD IS THE EQUIVALENT OF COMMON INTERFACE)
3K00
+5V
+T
0R4
2K00
PCMCIA-VCC-VPP
22u
B
C
D
E
F
J
4 12
2
3
65 17112
45678
7
8
10
PCMCIA
10K
100n
2K08
3K29
7K04
74LVC245A
1
3EN1 3EN2
19
G3
CABLE CARD INTERFACE
ROW_A 1K00-A
GND1
1
D3
2
D4
3
D5
4
D6
5
D7
6
CE1
7
A10
8
OE
9
A11
10
A9
11
A8
12
A13
13
A14
14
WE|P
15
RDY|BSY
16
VCC1
17 18 19 20 21 22 23 24 25 26 27 28 29
30 31 32 33 34
69 70
MPC-01 PBT
35 36 37 38 39
40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68
71 72
MPC-01 PBT
VPP1 A16 A15 A12 A7 A6 A5 A4 A3 A2 A1 A0 D0 D1 D2 WP|IOIS16 GND2
ROW_B1K00-B GND3 CD1 D11 D12 D13 D14 D15 CE2 VS1 IORD IOWR A17 A18 A19 A20 A21 VCC2 VPP2 A22 A23 A24 A25 VS2 RESET WAIT INPACK REG BVD2|SPKR BVD1|ST D8 D9 D10 CD2 GND4
PCMCIA-VCC-VPP
IK17
PCMCIA-VCC-VPP
SCHG
FK00
10K
PCMCIA-D3 PCMCIA-D4 PCMCIA-D5 PCMCIA-D6 PCMCIA-D7
CA-CE1
PCMCIA-A10
CA-OE
PCMCIA-A11
PCMCIA-A9
PCMCIA-A8 PCMCIA-A13 PCMCIA-A14
CA-WE
IRQ-CA
CA-MIVAL CA-MICLK
PCMCIA-A12
PCMCIA-A7
PCMCIA-A6
PCMCIA-A5
PCMCIA-A4
PCMCIA-A3
PCMCIA-A2
PCMCIA-A1
PCMCIA-A0
PCMCIA-D0
PCMCIA-D1
PCMCIA-D2 3K16
FK02
CA-CD1
MDO3 MDO4 MDO5 MDO6 MDO7
CA-CE2
CA-VS1 CA-IORD CA-IOWR
CA-MISTRT
CA-MDI0 CA-MDI1 CA-MDI2 CA-MDI3
CA-MDI4 CA-MDI5 CA-MDI6 CA-MDI7
MOCLKA
CA-RST
CA-WAIT
CA-INPACK
CA-REG
MOVALA
MOSTRTA
MDO0 MDO1 MDO2
CA-CD2
PCMCIA-VCC-VPP
+3V3_BUF
3K19
CA-RST
FK04
100K
CA-INPACK
CA-WAIT
IRQ-CA
CA-CD1
CA-CD2
CA-VS1
MOCLKA
MOSTRTA
MOVALA
MDO0
MDO1
MDO2
MDO3
MDO4
MDO5
MDO6
MDO7
IK00
IK01
IK02
IK03
IK04
IK05
IK06
IK07
IK08
IK09
IK10
IK11
IK12
IK13
IK14
IK15
IK16
PCMCIA-VCC-VPP
10K
3K01
10K
3K02
10K
3K03
10K
3K04
10K
3K05
10K
3K06
3K07
10K
10K3K08
3K09
10K
3K10-3 10K
36
3K10-2
10K
27
3K10-1 10K
18
3K28 10K
3K11-4
10K
5
4
10K3K11-3
6
3
3K11-2 10K
7
2
10K3K11-1
8
1
+3V3_BUF
MDO3
MDO4 MDO5 MDO6 MDO7
MOCLKA
MOVALA MDO0 MOSTRTA MDO1 MDO2
MDO3 MDO4 MDO5 MDO6 MDO7 MDO1 MDO2 MDO0
MOVALA
MOSTRTA
MOCLKA
2K09
2
2
3
4 5 6 7
8
9
10K
100n
3K30
7K05
74LVC245A
1
3EN1 3EN2
19
G3
2
2
3
4 5 6 7
8
9
3K27 3K13-4 3K13-3 3K13-2 3K13-1
RES
3K12-2 3K12-1
RES
3K12-4
RES
3K14
3K12-3
3K17
RES
+3V3
+3V3
20
1
10
+3V3
20
1
10
RESERVED
45R74SER
6 27 1 8 27RES 1 8 4547R
12
3 6R74SER
5K00
33R
3K23-4
45
18
3 6
17
3K23-3 47R 3K23-2 2 7
16 15
3K23-1 1 8
3K26
14
12 13 12 11
3K25-3
18
3 6
17
45
3K25-4 47R
16
1 8
3K24-1 47R 15 14
3K24-3
13
3K24-4 47R45 12 11
47R12RES
47R3RES
R74SER 47R 47R 47R
R74SER
47R12
13
14
159
9 101112
IK18
+3V3_BUF
10u
2K07
47R
47R 47R 47R
47R
47R3K24-2 2 7
47R3 6
CA-MDO(3)
CA-MDO(4) CA-MDO(5) CA-MDO(6) CA-MDO(7)
CA-MOCLK_VS2
CA-MOVAL CA-MDO(0)
CA-MOSTRT
CA-MDO(1) CA-MDO(2)
CA-MDO(0:7)
CA-MDO(3) CA-MDO(4) CA-MDO(5) CA-MDO(6) CA-MDO(7) CA-MDO(1) CA-MDO(2) CA-MDO(0)
CA-MOVAL
CA-MOSTRT
CA-MOCLK_VS2
2K02
2K01
10u
CA-DATADIR
CA-DATAEN
PCMCIA-D2
PCMCIA-D1 PCMCIA-D3 PCMCIA-D4 PCMCIA-D5 PCMCIA-D6 PCMCIA-D7 PCMCIA-D0
CA-ADDEN
CA-WAIT
PCI-CBE1 PCI-CBE2 PCI-AD16 PCI-AD17 PCI-AD19 PCI-AD22 PCI-AD23
10u
CA-ADDEN
PCI-AD7
PCI-AD6 PCI-AD5 PCI-AD4 PCI-AD3 PCI-AD2 PCI-AD1 PCI-AD0
IK41
IK45
10K
3K15
IK46
G
CA-ADDEN
PCI-AD14
PCI-AD13
H
MULTI 12NC : 3139_123_64423 BD 12NC : 3139_123_64433
PCI-AD12 PCI-AD11 PCI-AD10 PCI-AD9 PCI-AD8
3K18
IK47
10K
3K22
3K20
3K21
74LVC245A
1
19
2
3
4 5 6 7
8
9
10K
74LVC245A
1
19
2
3
4 5 6 7
8
9
10K
74LVC245A
1
19
2
3
4 5 6 7
8
9
10K
74LVC245A
1
19
2
3
4 5 6 7
8
9
7K03
7K02
7K00
7K01
16
+3V3_BUF
3EN1 3EN2
G3
2
3EN1 3EN2
G3
2
+3V3_BUF
3EN1 3EN2
G3
2
3EN1 3EN2
G3
2
18
13
20
10
20
10
20
10
20
10
100n
2K06
18
1
17 16 15 14 13 12 11
2K05
18
1
17 16 15 14 13 12 11
2K03
18
1
17 16 15 14 13 12 11
2K04
18
1
17 16 15 14 13 12 11
PCI-AD26
PCI-AD25 PCI-AD27 PCI-AD28 PCI-AD29 PCI-AD30 PCI-AD31 PCI-AD24
100n
PCI-AD18
CA-WE
CA-OE CA-CE2 CA-CE1
CA-REG
CA-IORD
CA-IOWR
100n
PCMCIA-A7
PCMCIA-A6 PCMCIA-A5 PCMCIA-A4 PCMCIA-A3 PCMCIA-A2 PCMCIA-A1 PCMCIA-A0
100n
PCMCIA-A14
PCMCIA-A13 PCMCIA-A12 PCMCIA-A11 PCMCIA-A10
PCMCIA-A9 PCMCIA-A8
19
1K00-A B2 1K00-B D2 2K00 B1 2K01 E10 2K02 A10 2K03 E12 2K04 G12 2K05 C12 2K06 A13 2K07 A9 2K08 A7 2K09 B7
A
3K00 B1 3K01 C5 3K02 C5 3K03 C5 3K04 C5 3K05 C5 3K06 C5 3K07 C5 3K08 D5 3K09 D5 3K10-1 D5 3K10-2 D5 3K10-3 D5 3K11-1 E5
B
3K11-2 E5 3K11-3 E5 3K11-4 E5 3K12-1 D8 3K12-2 D8 3K12-3 E8 3K12-4 E8 3K13-1 D8 3K13-2 D8 3K13-3 D8 3K13-4 D8 3K14 E8
C
3K15 C11 3K16 D3 3K17 E8 3K18 H11 3K19 F4 3K20 E11 3K21 G11 3K22 C11 3K23-1 B9 3K23-2 B9 3K23-3 A9
D
3K23-4 A9 3K24-1 C9 3K24-2 C9 3K24-3 C9 3K24-4 C9 3K25-3 C9 3K25-4 C9 3K26 B9 3K27 D8 3K28 D5 3K29 A7 3K30 B7
E
5K00 A9 7K00 F12 7K01 H12 7K02 C12 7K03 A12 7K04 A8 7K05 C8 FK00 G3 FK02 D3 FK04 F4 IK00 C5 IK01 C5
F
IK02 C5 IK03 C5 IK04 C5 IK05 C5 IK06 C5 IK07 D5 IK08 D5 IK09 D5 IK10 D5 IK11 D5 IK12 D5
G
IK13 E5 IK14 E5 IK15 E5 IK16 E5 IK17 D3 IK18 A9 IK41 B11 IK45 B11 IK46 D11 IK47 H11
H
20
A
B
C
D
E
F
G
H
II
J
K
L
M
CELL 12C : 8239_125_14773
N
12
3
456
7
8
O
P
1
2
3
4 12
7
8
9
10
11 16
91011
DC394240
CLASS_NO
" XK00 ~ XK99 "
13
3PC332
1
-- -- --
2008-10-17
2
2009-01-16
SV
Li LingHuan
3
15
NAME
146
PCB SB SSB BD
CHECK DATE
12 13
********EMANTESNHC
TV543_2K9
SUPERS.
**** *** *****
2008-10-17
17
N
O
2009-06-18
3
2 2009-02-25
3139 123 6443
P
25
C
ROYAL PHILIPS ELECTRONICS N.V. 2008
18
13010
19
17
A2
205
18670_516_090911.eps
090911
2009-Dec-18

SSB: Class-D

Circuit Diagrams and PWB Layouts
EN 77Q548.1E LB 10.
A
B
C
D
All rights reserved. Reproduction in whole or in parts
is prohibited without the written consent of the copyright
owner.
E
F
G
H
A
B
C
D
E
F
1
+AUDIO-POWER
ADAC(2)
ADAC(1)
GNDSND
MUTE A-STBY
A-STBY
MUTE
AUDIO-MUTE
LEFT-SPEAKER
RIGHT-SPEAKER
CL11 2L09 220n
IL36
IL16
AUD_GND
2
1
3L09
4R7
IL11
FOR FLAVORS 22"
RES
4L01
GNDSND
AUD_GND
4K7
3L17
3L06-4
3L06-3
6 3
3L16
22K
NOT FOR FLAVORS 22"
2L17 1u0
3L18
FL03
45
100K
100K
3
4
2 3 4
CLASS-D
7L03-1
BC847BS(COL)
6
2
IL12
2L05
10u35V
100p2L28
47n2L24
2L29 100p
2L23 47n
1u02L16
0R
GNDSND
IL41
3L06-2
27
100K
3L06-1
1 8
100K
2L02
GNDSND
10u
GNDSND
FL14
1
4L03
220n
2L06
RES
TPA3123D2PWP
FL15
6
5
18 17
11 7 4 2
3
7L03-2 BC847BS(COL)
4
GNDSND
R
L
0 1
VCLAMP BYPASS MUTE SD
FL16
4L02
FL17 FL18 FL19 FL20
1u0
RES
5
1u0
2L38 2L37
RES
+AUDIO-POWER
7L10-1
19
20
AVCC
CLASS-D
IN
AUDIO AMP
GAIN
AGND L R
8
9
23
CL10 CL12
Φ
PGND
24
3L03
100R 2L01
5L07
1
L
10n
GNDSND
30R
5L08
3
10
R
PVCC
GND_HS
14
13
GNDSND
TPA3123D2PWP
2L33
RES
5
30R
12
BSR
OUT
BSL
25
GNDSND
2n2
R
L
7L10-2
26 27 28 29
2L20
2L08
2L36
2L35
FL08
220u35V
FL09
35V220u
GNDSND
IL10
16
IL32
15
IL09
22
IL31
21
VIA VIA
30
10n
GNDSND
10n
6
220n
2L07
GNDSND
220n
2L19
220n
2L10
383940
GNDSND
VIA
37
VIA
VIA
31
GNDSND
1L53
1L54
36 35 34
33
32
TO SUBWOOFER
220R5L10
5
NOT FOR FLAVORS 22"
15K 4
5
3L14-4
IL06
5L02
22u
IL05
5L01
22u
453L10-4 15K
GNDSND
LEFT-SPEAKER
1736
FL01
FL02
1 2
3
1735446-3
RIGHT-SPEAKER
7
15K3
15K 27
6
3L14-3
3L14-2
15K
7
3 6
3L10-3
3L10-2 15K2
GNDSND
LEFT-SPEAKER
RIGHT-SPEAKER
15K18
3L14-1
2L12
470u25V
2L11
25V 470u
15K3L10-1
1 8
8
67
220n
220n
GNDSND
2L26
2L22
IL08
220n2L21
IL07
2L27 220n
GNDSND
5L05
220R
5L04
220R
1K5
3L11-4 5 4
GNDSND
1K53L11-1
1 8
RIGHT-SPEAKER
LEFT-SPEAKER
GNDSND
7
3L11-2 1K5 362 3L11-3 1K5
MULTI 12NC : 3139_123_64423 BD 12NC : 3139_123_64433
CELL 12C : 8239_125_14773
I I
12
3
45
67
5L09
220R
9
2L25
10n
1L50
1L51
1L52
2n2
2L14
TO SPEAKERS
FL05
FL06
FL07
2n2
2L13
10
8
8
1735
1735446-4
11
A
B
C
D
1 2
3
4
E
F
12
1735 E8 1736 E5 1L50 E7 1L51 E7 1L52 F7 1L53 E4 1L54 F4 2L01 D3 2L02 E2 2L05 B2 2L06 B2 2L07 A4 2L08 B4 2L09 C4 2L10 B4 2L11 C6 2L12 B6 2L13 F7 2L14 E7 2L16 C2 2L17 C2 2L19 B4 2L20 A4 2L21 D6 2L22 B6 2L23 C2 2L24 B2 2L25 E7 2L26 B6 2L27 D6 2L28 B2 2L29 C2 2L33 F4 2L35 F4 2L36 E4 2L37 C2 2L38 D2
3L03 D3 3L06-1 D2 3L06-2 D2 3L06-3 E1 3L06-4 D1 3L09 A1 3L10-1 D6 3L10-2 D5 3L10-3 D5 3L10-4 D5 3L11-1 F6 3L11-2 F6 3L11-3 E6 3L11-4 E6 3L14-1 B6 3L14-2 B5 3L14-3 B5 3L14-4 B5 3L16 B2 3L17 D1 3L18 C2
4L01 C1 4L02 C2 4L03 B2 5L01 C5 5L02 B5 5L04 C6 5L05 B6 5L07 A3 5L08 A3 5L09 E7 5L10 F4 7L03-1 A2 7L03-2 D3 7L10-1 B3 7L10-2 D4 CL10 D3 CL11 C1
CL12 D3 FL01 E5 FL02 F5 FL03 D2 FL05 E8 FL06 E8 FL07 E8 FL08 A4 FL09 B4 FL14 A2 FL15 B2 FL16 C2 FL17 C2 FL18 C2 FL19 C2 FL20 C2 IL05 C5 IL06 B5 IL07 C6 IL08 B6 IL09 C4 IL10 B4 IL11 B1 IL12 B2 IL16 C1 IL31 C4 IL32 B4 IL36 B1 IL41 D2
13
A
B
C
D
E
F
G
H
**** *** *****
2008-10-17
********EMANTESNHC
2009-06-18
3
2 2009-02-25
J
A3
090911
10
3139 123 6443
25
C
ROYAL PHILIPS ELECTRONICS N.V. 2008
11
13010
12
18
13
18670_517_090911.eps
DC394240
CLASS_NO
3PC332
J
"XL00-XL99"
1
2
3
4
5
6
7
-- -- --
2008-10-17
2009-01-1623
NAME
SV
1
Hor Siew Lee
CHECK DATE
8
PCB SB SSB BD
TV543_2K9
SUPERS.
9
2009-Dec-18
Circuit Diagrams and PWB Layouts

SSB: Display Interface (Common)

EN 78Q548.1E LB 10.
A
B
C
D
All rights reserved. Reproduction in whole or in parts
owner.
is prohibited without the written consent of the copyright
E
F
A
B
C
D
1
2
3
5
6
7
84
9
10
11
12
13
A
2P82 B1 2P88 C2 2P89 D3
3P17 C8 3P18 C9 3P29 C3 3P30 C3 3P31 C4 3P32 C2 3P33 C3 3P34 D3 3P35 C4 3P36 D4 3P37 D5
4P26 A1 4P28 B1 4P29 B1 4P30 B1 4P31 B1 4P38 D8 4P39 B1 4P40 D4 4P41 D9 7P05 C9 7P06 D8 7P07 C3 7P08-1 C5 7P08-2 C4 7P09 D4 FP84 A1 FP99 A2 IP10 C9 IP11 D9 IP12 D8 IP16 C4 IP17 C4 IP18 C3 IP19 C3 IP20 D2 IP21 D4
B
C
D
E
F
RESERVED FOR +5V TCON
+5V
+12VD
FROM
BACKLIGHT-BOOST-IN
12
DISPLAY INTERFACE (COMMON)
TO
FP84
RES
4P26
RES
4P28
22u
2P82
RES
RES
4P39
4P29
4P30
4P31
FP99
RESERVED
RES3P32
RES
IP20
4K7
2P88
470p
+VDISP-IN
IP19
RES
RES 3P34
1K0
3P33
3 45678 9
2K2
+3V3
RES
3P29
IP18
10K
3P30
RES
RES 7P07 BC847BW
+3V3
27K
RES
3P31
12K
2P89
RES
IP17
1u0
3P36
RES
RES
5
15K
7P09
PDTA114EU
47K
IP16
RES3P35
4
RES
7P08-2 BC847BPN(COL)
3
RES
4P40
IP21
2
+12VD
6
RES 7P08-1 BC847BPN(COL)
1
1K0
3P37
RES
BACKLIGHT-BOOST
FROM
BACKLIGHT-IN
RES
IP12
4P38
7P06 BC847BW
+3V3
4K7
3P17
7P05 BC847BW
IP11
RES
4P41
FOR BRG 7000
3P18
220R
IP10
BACKLIGHT-OUT
A
B
C
D
G
H
G
E
FOR BRG 7000
E
MULTI 12NC : 3139_123_64423 BD 12NC : 3139_123_64433
CELL 12C : 8239_125_14773
123 4567
8
9
I
DC394240
CLASS_NO
3PC332
J
" XP00 ~ XP99 "
1
2 3 4
65
7
-- -- --
2008-10-17
2009-01-1623
NAME
SV
1
Vincent Yap / Lee CW
CHECK DATE
PCB SB SSB BD
TV543_2K9
SUPERS.
9
**** *** *****
2008-10-17
********EMANTESNHC
2009-06-18
3
2 2009-02-25
3139 123 6443
25
C
ROYAL PHILIPS ELECTRONICS N.V. 2008
11
13010
12
19
13018
18670_518_090911.eps
H
I
J
A2
090911
2009-Dec-18

SSB: Display Interface

Circuit Diagrams and PWB Layouts
EN 79Q548.1E LB 10.
16
FP52 E9 FP53 E9 FP54 E9 FP55 B12 FP56 C12 FP57 C13
FP58 C13 FP59 C13 FP60 C13 FP61 C13 FP62 D13 FP63 D13
17
FP64 D13 FP65 D13 FP66 D13 FP67 D13 FP68 D13 FP69 D13
18
FP70 D13 FP71 D13 FP72 E13 FP73 E13 FP74 E13 FP75 E13
19 20
FP76 E13 FP77 E13 FP78 E13 FP79 E13 FP80 E13 FP81 E15
FP83 E4 FP85 C10 FP86 C14 FP87 F14 FP88 E10 FP89 E10
2P95 F3 2P96 H6 2P97 H6 2P98 B13 2P99 B14 3P01 A4
4
3P02 B4 3P07 B12 3P08 C12 3P09-1 G3 3P09-2 F2 3P09-3 H5
1
1G50 B10 1G51 B15 1G52 A3
A
1R50 B1 2P01 B1 2P02 E4
2P03 B4 2P04 B4 2P53 C9 2P77 B15 2P78 B14 2P79 B14
2P80 B14 2P81 F14 2P83 F4 2P84 G2 2P85 H4 2P86 F10
3
2P87 F10 2P90 D10
2P92 D15 2P93 E10 2P94 C4
123 4567
5
3P09-4 H4 3P10 G2 3P12 H4 3P13 F4 3P14 H2 3P15 H2
3P16 H7 3P20 E9 3P21 E9 3P24 H7 3P25 G3 3P26 H7
6
3P27 H7 3P40 B13 3P41 C132P91 B4 3P42 C13
4P01 D2 4P02 D2
7
4P03 C2 4P04 C2 4P05 C2 4P06 C2 4P07 C2 4P08 D2
4P09 B2 4P10 B2 4P11 B4 4P12 B4 4P13 B4 4P14 B4
4P15 C10 4P16 C10 4P17 C10 4P18 C10 4P19 B15 4P20 C15
4P22 C15 4P23 B14 4P24 B14 4P25 F15 4P34 G8 4P35 H8
4P36 A4 4P37 E4 5P01 A2
5P05 B9 5P06 C9
10
5P07 F14 5P08 F14 6P01 F5 6P02 G2 7P01 F2 7P02 F3
11
7P03 G4 7P04 F1 7P11 G1 FP01 B1 FP02 D1 FP15 C4
FP16 C4 FP17 C4 FP18 D4 FP19 D4 FP20 D4 FP21 D4
12
8 9
FP22 D4 FP23 D4 FP24 D4 FP25 D4 FP26 D4 FP27 A4
13
FP28 B4 FP29 B9 FP30 B10 FP31 C9 FP32 C9 FP33 C9
FP34 C9 FP35 D9 FP36 D9 FP37 D95P02 A2 FP38 D9 FP39 D9
148 9
FP40 D9 FP41 D9 FP42 D9 FP43 D9 FP44 D9 FP45 E9
152
FP46 E9 FP47 E9 FP48 E9 FP49 E9 FP50 E9 FP51 E9
10 11 12 13 14 15
B
DISPLAY INTERFACE
C
A
D D
FOR /32 HD
FOR /32
5P01
+VDISP-OUT
30R
5P02
30R
FOR /32 FHD
+VDISP-OUT_A
100n
B
E
C
F
G
D
H
TXA-
TXA+
TXB-
TXB+
TXC-
TXC+
TXCLK-
TXCLK+
TXD-
TXD+
1R50
1 2
3
4 5 6 7
8
9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29
30
32
31
DF13-30DP-1.25V
2P01
FP01
NC
NC
FP02
4P09
RX51001E+
4P10
RX51001E-
4P03
RX51001D+
4P04
RX51001D-
4P06
RX51001C+
4P05
RX51001C-
4P07
RX51001CLK+
4P08
RX51001CLK-
4P01
RX51001B+ RX51001CLK+
4P02
RX51001B-
1_TXCLK­1_TXCLK+
2_TXCLK­2_TXCLK+
SINGLE LVDS
E
I
FROM
+VDISP-IN
K
All rights reserved. Reproduction in whole or in parts
owner.
is prohibited without the written consent of the copyright
J
F
7P11 PDTC114EU
PDTA114EU 7P04
G
3P10
47R
7P01
SI4835BDY
RES
3P09-2
27
47K
2P84
1u0
SI3441BDV
6P02
BZX384-C5V6
L
FOR /32
VDISP-SWITCH
3P14
100R
3P15
100R
FOR /82
H
PNX8543-LCD-PWR-ON_SPI-DI
PNX5100-LCD-PWR-ON
M
N
1_TXA­1_TXA+ 1_TXB­1_TXB+ 1_TXC­1_TXC+
1_TXD­1_TXD+ 1_TXE­1_TXE+
2_TXA­2_TXA+ 2_TXB­2_TXB+ 2_TXC­2_TXC+
2_TXD­2_TXD+ 2_TXE­2_TXE+
7P02
8 1
RES
3P09-1
3P25
47K
47K
1G52
FI-RE51S-HF
60 5859 5657 5455 526153
51 50 49 48 47 46 45 44 43 42 41 40
39 38 37 36 35 34 33 32 31 30
29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
9
8
7 6 5 4
3
2 1
FOR /82
4P36
FP27
3P01
RES
FP28
RES RES 10p2P04
NC
RES
NC
2P94
RES FP15 FP16 FP17 FP18 FP19 FP20
FP21 FP22
FP23 FP24 FP25 FP26
RES
FP83
16V
25V220u
2P95RES
2P83
10u
7P03
BC847BW
3
2
3P12
2K2
100R
3P02
100R
10p
2P03
RES
4P11
10n2P91
RES
4P12
RES RES
4P13
RES
4P14
10n
4P37
2P02
+VDISP-OUT
RES 3P13
2K2
SML-310
RES FOR DEVT PURPOSE
3P09-4
1
5
4
47K
+3V3
RX51002E+
RX51002D+
RX51002C+
RX51002CLK+
RX51002CLK-
RX51002B+
RX51002A+
RX51001E+
RX51001D+
RX51001C+
RX51001CLK-
RX51001B+
RX51001A+
+VDISP-OUT_A
100n
RES 6P01
3P09-3
6 3
47K
10n
2P85
SCL-DISP
SDA-DISP
RX51002E-
RX51002D-
RX51002C-
RX51002B-
RX51002A-
RX51001E-
RX51001D-
RX51001C-
RX51001B-
RX51001A-
PNX8543-BL-BOOST_SPI-CLK
PNX5100-BL-BOOST
+3V3
BOOTMODE_PNX8543
PNX5100-BL-CTRL
IF 1G51 NOT USED
+VDISP-OUT
5P05RES
FP29
30R
5P06RES
30R
4P15RES
100n
2P53
RES 4P16 RES 4P17
RES
RES 4P18
100R 100R
FP31 FP32
FP38
FP33 FP34
FP36
FP37
FP40
FP35
FP39
FP41
FP43 FP44 FP45 FP46 FP47 FP48
FP49 FP50
FP51 FP52 FP53 FP54
FP42
RES 2P90 10n
RES 2P93 10n
FP88
FP89
10p2P86
RES
TX1A­TX1A+ TX1B­TX1B+ TX1C­TX1C+
TX1CLK­TX1CLK+
TX1D­TX1D+ TX1E­TX1E+
TX2A­TX2A+ TX2B­TX2B+ TX2C­TX2C+
TX2CLK­TX2CLK+
TX2D­TX2D+ TX2E­TX2E+
SCL-DISP SDA-DISP
RESERVED
RES
4P34
FOR /32
4P35RES
+3V3
100n
100n
2P96
RES
RES 2P97
EMC
-BL-CTRL
FOR /32
10K
3P27
RES
3P16
10K
FOR /82
+3V3
FOR /82
10K
3P26
RES
3P24
10K
TO
BACKLIGHT-BOOST-IN
BACKLIGHT-IN
3P20
RES
3P21
RES
FP30
FP85
2P87 10p
RES
1G50
FI-RE41S-HF
50
49
48 46 47 44 45 425143
41 40
39 38 37 36 35 34 33 32 31 30
29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9
8
7 6 5 4
3
2 1
TO DISPLAY
PNX5100-ROT
SDA-DISP SCL-DISP
PNX5100-ROT
100R3P07RES
3P08 100RRES
FP55
FP56
TX3A-
A+
TX3 TX3B­TX3B+ TX3C­TX3C+
TX3CLK- TX3CLK+
TX3D­TX3D+ TX3E­TX3E+
TX4A­TX4A+ TX4B­TX4B+ TX4C­TX4C+
TX4CLK­TX4CLK+
TX4D­TX4D+ TX4E­TX4E+
RES
3P41
ROTATION FUNCTION ONLY
4P24RES
2P98 10n
100R3P40
100R 100R3P42
FP57
FP58
FP59
FP60
FP61
FP62
FP63
FP64
FP65
FP66
FP67
FP68
FP69 FP70
FP71
FP72
FP73
FP74
FP75 FP76
FP77 FP78 FP79 FP80
+VDISP-OUT
10n2P77RES
10n
10p
10p
4P23
2P80
2P78
2P79RES
RES
2P99 10n
5P07
33R
5P08
33R
RES
RES
FP86
RES
RES
4P25
FP87
100n
2P81
FP81
1G51
FI-RE51S-HF
60 58 59 56 57
4P19
54 55 526153
51 50 49 48
4P20RES
4P22
10n2P92RES
47 46 45 44 43 42 41 40
39 38 37 36 35 34 33 32 31 30
29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9
8
7 6 5 4
3
2 1
TO DISPLAY
A
B
C
A
B
E
C
F
G
D
H
E
I
J
F
K
G
L
M
H
N
123
O
P
MULTI 12NC : 3139_123_64423 BD 12NC : 3139_123_64433
CELL 12NC : 8239_125_14783
1
45678 9101112
FPB0
FPA0 FPA1
1X01
REF EMC HOLE
Round screw hole of 4.5mm
3
4
5
6
7
8
FPB1 FPB2
FPA2 FPA3
FPB3
FPA4
FPB4 FV11 FPB5
FPA5
FPB6
FPA6 FPA7
FPB7
FPA8
FPB8 FPB9
FPA9
Common Test-Jig
9
FPC1 FPC2 FPC3 FPC4 FPC5 FPC6
FPC7
10
FPD0 FPD1 FPD2 FPD3
FPD5 FPD6 FPD7 FPD8 FPD9
FJA4
+1V8-PNX5100
FPG6
PNX5100-DDR2-VREF-DDR
FPE0 FPE1 FPE2 FPE3 FPE4 FPE5 FPE6 FPE7 FPE8 FPE9
11
FPF0 FPF1 FPF2
FPF5 FPF6 FPF7 FPF8 FPF9
FPG1FPC0
FPG3 FPG4 FPG5FPD4
FU11
FT01
FJA1
FT02 FT03
FJA2
FT04
FJA3
FV12
FT06
FV13
FT07
FJ99
FY05 FY04
FJ07 FJ63FJA5
" XP00 ~ XP99 "
FJ14
12
13
14
DC394240
CLASS_NO
3PC332
-- -- --
2008-10-17
2009-01-1623
Vincent Yap / Lee CW
NAME
SV
1
CHECK DATE
15
PCB SB SSB BD
TV543_2K9
SUPERS.
162
13 14 15
********EMANTESNHC
25
17
25
C
ROYAL PHILIPS ELECTRONICS N.V. 2008
18
**** *** *****
2008-10-17
3139 123 6443
20
13010
20
19
2009-06-18
3
2 2009-02-25
20
O
P
A2
18561_503_090709.eps
090709
2009-Dec-18

SSB: PNX5100 - Power

Circuit Diagrams and PWB Layouts
EN 80Q548.1E LB 10.
G
1
1
A
A
B
2 3 456 12
4
5
6
PNX5100 - POWER
7C60
+3V3F
LD1117DT18
3 2
OUTIN
100n
COM
1
10u
2C98
2C93
FC60
2C99
+1V8-PNX5100
22u
10u
2C6A
+3V3-PNX5100-LVDS-IN
+1V2-PNX5100-TRI-PLL1
B
2C62-1
1 8
2C67-3
100n
2C69-3
100n
2C72
2C74
2C62-3
100n
3 6
3 6
100n
100n
CC60
2C63-1
1 8
3 6
100n
100n
2C67-4
45
100n
100n
8
5
2C69-4
2C70-1
4
1
100n
100n
100n
100n
2C75
2C76
2C63-4
2C63-2
45
27
100n
2C70-3
2C70-2
27
3 6
100n
100n
+1V2-PNX5100
C
+1V2-PNX5100
C
D
D
All rights reserved. Reproduction in whole or in parts
is prohibited without the written consent of the copyright
owner.
E
F
+1V8-PNX5100
+3V3
2C78-2
2C78-1
1 8
27
100n
100n
5C71
2C78-3
3 6
100n
30R
E
+3V3
G
+3V3
F
5C72
30R
5C73
30R
2C59
2C60-2
2C60-1
1 8
27
100n
10u
2C55
2C56
100n
6.3V
330u
2C60-3
3 6
100n
10u
10u
2C95
2C96
2C61-2
2C61-1
2C60-4
1 8
45
100n
100n
2C66-3
2C66-2
2C66-1
1 8
27
100n
100n
2C68-3
2C68-2
2C68-1
27
1 8
100n
100n
10u
10u
2C97
5
2C61-3
2C61-4
27
3 645
4
100n
100n
100n
2C67-2
2C66-4
2C67-1
45
1 8
3 6
100n
100n
100n
2C69-1
2C69-2
2C68-4
3 6
1 8
100n
100n
100n
100n
2C71
100n
2C73
27
27
H
2C81
100n
2C70-4
100n
5
4
SENSE+1V2-PNX5100
2C65
2C64
100n
100n
2C78-4
45
100n
100n
7C00-10
PNX5100E
100n
AA5 AB16 AB8 AB9 AC9 AD9 AE9 AF9 E16 E8 E9 F5 J22 K22 P5 R5 Y5
L16 M16 N16 P16 R16 T16
AB20 AB6 AB7 D22 E6 E7 G5 M5 N5 V5 W5
AB15 AB17
D10 D13 D17 D20
A1 AA25 AB3 AB4 AB5 AC1 AC2 AC3 AC4 AD1 AD2 AD24
Φ
SUPPLY_1
VDD_1V2_CORE
VDD_1V8_DDR
VDD_3V3_PER
VDD_3V3_LVDSIN
VDD_3V3_LVDSOUT
VSS
VSS
VSS
VSS
VSS
AD3
M11 M12 M13 M14 M15 M25
W23
AE26
AE1 AE2 AF1
B1 A10 A13 A17
B2 A20
C2 C25
C3
D3
D4
E4
E5 F25 H23 J25 L11 L12 L13 L14 L15
N11 N12 N13 N14 N15 P11 P12 P13 P14 P15 P23 R11 R12 R13 R14 R15 R23 R25 T11 T12 T13 T14 T15 V25
+1V2-PNX5100-TRI-PLL2
+1V2-PNX5100-TRI-PLL3
+1V2-PNX5100
+1V2-PNX5100
+1V2-PNX5100
+1V2-PNX5100
+1V2-PNX5100
FC61
I
" XC50 ~ XC5Z " " XC60 ~ XC6Z "
H
MULTI 12NC : 3139_123_64423 BD 12NC : 3139_123_64433
CELL 12NC : 8239_125_14783
J
1
2
43
5
" XC70 ~ XC7Z " " XC80 ~ XC8Z " " XC90 ~ XC9Z "
6
7 8 91011
7
+1V2-PNX5100
+1V2-PNX5100
+1V2-PNX5100
+1V2-PNX5100-DLL
7
5C60
30R
2C79
5C61
30R
5C62
30R
5C63
30R
5C64
30R
5C65
30R
CLASS_NO
3PC332
-- -- --
2008-10-07
2009-01-16
Vincent Yap / Lee CW
NAME
SV
832
7C00-11
PNX5100E
2C80
100n
2C62-2
2
2C62-4
4
2C63-3
3
2C82
2C83
DC394240
8
AB18 AB19
H5 J3
J5 J4
K5 K3
L5 K4
T5 U4
U5 U3
M22 L22
AA22 AB22
F22 E22
FC80
100n
FC81
100n
FC82
100n
FC83
100n
FC84
100n
FC85
100n
1
2
3
VDDA_3V3_LVDSIN VSSA_LVDSIN
VDDD_1V2_TRI_PLL1 VSSD_TRI_PLL1
VDDA_1V2_TRI_PLL1 VSSA_TRI_PLL1
VDDD_1V2_TRI_PLL2 VSSD_TRI_PLL2
VDDA_1V2_TRI_PLL2 VSSA_TRI_PLL2
VDDA_1V2_TRI_PLL3 VSSA_TRI_PLL3
VDDD_1V2_TRI_PLL3 VSSD_TRI_PLL3
VDDA_1V2_DLL0 VSSA_DLL0
VDDA_1V2_DLL1
A_DLL1
VSS
VDDA_1V2_DLL4 VSSA_DLL4
+1V2-PNX5100-CLOCK
+1V2-PNX5100-TRI-PLL1
+1V2-PNX5100-TRI-PLL2
+1V2-PNX5100-TRI-PLL3
+1V2-PNX5100-DDR-PLL1+1V2-PNX5100
100n
2C94
+1V2-PNX5100-LVDS-PLL
SETNAMECHN
PCB SB SSB BD
TV543_2K9
SUPPLY_2
SUPERS.
DATECHECK
9
Φ
VDDA_1V2_1_7_MCAB
2008-10-17
109
VDDA_1V2_DLL7
VSSA_DLL7
VDD_1V2_DDRPLL0
VSS_DDRPLL0
VDDA_1V2_DDRPLL1
VSSA_DDRPLL1
VDDA_3V3_DDRPLL0
VDD_1V2_DDRPLL1
VSS_DDRPLL1
VDDA_1V2_LVDS_PLL
VDDA_3V3_LVDS1 VDDA_3V3_LVDS2
VSSA_LVDS1 VSSA_LVDS2
VDD_1V2_MCAB1 VDD_1V2_MCAB2
VDDA_1V2_UIP_PLL
VDDA_3V3_SYS_PLL
VSS_MCAB1 VSS_MCAB2
VDDA_1V2_XTAL
VSSA_XTAL
+1V2-PNX5100
+3V3
+3V3
+3V3
+3V3
********
**** *** *****
10
AD25 AD26
AE25
AB14 AC14 AE14
AF12 AD14 AC13 AB13
AD13 AE12
5C66
30R
5C67
30R
5C68
30R
5C69
30R
5C70
30R
1211
V22 U22
P22 T22
N22 R22
E15 B15 D15 A15 C15
2C84
2C91
100n
2C77
100n
2C86
2C85
2C88
2C89
2C90
FC90
2C92
100n
100n
+1V2-PNX5100-DLL
+1V2-PNX5100
+1V2-PNX5100-DDR-PLL1
+3V3-PNX5100-DDR-PLL0
+1V2-PNX5100
+1V2-PNX5100-LVDS-PLL
+3V3-PNX5100-LVDS-PLL
+1V2-PNX5100
+1V2-PNX5100-CLOCK
+3V3-PNX5100-CLOCK
+1V2-PNX5100-CLOCK
100n
FC86
100n
100n
2C57
2C87
+3V3-PNX5100-LVDS-IN
FC87
100n
FC88
+3V3-PNX5100-CLOCK
100n
FC89
+3V3-PNX5100-DDR-PLL0
100n
100n
2C58
+3V3-PNX5100-LVDS-PLL
+1V2-PNX5100-DLL
10u
3139 123 6443
25
C
ROYAL PHILIPS ELECTRONICS N.V. 2008
11
03101
21
12 13
3
13
2009-06-18
2009-02-252
A3
A
B
C
D
E
F
G
H
I
J
G
2C55 E2 2C56 E2 2C57 E10 2C58 F10 2C59 B2 2C60-1 C2 2C60-2 C2 2C60-3 C2 2C60-4 C3 2C61-1 C3 2C61-2 C3 2C61-3 C3 2C61-4 C3
A
2C62-1 C3 2C62-2 E8 2C62-3 C4 2C62-4 E8 2C63-1 C4 2C63-2 C4 2C63-3 F8 2C63-4 C4 2C64 C4 2C65 C5 2C66-1 D3 2C66-2 D3
B
2C66-3 D3 2C66-4 D3 2C67-1 D3 2C67-2 D3 2C67-3 D4 2C67-4 D4 2C68-1 E3 2C68-2 E3 2C68-3 E3 2C68-4 E3 2C69-1 E3
C
2C69-2 E3 2C69-3 E4 2C69-4 E4 2C6A B4 2C70-1 E4 2C70-2 E4 2C70-3 E4 2C70-4 E4 2C71 F3 2C72 F3 2C73 F3 2C74 F3
D
2C75 F4 2C76 F4 2C77 D10 2C78-1 C2 2C78-2 C2 2C78-3 C2 2C78-4 E4 2C79 D7 2C80 D8 2C81 C4 2C82 F8 2C83 G8
E
2C84 E10 2C85 E10 2C86 E10 2C87 E10 2C88 E10 2C89 F10 2C90 F10 2C91 F10 2C92 F10 2C93 B2 2C94 F8
F
2C95 B3 2C96 B3 2C97 B3 2C98 B3 2C99 B4 5C60 D7 5C61 E7 5C62 E7 5C63 E7 5C64 F7 5C65 F7 5C66 D10 5C67 E10 5C68 E10 5C69 F10 5C70 F10 5C71 E2 5C72 E2 5C73 F2 7C00-10 C5 7C00-11 A8 7C60 A3 CC60 B4 FC60 B4
H
FC61 G6 FC80 D8 FC81 E8 FC82 E8 FC83 E8 FC84 F8 FC85 F8 FC86 D10 FC87 E10
FC88 E10 FC89 F10 FC90 F10
123 4
5678 9101112
2009-Dec-18
18670_520_090911.eps
090911

SSB: PNX5100 - SDRAM

Circuit Diagrams and PWB Layouts
EN 81Q548.1E LB 10.
P9
2C29
RES
J1
A9
VDDL
Φ
SDRAM
VSSDL
J7
A7
14
6.3V 2C30
330u
C3C7C9E9G1
C1
B2
B8
D2
VDDQ
15
16
12
+1V8-PNX5100
1K0 1%
3C22
FC05
1%
1K0
3C23
1u0
100n
100n
2C32
2C33
2C34
G9
G3
G7
A2 E2 L1
NC
R3 R7 R8
G8
0
G2
1
H7
2
3C26-2
H3
3
H1
4
3C27-1
H9
5
F1
6
F9
3C27-2
7
DQ
C8
8
C2
3C28-2
9
D7
10
3C28-3
D3
11
D1
12
3C30-1
D9
13
B1
14
3C30-2
B9
15
B3
UDM
LDM
VREF
QSSVSSV
F2
F8
E7
H8
D8
H2
3C25-3
F3
J2
100n
100n
100n
2C35
2C38
2C36
633C26-3
33R
33R
33R
72
33R
18
33R
33R
27
33R
33R
27
33R
36
33R
33R
18
33R
27
33R
33R
3C25-4
36
33R
2C39
100n
17
13 14
22u
18
3C25-1
3C25-227
81 3C26-1
54
3C26-4
3C31 33R 3C32 33R
45
3C28-4
3C28-1
18
33R
PNX5100-DDR2-VREF-DDR
PNX5100-DDR2-D16 PNX5100-DDR2-D17 PNX5100-DDR2-D18 PNX5100-DDR2-D19 PNX5100-DDR2-D20 PNX5100-DDR2-D21 PNX5100-DDR2-D22 PNX5100-DDR2-D23 PNX5100-DDR2-D24 PNX5100-DDR2-D25 PNX5100-DDR2-D26 PNX5100-DDR2-D27 PNX5100-DDR2-D28 PNX5100-DDR2-D29 PNX5100-DDR2-D30 PNX5100-DDR2-D31
PNX5100-DDR2-DQM3 PNX5100-DDR2-DQM2
18 19
A
B
C
D
E
F
G
H
2C00 E4 2C01 C5 2C02 E5 2C13 F5 2C14 F5 2C15 F5 2C16 F6 2C17 F6 2C18 F6 2C19 F6 2C29 E11 2C30 E11 2C32 F12 2C33 F12 2C34 F12 2C35 F12 2C36 F12 2C38 F13 2C39 H13 2C40 H6 2C41-1 F2 2C41-2 F2 2C41-3 F2 2C41-4 F2 2C42-1 F3 2C42-2 F3 2C42-3 F3 2C42-4 F3 2C43-1 F8 2C43-2 F8 2C43-3 F9 2C43-4 F9 2C44-1 F9 2C44-2 F9 2C44-3 F10 2C44-4 F10
3C00 C2 3C01 C2 3C02 C3 3C03 H2 3C04 H9 3C05-1 G6 3C05-2 G6 3C05-3 H6 3C05-4 H6 3C06-1 G5 3C06-2 G5 3C06-3 H3 3C06-4 H2 3C07-1 G6 3C07-2 G5 3C07-3 G5 3C07-4 G6 3C08-1 H5 3C08-2 H5 3C08-3 G6 3C09-1 H6 3C09-2 H5 3C09-3 G5 3C09-4 H6 3C10 C5 3C11 H6 3C12 H3 3C13 H2 3C20 A10 3C21 B10 3C22 A12 3C23 B12 3C25-1 G13 3C25-2 G13 3C25-3 H12 3C25-4 H13 3C26-1 G13 3C26-2 G12 3C26-3 G12 3C26-4 G13 3C27-1 G12 3C27-2 G12 3C27-3 H9 3C27-4 H9 3C28-1 H13 3C28-2 G12 3C28-3 H12 3C28-4 H13 3C30-1 H12 3C30-2 H12 3C30-3 I9 3C30-4 H9 3C31 G13 3C32 H13
7C00-8 A6 7C01 F3 7C02 F10 FC02 C3 FC05 B12 FC06 B10
I
1
A
2
123 4567
B
A
C
B
D
E
C
PNX5100-DDR2-A0 PNX5100-DDR2-A1 PNX5100-DDR2-A2 PNX5100-DDR2-A3 PNX5100-DDR2-A4 PNX5100-DDR2-A5 PNX5100-DDR2-A6 PNX5100-DDR2-A7 PNX5100-DDR2-A8 PNX5100-DDR2-A9 PNX5100-DDR2-A10 PNX5100-DDR2-A11 PNX5100-DDR2-A12
PNX5100-DDR2-BA0 PNX5100-DDR2-BA1
PNX5100-DDR2-RAS PNX5100-DDR2-CAS PNX5100-DDR2-WE PNX5100-DDR2-CS
PNX5100-DDR2-ODT PNX5100-DDR2-CKE
PNX5100-DDR2-CLK_P PNX5100-DDR2-CLK_N
+1V8-PNX5100
F
D
G G
E
3C00
3
4
PNX5100 - SDRAM
FC02
5K6 1%
PNX5100-DDR2-VREF-CTRL
3C01
1%820R
100R
5
3C02RES
+1V8-PNX5100
6
3C10
3K3
2C01
100n
1u0
2C02
2C00
330u 6.3V
7 20
N26
0
U25
1
N25
2
T23
3
M26
4
T24
5
L25
6
A
R24
7
L26
8
M23
9
T26
10
K25
11
M24
12
R26
BA0
T25
BA1
N24
BA2
K24
RASB
L24
CASB
U24
WEB
L23
CSB
K23
ODT
U23
RES
CKE
N23
IREF
P24
VREF
P26
P
P25
CLK
N
Φ
DDR2
8
7C00-8 PNX5100E
0 1 2
3
4 5 6 7
8
9 10 11 12 13 14 15
D
16 17 18 19 20 21 22 23 24 25 26 27 28 29
30 31
0
1
DQM
2
3
P
DQS0
N
P
DQS1
N
P
DQS2
N
P
DQS3
N
AB25
AC26 AC25
AB26
AB23 AA24 AC24 AC23
AB24
AA26 AA23
9
10
11
12
8 9
Y26
Y25
U26
V26
W24
V23
V24 F26 H26 G25 J26 K26 D25 H25 D26 F23 H24 F24 J23 J24 D23 G24 D24
G26 G23
W26 W25
Y24 Y23
E25 E26
E24 E23
PNX5100-DDR2-D0 PNX5100-DDR2-D1 PNX5100-DDR2-D2 PNX5100-DDR2-D3 PNX5100-DDR2-D4 PNX5100-DDR2-D5 PNX5100-DDR2-D6 PNX5100-DDR2-D7 PNX5100-DDR2-D8
PNX5100-DDR2-D9 PNX5100-DDR2-D10 PNX5100-DDR2-D11 PNX5100-DDR2-D12 PNX5100-DDR2-D13 PNX5100-DDR2-D14 PNX5100-DDR2-D15 PNX5100-DDR2-D16 PNX5100-DDR2-D17 PNX5100-DDR2-D18 PNX5100-DDR2-D19 PNX5100-DDR2-D20 PNX5100-DDR2-D21 PNX5100-DDR2-D22 PNX5100-DDR2-D23 PNX5100-DDR2-D24 PNX5100-DDR2-D25 PNX5100-DDR2-D26 PNX5100-DDR2-D27 PNX5100-DDR2-D28 PNX5100-DDR2-D29 PNX5100-DDR2-D30 PNX5100-DDR2-D31
PNX5100-DDR2-DQM0 PNX5100-DDR2-DQM1 PNX5100-DDR2-DQM2 PNX5100-DDR2-DQM
PNX5100-DDR2-DQS0_P PNX5100-DDR2-DQS0_N
PNX5100-DDR2-DQS1_P
PNX5100-DDR2-DQS1_N
PNX5100-DDR2-DQS2_P PNX5100-DDR2-DQS2_N
PNX5100-DDR2-DQS3_P PNX5100-DDR2-DQS3_N
PNX5100-DDR2-VREF-CTRL PNX5100-DDR2-VREF-DDR
3
13
10 11
+1V8-PNX5100
1%
1K0
3C20
FC06
1K0 1%
3C21
+1V8-PNX5100
H
owner.
All rights reserved. Reproduction in whole or in parts
is prohibited without the written consent of the copyright
M
8
1 8
3 6
45
100n
100n
100n
2C41-1
2C41-2
2C41-4
2C41-3
27
I
F
PNX5100-DDR2-ODT PNX5100-DDR2-CKE PNX5100-DDR2-WE PNX5100-DDR2-CS PNX5100-DDR2-RAS
J
G
K
H
L
PNX5100-DDR2-CAS
PNX5100-DDR2-BA0 PNX5100-DDR2-BA1
PNX5100-DDR2-A0 PNX5100-DDR2-A1 PNX5100-DDR2-A2 PNX5100-DDR2-A3 PNX5100-DDR2-A4 PNX5100-DDR2-A5 PNX5100-DDR2-A6 PNX5100-DDR2-A7 PNX5100-DDR2-A8 PNX5100-DDR2-A9 PNX5100-DDR2-A10 PNX5100-DDR2-A11 PNX5100-DDR2-A12
PNX5100-DDR2-CLK_P PNX5100-DDR2-CLK_N
PNX5100-DDR2-DQS0_P PNX5100-DDR2-DQS0_N
PNX5100-DDR2-DQS1_P PNX5100-DDR2-DQS1_N
3C03
3C06-4
3C13
150R
45
33R
100n
2C42-1
1
33R
100n
100n
2C42-3
2C42-2
3 6
27
HYB18TC512160B2F-3S
3C06-3
3 6
33R
3C12
33R
100n
100n
2C42-4
45
7C01
K9 K2 K3 L8 K7 L7
L2 L3
M8 M3 M7 N2 N8 N3 N7 P2 P8 P3 M2 P7 R2
J8 K8
F7
E8
B7 A8
ODT CKE WE CS RAS CAS
0 1
0 1 2
3
4 5 6 7
8
9 10 11 12
CK
LDQS
UDQS
BA
A1E1J9
A
A3
100n
2C15
3C07-3
3C07-2
3C06-1 18
3C06-2 27
3C08-1
3C08-2
3C05-3
100n
2C17
2C18
2C16
3
6
33R
72
33R
33R
33R
63453C09-3
33R
723C09-2
33R
18
33R
27
33R
3C05-4
45
36
33R
2C40
100n
100n
2C14
2C13
C3C7C9
J1
A9
C1
M9
R1
VDD
VDDL
Φ
SDRAM
VSSDL
J3
E3
P9J7A7
N1
B2
G9
E9
G3
G7
G1
VDDQ
B8
E7
D8
D2
A2 E2
L1
R3
NC
R7 R8
G8
0
G2
1
H7
2
H3
3
H1
4
H9
5
F1
6
F9
7
DQ
C8
8
C2
9
D7
10
D3
11
D1
12
D9
13
B1
14
B9
15
B3
UDM
F3
LDM
VREF
QSSVSSV
F2
F8
H8
H2
33R
J2
100n
100n
22u
100n
2C19
18
3C05-1
33R
27
3C05-2
33R
81
3C07-1
33R
54
3C07-4
33R
36
3C08-3
33R
3C11
33R
81
3C09-1
33R
54
3C09-4
33R
PNX5100-DDR2-D0 PNX5100-DDR2-D1 PNX5100-DDR2-D2 PNX5100-DDR2-D3 PNX5100-DDR2-D4 PNX5100-DDR2-D5 PNX5100-DDR2-D6 PNX5100-DDR2-D7 PNX5100-DDR2-D8
PNX5100-DDR2-D9 PNX5100-DDR2-D10 PNX5100-DDR2-D11 PNX5100-DDR2-D12 PNX5100-DDR2-D13 PNX5100-DDR2-D14 PNX5100-DDR2-D15
PNX5100-DDR2-DQM1 PNX5100-DDR2-DQM0
PNX5100-DDR2-VREF-DDR
100n
100n
2C43-2
2C43-1
27
1 8
PNX5100-DDR2-ODT PNX5100-DDR2-CKE PNX5100-DDR2-WE PNX5100-DDR2-CS PNX5100-DDR2-RAS PNX5100-DDR2-CAS
PNX5100-DDR2-BA0 PNX5100-DDR2-BA1
PNX5100-DDR2-A0 PNX5100-DDR2-A1 PNX5100-DDR2-A2 PNX5100-DDR2-A3 PNX5100-DDR2-A4 PNX5100-DDR2-A5 PNX5100-DDR2-A6 PNX5100-DDR2-A7 PNX5100-DDR2-A8 PNX5100-DDR2-A9 PNX5100-DDR2-A10 PNX5100-DDR2-A11 PNX5100-DDR2-A12
PNX5100-DDR2-CLK_P PNX5100-DDR2-CLK_N
PNX5100-DDR2-DQS2_P PNX5100-DDR2-DQS2_N
PNX5100-DDR2-DQS3_P PNX5100-DDR2-DQS3_N
2C43-3
3 6
100n
100n
2C43-4
45
3C04
45
3C27-4
3 6
100n
2C44-1
2C44-2
27
1 8
HYB18TC512160B2F-3S
150R
3C27-3
3 6
33R
3C30-4
45
33R3C30-3
100n
33R
2C44-3
3 6
33R
100n
100n
2C44-4
45
7C02
K9 K2 K3 L8 K7 L7
L2 L3
M8 M3 M7 N2 N8 N3 N7 P2 P8 P3 M2 P7 R2
J8 K8
F7
E8
B7 A8
A1E1J9M9R1
ODT CKE WE CS RAS CAS
0
BA
1
0 1 2
3
4 5
A
6 7
8
9 10 11 12
CK
LDQS
UDQS
A3
VDD
J3
E3
N1
I
A
B
C
D
E
F
H
I
J
K
L
M
N
MULTI 12NC : 3139_123_64423 BD 12NC : 3139_123_64433
N
CELL 12NC : 8239_125_14783
123 45678
O
910
" XC00 ~ XC0Z " " XC10 ~ XC1Z "
P
" XC20 ~ XC2Z "
" XC20 ~ XC2Z " " XC30 ~ XC3Z " " XC40 ~ XC4Z "
1 10
4
5
76
8
93 20192
11
12 13
2009-Dec-18
11 12 13 14
14
DC394240
CLASS_NO
3PC332
-- -- --
2008-10-17
2009-01-1623
Vincent Yap / Lee CW
NAME
SV
1
15
PCB SB SSB BD
CHECK
TV543_2K9
SUPERS.
DATE
16
**** *** *****
2008-10-17
********EMANTESNHC
25
17
3139 123 6443
C
ROYAL PHILIPS ELECTRONICS N.V. 2008
18
O
2009-06-18
3
2 2009-02-25
P
22
13010
A2
18670_521_090911.eps
090911
Circuit Diagrams and PWB Layouts

SSB: PNX5100 - Ctrl/PCI/Debug

EN 82Q548.1E LB 10.
A
B
C
D
E
G
123 45678 9
2
31
4
5
6 12
7
8 13
9
10
10 11 12
11
PNX5100 - CONTROL / PCI / DEBUG
A
7C00-2
PNX5100E
PCI-AD0 PCI-AD1 PCI-AD2 PCI-AD3 PCI-AD4
B
C C
D
All rights reserved. Reproduction in whole or in parts
owner.
is prohibited without the written consent of the copyright
E
PCI-AD5 PCI-AD6 PCI-AD7 PCI-AD8 PCI-AD9 PCI-AD10 PCI-AD11 PCI-AD12 PCI-AD13 PCI-AD14 PCI-AD15 PCI-AD16 PCI-AD17 PCI-AD18 PCI-AD19 PCI-AD20 PCI-AD21 PCI-AD22 PCI-AD23 PCI-AD24 PCI-AD25 PCI-AD26 PCI-AD27 PCI-AD28 PCI-AD29 PCI-AD30 PCI-AD31
AF5 AE4 AD4 AF3 AE3 AF2 AB2 AB1
AA3 AA2 AA1 Y4 Y3 Y2 Y1 W4 U1 T4 T3 T2 T1 R4 R3 R2 P4 P3 P2 P1 N4 N3 N2
RESERVED
F
+3V3
G
F
PNX5100-RST-OUT
H
I
+3V3
10K
3CJ1
3CJ0
330R
RES
RES
RES
6CJ0
SML-310
FCD9
RES 7CJ0 PDTC114EU
FCJ0
Φ
0
PCI_XIO
1 2
3
4 5 6 7
8
9 10 11 12 13 14 15
AD
16 17 18 19 20 21 22 23 24 25 26 27 28 29
30 31
CBE
FRAME
TRDY STOP
DEVSEL
IDSEL PERR SERR
REQA REQB
GNTA GNTB
PLL_OUT
XIO
SEL
AD25
PAR
IRDY
REQ
GNT
INTA
CLK
ACK
AE5
0
AD5
1
AC5
2
AF4
3
W3 U2
V1 V2 V4AA4 V3
L4 W1 W2
AD6 AC7 AD7
AE6 AF6 AE7
M1
ICD1
L3 H1
M2
0
M3
1
M4
2
N1
3
AC6
AF7
1 8
RES3CFK-1
3 6
RES
3CFK-3
27
RES3CFK-2
3CFL-1 1 8
RES RES
3CFL-3
3 6
27
RES
3CFL-2
3CF1
10K
EJTAG-PNX5100-TCK EJTAG-PNX5100-TDI EJTAG-PNX5100-TDO EJTAG-PNX5100-TMS EJTAG-PNX5100-TRSTn
RESET-PNX5100
100R 100R 100R 100R 100R 100R
10K3CFN
+3V3
3CD3
RES 10K
+3V3
PCI-CLK-PNX5100
2CD0
10K
3CD4
+3V3
+3V3
PCI-CBE0 PCI-CBE1 PCI-CBE2 PCI-CBE3
PCI-PAR
PCI-FRAME
PCI-IRDY PCI-TRDY PCI-STOP
PCI-DEVSEL
PCI-AD25 PCI-PERR PCI-SERR
22p
10K
3CD2
PNX5100-LCD-PWR-ON
PNX5100-BL-BOOST
PNX5100-BL-CTRL
PNX5100-ROT
1CD0
27M
10K3CD1-3
510K3CD1-4 4
3 6
1 83CD1-1 10K
+3V3
+3V3
4CJ1
4CJ2
4CJ3
FOR /82 ONLY
22p
2CD1
FCD0
FCD1 FCD2 FCD3 FCD4
FCD8
+3V3
27
3CD1-2 10K
+3V3
FCD7
7C00-1
PNX5100E
AE13
AF13
AF14
H4 H2 H3 J1 J2
AF24
R1
AB21
7C00-3
PNX5100E
AE24 AF25 AF26 C24 C26 B25 B26 A26 A25 A24 B24 A23 B23 C23 B22 C22
IN
OUT
OUT2
TCK TDI TDO TMS TRST
RESET_IN
OBSERVE
VPP_ID
0 1 2
3
4 5 6 7
8
9 10 11 12 13 14 15
CONTROL
XTAL
Φ
GPIO
GPIO
Φ
UA1
UA2
RESET_SYS
M24C08-WDW6
C08 OR C16
TX
RX
TX
RX
SCL
1
SDA
SCL
2
SDA
AD12
NC
7CD0
1
NC1
2
NC2
3
E2 SDA
AE8 AF8
AC8 AD8
K2 K1
L2 L1
G22 H22
W22
Y22
+3V3
(1Kx8)
EEPROM
ADR
8
Φ
4
100R3CD7
3CD8 100R
100R3CD9 100R3CDA
7
WC
6
SCL
5
SCL-SSB
SDA-SSB
SCL-AMBI-3V3 SDA-AMBI-3V3
PNX5100-RST-OUT
WC-EEPROM-PNX5100_SPI-DI
FCD6
FCDA
FCDB
3CDC
3CDD
100R
100R
SCL-SSB
SDA-SSB
WC-EEPROM-PNX5100_SPI-DI
3CDB
4K7
only for DEBUG
9CD0
+3V3
A
B
D
E
F
G
H
I
A
B
C
D
E
F
G
1CD0 D6 2CD0 D6 2CD1 D7
3CD1-1 F6 3CD1-2 F7 3CD1-3 F7 3CD1-4 F6 3CD2 F6 3CD3 E6 3CD4 F6 3CD7 E9 3CD8 E9 3CD9 E9 3CDA E9 3CDB G12 3CDC G10 3CDD G10 3CF1 C5 3CFK-1 B5 3CFK-2 B5 3CFK-3 B5 3CFL-1 C5 3CFL-2 C5 3CFL-3 C5 3CFN C5 3CJ0 F3 3CJ1 F2
4CJ1 B7 4CJ2 B7 4CJ3 B7 6CJ0 F3 7C00-1 D8 7C00-2 A3 7C00-3 B8 7CD0 F9 7CJ0 G3 9CD0 G11 FCD0 E7 FCD1 E7 FCD2 E7 FCD3 E7 FCD4 E7 FCD6 G10 FCD7 F7 FCD8 E7 FCD9 G3 FCDA G10 FCDB G10 FCJ0 G3 ICD1 C4
**** *** *****
2008-10-17
********EMANTESNHC
3
2009-06-18
2 2009-02-25
J
H
A3
10
3139 123 6443
25
C
ROYAL PHILIPS ELECTRONICS N.V. 2008
13010
23
11
12
DC394240
CLASS_NO
3PC332
H
MULTI 12NC : 3139_123_64423
BD 12NC : 3139_123_64433
CELL 12NC : 8239_125_14783
J
1 932
4
5
123 45
" XCD0 ~ XCDZ "
" XCF0 ~ XCFZ "
" XCJ0 ~ XCJZ "
6 1312
6
7
-- -- --
2008-10-17
2009-01-1623
NAME
SV
7 8 91011
1
Huang Deqiang
CHECK DATE
8
PCB SB SSB BD
TV543_2K9
SUPERS.
18561_504_090713.eps
090713
2009-Dec-18
Circuit Diagrams and PWB Layouts

SSB: PNX5100 - LVDS In/Out

EN 83Q548.1E LB 10.
3 12
1
2 3 45
4
5
61
7
678
A
PNX5100 - LVDS IN / OUT
A
7C00-9
7C00-4
PNX5100E
E17 E14
B21 A21
D21 C21
E21 E20
C20 B20
B19 A19
D19 C19
B18 A18
D18 C18
E19 E18
C17 B17
B16 A16
D16 C16
PNX5100E
D6 A4 E2 G4
G3 G2 G1 F4 F3 F2 F1 E3 E1 D2 D1 C1 A2 A3 B3 B4
LVDS LVDS2
AP AN
BP BN
CLKP CLKN
CP CN
DP DN
EP EN
AP AN
BP BN
CLKP CLKN
CP CN
DP DN
EP EN
Φ
VDI
1 2
CLK
3
4
0 1 2
3
4 5 6 7
DD
8
9 10 11 12 13 14 15
Φ
LVDS_TX
1
IREF
LOUT1
LOUT2 LOUT4
RGB_CLK
LOUT3
16 17 18 19 20 21 22 23 24 25 26 27 28 29
30 31
CLKP CLKN
CLKP CLKN
B
C C
B
D
C
All rights reserved. Reproduction in whole or in parts
is prohibited without the written consent of the copyright
owner.
E
D
F
E
G
H
F
RX51002A+
RX51002A-
RX51002B+
RX51002B­RX51002CLK+
RX51002CLK­RX51002C+
RX51002C-
RX51002D+
RX51002D­RX51002E+
RX51002E­RX51001A+
RX51001A­RX51001B+
RX51001B­RX51001CLK+
RX51001CLK­RX51001C+
RX51001C­RX51001D+
RX51001D­RX51001E+
RX51001E-
MULTI 12NC : 3139_123_64423 BD 12NC : 3139_123_64433
7C00-5
PNX5100E
AE17 AF17
AC17 AD17
AC16 AD16
AE16 AF16
AE15 AF15
AC15 AD15
AE20 AF20
AC20 AD20
AC19 AD19
AE19 AF19
AE18 AF18
AC18 AD18
AP AN
BP BN
CLKP CLKN
CP CN
DP DN
EP EN
AP AN
BP BN
CLKP CLKN
CP CN
DP DN
EP EN
LVDS_RX
LIN1
LIN2
+3V3
3CGD
1K0
3CGE
1K0
Φ
+3V3
+3V3
12K
12K
3CGF
3CGG
TX2E+ TX2E-
TX2D+ TX2D-
TX2CLK+ TX2CLK-
TX2C+ TX2C-
TX2B+ TX2B-
TX2A+ TX2A-
TX1E+ TX1E-
TX1D+ TX1D-
TX1CLK+ TX1CLK-
TX1C+ TX1C-
TX1B+ TX1B-
TX1A+ TX1A-
10982
11
3CGD B5 3CGE B6 3CGF C6 3CGG C6
7C00-4 C6 7C00-5 B3 7C00-9 A7
13
A
C4
A5
B5 C5 D5
A6
B6 C6
A7
B7 C7 D7
A8
B8 C8 D8
B
C
A22
B14
AP
A14
AN
D14
BP
C14
BN
E13 E12
C13
CP
B13
CN
B12
DP
A12
DN
D12
EP
C12
EN
B11
AP
A11
AN
D11
BP
C11
BN
E11 E10
C10
CP
B10
CN
B9
DP
A9
DN
D9
EP
C9
EN
TX4E+
TX4E-
TX4D+
TX4D-
TX4CLK+
TX4CLK-
TX4C+
TX4C-
TX4B+
TX4B-
TX4A+
TX4A-
TX3E+
TX3E-
TX3D+
TX3D-
TX3CLK+
TX3CLK-
TX3C+
TX3C-
TX3B+
TX3B-
TX3A+
TX3A-
D
E
F
CELL 12NC : 8239_125_14783
A
B
D
E
F
G
H
I
123
J J
1
2
3
5
4
5678
" XCG0 ~ XCGZ "
64
DC394240
CLASS_NO
3PC332
-- -- --
2008-10-17
2009-01-16
NAME
SV
7
1
2
3
Vincent Yap / Lee CW
8
PCB SB SSB BD
TV543_2K9
SUPERS.
DATECHECK
9
********SETNAMECHN
**** *** *****
2008-10-17
10
3
2009-06-18
2009-02-252
3139 123 6443
25
C
ROYAL PHILIPS ELECTRONICS N.V. 2008
11
03101
12
24
A3
13
18670_523_090911.eps
2009-Dec-18
I
090911
Circuit Diagrams and PWB Layouts

SSB: PNX5100 - AmbiLight

EN 84Q548.1E LB 10.
A
B
C
D
All rights reserved. Reproduction in whole or in parts
owner.
is prohibited without the written consent of the copyright
E
A
B
C
1
123 45
4
52
6
7
8
678
9
PNX5100 - AMBILIGHT
+3V3
+3V3
7C00-7
PNX5100E
Φ
AMBI
AMBI
CLK
SYNC_H
SYNC_V
2K2
3CE6
AF10
0
AE10
1
AD10
2
AC10
3
AB10
4
AF11
5
AE11
6
AD11
7
AC11 AB11
DE
AB12 AC12
SCL-AMBI-3V3
SDA-AMBI-3V3
2CE4
150p
3CE7
2CE5
2K2
150p
RES
RES
5CE6
120R
4CE1
4CE2
5CE7
120R
3CE4
100R3CE5
100R
FCE6
2CE1
10p
FCE5
2CE2
10p
+3V3
FCE7
1CE3
1CE4
FCE8
125V
1CE2
5CE5
30R
1.0A T RES 4CE3
10
AMBILIGHT
100n
2CE3
TO
1M59
9
2041061-7
11
1 2
3
4 5 6 7
8
A
B
12
1CE2 C7 1CE3 C6 1CE4 C7 1M59 B8 2CE1 C6 2CE2 C6 2CE3 C8 2CE4 C4 2CE5 C4
3CE4 B5 3CE5 B5 3CE6 B4 3CE7 B4
4CE1 B5 4CE2 B5 4CE3 C7 5CE5 C7 5CE6 B5 5CE7 B5 7C00-7 B2 FCE5 B6 FCE6 B6 FCE7 B7 FCE8 C7
133
A
B
C
D
C
E
G
H
D
F
D
F
G
E
E
MULTI 12NC : 3139_123_64423
BD 12NC : 3139_123_64433
CELL 12NC : 8239_125_14783
H
123 45
6
I
DC394240
CLASS_NO
3PC332
J
" XCE1~ XCEZ "
1
2 13
3
4
5
61112
7
-- -- --
2008-10-17
2009-01-1623
NAME
SV
1
Vincent Yap / Lee CW
CHECK DATE
8
7 8
********EMANTESNHC
PCB SB SSB BD
TV543-2K9
SUPERS.
9
**** *** *****
2008-10-17
10
I
3
2009-06-18
2 2009-02-25
3139 123 6443
25
C
ROYAL PHILIPS ELECTRONICS N.V. 2008
25
13010
18670_524_090911.eps
J
A3
090911
2009-Dec-18
Circuit Diagrams and PWB Layouts
E
EN 85Q548.1E LB 10.

SSB: SRP List Explanation

xample
Net Name Diagram
+12-15V AP1 (4x) +12-15V AP4 (4x) +12-15V AP5 (12x) +12-15V AP6 (4x) +12-15V AP7 (8x) +12V AP1 (4x) +12V_NF AP1 (2x) +12VAL AP1 (2x) +25VLP AP1 (4x) +25VLP AP2 (1x) +3V3-STANDBY AP5 (3x) +400V-F AP1 (2x) +400V-F AP2 (2x) +400V-F AP3 (2x) +5V2 AP1 (6x) +5V2 AP2 (1x) +5V2-NF AP1 (1x) +5V2-NF AP2 (1x) +5V-SW AP1 (6x) +5V-SW AP2 (1x) +8V6 AP1 (3x) +AUX AP1 (2x) +AUX AP2 (1x) +DC-F AP1 (2x) +DC-F AP3 (2x) +SUB-SPEAKER AP5 (1x) +SUB-SPEAKER AP6 (2x)
-12-15V AP1 (4x)
-12-15V AP4 (6x)
-12-15V AP5 (14x)
-12-15V AP6 (6x)
-12-15V AP7 (8x) AL-OFF AP1 (2x) AUDIO-L AP4 (1x) AUDIO-L AP5 (1x) AUDIO-PROT AP5 (3x) AUDIO-R AP4 (1x) AUDIO-R AP5 (1x) AUDIO-SW AP5 (1x) AUDIO-SW AP7 (1x) BOOST AP1 (2x) CPROT AP4 (2x) CPROT AP5 (1x) CPROT-SW AP5 (1x) CPROT-SW AP6 (2x)
-DC-F AP1 (2x)
-DC-F AP3 (2x) DC-PROT AP1 (1x) DC-PROT AP5 (2x) DIM-CONTROL AP1 (2x) FEEDBACK+SW AP6 (2x) FEEDBACK-L AP4 (2x) FEEDBACK-R AP4 (2x) FEEDBACK-SW AP6 (2x) GND-AL AP1 (2x) GNDHA AP1 (40x) GNDHA AP2 (20x) GNDHA AP3 (2x) GNDHOT AP3 (2x) GND-L AP1 (2x) GND-L AP4 (4x) GND-L AP5 (34x) GND-LL AP4 (7x) GND-LL AP5 (1x) GND-LR AP4 (7x) GND-LR AP5 (1x) GND-LSW AP5 (1x) GND-LSW AP6 (15x) GND-S AP1 (11x) GND-SA AP4 (8x)
SA AP5 (2x)
GND­GND-SA AP6 (8x) GND-SA AP7 (6x) GNDscrew AP3 (2x) GNDscrew AP5 (2x) GND-SSB AP5 (3x) GND-SSP AP1 (51x) GND-SSP AP2 (15x) IN+SW AP6 (2x) IN-L AP4 (2x) IN-R AP4 (2x) IN-SW AP6 (2x) INV-MUTE AP4 (1x) INV-MUTE AP5 (1x) INV-MUTE AP6 (1x) LEFT-SPEAKER AP4 (1x) LEFT-SPEAKER AP5 (1x) MUTE AP4 (2x) MUTE AP5 (1x) MUTE AP6 (2x) ON-OFF AP1 (3x) OUT AP6 (1x) OUT AP7 (2x) OUTN AP6 (1x) OUTN AP7 (1x) POWER-GOOD AP1 (2x) POWER-OK-PLATFORM AP1 (2x) RIGHT-SPEAKER AP4 (1x) RIGHT-SPEAKER AP5 (1x)
SOUND-ENABLE AP5 (3x) STANDBY AP1 (5x) STANDBY AP2 (1x)
-SUB-SPEAKER AP5 (1x)
-SUB-SPEAKER AP6 (2x) V-CLAMP AP1 (1x) V-CLAMP AP3 (2x)
1 . 1 . Introduction
SRP (Service Re ference Protocol) is a softw are too l that creates a list w i th all refer e n c es to signal lines. The list contains references to the signals w i thin all schemat ics of a PWB. It replaces the text refe r ences currentl y p r inted next t o the signal names in the s
chematics. These printed refe rences are created man ually an d are t h e r efore n o t guar an teed to be 100 % correct. In additio n , in the current crowded schema t ics there is often none or ver y little pl ace for these references. Some of the PW
B schematics w ill use SRP while others w ill sti ll use the manual refe rences. Either there w
r e fer ence list for a schematic, or ther e w ill be pr inted r e ferences in the schematic.
1.2. No n - SRP Schematics
There a r e severa l different signals available in a schematic:
1.2.1. Po w e r Supply Lines
All pow er suppl y lines are available in t he suppl y line overview (see chapter 6). I n th e schematics (se e chapter 7) is n o t indicated w h e r e supplies are coming from or going to. It is how ever indi ca
ted if a supply is incoming (created elsew h e r e), o r outgoing (cr eat ed or adapt ed in the current sche m atic).
+5 V +5 V
Outgoing Incoming
1.2.2. Normal Signals
For no rmal signals, a schematic r e ference (e. g . B1 4b) is placed next to the signals.
B 14b
si gnal _nam e
1.2.3. Grounds
For no rmal and s pecial grounds (e .g. GN DH OT o r GND3V3 etc.), n o thing is indicate d.
1.3. SRP Schematics
SRP is a tool, w h ich automatically creates a list w i th signal reference s , indicating on which sc hematic t he signals are used. A reference is cr eated for all signals indicat ed w i th an SRP s y mbol, these s y mbols are:
+5 V +5 V
na m e na m e
na m e na m e
na m e na m e
na m e
Bi-directional lin e (e.g. SDA ) into a w i r e tree.
na m e
Signal line into a w i r e tree, its dir e ction depends on t he circuit (e.g. ingoing for PD P, outgoing for L C D sets).
Remarks:
• When there is a black dot on the "signal dire ction arrow" it is an SRP symbol, so there will be a reference to the signal
name in the SRP list.
• All references to normal grounds (Ground symbols without additi onal text)
it concise.
ill be an SRP
Power suppl y li ne.
Stand alone signal or sw itching li ne (used as less as possible).
Signal line into a w i re tree.
Sw itching line into a w i re tre e .
are not listed in the reference list, this to keep
Signals that are not used in multiple schematics, but only onc e or several times in the same schematic, are included
in the SRP reference list, but only with one reference.
Additional Tip:
When using the PDF service manual file, you can very easily search for signal names and follow the signal over all the schematics. In Adob
e PDF reader:
Select the signal name you want to sear ch for, with the "Select text" tool.
• Copy and paste the signal name in the "Search PDF" tool.
Search for all occurrences of the signal name.
• Now you can quickly jump between the different occurrences and follow the signal over all schematics. It is advised to
"zoom in" to e.g. 150% to see clearly, which text is select
ed. Then you can zoom out, to get an overview of the complete
schematic.
PS. It is recommended to use at least Adobe PDF (reader) version 6. x, due to better search possibilities in this version.
10000_031_090121.eps
090121
Personal Notes:
2009-Dec-18

SSB: SRP List Part 1

Netname Diagram
+12V B01A (1 ×) +12V B01B (4 ×) +12V B02A (3 ×) +12V B04A (1 ×) +12V B04B (7 ×) +12VD B01B (1 ×) +12VD B07A (2 ×) +12VF B01A (2 ×) +1V2 B02A (2 ×) +1V2A B02A (2 ×) +1V2-PNX5100 B01B (1 ×) +1V2-PNX5100 B03H (1 ×) +1V2-PNX5100 B08A (15 ×) +1V2-PNX5100-CLOCK B08A (3 ×) +1V2-PNX5100-DDR-PLL1 B08A (2 ×) +1V2-PNX5100-DLL B08A (3 ×) +1V2-PNX5100-LVDS-PLL B08A (2 ×) +1V2-PNX5100-TRI-PLL1 B08A (2 ×) +1V2-PNX5100-TRI-PLL2 B08A (2 ×) +1V2-PNX5100-TRI-PLL3 B08A (2 ×) +1V2-PNX85XX B01A (2 ×) +1V2-PNX85XX B02A (1 ×) +1V2-PNX85XX B03A (14 ×) +1V2-PNX85XX B03H (1 ×) +1V2-STANDBY B01B (2 ×) +1V2-STANDBY B03A (1 ×) +1V8-PNX5100 B07B (1 ×) +1V8-PNX5100 B08A (2 ×) +1V8-PNX5100 B08B (5 ×) +1V8-PNX85XX B03A (3 ×) +1V8-PNX85XX B03F (5 ×) +1V8-PNX85XX B05A (1 ×) +3
V3 B01A (1 ×) +3V3 B01B (1 ×) +3V3 B02A (2 ×) +3V3 B03A (14 ×) +3V3 B03C (1 ×) +3V3 B03D (1 ×) +3V3 B03G (11 ×) +3V3 B03H (2 ×) +3V3 B04A (1 ×) +3V3 B04B (9 ×) +3V3 B04C (2 ×) +3V3 B05A (3 ×) +3V3 B05B (2 ×) +3V3 B05C (3 ×) +3V3 B07A (3 ×) +3V3 B07B (4 ×) +3V3 B08A (7 ×) +3V3 B08C (12 ×) +3V3 B08D (2 ×) +3V3 B08E (3 ×) +3V3_BUF B05C (5 ×) +3V3A B02A (3 ×) +3V3B B02A (6 ×) +3V3D B02A (2 ×) +3V3E B02A (2 ×) +3V3-ET-ANA B05B (3 ×) +3V3-ET-DIG B05B (5 ×) +3V3F B01A (1 ×) +3V3F B03A (1 ×) +3V3F B08A (1 ×) +3V3-NAND B03G (5 ×) +3V3-PER B03A (2 ×) +3V3-PER B03 +3V3-PER B03H (3 ×) +3V3-PNX5100-CLOCK B08A (2 ×) +3V3-PNX5100-DDR-PLL0 B08A (2 ×) +3V3-PNX5100-LVDS-IN B08A (2 ×) +3V3-PNX5100-LVDS-PLL B08A (2 ×) +3V3-STANDBY B01B (2 ×) +3V3-STANDBY B03A (1 ×) +3V3-STANDBY B03G (3 ×) +3V3-STANDBY B03H (12 ×) +3V3-STANDBY B04A (3 ×) +3V3-STANDBY B05A (1 ×) +5V B01B (1 ×) +5V B02A (2 ×) +5V B03D (1 ×) +5V B03G (4 ×) +5V B03H (1 ×) +5V B04A (1 ×) +5V B04B (6 ×) +5V B04C (1 ×) +5V B05A (2 ×) +5V B05C (1 ×) +5V B07A (1 ×) +5V5-TUN B01B (1 ×) +5V5-TUN B02A (1 ×) +5V-TUNER B02A (10 ×)
G (12 ×)
3139 123 6443.3
Circuit Diagrams and PWB Layouts
+AUDIO-POWER B01B (1 ×) +AUDIO-POWER B03C (2 ×) +AUDIO-POWER B06A (2 ×) +VDISP-IN B07A (1 ×) +VDISP-IN B07B (1 ×) +VDISP-OUT B07B (4 ×) +VDISP-OUT_A B07B (4 ×)
3V3-ST B01A (1 ×) 3V3-ST B01B (1 ×)
ADAC(1) B03D (2 ×) ADAC(1) B06A (1 ×) ADAC(2) B03D (2 ×) ADAC(2) B06A (1 ×) ADAC(3) B03C (2 ×) ADAC(3) B03D (2 ×) ADAC(4) B03C (2 ×) ADAC(4) B03D (2 ×) ADAC(5) B03C (1 ×) ADAC(5) B03D (1 ×) ADAC(6) B03C (1 ×) ADAC(6) B03D (1 ×) ADAC(7) B03C (1 ×) ADAC(7) B03D (3 ×) ADAC(8) B03C (1 ×) ADAC(8) B03D (3 ×) ALE B03H (1 ×) ANTENNA-CTRL B02A (2 ×) ANTENNA-SUPPLY B02A (2 ×) A-PLOP B03 A-PLOP B04B (1 ×) A-PLOP B04C (2 ×) AP-SCART-OUT-L B04B (3 ×) AP-SCART-OUT-R B04B (3 ×) ARX0- B05A (2 ×) ARX0+ B05A (2 ×) ARX1- B05A (2 ×) ARX1+ B05A (2 ×) ARX2- B05A (2 ×) ARX2+ B05A (2 ×) ARX-5V B05A (3 ×) ARXC- B05A (2 ×) ARXC+ B05A (2 ×) ARX-DDC-CLK B05A (2 ×) ARX-DDC-DAT B05A (2 ×) ARX-HPD B05A (2 ×) A-STBY B03C (1 ×) A-STBY B06A (2 ×) AUD_GND B03D (4 ×) AUD_GND B06A (2 ×) AUDIO-CL-L B03C (1 ×) AUDIO-CL-L B04B (1 ×) AUDIO-CL-R B03C (1 ×) AUDIO-CL-R B04B (1 ×) AUDIO-IN1-L B03D (1 ×) AUDIO-IN1-L B04B (1 ×) AUDIO-IN1-R B03D (1 ×) AUDIO-IN1-R B04B (1 ×) AUDIO-IN2-L B03D (1 ×) AUDIO-IN2-L B04B (1 ×) AUDIO-IN2-R B03D (1 ×) AUDIO-IN2-R B04B (1 ×) AUDIO-IN3-L B03D (1 ×) AUDIO-IN3-L B04C (1 ×) AUDIO-IN3-R B03D (1 ×) AUDIO-IN3-R B04C (1 ×) AUDIO-IN4-L B03D (1 ×) AUDIO-IN4-L B04C (1 ×) AUDIO-IN4-R B03D (1 ×) AUDIO-IN4-R B04C (1 ×) AUDIO-IN5-L B03D (1 ×) AUDIO-IN5-L B04C (2 ×) AUDIO-IN5-R B03D (1 ×) AUDIO-IN5-R B04C (2 ×) AUDIO-MUTE B03H (2 ×) AUDIO-MUTE B04C (1 ×) AUDIO-MUTE B06A (1 ×) AUDIO-OUT-L B03C (1 ×) AUDIO-OUT-L B04C (1 ×) AUDIO-OUT-R B03C (1 ×) AUDIO-OUT-R B04C (1 ×) AUDIO-RESET B03C (2 ×) AUDIO-RESET B03 AUDIO-VDD B03C (7 ×) AV1-BLK B03H (1 ×) AV1-BLK B04B (1 ×) AV1-BLK-BO B04B (1 ×) AV1 -STAT US B03H (1 ×) AV1 -STAT US B04A (1 ×) AV1 -STAT US B04B (1 ×) AV2-BLK_LCD-SDA B03H (1 ×) AV2-BLK_LCD-SDA B04A (1 ×) AV2-BLK_LCD-SDA B04B (1 ×)
C (1 ×)
H (2 ×)
AV2-BLK-BO B04B (1 ×) AV2-PB_SC2-B B03E (1 ×) AV2-PB_SC2-B B04B (1 ×) AV2-PR_SC2-R B03E (1 ×) AV2-PR_SC2-R B04B (1 ×) AV2 -STAT US B03H (1 ×) AV2 -STAT US B04B (1 ×) AV2-Y_SC2-G B03E (1 ×) AV2-Y_SC2-G B04B (1 ×) AV3-PB B03E (1 ×) AV3-PB B04C (1 ×) AV3-PR B03E (1 ×) AV3-PR B04C (1 ×) AV3-Y B03E (1 ×) AV3-Y B04C (1 ×) BACKLIGHT-BOOST B01B (1 ×) BACKLIGHT-BOO BACKLIGHT-BOOST-IN B07A (1 ×) BACKLIGHT-BOOST-IN B07B (1 ×) BACKLIGHT-IN B07A (1 ×) BACKLIGHT-IN B07B (1 ×) BACKLIGHT-OUT B01B (1 ×) BACKLIGHT-OUT B07A (1 ×) BOLT-ON-IO B03H (2 ×) BOLT-ON-TS-ENn B03H (2 ×) BOOTMODE_PNX8543-BL-CTRL B03G (1 ×) BOOTMODE_PNX8543-BL-CTRL B07B (1 ×) BRX0- B05A (2 ×) BRX0+ B05A (2 ×) BRX1- B05A (2 ×) BRX1+ B05A (2 ×) BRX2- B05A (2 ×) BRX2+ B05A (2 ×) BRX-5V B05A (3 ×) BRXC- B05A (2 ×) BRXC+ B05A (2 ×) BRX-DDC-CLK B05A (2 ×) BRX-DDC-DAT B05A (2 ×) BRX-HPD B05A (2 ×) B-VGA B03E (1 ×) B-VGA B04C (1 ×) CA-ADDEN B03B (1 ×) CA-ADDEN B05C (3 ×) CA-CD1 B03B (1 ×) CA-CD1 B05C (2 ×) CA-CD2 B03B (1 ×) CA-CD2 B05C (2 ×) CA-CE1 B05C (2 ×) CA-CE2 B05C (2 ×) CA-DATADIR B03B (1 ×) CA-DATADIR B05C (1 ×) CA-DATAEN B03B (1 ×) CA-DATAEN B05C (1 ×) CA-INPACK B05C (2 ×) CA-IORD B05C (2 ×) CA-IOWR B05C (2 ×) CA-MDI0 B03B (1 ×) CA-MDI0 B05C (1 ×) CA-MDI1 B03B (1 ×) CA-MDI1 B05C (1 ×) CA-MDI2 B03B (1 ×) CA-MDI2 B05C (1 ×) CA-MDI3 B03B (1 ×) CA-MDI3 B05C (1 ×) CA-MDI4 B03B (1 ×) CA-MDI4 B05C (1 ×) CA-MDI5 B03B (1 ×) CA-MDI5 B05C (1 ×) CA-MDI6 B03B (1 ×) CA-MDI6 B05C (1 ×) CA-MDI7 B03B (1 ×) CA-MDI7 B05C (1 ×) CA-MDO(0) B03B (1 ×) CA-MDO(0) B05C (1 ×) CA-MDO(1) B03B (1 ×) CA-MDO(1) B05C (1 ×) CA-MDO(2) B03B (1 ×) CA-MDO(2) B05C (1 ×) CA-MDO(3) B03B (1 ×) CA-MDO(3) B05C (1 ×) CA-MDO(4) B03B (1 ×) CA-MDO(4) B05C (1 ×) CA-MDO(5) B03B (1 ×) CA-MDO(5) B05C (1 ×) CA-MDO(6) B03B (1 ×) CA-MDO(6) B05C (1 ×) CA-MDO(7) B03B (1 ×) CA-MDO(7) B05C (1 ×) CA-MICLK B03B (1 ×) CA-MICLK B05C (1 ×) CA-MISTRT B03B (1 ×) CA-MISTRT B05C (1 ×)
ST B07A (1 ×)
EN 86Q548.1E LB 10.
CA-MIVAL B03B (1 ×) CA-MIVAL B05C (1 ×) CA-MOCLK_VS2 B03B (2 ×) CA-MOCLK_VS2 B05C (1 ×) CA-MOSTRT B03B (1 ×) CA-MOSTRT B05C (1 ×) CA-MOVAL B03B (1 ×) CA-MOVAL B05C (1 ×) CA-OE B05C (2 ×) CA-REG B05C (2 ×) CA-RST B03B (1 ×) CA-RST B05C (1 ×) CA-VS1 B03B (1 ×) CA-VS1 B05C (2 ×) CA-WAIT B05C (3 ×) CA-WE B05C (2 ×) CEC B05A (5 ×) CEC-HDMI B03H (2 ×) CEC-HDMI B05A (1 ×) CLK-SCL B04C (1 ×) CRX0- B05A (2 ×) CRX0+ B05A (2 ×) CRX1- B05A (2 ×) CRX1+ B05A (2 ×) CRX2- B05A (2 ×) CRX2+ B05A (2 ×) CRX-5V B05A (3 ×) CRXC- B05A (2 ×) CRXC+ B05A (2 ×) CRX-DDC-CLK B05A (2 ×) CRX-DDC-DAT B05A (2 ×) CRX-HPD B05A (2 ×) CVBS B02A (1 ×) CVBS B03E (1 ×) CVBS1 B03E (1 ×)
1 B04B (1 ×)
CVBS CVBS2 B03E (1 ×) CVBS2 B04B (1 ×) CVBS-OUT-SC1 B04B (2 ×) CVBS-OUT-SC1-PBS B04A (1 ×) CVBS-OUT-SC1-PBS B04B (1 ×) CVBS-OUT-SC2 B04B (1 ×) CVBS-OUT-SC2 B04C (1 ×) CVBS-TER-OUT B02A (1 ×) CVBS-TER-OUT B04B (1 ×) DATA - SDA B04C (1 ×) DDC-SCL B05A (3 ×) DDC-SDA B05A (3 ×) DDR2-A0 B03F (3 ×) DDR2-A1 B03F (3 ×) DDR2-A10 B03F (3 ×) DDR2-A11 B03F (3 ×) DDR2-A12 B03F (3 ×) DDR2-A2 B03F (3 ×) DDR2-A3 B03F (3 ×) DDR2-A4 B03F (3 ×) DDR2-A5 B03 DDR2-A6 B03F (3 ×) DDR2-A7 B03F (3 ×) DDR2-A8 B03F (3 ×) DDR2-A9 B03F (3 ×) DDR2-BA0 B03F (3 ×) DDR2-BA1 B03F (3 ×) DDR2-BA2 B03F (3 ×) DDR2-CAS B03F (3 ×) DDR2-CKE B03F (3 ×) DDR2-CLK_N B03F (3 ×) DDR2-CLK_P B03F (3 ×) DDR2-CS B03F (3 ×) DDR2-D0 B03F (2 ×) DDR2-D1 B03F (2 ×) DDR2-D10 B03F (2 ×) DDR2-D11 B03F (2 ×) DDR2-D12 B03F (2 ×) DDR2-D13 B03F (2 ×) DDR2-D14 B03F (2 ×) DDR2-D15 B03F (2 ×) DDR2-D16 B03F (2 ×) DDR2-D17 B03F (2 ×) DDR2-D18 B03F (2 ×) DDR2-D19 B03F (2 ×) DDR2-D2 B03F (2 ×) DDR2-D20 B03F (2 ×) DDR2-D21 B03F (2 ×) DDR2-D22 B03F (2 ×) DDR2-D23 B03F (2 ×) DDR2-D24 B03F (2 ×) DDR2-D25 B03F (2 ×) DDR2-D26 B03F (2 ×) DDR2-D27 B03F (2 ×) DDR2-D28 B03F (2 ×) DDR2-D29 B03F (2 ×)
F (3 ×)
DDR2-D3 B03F (2 ×) DDR2-D30 B03F (2 ×) DDR2-D31 B03F (2 ×) DDR2-D4 B03F (2 ×) DDR2-D5 B03F (2 ×) DDR2-D6 B03F (2 ×) DDR2-D7 B03F (2 ×) DDR2-D8 B03F (2 ×) DDR2-D9 B03F (2 ×) DDR2-DQM0 B03F (2 ×) DDR2-DQM1 B03F (2 ×) DDR2-DQM2 B03F (2 ×) DDR2-DQM3 B03F (2 ×) DDR2-DQS0_N B03F (2 ×) DDR2-DQS DDR2-DQS1_N B03F (2 ×) DDR2-DQS1_P B03F (2 ×) DDR2-DQS2_N B03F (2 ×) DDR2-DQS2_P B03F (2 ×) DDR2-DQS3_N B03F (2 ×) DDR2-DQS3_P B03F (2 ×) DDR2-ODT B03F (3 ×) DDR2-RAS B03F (3 ×) DDR2-VREF-CTRL B03F (2 ×) DDR2-VREF-DDR B03F (3 ×) DDR2-WE B03F (3 ×) DETECT1 B01A (1 ×) DETECT1 B03H (3 ×) DETECT-12V B01B (1 ×) DETECT-12V B03H (1 ×) DETECT2 B03H (3 ×) DRX0- B05A (2 ×) DRX0+ B05A (2 ×) DRX1- B05A (2 ×) DRX1+ B05A (2 ×) DRX2- B05A (2 ×) DRX2+ B05A (2 ×) DRX-5V B05A (3 ×) DRXC- B05A (2 ×) DRXC+ B05A (2 ×) DRX-DDC-CLK B05A (2 ×) DRX-DDC-DAT B05A (2 ×) DRX-HPD B05A (2 ×) EA B03H (1 ×) EJTAG-DETECT B03G (1 ×) EJTAG-DETECT B03H (2 ×) EJTAG-PNX5100-TCK B08C (1 ×) EJTAG-PNX5100-TDI B08C (1 ×) EJTAG-PNX5100-TDO B08C (1 ×) EJTAG-PNX5100-TMS B08C (1 ×) EJTAG-PNX5100-TRSTn B08 EJTAG-TCK B03G (3 ×) EJTAG-TDI B03G (3 ×) EJTAG-TDO B03G (3 ×) EJTAG-TMS B03G (3 ×) EJTAG-TRSTN B03G (3 ×) ENABLE-3V3 B01A (1 ×) ENABLE-3V3 B01B (1 ×) ENABLE-3V3 B03H (2 ×) FAN1-DRV B04B (2 ×) FAN1-OUT B04B (2 ×) FAN2-DRV B04B (2 ×) FE-CLK B02A (1 ×) FE-CLK B03B (1 ×) FE-DATA(0) B02A (1 ×) FE-DATA(0) B03B (1 ×) FE-DATA(1) B02A (1 ×) FE-DATA(1) B03B (1 ×) FE-DATA(2) B02A (1 ×) FE-DATA(2) B03B (1 ×) FE-DATA(3) B02A (1 ×) FE-DATA(3) B03B (1 ×) FE-DATA(4) B02A (1 ×) FE-DATA(4) B03B (1 ×) FE-DATA(5) B02A (1 ×) FE-DATA(5) B03B (1 ×) FE-DATA(6) B02A (1 ×) FE-DATA(6) B03B (1 ×) FE-DATA(7) B02A (1 ×) FE-DATA(7) B03B (1 ×) FE-ERR B03B (2 ×) FE-SOP B02A (1 ×) FE-SOP B03B (1 ×) FE-VALID B02A (1 ×) FE-VALID B0 FRONT-C B03E (1 ×) FRONT-C B04C (2 ×) FRONT-Y_CVBS B03E (1 ×) FRONT-Y_CVBS B04C (2 ×) GND-SIG B01A (12 ×) GNDSND B01B (2 ×) GNDSND B06A (20 ×)
0_P B03F (2 ×)
C (1 ×)
3B (1 ×)
G-VGA B03E (1 ×) G-VGA B04C (1 ×) HP_LOUT B03C (1 ×) HP_LOUT B04C (1 ×) HP_ROUT B03C (1 ×) HP_ROUT B04C (1 ×) H-SYNC-VGA B03E (1 ×) H-SYNC-VGA B04C (1 ×) IF-AGC B02A (2 ×) IF-N B02A (2 ×) IF-P B02A (2 ×) IRQ-CA B03B (1 ×) IRQ-CA B03G (2 ×) IRQ-CA B05C (2 ×) IRQ-PCI B03G (1 ×) IRQ-PCI B05B (1 ×) KEYBOARD B03G (1 ×) KEYBOARD B03H (2 ×) LAMP-ON-OUT B01B (1 ×) LAMP-ON-OUT B03H (3 ×) LCD-SCL B03H (2 ×) LCD-SCL B04A (1 ×) LCD-SCL B04C (1 ×) LED1 B03G (2 ×) LED1 B03H (1 ×) LED2 B03G (2 ×) LED2 B03H (1 ×) LEFT-SPEAKER B06A (4 ×) LIGHT-SENSOR B03G (2 ×) LIGHT-SENSOR B03H (1 ×) MDO0 B05C (4 ×) MDO1 B05C (4 ×) MDO2 B05C (4 ×)
B05C (4 ×)
MDO3 MDO4 B05C (4 ×) MDO5 B05C (4 ×) MDO6 B05C (4 ×) MDO7 B05C (4 ×) MOCLKA B05C (4 ×) MOSTRTA B05C (4 ×) MOVALA B05C (4 ×) MUTE B06A (2 ×) NAND-AD(0) B03G (2 ×) NAND-AD(1) B03G (2 ×) NAND-AD(2) B03G (2 ×) NAND-AD(3) B03G (2 ×) NAND-AD(4) B03G (2 ×) NAND-AD(5) B03G (2 ×) NAND-AD(6) B03G (2 ×) NAND-AD(7) B03G (2 ×) NAND-ALE B03G (2 ×) NAND-CLE B03G (2 ×) NAND-REn B03G (2 ×) NAND-WEn B03G (2 ×) PBS_SPI_DI B04A (2 ×) PBS-I2C-SCL B03G (2 ×) PBS-I2C-SCL B04A (1 ×) PCI-AD0 B03G (2 ×) PCI-AD0 B05B (1 ×) PCI-AD0 B05C (1 ×) PCI-AD0 B08C (1 ×) PCI-AD1 B03G (2 ×) PCI-AD1 B05B (1 ×) PCI-AD1 B05C (1 ×) PCI-AD1 B08C (1 ×) PCI-AD10 B03G (1 ×) PCI-AD10 B05B (1 ×) PCI-AD10 B05C (1 ×) PCI-AD10 B08C (1 ×) PCI-AD11 B03G (1 ×) PCI-AD11 B05B (1 ×) PCI-AD11 B05C (1 ×) PCI-AD11 B08C (1 ×) PCI-AD12 B03G (1 ×) PCI-AD12 B05B (1 ×) PCI-AD12 B05C (1 ×) PCI-AD12 B08C (1 ×) PCI-AD13 B03G (1 ×) PCI-AD13 B05B (1 ×) PCI-AD13 B05C (1 ×) PCI-AD13 B08C (1 ×) PCI-AD14 B03G (1 ×) PCI-AD14 B05B (1 ×) PCI-AD14 B05C (1 ×) PCI-AD14 B08C (1 ×) PCI-AD15 B03G (1 ×) PCI-AD15 B05B (1 ×) PCI-AD15 B08C (1 ×) PCI-AD16 B03G (1 ×) PCI-AD16 B05B (1 ×) PCI-AD16 B05C (1 ×) PCI-AD16 B08C (1 ×)
PCI-AD17 B03G (1 ×) PCI-AD17 B05B (1 ×) PCI-AD17 B05C (1 ×) PCI-AD17 B08C (1 ×) PCI-AD18 B03G (1 ×) PCI-AD18 B05B (1 ×) PCI-AD18 B05C (1 ×) PCI-AD18 B08C (1 ×) PCI-AD19 B03G (1 ×) PCI-AD19 B05B (1 ×) PCI-AD19 B05C (1 ×) PCI-AD19 B08C (1 ×) PCI-AD2 B03G (1 ×)
18561_600_090713.eps
090713
2009-Dec-18

SSB: SRP List Part 2

Netname Diagram
PCI-AD2 B05B (1 ×)
PCI-A D2 B05C (1 ×)
PCI-AD2 B08C (1 ×)
PCI-AD20 B03G (1 ×)
PCI-AD20 B05B (1 ×)
PCI-AD20 B08C (1 ×)
PCI-AD21 B03G (1 ×)
PCI-AD21 B05B (1 ×)
PCI-AD21 B08C (1 ×)
PCI-AD22 B03G (1 ×)
PCI-AD22 B05B (1 ×)
PCI-AD22 B05C (1 ×)
PCI-AD22 B08C (1 ×)
PCI-AD23 B03G (1 ×)
PCI-AD23 B05B (2 ×)
PCI-AD23 B05C (1 ×)
PCI-AD23 B08C (1 ×)
PCI-AD24 B03G (3 ×)
PCI-AD24 B05B (1 ×)
PCI-AD24 B05C (1 ×)
PCI-AD24 B08C (1 ×)
PCI-AD25 B03G (2 ×)
PCI-AD25 B05B (1 ×)
PCI-AD25 B05C (1 ×)
PCI-AD25 B08C (2 ×)
PCI-AD26 B03G (2 ×)
PCI-AD26 B05B (1 ×)
PCI-AD26 B05C (1 ×)
PCI-AD26 B08C (1 ×)
PCI-AD27 B03G (2 ×)
PCI-AD27 B05B (1 ×)
PCI-AD27 B05C (1 ×)
PCI-AD27 B08C (1 ×)
PCI-AD28 B03G (2 ×)
PCI-AD28 B05B (1 ×)
PCI-AD28 B05C (1 ×)
PCI-AD28 B08C (1 ×)
PCI-AD29 B03G (2 ×)
PCI-AD29 B05B (1 ×)
PCI-AD29 B05C (1 ×)
PCI-AD29 B08C (1 ×)
PCI-AD3 B03G (1 ×)
PCI-AD3 B05B (1 ×)
PCI-AD3 B05C (1 ×)
PCI-AD3 B08
PCI-AD30 B03G (2 ×)
PCI-AD30 B05B (1 ×)
PCI-AD30 B05C (1 ×)
PCI-AD30 B08C (1 ×)
PCI-AD31 B03G (2 ×)
PCI-AD31 B05B (1 ×)
PCI-AD31 B05C (1 ×)
PCI-AD31 B08C (1 ×)
PCI-AD4 B03G (1 ×)
PCI-AD4 B05B (1 ×)
PCI-AD4 B05C (1 ×)
PCI-AD4 B08C (1 ×)
PCI-AD5 B03G (1 ×)
PCI-AD5 B05B (1 ×)
PCI-AD5 B05C (1 ×)
PCI-AD5 B08C (1 ×)
PCI-AD6 B03G (1 ×)
PCI-AD6 B05B (1 ×)
PCI-AD6 B05C (1 ×)
PCI-AD6 B08C (1 ×)
PCI-AD7 B03G (1 ×)
PCI-AD7 B05B (1 ×)
PCI-AD7 B05C (1 ×)
PCI-AD7 B08C (1 ×)
PCI-AD8 B03G (1 ×)
PCI-AD8 B05B (1 ×)
PCI-AD8 B05C (1 ×)
PCI-AD8 B08C (1 ×)
PCI-AD9 B03G (1 ×)
PCI-AD9 B05B (1 ×)
PCI-AD9 B05C (1 ×)
PCI-AD9 B08C (1 ×)
PCI-CBE0 B03G (1 ×)
PCI-CBE0 B05B (1 ×)
PCI-CBE0 B08C (1 ×)
PCI-CBE1 B03G (2 ×)
PCI-CBE1 B05B (1 ×)
PCI-CBE1 B05C (1 ×)
PCI-CBE1 B08
PCI-CBE2 B03G (2 ×)
PCI-CBE2 B05B (1 ×)
PCI-CBE2 B05C (1 ×)
PCI-CBE2 B08C (1 ×)
PCI-CBE3 B03G (1 ×)
PCI-CBE3 B05B (1 ×)
C (1 ×)
C (1 ×)
3139 123 6443.3
Circuit Diagrams and PWB Layouts
PCI-CBE3 B08C (1 ×) PCI-CLK-ETHERNET B03G (1 ×) PCI-CLK-ETHERNET B05B (1 ×) PCI-CLK-OUT B03G (2 ×) PCI-CLK-PNX5100 B03G (1 ×) PCI-CLK-PNX5100 B08C (1 ×) PCI-CLK-PNX8543 B03G (2 ×) PCI-DEVSEL B03G (2 ×) PCI-DEVSEL B05B (1 ×) PCI-DEVSEL B08C (1 ×) PCI-FRAME B03G (2 ×) PCI-FRAME B05B (1 ×) PCI-FRAME B08C (1 ×) PCI-GNT B03G (2 ×) PCI-GNT B05B (1 ×) PCI-GNT-B B03G (2 ×) PCI-IRDY B03G (2 ×) PCI-IRDY B05B (1 ×) PCI-IRDY B08C (1 ×) PCI-PAR B03G (1 ×) PCI-PAR B05B (1 ×) PCI-PAR B08C (1 ×) PCI-PERR B03G (2 ×) PCI-PERR B05B (1 ×) PCI-PERR B08C (1 ×) PCI-REQ B03G (2 ×) PCI-REQ B05B (1 ×) PCI-REQ-B B03G (2 ×) PCI-SERR B03G (2 ×) PCI-SERR B05B (1 ×) PCI-SERR B08 PCI-STOP B03G (2 ×) PCI-STOP B05B (1 ×) PCI-STOP B08C (1 ×) PCI-TRDY B03G (2 ×) PCI-TRDY B05B (1 ×) PCI-TRDY B08C (1 ×) PCMCIA-A0 B05C (2 ×) PCMCIA-A1 B05C (2 ×) PCMCIA-A10 B05C (2 ×) PCMCIA-A11 B05C (2 ×) PCMCIA-A12 B05C (2 ×) PCMCIA-A13 B05C (2 ×) PCMCIA-A14 B05C (2 ×) PCMCIA-A2 B05C (2 ×) PCMCIA-A3 B05C (2 ×) PCMCIA-A4 B05C (2 ×) PCMCIA-A5 B05C (2 ×) PCMCIA-A6 B05C (2 ×) PCMCIA-A7 B05C (2 ×) PCMCIA-A8 B05C (2 ×) PCMCIA-A9 B05C (2 ×) PCMCIA-D0 B05C (2 ×) PCMCIA-D1 B05C (2 ×) PCMCIA-D2 B05C (2 ×) PCMCIA-D3 B05C (2 ×) PCMCIA-D4 B05C (2 ×) PCMCIA-D5 B05C (2 ×) PCMCIA-D6 B05C (2 ×) PCMCIA-D7 B05C (2 ×) PCMCIA-VCC-VPP B05C (5 ×) PDN B02A (2 ×) PDP B02A (2 ×) PI_3 B03H (2 ×) PNX5100-BL-BOOST B07B (1 ×) PNX5100-BL-BOOST B08C (1 ×) PNX5100-BL-CTRL B07B (1 ×) PNX5100-BL-CTRL B08C (1 ×) PNX5100-DDR2-A0 B08B (3 ×) PNX5100-DDR2-A1 B08B (3 ×) PNX5100-DDR2-A10 B08B (3 ×) PNX5100-DDR2-A11 B08B (3 ×) PNX5100-DDR2-A12 B08B (3 ×) PNX5100-DDR2-A2 B08B (3 ×) PNX5100-DDR2-A3 B08B (3 ×) PNX5100-DDR2-A4 B08B (3 ×) PNX5100-DDR2-A5 B0 PNX5100-DDR2-A6 B08B (3 ×) PNX5100-DDR2-A7 B08B (3 ×) PNX5100-DDR2-A8 B08B (3 ×) PNX5100-DDR2-A9 B08B (3 ×) PNX5100-DDR2-BA0 B08B (3 ×) PNX5100-DDR2-BA1 B08B (3 ×) PNX5100-DDR2-CAS B08B (3 ×) PNX5100-DDR2-CKE B08B (3 ×) PNX5100-DDR2-CLK_N B08B (3 ×) PNX5100-DDR2-CLK_P B08B (3 ×) PNX5100-DDR2-CS B08B (3 ×) PNX5100-DDR2-D0 B08B (2 ×) PNX5100-DDR2-D1 B08B (2 ×) PNX5100-DDR2-D10 B08B (2 ×) PNX5100-DDR2-D11 B08B (2 ×)
C (1 ×)
8B (3 ×)
PNX5100-DDR2-D12 B08B (2 ×) PNX5100-DDR2-D13 B08B (2 ×) PNX5100-DDR2-D14 B08B (2 ×) PNX5100-DDR2-D15 B08B (2 ×) PNX5100-DDR2-D16 B08B (2 ×) PNX5100-DDR2-D17 B08B (2 ×) PNX5100-DDR2-D18 B08 PNX5100-DDR2-D19 B08B (2 ×) PNX5100-DDR2-D2 B08B (2 ×) PNX5100-DDR2-D20 B08B (2 ×) PNX5100-DDR2-D21 B08B (2 ×) PNX5100-DDR2-D22 B08B (2 ×) PNX5100-DDR2-D23 B08B (2 ×) PNX5100-DDR2-D24 B08B (2 ×) PNX5100-DDR2-D25 B08B (2 ×) PNX5100-DDR2-D26 B08B (2 ×) PNX5100-DDR2-D27 B08B (2 ×) PNX5100-DDR2-D28 B08B (2 ×) PNX5100-DDR2-D29 B08B (2 ×) PNX5100-DDR2-D3 B08B (2 ×) PNX5100-DDR2-D30 B08B (2 ×) PNX5100-DDR2-D31 B08B (2 ×) PNX5100-DDR2-D4 B08B (2 ×) PNX5100-DDR2-D5 B08B (2 ×) PNX5100-DDR2-D6 B08B (2 ×) PNX5100-DDR2-D7 B08B (2 ×) PNX5100-DDR2-D8 B08B (2 ×) PNX5100-DDR2-D9 B08B (2 ×) PNX5100-DDR2-DQM0 B08B (2 ×) PNX5100-DDR2-DQM1 B08B (2 ×) PNX5100-DDR2-DQM2 B08B (2 ×) PNX5100-DDR2-DQM3 B08B (2 ×) PNX5100-DDR2-DQS0_N B08B (2 ×) PNX5100-DDR2-DQS0_P B08B (2 ×) PNX5100-DDR2-DQ PNX5100-DDR2-DQS1_P B08B (2 ×) PNX5100-DDR2-DQS2_N B08B (2 ×) PNX5100-DDR2-DQS2_P B08B (2 ×) PNX5100-DDR2-DQS3_N B08B (2 ×) PNX5100-DDR2-DQS3_P B08B (2 ×) PNX5100-DDR2-ODT B08B (3 ×) PNX5100-DDR2-RAS B08B (3 ×) PNX5100-DDR2-VREF-CTRL B08B (2 ×) PNX5100-DDR2-VREF-DDR B07B (1 ×) PNX5100-DDR2-VREF-DDR B08B (3 ×) PNX5100-DDR2-WE B08B (3 ×) PNX5100-LCD-PWR-ON B07B (1 ×) PNX5100-LCD-PWR-ON B08C (1 ×) PNX5100-ROT B07B (2 ×) PNX5100-ROT B08C (1 ×) PNX5100-RST-OUT B08C (2 ×) PNX8543-BL-BOOST_SPI-CLK B03G (2 ×) PNX8543-BL-BOOST_SPI-CLK B04A (1 ×) PNX8543-BL-BOOST_SPI-CLK B07B (1 ×) PNX8543-LCD-PWR-ON_S PNX8543-LCD-PWR-ON_SPI-DI B04A (1 ×) PNX8543-LCD-PWR-ON_SPI-DI B07B (1 ×) POWER-OK B01B (1 ×) POWER-OK B03H (2 ×) PROT-DC B01A (1 ×) PROT-DC B01B (1 ×) PSEN B03H (1 ×) RC B03G (1 ×) RC B03H (1 ×) RC B04A (1 ×) RC_uP B03H (2 ×) RC1 B03H (1 ×) RC1 B04A (1 ×) RC1 B04C (1 ×) RC2 B03H (1 ×) RC2 B04A (1 ×) RC2 B04C (1 ×) REGIMBEAU_CVBS-SWITCH B03H (2 ×) REGIMBEAU_CVBS-SWITCH B04B (1 ×) RESET-ETHERNET B03H (2 ×) RESET-ETHERNET B05B (2 ×) RESET-NVM B03H (3 ×) RESET-PNX5100 B03H (2 ×) RESET-PNX5100 B08C (1 ×) RESET-STBY B03H (2 ×) RESET-SYSTEM B02A (1 ×) RES
ET-SYSTEM B03G (1 ×) RESET-SYSTEM B03H (3 ×) RF-AGC B02A (2 ×) RIGHT-SPEAKER B06A (4 ×) RREF-PNX85XX B03A (2 ×) RREF-PNX85XX B05A (1 ×) R-VGA B03E (1 ×) R-VGA B04C (1 ×) RX0- B05A (2 ×) RX0+ B05A (2 ×) RX1- B05A (2 ×)
S1_N B08B (2 ×)
PI-DI B03G (2 ×)
B (2 ×)
EN 87Q548.1E LB 10.
RX1+ B05A (2 ×) RX2- B05A (2 ×) RX2+ B05A (2 ×) RX51001A- B03B (1 ×) RX51001A- B07B (1 ×) RX51001A- B08D (1 ×) RX51001A+ B03B (1 ×) RX51001A+ B07B (1 ×) RX51001A+ B08D (1 ×) RX51001B- B03B (1 ×) RX51001B- B07B (2 ×) RX51001B- B08D (1 ×) RX51001B+ B03B (1 ×) RX51001B+ B07B (2 ×) RX51001B+ B08D (1 ×) RX51001C- B03B (1 ×) RX51001C- B07B (2 ×) RX51001C- B08D (1 ×) RX51001C+ B03B (1 ×) RX51001C+ B07B (2 ×) RX51001C+ B08D (1 ×) RX51001CLK- B03B (1 ×) RX51001CLK- B07B (2 ×) RX51001CLK- B08D (1 ×) RX51001CLK+ B03B (1 ×) RX51001CLK+ B07B (2 ×) RX51001CLK+ B08D (1 ×) RX51001D- B03B (1 ×) RX51001D- B07B (2 ×) RX51001D- B08D (1 ×) RX51001D+ B03B (1 ×) RX51001D+ B07B (2 ×) RX51001D+ B08D (1 ×) RX51001E- B03B (1 ×) RX51001E- B07B (2 ×) RX51001E- B08D (1 ×) RX51001E+ B03B (1 ×) RX51001E+ B07B (2 ×) RX51001E+ B08D (1 ×) RX51002A- B03B (1 ×) RX51002A- B07B (1 ×) RX51002A- B08D (1 ×) RX51002A+ B03B (1 ×) RX51002A+ B07B (1 ×) RX51002A+ B08D (1 ×) RX51002B- B03B (1 ×) RX51002B- B07B (1 ×) RX51002B- B08D (1 ×) RX51002B+ B03B (1 ×) RX51002B+ B07B (1 ×) RX51002B+ B08D (1 ×) RX51002C- B03B (1 ×) RX51002C- B07B (1 ×) RX51002C- B08D (1 ×) RX51002C+ B03B (1 ×) RX51002C+ B07B (1 ×) RX51002C+ B08D (1 ×) RX51002CLK- B03B (1 ×) RX51002CLK- B07B (1 ×) RX51002CLK- B08D (1 ×) RX51002CLK+ B03B (1 ×) RX51002CLK+ B07B (1 ×) RX51002CLK+ B08D (1 ×) RX51002D- B03B (1 ×) RX51002D- B07B (1 ×) RX51002D- B08D (1 ×) RX51002D+ B03B (1 ×) RX51002D+ B07B (1 ×) RX51002D+ B08D (1 ×) RX51002E- B03B (1 ×) RX51002E- B07B (1 ×) RX51002E- B08D (1 ×) RX51002E+ B03B (1 ×) RX51002E+ B07B (1 ×) RX51002E+ B08D (1 ×) RXC- B05A (2 ×) RXC+ B05A (2 ×) RXD B03G (1 ×) RXD B04A (1 ×) RXD-BOLT-ON B04A (2 ×) RXD-MIPS B03G (2 ×) RXD-MIPS RXD-MIPS2 B03G (2 ×) RXD-UP B03G (1 ×) RXD-UP B03H (2 ×) RXD-UP B04A (2 ×)
SC1-B B03E (1 ×) SC1-B B04B (1 ×) SC1-G B03E (1 ×) SC1-G B04B (1 ×) SC1-R B03E (1 ×) SC1-R B04B (1 ×)
B04A (2 ×)
SCL1 B03G (2 ×) SCL2 B03G (3 ×) SCL3 B03G (2 ×) SCL-AMBI-3V3 B08C (1 ×) SCL-AMBI-3V3 B08E (1 ×) SCL-DISP B03G (1 ×) SCL-DISP B07B (3 ×) SCL-SET B01B (1 ×) SCL-SET B03G (3 ×) SCL-SET B04B (3 ×) SCL-SSB B02A (1 ×) SCL-SSB B03 SCL-SSB B04A (1 ×) SCL-SSB B05A (1 ×) SCL-SSB B08C (2 ×) SCL-TUNER B02A (2 ×) SCL-UP-MIPS B03G (3 ×) SCL-UP-MIPS B03H (2 ×) SDA1 B03G (2 ×) SDA2 B03G (3 ×) SDA3 B03G (2 ×) SDA-AMBI-3V3 B08C (1 ×) SDA-AMBI-3V3 B08E (1 ×) SDA-DISP B03G (1 ×) SDA-DISP B07B (3 ×) SDA-SET B01B (1 ×) SDA-SET B03G (3 ×) SDA-SET B04B (3 ×) SDA-SSB B02A (1 ×) SDA-SSB B0 SDA-SSB B04A (1 ×) SDA-SSB B05A (1 ×) SDA-SSB B08C (2 ×) SDA-TUNER B02A (2 ×) SDA-UP-MIPS B03G (3 ×) SDA-UP-MIPS B03H (2 ×) SDM B03H (3 ×) SENSE+1V2-PNX5100 B01B (1 ×) SENSE+1V2-PNX5100 B08A (2 ×) SENSE+1V2-PNX85XX B01A (1 ×) SENSE+1V2-PNX85XX B03A (1 ×) SIF B02A (1 ×) SIF B03E (1 ×) SIF-GND B02A (1 ×) SIF-GND B03E (2 ×) SPDIF-IN B03D (1 ×) SPDIF-OUT B04C (1 ×) SPDIF-OUT-1 B03D (1 ×) SPDIF-OUT-1 B04C (1 ×) SPI-CLK B03H (2 ×) SPI-CSB B03H (2 ×) SPI-DO_I2C-SDA B0 3 SPI-DO_I2C-SDA B04A (1 ×) SPI-PROG B03H (3 ×) SPI-SDI B03H (2 ×) SPI-SDO B03H (2 ×) SPI-WP B03H (3 ×) STANDBY B01B (1 ×) STANDBY B03H (2 ×) STANDBY B04A (1 ×)
TACHO1 B04B (2 ×) TACHO1-INV B04B (2 ×) TACHO2 B04B (2 ×) TACHO2-INV B04B (2 ×) TX1A- B07B (1 ×) TX1A- B08D (1 ×) TX1A+ B07B (1 ×) TX1A+ B08D (1 ×) TX1B- B07B (1 ×) TX1B- B08D (1 ×) TX1B+ B07B (1 ×) TX1B+ B08D (1 ×) TX1C- B07B (1 ×) TX1C- B08D (1 ×) TX1C+ B07B (1 ×) TX1C+ B08D (1 ×) TX1CLK- B07B (1 ×) TX1CLK- B08D (1 ×) TX1CLK+ B07B (1 ×) TX1CLK+ B08D (1 ×) TX1D- B07B (1 ×) TX1D- B08D (1 ×) TX1D+ B07B (1 ×) TX1D+ B08D (1 ×) TX1E- B07B (1 ×) TX1E- B08D (1 ×) TX1E+ B07B (1 ×) TX1E+ B08D (1 ×) TX2A- B07B (1 ×) TX2A- B08D (1 ×) TX2A+ B07B (1 ×) TX2A+ B08D (1 ×)
G (2 ×)
3G (2 ×)
G (2 ×)
TX2B- B07B (1 ×) TX2B- B08D (1 ×) TX2B+ B07B (1 ×) TX2B+ B08D (1 ×) TX2C- B07B (1 ×) TX2C- B08 TX2C+ B07B (1 ×) TX2C+ B08D (1 ×) TX2CLK- B07B (1 ×) TX2CLK- B08D (1 ×) TX2CLK+ B07B (1 ×) TX2CLK+ B08D (1 ×) TX2D- B07B (1 ×) TX2D- B08D (1 ×) TX2D+ B07B (1 ×) TX2D+ B08D (1 ×) TX2E- B07B (1 ×) TX2E- B08D (1 ×) TX2E+ B07B (1 ×) TX2E+ B08D (1 ×) TX3A- B07B (1 ×) TX3A- B08D (1 ×) TX3A+ B07B (1 ×) TX3A+ B08D (1 ×) TX3B- B07B (1 ×) TX3B- B08D (1 ×) TX3B+ B07B (1 ×) TX3B+ B08D (1 ×) TX3C- B07B (1 ×) TX3C- B08D (1 ×) TX3C+ B07B (1 ×) TX3C+ B08D (1 ×) TX3CLK- B07B (1 ×) TX3CLK- B08D (1 ×) TX3CLK+ B07B (1 ×) TX3CLK+ B08D (1 ×) TX3D- B07B (1 ×) TX3D- B08D (1 ×) TX3D+ B07B (1 ×) TX3D+ B08 TX3E- B07B (1 ×) TX3E- B08D (1 ×) TX3E+ B07B (1 ×) TX3E+ B08D (1 ×) TX4A- B07B (1 ×) TX4A- B08D (1 ×) TX4A+ B07B (1 ×) TX4A+ B08D (1 ×) TX4B- B07B (1 ×) TX4B- B08D (1 ×) TX4B+ B07B (1 ×) TX4B+ B08D (1 ×) TX4C- B07B (1 ×) TX4C- B08D (1 ×) TX4C+ B07B (1 ×) TX4C+ B08D (1 ×) TX4CLK- B07B (1 ×) TX4CLK- B08D (1 ×) TX4CLK+ B07B (1 ×) TX4CLK+ B08D (1 ×) TX4D- B07B (1 ×) TX4D- B08D (1 ×) TX4D+ B07B (1 ×) TX4D+ B08D (1 ×) TX4E- B07B (1 ×) TX4E- B08D (1 ×) TX4E+ B07B (1 ×) TX4E+ B08D (1 ×) TXD B03G (1 ×) TXD B04A (1 ×) TXD-BOLT-ON B04A (2 ×) TXD-MIPS B03G (2 ×) TXD-MIPS B04A (2 ×) TXD-MIPS2 B03G (2 ×) TXD-UP B03G (1 ×) TXD-UP B03H (2 ×) TXD-UP B04A (2 ×) UART-SWITCH B03H (2 ×) USB20-DM B03G (2 ×) USB20-DP B03G (2 ×) USB-OC B03G (2 ×) VDD_1V8 B05A (2 ×) VDDA-ADC B03A (1 ×) VDDA-AUDIO B03A (2 ×) VDDA-AUDIO B03D (4 ×) VDDA-DAC B03A (1 ×) VDDA-DAC B03D (1 ×) VDDA-LVDS B03A (1 ×) VDDA-LVDS B03B (1 ×) VDDH_3V3 B05A (3 ×) VDDO_3V3 B05A (2 ×) VDDS_3V3 B05A (2 ×)
D (1 ×)
D (1 ×)
VSW B01A (1 ×) V-SYNC-VGA B03E (1 ×) V-SYNC-VGA B04C (1 ×) WC-EEPROM-PNX5100_SPI-DI B03G (1 ×) WC-EEPROM-PNX5100_SPI-DI B04A (1 ×) WC-EEPROM-PNX5100_SPI-DI B04C (1 ×) WC-EEPROM-PNX5100_SPI-DI B08C (2 ×) WP-NANDFLASH B03G (2 ×) WP-NANDFLASH B03H (2 ×) XIO-ACK B03G (3 ×) XIO-SEL-NAND B03G (3 ×) Y_CVBS-MON-OUT B03E (1 ×) Y_CVBS-MON-OUT B04B (1 ×) Y_CVBS-MON-OUT-SC B04B (2 ×)
18561_601_090713.eps
090713
2009-Dec-18
Circuit Diagrams and PWB Layouts

Layout Small Signal Board

EN 88Q548.1E LB 10.
1CE2
1X01 1X02
1CE4
1CE3
1M59
3C27
3C30
3C31
3C26
7C02
3C25
3C28
3C32
3C03
3C06
3C08
3C13
3C05
3C12
3C11
1E02
2E09
2E10
3E18
4E10
4E11
4E09
3C07
7C01
3C09
2E13
3E19
3E20
3E21
3E23
2E08
2E12
3E22
4E12
1G16
1G25
1G501G51
4P18
4P17
4P154P16
2P83
6P01
2P95
2P98
4P24
3P42 3P41
2P99
4P23 4P22 4P20
3P40
4P19
2P77
2601
2603
2C6A
2C99
2C98
2C93
7C60
7C00
ICD1
7B01
1G52
CC60
3CFK 3CFL
4CJ1
4CJ3
4CJ2
4M07
I615
7600
7601
1M20
1X03
1M951M99
1L50 1L51 1L52
1735
1L54
1L53
1736
1X08
2230
2L11
5L10
2P82
4P28
4P39
4P26
4P29
4P30
4P31
5101
5100
5104
1G14
2600
2602
1P09
2M04
2224
2226
2227
5L01
2L12
7B00
2H47
2229
2228
5221
2221
2222
7222
5222
2119
2140
2112 2116
2118
2111
2141
2117
2124
7101 7102
2107
2123
2104
2L37
3L18
2L09
2L06
7L03
3L17
2L29
2L24
2L28
4L02
4L03
2L10
5L02
1G121G13
1G22
2122
3L093L16
2L38
2L07
2L23
2L05
5L07
4L01
5L08
2127
2223
5105
5102
2125
5203
2L20
2L08
1G11
3707 3708
5103
2212
2213
7202
CL10
5204
1G18
CL12
6G01
1G01
1G10
3709
3M58
2M10
3M59
2H00
6217
2219
2214
2217
2215
2G03
3G02
2G00
7M00
1X07
2H02
1H02
2218
6G00
1H00 1H01
1G00
2G01
3G00
2G02
4H03 4H04
1H04 1H05
1G15
1G30
1R50
4905
3923
3903
3812
3912
2901
3911
2926
2927
3914
3913
3M54
2M11
3M66
5M00
5H00
2H01
7H11
1H06
1H07
1G31
1G321G33
3924
3925
4902
2900
2906
4903
3904
4901
2931
2905
2908
2932
1M71
1G17
1G341G35
3926
3927
2935
3905
3D233D25
3D26
2934
3D40
2D17
3D47
1D01
3D49
2D01
2A08 3A19
2A18
2A70
2A06
4A06
2A21
2A68 2A50 2A52
2A57
2A53
3A39 3A21
2A31 2A71
2A60
3A49
2A59
4H01 4H02
3FA4
3FA1
6FA1
1F10
1F06 1F07
1F04
3D57
3D21
3A56
3A24
3K30
2K08
3K27
1F23
1F00
3K143K17
7FA1 7FA3
3FA5
3FA3
2FA2
2FA1
2FA9
3FB2
3FB3
7FA5
1F09
1F08
1F05
1F03
1F22
1FA1 1FA2
5F00
2F35
2F36
3F45
3F47
3F46
2F37
7F07
3F49
3F50
3F51
3F53
2F39
3G63
7G32
3G59 3G60
3G61
4G09
3G58
3G56
7G31
2909
2D07
2D08
3D20
3D18
3D42
1D00
2D00
6D00
3915 2A13
3A52
3A53
3A42
3A43
2A55
5A08
2A76
2A35 2A77
2A09
3A18
2A36
2A37
3A25
3A17
5A01
2A07
4A05
2A11
3A16
5A07
5A02
2A40
2A74
2A75
3A55
2A39
3A26
3A27
3A14
5A06
2A38
3A15
2A72
3A54
2A73
2A10
3A343A35 3A37 3A36
3A463A47
3A38
3A20
CA01
7K05
3K24 3K25
3K23
3K26
7K04
3K11
2K09
3K29
2N1J
2N1L
2N0M
2H05
1303
5302
1300 1306 1301
3FA6
2FA5
3FA7
1F21
1F18
1F011F02
1F17
1F15
1F13
1F11
IN20
1K00
3N0F
1N00
1F19 1F20
1F16
1F14
1F12
IN01
7N04
2305
7801
2806
1X12
1E04
1E01
2G51
2G50
1800
38143822
2824
38103811
7808
IN23
5301
2304
5310
2360
2359
2363
2358
2302
4316
1G06
1G04
1G08
1G09
1X05
IN21IN22
1M10
2M05
2M92
6M00
3M75
3M76
6M03
2M93
1X06
1M36
1G05
1G02
1G37
1G36
1G07
1G21
1M09
1H03
1M04
1G20
FG05
FG06
FG17
FG18
FG21
FG20
FG29
FG19
FG22
FG23
FG07
FG03
FG02
FG08
FG10
FG42
IN0N
IN0T
IN04
IN03
IN0V
IN02
IN11
IN0B
6N00
3N0K
IN10
2N1B
IN0A
IN0Y
2N1C
3N0J
2N1A
IN0W
6N01
IN0Z
IN0K
FM10
FM09
FM08
FM38
FH09
2H28
FH05
FH08
FH06
FH07
FM23
3M05
2FA6
3M44
3M71
3M47
1M03
FM15
FM14
FM16
3M45
IG03
2G08
3G08
IG02
6G05
2G09
2G06
3G06
FF24
2G07
6G04
4G05
2G20
2F34
4G04
2G19
3G13
2G21
6F19 6F20
2G22
3G14
FM42
FF22
3F41
IF25
5G00
3F42
2G37
FG04
2G24
7F06
FF39
5G01
3F40
2F33
3G43
3G27
2E23
FM43
5E02
FF35
FD20
3D13
4E21
3E38
2F29
4E20
6G02
2G04
6G37
3N0W
F336
FM24
FM25
FE25
2G49
FG09
FG11
F800
2N1D
3N0E
3K20
7K00
2N11
3M94
5M01
IM18
3M32
3M33
2E24
5E04
6G06
3G10
2G10
3G11
6G07
U2
4G00
4G07
CXXX
3G12
2G11
6G08
I810
1N02
3N0H
2N0D
2N0W
2N0C
3N0C
3N0D
3M31
FM36
6F16
3F363F37
FF19
2F42
2F26
FF36
3F33
FF17
2F27
6F14
6F12
FF15
2F22
FF37
3F29
2F23
IG04
3G62
IG05
F801
3821
2825
3815
I812
I813
7809
2800
I821
I848
6801
4801
I819
F802
3820
2835
3839
7830
I849
2N1F
2K03
2N0B
2N0P
5N12
6N04
6N05
4302
4303
FE26
3819
F808
I822
7802
I846
I823
IE31
2833
2E11
3835
2832
FE19
3E24
I845
3813
FE27
IM21
5N08
IN0C
2N1K
2N1E
3N0Y
2N1H
IN19
2N1G
2N17
2N12
2N0Y
2N10
3K22
2N16
3N0G
7K02
IK41
2N0Q
IK46
3K21
5N06
5N07
7K01
IK47
3K18
6N02
2N0E
3N0L
6N03
5N10
2N0F
3N0M
5N11
IN18
IN05IN06IN07
IN09
IN08
IN15
A328
A329
F333
23492350
F332
F325
F324
F323
F322
F321
F320
2301
F319
3301
F327
F318
F317
F812
I851
I811
2834
I850
28362837
I847
2N0K2N0L
3N0V
2N13
3K15
2K01
2N18
7K03
IK45
2N14
2N15
2N0A
2N0Z
IN17
2N0V
3N0A
3N0B
2N0G
3N0N
5N13
2N0H
3N0P
IN0P
3M95
6M046M05
2M16
2M01
ID49
A310
A311
3M70
2F00
FF25
FF18
FF14
FE49
IE38
7E08
3E403E41
7E09
2K07
A323
A322
F334
F301
F338
F302
F305
I313
F306
3M72
3F04
7F01
IF04
IF12
FF23
FF21
FF20
FF16
2F25
3F00
IF00
F809
3833
I818
3818
4E19
7E07
2E22
5E05
3K00
2K02
5K00
2K05
2K06
F311
F335
4304
2352
4307
4313
4323
4312
4308
2367
4322
2361
3306
4320
3307
23642365
33AA 33AB
4321
2368
2351
23312332
5306
3350
3354
F303
3352
3353
F304
I314
33163317
23412342
F308
2320
2319
2318
I324
5304
A312
2362
2FA4
7FA6
FM17
3FB6
2FB1
FM13
2F04
3F05
7F03
3F44
4F00
2F45
6F21
FF34
4F05
4F06
6F18
2F31
6F17
2F30
6F15
FF30
2F28
6F13
2F24
3F31
3F32
FF00
2F01
3831
2F21
IF01
2F20
3F02
3F27
6F11
I840
3K16
FK02
3K05
2K04
3K10
3K08 3K09
3K01
3K02
3K19 3K07
IK18
2K00
3K03
3K06
3K04
3K28
2357
3364
7315
3355
7312
I303
33563357
A325
3312 4306
3305
4324
4325
I319
4317
33AC
A326
5311
1304
23232324
2312
2315
3351
2347
3388
3365
2348
2344
3FA2
7FA2
3FB4
3FB5
2FA8
2FA7
3FA8
3FA9
7FA4
FM11FM12
2F03
7F02
6F09
3F06
FF12
FF27
2F19
3F23
6F08
3F24
IF16
FF33
7F05
2F18
3F22
FF31
3F19
6F05 2F15
3F18
2F43
3F15
6F03
FF04
2F12
2F13
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3201
F204
2200
3D68
2202 2203
3200
F203
IP16
3P29
3P30
3P35
4P40
F202
7P08
2235
IP17
IP18
F228
2P89
3P31
F201
3P36
3P32
2P88
3P34
IP19 IP20
3L03
2L01
FL07
2L13
2L25
FL06
2L14
FL05
3L06
FL03
2L02
FL02
2L33 2L352L36
FL01
1391236443.3
2009-Dec-18
18541_550_090713.eps
090713

Temperature Sensor

Circuit Diagrams and PWB Layouts
EN 89Q548.1E LB 10.
C
D
A
B
E
F
1
2
3
4
5
6
7
8
9
10
11 12
13
A
B
A
B
C
123 4567
TEMP SENSOR
+3V3
1T02
1 2
3
4
56
F109
F111
2116
F110
10p
3123
100R
2123
100R
10p
3124
9113
SDA-TEMP1
2110
100n
+3V3
SDA-TEMP1SCL-TEMP1
SCL-TEMP1
6111
1K0
3153
I102
7104 LM75ADP
SML-310
I103
3
OS
I100
1
SDA
I101
2
SCL
+VS
GND
4u7
2102
2101
100n
RES
8
A0
A1
A2
4
RES
1K0
1K0
3105
I105
9111
I106
3106
9112
RES
1K0
1
1X00
EMC HOLE
3
2
4
5
3104
I104
7
6
5
9110
A
B
C
1T02 C2 1X00 B7 2101 B5 2102 B5 2110 C3 2116 C2 2123 C3
3104 B6 3105 B6 3106 C6 3123 C3 3124 C3 3153 B4
6111 B4 7104 B5 9110 C6 9111 C6 9112 B6 9113 C3 F109 C2 F110 C3 F111 C2 I100 C5 I101 C5 I102 B5 I103 B5 I104 B6 I105 C6 I106 C6
C
D
E
F
G
H
12
3
4
567
G
H
I
EMANTESNHC
CLASS_NO
SPB
J
1
2
4
7
2007-11-26
2008-02-08
2008-04-0823
NAME
Luc Buffel
1
TEMP SENSOR 2K8
CHECK DATE
SUPERS.
963
10
3104 313 6276
1
C
ROYAL PHILIPS ELECTRONICS N.V. 2007
130
1
121185
2007-11-26
1
2
2008-02-08
3
2008-04-08
13
18570_501_090525.eps
I
J
A3
090525
2009-Dec-18
Circuit Diagrams and PWB Layouts

Layout Temperature Sensor

2116
3123
2123
3124
9113
2110
2102
3105
9112
3106
6111
3153
3104
9110
2101
9111
EN 90Q548.1E LB 10.
1T02
31043136276.3
F109
F111
F110
I101
I100
I103
7104
I104
I106
I105
I102
18570_501_090422.eps
090326
2009-Dec-18
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