Philips 32HFL5561H/27 Schematic

Color Television Chassis

ME7

PB52.3HU

LA

ME7

18440_000_090205.eps

090226

Contents Page Contents Page

1. Revision List 2

2. Technical Specifications and Connections 2

3. Precautions, Notes, and Abbreviation List 5

4. Mechanical Instructions 9

5. Service Modes, Error Codes, and Fault Finding 15

6. Alignments 34

7. Circuit Descriptions 36

8. IC Data Sheets 39

9. Block Diagrams Wiring Diagram 26" (ME7 styling) 49 Wiring Diagram 32" (P&S styling) 50 Wiring Diagram 42" (P&S styling) 51 Block Diagram Video 52 Block Diagram Audio 53 Block Diagram Control & Clock Signals 54 I2C IC Overview 55

10. Circuit Diagrams and PWB Layouts Drawing PWB SSB: DC / DC SSB: Pro:iDIOM (B02A) 60 104-105 SSB: PNX 85xx: Power (B03) 61-68 104-105 SSB: TCON Pwr. & Backl. Contr. (B04A) 69 104-105 SSB: Audio Left / Right (B05) 70-71 104-105 SSB: SPDIF/Debug/RS232 Int. (B06) 72-74 104-105 SSB: Analog Externals (B07) 75-77 104-105 SSB: USB 2.0 (B08) 78-79 104-105 SSB: IR LED (B09) 80-85 104-105 SSB: Pacific 3: LVDS (B10) 86-88 104-105 SSB: Control STI7100 (B11) 89-96 104-105 SSB: i-Board (B12) 97-98 104-105 SSB: Supply (B13A) 99 104-105 SSB: SRP List Explanation 100 SSB: SRP List Part 1 101 SSB: SRP List Part 2 102 SSB: SRP List Part 3 103

©

Copyright 2009 Koninklijke Electronics Philips N.V. All rights reserved. No part of this publication may be reproduced, stored in a retrieval system or transmitted, in any form or by any means, electronic, mechanical, photocopying, or otherwise without the prior permission of Philips.

(B01) 57-59 104-105

Side Facing Side AV 26" (D) 106 107 Side Facing Side AV 37" - 42" (D) 108 109 Tuner Std: Chnl. Dec. (T01A) 110 112 Tuner Std: Main Tuner (T01B) 111 112

H_16770_000.eps

190207

Published by ER/CC 0970 BU TV Consumer Care Printed in the Netherlands Subject to modification EN 3122 785 18740

2009-Oct-09

EN 2 PB52.3HU LA1.

Revision List

1. Revision List

Manual xxxx xxx xxxx.0

• First release.

2. Technical Specifications and Connections

Index of this chapter:

2.1 Technical Specifications

2.2 Directions for Use

2.3 Connections

2.4 Chassis Overview

Notes:

• Figures can deviate due to the different set executions.

• Specifications are indicative (subject to change).

2.1 Technical Specifications

For on-line product support please use the links in Table 2-1. Here is product information available, as well as getting started, user manuals, frequently asked questions and software & drivers.

Table 2-1 Described Model numbers

CTN Styling Published in:

26HFL5561H/27

32HFL5561H/27

42HFL5581H/27

ME7 3122 785 18740

P&S 3122 785 18740

2.2 Directions for Use

You can download this information from the following websites:

http://www.philips.com/support http://www.p4c.philips.com

2009-Oct-09

2.3 Connections

Technical Specifications and Connections

6 8

EN 3PB52.3HU LA 2.

1 2 3 4 5 7 9

Note: The following connector color abbreviations are used

(acc. to DIN/IEC 757): Bk= Black, Bu= Blue, Gn= Green, Gy= Grey, Rd= Red, Wh= White, Ye= Yellow.

2.3.1 Rear Connections

Figure 2-1 Connection overview

6 - External Control Connector (RS232-UART) Out - In

11

12

13

14

1

6

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10

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5

9

090121

091002

1 - RJ12: SmartPort In/Out

1 -SPI Clock TTL out k 2 -SPI Data in TTL in j 3 - +5V Vcc j 4 - SPI Data out TTL out k 5 - GND Gnd H 6 - IR_data TTL out k

2 - Aerial - In

- - F-type (US) Coax, 75 ohm D

3 - AV1: Cinch: Video CVBS - In, Audio - In

Ye - Video CVBS 1 V Wh - Audio L 0.5 V Rd - Audio R 0.5 V

/ 75 ohm jq

PP

/ 10 kohm jq

RMS

/ 10 kohm jq

RMS

4 - CVI: Video YPbPr - In; Audio - In

Gn - Video Y 1 V Bu - Video Pb 0.7 V Rd - Video Pr 0.7 V Rd - Audio - R 0.5 V Wh - Audio - L 0.5 V

/ 75 ohm jq

PP

/ 75 ohm jq

PP

/ 75 ohm jq

PP

/ 10 kohm jq

RMS

/ 10 kohm jq

RMS

5 - Cinch: S/PDIF - Out

Bk - Coaxial 0.4 - 0.6 V

/ 75 ohm kq

PP

Figure 2-2 9-pin Sub-D Connector

1 - DCD Carrier Detect j 2 - RxD Receive j 3 - TxD Transmit k 4 - DTR Data Terminal Ready k 5 - Gnd Ground H 6 - DSR Data Set Ready j 7 - RTS Request To Send k 8 - CTS Clear To Send j 9 - RI Ring Indicator j

7 - VGA OUT: Video RGB - In, Out

1

5

6

11

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10

15

090127

Figure 2-3 VGA Connector

1 - Video Red 0.7 V 2 - Video Green 0.7 V 3 - Video Blue 0.7 V 4-n.c.

/ 75 ohm jk

PP

/ 75 ohm jk

PP

/ 75 ohm jk

PP

5 - Ground Gnd H 6 - Ground Red Gnd H 7 - Ground Green Gnd H 8 - Ground Blue Gnd H

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EN 4 PB52.3HU LA2.

Technical Specifications and Connections

9-+5VDC +5 V jk 10 - Ground Sync Gnd H 11 - n.c. 12 - DDC_SDA DDC data jk 13 - H-sync 0 - 5 V jk 14 - V-sync 0 - 5 V jk 15 - DDC_SCL DDC clock jk

8 - Mini Jack: Bathroom Speaker out

Bk - Audio - + 8 ohm j Bk - Audio - - 8 ohm j

9 - Service Connector (UART)

1 - UART_TX Transmit k 2 - Ground Gnd H 3 - UART_RX Receive j

10 - HDMI 1, 2 & 3: Digital Video, Digital Audio - In

19

18 2

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1

090428

Figure 2-4 HDMI (type A) connector

1. - D2+. Data channel. j

2. - Shield. Gnd. H

3. - D2-. Data channel. j

4. - D1+. Data channel. j

5. - Shield. Gnd. H

6. - D1-. Data channel. j

7. - D0+. Data channel. j

8. - Shield. Gnd. H

9. - D0-. Data channel. j

10. - CLK+. Data channel. j

11. - Shield. Gnd. H

12. - CLK-. Data channel. j

13. - Easylink/CEC. Control channel. jk

14. - n.c.. .

15. - DDC_SCL. DDC clock. j

16. - DDC_SDA. DDC data. jk

17. - Ground. Gnd. H

18. - +5V. . j

19. - HPD. Hot Plug Detect. j

20. - Ground. Gnd. H

2.3.2 Side Connections

11 - USB 2.0

1 2 3 4

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Figure 2-5 USB (type A)

1. - +5V. . k

2. - Data (-). jk

3. - Data (+). jk

4. - Ground. Gnd. H

12 - Mini Jack: Audio Head phone - Out

Bk. - Head phone. 32 - 600 ohm / 10 mW. ot

13 - Cinch: Video CVBS - In, Audio - In

Ye. - Video CVBS. 1 V Wh. - Audio L. 0.5 V Rd. - Audio R. 0.5 V

/ 75 ohm. jq

PP

/ 10 kohm. jq

RMS

/ 10 kohm. jq

RMS

14 - S-Video (Hosiden): Video Y/C - In

1. - Ground Y. Gnd. H

2. - Ground C. Gnd. H

3. - Video Y. 1 V

4. - Video C. 0.3 V

/ 75 ohm. j

PP

/ 75 ohm. j

PP

2.4 Chassis Overview

Refer to chapter Block Diagrams for PWB/CBA locations.

2009-Oct-09

Precautions, Notes, and Abbreviation List

3. Precautions, Notes, and Abbreviation List

EN 5PB52.3HU LA 3.

Index of this chapter:

3.1 Safety Instructions

3.2 Warnings

3.3 Notes

3.4 Abbreviation List

3.1 Safety Instructions

Safety regulations require the following during a repair:

• Connect the set to the Mains/AC Power via an isolation transformer (> 800 VA).

• Replace safety components, indicated by the symbol h, only by components identical to the original ones. Any other component substitution (other than original type) may increase risk of fire or electrical shock hazard. Of de set ontploft!

Safety regulations require that after a repair, the set must be returned in its original condition. Pay in particular attention to the following points:

• Route the wire trees correctly and fix them with the mounted cable clamps.

• Check the insulation of the Mains/AC Power lead for external damage.

• Check the strain relief of the Mains/AC Power cord for proper function.

• Check the electrical DC resistance between the Mains/AC Power plug and the secondary side (only for sets that have a Mains/AC Power isolated power supply):

1. Unplug the Mains/AC Power cord and connect a wire

between the two pins of the Mains/AC Power plug.

2. Set the Mains/AC Power switch to the “on” position

(keep the Mains/AC Power cord unplugged!).

3. Measure the resistance value between the pins of the

Mains/AC Power plug and the metal shielding of the tuner or the aerial connection on the set. The reading should be between 4.5 MΩ and 12 MΩ.

4. Switch “off” the set, and remove the wire between the

two pins of the Mains/AC Power plug.

• Check the cabinet for defects, to prevent touching of any inner parts by the customer.

picture carrier at 475.25 MHz for PAL, or 61.25 MHz for NTSC (channel 3).

• Where necessary, measure the waveforms and voltages

with (D) and without (E) aerial signal. Measure the voltages in the power supply section both in normal operation (G) and in stand-by (F). These values are indicated by means of the appropriate symbols.

3.3.2 Schematic Notes

• All resistor values are in ohms, and the value multiplier is often used to indicate the decimal point location (e.g. 2K2 indicates 2.2 kΩ).

• Resistor values with no multiplier may be indicated with either an “E” or an “R” (e.g. 220E or 220R indicates 220 Ω).

• All capacitor values are given in micro-farads (μ=× 10 nano-farads (n =× 10

• Capacitor values may also use the value multiplier as the decimal point indication (e.g. 2p2 indicates 2.2 pF).

• An “asterisk” (*) indicates component usage varies. Refer to the diversity tables for the correct values.

• The correct component values are listed on the Philips Spare Parts Web Portal.

3.3.3 Spare Parts

For the latest spare part overview, consult your Philips Spare Part web portal.

3.3.4 BGA (Ball Grid Array) ICs

Introduction

For more information on how to handle BGA devices, visit this URL: http://www.atyourservice-magazine.com “Magazine”, then go to “Repair downloads”. Here you will find Information on how to deal with BGA-ICs.

BGA Temperature Profiles

For BGA-ICs, you must use the correct temperature-profile. Where applicable and available, this profile is added to the IC Data Sheet information section in this manual.

-9

), or pico-farads (p =× 10

. Select

-12

-6

),

).

3.2 Warnings

• All ICs and many other semiconductors are susceptible to

electrostatic discharges (ESD w). Careless handling during repair can reduce life drastically. Make sure that, during repair, you are connected with the same potential as the mass of the set by a wristband with resistance. Keep components and tools also at this same potential.

• Be careful during measurements in the high voltage section.

• Never replace modules or other components while the unit is switched “on”.

• When you align the set, use plastic rather than metal tools. This will prevent any short circuits and the danger of a circuit becoming unstable.

3.3 Notes

3.3.1 General

• Measure the voltages and waveforms with regard to the chassis (= tuner) ground (H), or hot ground (I), depending on the tested area of circuitry. The voltages and waveforms shown in the diagrams are indicative. Measure them in the Service Default Mode with a colour bar signal and stereo sound (L: 3 kHz, R: 1 kHz unless stated otherwise) and

3.3.5 Lead-free Soldering

Due to lead-free technology some rules have to be respected by the workshop during a repair:

• Use only lead-free soldering tin. If lead-free solder paste is required, please contact the manufacturer of your soldering equipment. In general, use of solder paste within workshops should be avoided because paste is not easy to store and to handle.

• Use only adequate solder tools applicable for lead-free soldering tin. The solder tool must be able: – To reach a solder-tip temperature of at least 400°C. – To stabilize the adjusted temperature at the solder-tip. – To exchange solder-tips for different applications.

• Adjust your solder tool so that a temperature of around 360°C - 380°C is reached and stabilized at the solder joint. Heating time of the solder-joint should not exceed ~ 4 sec. Avoid temperatures above 400°C, otherwise wear-out of tips will increase drastically and flux-fluid will be destroyed. To avoid wear-out of tips, switch “off” unused equipment or reduce heat.

• Mix of lead-free soldering tin/parts with leaded soldering tin/parts is possible but PHILIPS recommends strongly to avoid mixed regimes. If this cannot be avoided, carefully clear the solder-joint from old tin and re-solder with new tin.

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EN 6 PB52.3HU LA3.

Precautions, Notes, and Abbreviation List

3.3.6 Alternative BOM identification

It should be noted that on the European Service website, “Alternative BOM” is referred to as “Design variant”.

The third digit in the serial number (example: AG2B0335000001) indicates the number of the alternative B.O.M. (Bill Of Materials) that has been used for producing the specific TV set. In general, it is possible that the same TV model on the market is produced with e.g. two different types of displays, coming from two different suppliers. This will then result in sets which have the same CTN (Commercial Type Number; e.g. 28PW9515/12) but which have a different B.O.M. number. By looking at the third digit of the serial number, one can identify which B.O.M. is used for the TV set he is working with. If the third digit of the serial number contains the number “1” (example: AG1B033500001), then the TV set has been manufactured according to B.O.M. number 1. If the third digit is a “2” (example: AG2B0335000001), then the set has been produced according to B.O.M. no. 2. This is important for ordering the correct spare parts! For the third digit, the numbers 1...9 and the characters A...Z can be used, so in total: 9 plus 26= 35 different B.O.M.s can be indicated by the third digit of the serial number.

Identification: The bottom line of a type plate gives a 14-digit serial number. Digits 1 and 2 refer to the production centre (e.g. AG is Bruges), digit 3 refers to the B.O.M. code, digit 4 refers to the Service version change code, digits 5 and 6 refer to the production year, and digits 7 and 8 refer to production week (in example below it is 2006 week 17). The 6 last digits contain the serial number.

MODEL :

PROD.NO:

32PF9968/10

AG 1A0617 000001

MADE IN BELGIUM

220-240V 50/60Hz

~

VHF+S+H+UHF

BJ3.0E LA

S

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Figure 3-1 Serial number (example)

3.3.7 Board Level Repair (BLR) or Component Level Repair (CLR)

If a board is defective, consult your repair procedure to decide if the board has to be exchanged or if it should be repaired on component level. If your repair procedure says the board should be exchanged completely, do not solder on the defective board. Otherwise, it cannot be returned to the O.E.M. supplier for back charging!

3.3.8 Practical Service Precautions

• It makes sense to avoid exposure to electrical shock.

While some sources are expected to have a possible dangerous impact, others of quite high potential are of limited current and are sometimes held in less regard.

• Always respect voltages. While some may not be

dangerous in themselves, they can cause unexpected reactions that are best avoided. Before reaching into a powered TV set, it is best to test the high voltage insulation. It is easy to do, and is a good service precaution.

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3.4 Abbreviation List

0/6/12 SCART switch control signal on A/V

board. 0 = loop through (AUX to TV), 6 = play 16 : 9 format, 12 = play 4 : 3 format

AARA Automatic Aspect Ratio Adaptation:

algorithm that adapts aspect ratio to remove horizontal black bars; keeps the original aspect ratio

ACI Automatic Channel Installation:

algorithm that installs TV channels directly from a cable network by

means of a predefined TXT page ADC Analogue to Digital Converter AFC Automatic Frequency Control: control

signal used to tune to the correct

frequency AGC Automatic Gain Control: algorithm that

controls the video input of the feature

box AM Amplitude Modulation AP Asia Pacific AR Aspect Ratio: 4 by 3 or 16 by 9 ASF Auto Screen Fit: algorithm that adapts

aspect ratio to remove horizontal black

bars without discarding video

information ATSC Advanced Television Systems

Committee, the digital TV standard in

the USA ATV See Auto TV Auto TV A hardware and software control

system that measures picture content,

and adapts image parameters in a

dynamic way AV External Audio Video AVC Audio Video Controller AVIP Audio Video Input Processor B/G Monochrome TV system. Sound

carrier distance is 5.5 MHz BDS Business Display Solutions (iTV) BLR Board-Level Repair BTSC Broadcast Television Standard

Committee. Multiplex FM stereo sound

system, originating from the USA and

used e.g. in LATAM and AP-NTSC

countries B-TXT Blue TeleteXT C Centre channel (audio) CEC Consumer Electronics Control bus:

remote control bus on HDMI

connections CL Constant Level: audio output to

connect with an external amplifier CLR Component Level Repair ComPair Computer aided rePair CP Connected Planet / Copy Protection CSM Customer Service Mode CTI Color Transient Improvement:

manipulates steepness of chroma

transients CVBS Composite Video Blanking and

Synchronization DAC Digital to Analogue Converter DBE Dynamic Bass Enhancement: extra

low frequency amplification DCM Data Communication Module. Also

referred to as System Card or

Smartcard (for iTV). DDC See “E-DDC” D/K Monochrome TV system. Sound

carrier distance is 6.5 MHz DFI Dynamic Frame Insertion

2009-Oct-09

Precautions, Notes, and Abbreviation List

EN 7PB52.3HU LA 3.

DFU Directions For Use: owner's manual DMR Digital Media Reader: card reader DMSD Digital Multi Standard Decoding DNM Digital Natural Motion DNR Digital Noise Reduction: noise

reduction feature of the set DRAM Dynamic RAM DRM Digital Rights Management DSP Digital Signal Processing DST Dealer Service Tool: special remote

control designed for service

technicians DTCP Digital Transmission Content

Protection; A protocol for protecting

digital audio/video content that is

traversing a high speed serial bus,

such as IEEE-1394 DVB-C Digital Video Broadcast - Cable DVB-T Digital Video Broadcast - Terrestrial DVD Digital Versatile Disc DVI(-d) Digital Visual Interface (d= digital only) E-DDC Enhanced Display Data Channel

(VESA standard for communication

channel and display). Using E-DDC,

the video source can read the EDID

information form the display. EDID Extended Display Identification Data

(VESA standard) EEPROM Electrically Erasable and

Programmable Read Only Memory EMI Electro Magnetic Interference EPG Electronic Program Guide EPLD Erasable Programmable Logic Device EU Europe EXT EXTernal (source), entering the set by

SCART or by cinches (jacks) FDS Full Dual Screen (same as FDW) FDW Full Dual Window (same as FDS) FLASH FLASH memory FM Field Memory or Frequency

Modulation FPGA Field-Programmable Gate Array FTV Flat TeleVision Gb/s Giga bits per second G-TXT Green TeleteXT H H_sync to the module HD High Definition HDD Hard Disk Drive HDCP High-bandwidth Digital Content

Protection: A “key” encoded into the

HDMI/DVI signal that prevents video

data piracy. If a source is HDCP coded

and connected via HDMI/DVI without

the proper HDCP decoding, the

picture is put into a “snow vision” mode

or changed to a low resolution. For

normal content distribution the source

and the display device must be

enabled for HDCP “software key”

decoding. HDMI High Definition Multimedia Interface HP HeadPhone I Monochrome TV system. Sound

2

I

C Inter IC bus

2

I

D Inter IC Data bus

2

I

S Inter IC Sound bus

carrier distance is 6.0 MHz

IF Intermediate Frequency IR Infra Red IRQ Interrupt Request ITU-656 The ITU Radio communication Sector

(ITU-R) is a standards body

subcommittee of the International

Telecommunication Union relating to

radio communication. ITU-656 (a.k.a.

SDI), is a digitized video format used for broadcast grade video. Uncompressed digital component or digital composite signals can be used. The SDI signal is self-synchronizing, uses 8 bit or 10 bit data words, and has a maximum data rate of 270 Mbit/s, with a minimum bandwidth of 135 MHz.

ITV Institutional TeleVision; TV sets for

hotels, hospitals etc.

LS Last Status; The settings last chosen

by the customer and read and stored in RAM or in the NVM. They are called at start-up of the set to configure it according to the customer's

preferences LATAM Latin America LCD Liquid Crystal Display LED Light Emitting Diode L/L' Monochrome TV system. Sound

carrier distance is 6.5 MHz. L' is Band

I, L is all bands except for Band I LPL LG.Philips LCD (supplier) LS Loudspeaker LVDS Low Voltage Differential Signalling Mbps Mega bits per second M/N Monochrome TV system. Sound

carrier distance is 4.5 MHz MHEG Part of a set of international standards

4. Mechanical Instructions

Mechanical Instructions

EN 9PB52.3HU LA 4.

Index of this chapter:

4.1 Cable Dressing

4.2 Service Positions

4.3 Assy/Panel Removal

4.4 Set Re-assembly

Notes:

4.1 Cable Dressing

• Disassembly instructions for the ME7 styling below are based on the 32” model (chassis PB52.1HU LA), but is comparable for all other models with the ME7 styling.

• Disassembly instructions for the PnS styling below are based on the 37” model (chassis PB52.2HU LA), but is comparable for all other models with the PnS styling.

• Figures below can deviate slightly from the actual situation, due to the different set executions.

Figure 4-1 Cable dressing 26HFL5561H/27 (ME7 styling)

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EN 10 PB52.3HU LA4.

Mechanical Instructions

Tape only the HV cable

Tape IR cable onto Speaker

Figure 4-2 Cable dressing 32HFL5561H/27 (PnS styling)

AC groundcable fixing

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Mechanical Instructions

Grounding cable terminal

EN 11PB52.3HU LA 4.

Figure 4-3 Cable dressing 42HFL5581H/27 (PnS styling)

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EN 12 PB52.3HU LA4.

Mechanical Instructions

4.2 Service Positions

For easy servicing of this set, there are a few possibilities created:

• The buffers from the packaging (see figure “Rear cover”).

• Foam bars (created for Service).

4.2.1 Foam Bars

Required for sets

1

42"

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Figure 4-4 Foam bars

The foam bars (order code 3122 785 90580 for two pieces) can be used for all types and sizes of Flat TVs. See figure “Foam bars” for details. Sets with a display of 42" and larger, require four foam bars [1]. Ensure that the foam bars are always supporting the cabinet and never only the display. Caution: Failure to follow these guidelines can seriously damage the display! By laying the TV face down on the (ESD protective) foam bars, a stable situation is created to perform measurements and alignments. By placing a mirror under the TV, you can monitor the screen.

4.3 Assy/Panel Removal

4.3.3 IR & LED Board

1. Unplug the connectors that lead to the SSB and the Key Board Control Panel.

2. Remove the screws.

3. Lift the board and take it out of the set.

When defective, replace the whole unit.

4.3.4 Key Board Control Panel

1

090121

1. Unplug the key board connector from the IR & LED Board.

2. Release the clamp on the topside using a screwdriver.

3. Lift the unit and take it out of the set.

When defective, replace the whole unit.

4.3.5 Main Supply Panel

1. Unplug the connectors.

2. Remove the fixation screws.

3. Take the board out.

When defective, replace the whole unit.

4.3.6 Small Signal Board (SSB) and Tuner Bolt-on

Refer to next figures for details. Caution: it is mandatory to remount all different screws at their original position during re-assembly. Failure to do so may result in damaging the SSB.

1. Unplug the LVDS connector [1]. Caution: be careful, as this is a very fragile connector! See

figure 4-5 SSB cover

2. Unplug the connectors [2].

3. Remove the screws [3] and remove the top shielding of the SSB.

4. Remove the screws [4] that hold the subframe of the SSB. The subframe can now be taken out of the set, together with the SSB and tuner bolt-on.

5. To remove the tuner bolt-on, release the connectors [5] and remove the cables.

6. Remove the screws [6] and lift the tuner bolt-on from the SSB.

7. Remove the locknuts [7] and screws [8] from the SSB connector plate and take the SSB from the subframe.

.

3

2

3

1

2

4.3.1 Rear Cover

Warning: Disconnect the mains power cord before you remove

the rear cover. Note: it is necessary to remove the stand before removing the rear cover.

1. Remove all screws from the back cover.

2. Lift the back cover from the TV. Make sure that wires and flat coils are not damaged while lifting the rear cover from the set.

4.3.2 Speakers

1. Remove the speaker connector on the SSB.

2. Remove the screws that hold the speaker and take the speaker out.

When defective, replace the whole unit.

2009-Oct-09

3

Figure 4-5 SSB cover

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Mechanical Instructions

EN 13PB52.3HU LA 4.

5

6

4

Figure 4-6 SSB

4.3.7 LCD Panel ME7 styling

Refer to Figure 4-8

for details. This particular photo is taken from another chassis with different boards but with a similar construction.

1. Unplug the LVDS connector [1].

Caution: be careful, as this is a very fragile connector!

4

18730_208_090916.eps

090916

3

7

8

Figure 4-7 SSB connector plate

2. Unplug the connectors [2].

3. Remove the fixation screws [3] and [4].

4. Lift the subframe from the set.

5. The LCD panel can now be lifted from the front cabinet.

3

4

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090916

2

4

1

4

2

3

I_17500_064.eps

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Figure 4-8 LCD Panel ME7 styling

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EN 14 PB52.3HU LA4.

Mechanical Instructions

4.3.8 LCD Panel PnS Styling

Refer to Figure 4-9 (slightly) different mechanical construction (some have the boards directly mounted on the LCD display, others use brackets), we only describe one model. Disassembly method of other LCD panels is similar to the one described below. This particular photo is taken from another chassis with different boards but with a similar construction.

for details. As every screen size has a

3

1. Remove the Main Supply Panel and Small Signal Board as earlier described and remove their subframes.

2. Unplug the connectors to and from the Speakers, IR & LED Board and Key Board Control Panel.

3. Remove the speaker boxes.

4. Remove the stand [1].

5. Release the subframe from the stand [2].

6. Remove the brackets [3] that secure the LCD Panel.

7. The LCD panel can now be lifted from the front cabinet.

3

4.4 Set Re-assembly

To re-assemble the whole set, execute all processes in reverse order.

Notes:

• While re-assembling, make sure that all cables are placed and connected in their original position. See Figure 4-1

Figure 4-3

• Pay special attention not to damage the EMC foams on the SSB shields. Ensure that EMC foams are mounted correctly.

.

2

1

Figure 4-9 LCD Panel PnS styling

to

3

2

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Service Modes, Error Codes, and Fault Finding

5. Service Modes, Error Codes, and Fault Finding

EN 15PB52.3HU LA 5.

Index of this chapter:

5.1 Test Points

5.2 Hotel mode

5.3 Service Modes

5.4 Stepwise Start-up

5.5 Service Tools

5.6 Error Codes

5.7 The Blinking LED Procedure

5.8 Protections

5.9 Fault Finding and Repair Tips

5.10 Software Upgrading

5.1 Test Points

As most signals are digital, it will be difficult to measure waveforms with a standard oscilloscope. However, several key ICs are capable of generating test patterns, which can be controlled via ComPair. In this way it is possible to determine which part is defective.

Perform measurements under the following conditions:

• Service Default Mode.

• Video: Color bar signal.

• Audio: 3 kHz left, 1 kHz right.

5.2 Hotel mode

Before the service modes can be activated, the set needs to be switched into normal consumer mode (MTV-Mode) first. Use an iTV setup remote control (type: RC2753/01, 12nc: 3139 228 88782) to key in the code ‘024995’ directly followed by the MENU (“M”) button. The text messages “TV Is Now In MTV Mode” and “Please Do A Cold Start!” appears on the screen. Disconnect the set for a few seconds from the mains supply, reconnect the set to the mains supply again. The set is now in the normal consumer mode (MTV-Mode). After repair, place the set into hotel mode (iTV-Mode) again. Key-in the same code on the remote control as described above, followed by the MENU (“M”) button. The text message “TV Is Now In ITV Mode” appears. A cold start must be performed as described above. The set is now in the hotel mode (iTV-Mode) again.

5.3 Service Modes

Service Default mode (SDM) and Service Alignment Mode (SAM) offers several features for the service technician, while the Customer Service Mode (CSM) is used for communication between the call centre and the customer.

This chassis also offers the option of using ComPair, a hardware interface between a computer and the TV chassis. It offers the abilities of structured troubleshooting, error code reading, and software version read-out for all chassis,see division 5.5.1 ComPair.

5.3.1 Service Default Mode (SDM)

Specifications

Table 5-1 SDM default settings

Default

Region Freq. (MHz)

Europe, AP(PAL/Multi) 475.25 PAL B/G

Europe, AP DVB-T 546.00 PID

NAFTA, APNTSC,LATAM

• Tuning frequency 61.25 MHz for NTSC: The TV shall tune to physical channel 3 only if channel 3 is an analog channel or if there is no channel 3 installed in the channel map. If there is a digital channel installed in channel 3, then the frequency to which the set will tune, would be as specified in the channel map and could be different from the one corresponding to the physical channel 3.

• All picture settings at 50% (brightness, color, contrast).

• All sound settings at 50%, except volume at 25%.

• All service-unfriendly modes (if present) are disabled, like: – (Sleep) timer. – Blue mute/Wall paper. – Auto switch “off” (when there is no “ident” signal). – Hotel or hospital mode. – Child lock or parental lock (manual or via V-chip). – Skipping, blanking of “Not favorite”, “Skipped” or

Locked” presets/channels.

– Automatic storing of Personal Preset or Last Status

settings.

– Automatic user menu time-out (menu switches back/

OFF automatically.

– Automatic volume levelling (AVL).

How to Activate SDM

For this chassis there is one kinds of SDM: an analogue SDM Tuning will happen according table “SDM Default Settings”.

• Analogue SDM: use the standard RC-transmitter and key in the code “062596”, directly followed by the “MENU” button. Note: It is possible that, together with the SDM, the main menu will appear. To switch it “off”, push the “MENU” button again.

• Analogue SDM can also be activated by shorting for a moment the two solder pads on the SSB, with the indication “SDM”. Activation can be performed in all modes, except when the set has a problem with the Standby Processor.

After activating this mode, “SDM” will appear in the upper right corner of the screen (if you have picture).

How to Navigate

When you press the “MENU” button on the RC transmitter, the set will toggle between the SDM and the normal user menu (with the SDM mode still active in the background).

Video: 0B 06 PID PCR: 0B 06 PID Audio: 0B 07

61.25 (ch 3) NTSC M

system

DVB-T

Purpose

• To create a pre-defined setting, to get the same measurement results as given in this manual.

• To override SW protections detected by stand-by processor and make the TV start up to the step just before protection (a sort of automatic stepwise start up). See paragraph “Stepwise Start Up”.

• To override SW protections detected by MIPS. See also paragraph “Error codes”.

• To start the blinking LED procedure (not valid for protections detected by standby software).

How to Exit SDM

Use one of the following methods:

• Completely remove the power by removing the power plug.

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5.3.2 Service Alignment Mode (SAM)

Purpose

• To perform (software) alignments.

• To change option settings.

• To easily identify the used software version.

• To view operation hours.

• To display (or clear) the error code buffer.

How to Activate SAM

Via a standard RC transmitter: key in the code “062596” directly followed by the “INFO” button. After activating SAM with this method a service warning will appear on the screen, you can continue by pressing the red button on the RC.

Contents of SAM:

• Hardware Info. – A. SW Version. Displays the software version of the

main software (example: P52U1_1.6.12.0 = AAAAB_X.Y.W.Z).

• AAAA= the chassis name.

• B= the region: A= AP, E= EU, L= LatAm, U = US. For AP sets it is possible that the Europe software version is used.

• X.Y.W.Z= the software version, where X is the main version number (different numbers are not compatible with one another) and Y.W.Z is the sub version number (a higher number is always compatible with a lower number).

– B. SBY PROC Version. Displays the software version

of the stand-by processor.

– C. Production Code. Displays the production code of

the TV, this is the serial number as printed on the back of the TV set. Note that if an NVM is replaced or is initialized after corruption, this production code has to be re-written to NVM. ComPair will foresee in a possibility to do this.

• Operation Hours. Displays the accumulated total of operation hours (not the stand-by hours). Every time the TV is switched “on/off”, 0.5 hours is added to this number.

• Errors (followed by maximal 10 errors). The most recent error is displayed at the upper left (for an error explanation see paragraph “Error Codes”).

• Reset Error Buffer. When you press “cursor right” (or the “OK button) and then the “OK” button, the error buffer is reset.

• Alignments. This will activate the “ALIGNMENTS” submenu.

• Dealer Options. Extra features for the dealers.

• Options. Extra features for Service. For more info regarding option codes, see chapter 8 “Alignments”. Note that if you change the option code numbers, you have to confirm your changes with the “OK” button before you store the options. Otherwise you will loose your changes.

• Initialize NVM. The moment the processor recognizes a corrupted NVM, the “initialize NVM” line will be highlighted. Now, you can do two things (dependent of the service instructions at that moment): – Save the content of the NVM via ComPair for

development analysis, before initializing. This will give the Service department an extra possibility for diagnosis (e.g. when Development asks for this).

– Initialize the NVM.

Note: When you have a corrupted NVM, or you have replaced the NVM, there is a high possibility that you will not have picture anymore because your display code is not correct. So, before you can initialize your NVM via the SAM, you need to have a picture and therefore you need the correct display option. Refer to chapter 8 for details. To adapt this option, you can use ComPair (the correct HEX values for the options can be found in chapter 8 “Alignments”) or a method via a standard RC (described below).

Changing the display option via a standard RC

: Key in the code “062598” directly followed by the “MENU” button and “XXX”, where XXX is the 3 digit decimal display code (see table “Option code overview” in chapter 8 “Alignments”, or sticker on the side/bottom of the cabinet). Make sure to key in all three digits, also the leading zero’s. If the above action is successful, the front LED will go out as an indication that the RC sequence was correct. After the display option is changed in the NVM, the TV will go to the Stand-by mode. If the NVM was corrupted or empty before this action, it will be initialized first (loaded with default values). This initializing can take up to 20 seconds.

Display Option

Code

39mm

040

PHILIPS

MODEL:

32PF9968/10

27mm

PROD.SERIAL NO:

AG 1A0620 000001

(CTN Sticker)

10000_038_090121.eps

090819

Figure 5-1 Location of Display Option Code sticker

• Store. All options and alignments are stored when

pressing “cursor right” (or the “OK” button) and then the “OK”-button.

• SW Maintenance.

– SW Events. Not useful for Service purposes. In case

of specific software problems, the development department can ask for this info.

– HW Events. Not useful for Service purposes. In case

of specific software problems, the development department can ask for this info.

• Test settings. For development purposes only.

• Upload to USB. To upload several settings from the TV to

a USB stick, which is connected to the Side I/O. The items are “Channel list”, “Personal settings”, “Option codes”, “Display-related alignments” and “History list”. First you have to create a directory “repair” in the root of the USB stick.To upload the settings you have to select each item separately, press “cursor right” (or the “OK button), confirm with “OK” and wait until “Done” appears. In case the download to the USB stick was not successful “Failure” will appear. In this case, check if the USB stick is connected properly and if the directory “repair” is present in the root of the USB stick. Now the settings are stored onto your USB stick and can be used to download onto another TV or other SSB. Uploading is of course only possible if the software is running and if you have a picture. This method is created to be able to save the customer’s TV settings and to store them into another SSB.

• Download from USB. To download several settings from

the USB stick to the TV. Same way of working as with uploading. To make sure that the download of the channel list from USB to the TV is executed properly, it is necessary to restart the TV and tune to a valid preset if necessary. Note: The “History list item” can not be downloaded from USB to the TV. This is a “read-only” item. In case of specific problems, the development department can ask for this info.

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How to Navigate

• In SAM, you can select the menu items with the “CURSOR UP/DOWN” key on the RC-transmitter. The selected item will be highlighted. When not all menu items fit on the screen, move the “CURSOR UP/DOWN” key to display the next/previous menu items.

• With the “CURSOR LEFT/RIGHT” keys, it is possible to: – (De) activate the selected menu item. – (De) activate the selected sub menu.

• With the “OK” key, it is possible to activate the selected action.

How to Exit SAM

Use one of the following methods:

• Press the “MENU” button on the RC-transmitter.

• Switch the set to STAND-BY via the RC-transmitter.

5.3.3 Customer Service Mode (CSM)

Purpose

When a customer is having problems with his TV-set, he can call his dealer or the Customer Helpdesk. The service technician can then ask the customer to activate the CSM, in order to identify the status of the set. Now, the service technician can judge the severity of the complaint. In many cases, he can advise the customer how to solve the problem, or he can decide if it is necessary to visit the customer. The CSM is a read only mode; therefore, modifications in this mode are not possible. When in this chassis CSM is activated, a color bar test pattern will be visible for 5 seconds. This test pattern is generated by the Pacific3. So if you see this test pattern you can determine that the back end video chain (Pacific3, LVDS, and display) of the SSB is working. In case of a set with DFI panel, an extra test picture is generated. So you will see the Pacific3 test picture for 3 seconds and then the DFI EPLD test picture for another 3 seconds. With this extra test picture you can determine if the DFI board is working properly. Also new in this chassis: when you activate CSM and there is a USB stick connected to the TV, the software will dump the complete CSM content to the USB stick. The file (Csm.txt) will be saved in the root of your USB stick. This info can be handy if you do not have picture. Another new item in this chassis is when CSM is activated, the complete error-buffer content will be shown via the blinking LED procedure.

How to Activate CSM

Key in the code “123654” via the standard RC transmitter.

Note: Activation of the CSM is only possible if there is no (user) menu on the screen!

How to Navigate

By means of the “CURSOR-DOWN/UP” knob on the RCtransmitter, you can navigate through the menus.

Contents of CSM

• Set Type. This information is very helpful for a helpdesk/ workshop as reference for further diagnosis. In this way, it is not necessary for the customer to look at the rear of the TV-set. Note that if an NVM is replaced or is initialized after corruption, this set type has to be re-written to NVM. ComPair will foresee in a possibility to do this.

• Production Code. Displays the production code (the serial number) of the TV. Note that if an NVM is replaced or is initialized after corruption, this production code has to be re-written to NVM. ComPair will foresee a in possibility to do this.

• Code 1. Gives the last five errors of the error buffer. As soon as the built-in diagnose software has detected an error, the buffer is adapted. The last occurred error is displayed on the leftmost position. Each error code is displayed as a 2-digit number. When less than 10 errors

occur, the rest of the buffer is empty (00). See also paragraph “Error Codes” for a description.

• Code 2. Gives the first five errors of the error buffer. See also paragraph “Error Codes” for a description.

• Options 1. Gives the option codes of option group 1 as set in SAM (Service Alignment Mode).

• Options 2. Gives the option codes of option group 2 as set in SAM (Service Alignment Mode).

• 12NC SSB. NVM. Note that if an NVM is replaced or is initialized after corruption, this identification number has to be re-written to NVM. ComPair will foresee in a possibility to do this. This identification number consists of 14 characters and is built up as follows:

- Seven last characters of the 12NC of the SSB itself.

- the serial number of the SSB, which consists of seven digits. Both can be found on a sticker on the PWB of the SSB itself. The format of the identification number is then as follows: <last seven characters of 12NC of SSB><serial number of SSB> (total fourteen characters).

• Installed date. Indicates the date of the first installation of the TV. This date is acquired via time extraction.

• Pixel Plus. Gives the last status of the Perfect Pixel HD setting, as set by the customer. Possible values are “ON” and “OFF”. See DFU on how to change this item.

• DNR. Gives the last status of the Noise reduction setting, as set by the customer. Possible values are “OFF”, “MINIMUM”, “MEDIUM” and “MAXIMUM”. See DFU on how to change this item.

• Noise Figure. Gives an indication of the signal quality for the selected transmitter. Possible values are “BAD”, “AVERAGE”, “GOOD” and “DIGITAL”. In case of a digital channel, this item will never indicate: “BAD”, “GOOD” or “AVERAGE” but only displays “DIGITAL”.

• 12NC Display. Shows the 12NC of the display.

• MPEG 4 (blue to toggle). Shows the status of the MPEG 4 module. On or Off. See DFU on how to change this item.

• Headphone Volume. Gives the last status of the headphone volume, as set by the customer. The value can vary from 0 (volume is minimum) to 100 (volume is maximum). See DFU on how to change this item.

• Surround Mode. Indicates the by the customer selected sound mode (or automatically chosen mode). Possible values are “STEREO” and “VIRTUAL DOLBY SURROUND”. It can also have been selected automatically by signalling bits (internal software). See DFU on how to change this item.

• AVL. Indicates the last status of AVL (Automatic Volume Level) as set by the customer: See DFU on how to change this item.

• Delta Volume. Indicates the last status of the delta volume for the selected preset as set by the customer: from “-12” to “+12”. See DFU on how to change this item.

• Volume. Indicates the last status of the volume for the selected preset as set by the customer: from “0” to “100”. See DFU on how to change this item.

• Balance. Indicates the last status of the balance for the selected preset as set by the customer: from “-10” to “+10”. See DFU on how to change this item.

• Preset Lock. Indicates if the selected preset has a child lock: “LOCKED” or “UNLOCKED”. See DFU on how to change this item.

• Lock after. Indicates at what time the channel lock is set: “OFF” or e.g. “18:45” (lock time). See DFU on how to change this item.

• TV ratings lock. Only applicable for US.

• Movie ratings lock. Only applicable for US.

• V-Chip TV status. Only applicable for US.

•

V-Chip movie status. Only applicable for US.

• Region rating status (RRT). Only applicable for US.

• Region rating enabled. On of Off.

• Table channel changed. Yes or No.

• On timer. Indicates if the “On timer” is set “ON” or “OFF” and when it is set to “ON”, also start time, start day and

Gives an identification of the SSB as stored in

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program number is displayed. See DFU on how to change this item.

• Location. Gives the last status of the location setting as set via the installation menu. Possible values are “SHOP” and “HOME”. If the location is set to “SHOP”, several settings are fixed. So for a customer location must be set to “HOME”. Can be changed via the installation menu (see also DFU).

• HDMI key validity. Indicates if the HDMI keys (or HDCP keys) are valid or not. In case these keys are not valid and the customer wants to make use of the HDMI functionality, the SSB has to be replaced.

• TV System. Gives information about the video system of the selected transmitter. – BG: PAL BG signal received – DK: PAL DK signal received – L/La: SECAM L/La signal received – I: PAL I signal received – M: NTSC M signal received – ATSC: ATSC signal received

• 12NC one zip SW. Displays the 12NC number of the onezip file as it is used for programming software in production. In this one-zip file all below software versions can be found.

• Initial main SW. Displays the main software version which was initially loaded by the factory.

• Current main SW. Displays the built-in main software version. In case of field problems related to software, software can be upgraded. As this software is consumer upgradeable, it will also be published on the Internet. Example: Q582E_1.2.3.4.

• Flash utils SW. Displays the software version of the software which contains all necessary components of the download application. To program this software, EJTAG tooling is needed. Example: Q582E_1.2.3.4.

• Standby SW. Displays the built-in stand-by processor software version. Upgrading this software will be possible via ComPair or via USB (see chapter Software upgrade). Example: STDBY_3.0.1.2.

• MOP SW. Only applicable for US. At the time of release of this manual, there was still a problem with this item, and some rubbish was displayed. Ignore this.

• Pacific 3 Flash SW. Displays the Pacific 3 software version.

• NVM version. Displays the NVM version as programmed by factory.

• Display parameters. For development purposes only.

• Private PQ parameters. For development purposes only.

• Public PQ parameters. For development purposes only.

• Ambilight parameters. For development purposes only.

• Acoustics parameters. For development purposes only.

• DFI software (if applicable). Displays the DFI EPLD software.

• DFI ambilight software (if applicable). Displays the DFI ambilight EPLD software.

• MPEG4 software. Displays the MPEG4 software version.

situation until it is reset (Mains/AC Power supply interrupted). Caution: in case the start up in this mode with a faulty FET 7U08 is done, you can destroy all ICs supplied by the +3V3, due to overvoltage. It is recommended to measure first the FET 7U08 on short-circuit before activating SDM via the service pads. When the TV is in protection state due to an error detected by main software (MIPS protection) and SDM is activated via short-cutting the service pads on the SSB, the TV starts up and ignores the error. In this chassis, only error “63” (power-ok) is a MIPS protection and already displays the failure via blinking LED.

The abbreviations “SP” and “MP” in the figures stand for:

• SP: protection or error detected by the Stand-by Processor.

• MP: protection or error detected by the MIPS Main Processor.

How to Exit CSM

Press “MENU” on the RC-transmitter.

5.4 Stepwise Start-up

There are two possible situations: one for protections detected by the stand-by software and one for protections detected by the main software. When the TV is in a protection state due to an error detected by stand-by software (and thus blinking an error) and SDM is activated via short-circuiting the pins on the SSB, the TV starts up until it reaches the situation just before protection. So, this is a kind of automatic stepwise start-up. In combination with the start-up diagrams below, you can see which supplies are present at a certain moment. Important to know is, that if e.g. the 3V3 detection fails (and thus error 8 is blinking) and the TV is restarted via SDM, the Stand-by Processor will enable the 3V3, but will not go to protection now. The TV will stay in this

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Off

Mains

off

Mains

on

EN 19PB52.3HU LA 5.

St by

(Off St by)

- POD Card removed

- tact SW pushed

On

For POD should be read Common Interface (CI)

- WakeUp requested

- Acquisition needed

- No data Acquisition required and no POD present

- tact SW pushed

- WakeUp requested

- Acquisition needed

No d ata

Acquisition

required and

POD pre sent

POD

St by

GoToProtection

Figure 5-2 Transition diagram

Semi St by

GoToProtection

WakeUp requeste

- St by requested

- tact SW pushed

WakeUp

requeste

d

Active

GoToProtection

Protection

H_17650_093.eps

180108

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Service Modes, Error Codes, and Fault Finding

Off/Stby to Semi

action holder: MIPS

action holder: St-by

autonomous action

The a vailability of the supplies is checked through detect signals going to the st-by µP. These signals are available

for +12V and +5V (combined as AND function, called

detect-5V-12V) and for +1V2 and +3V3 (combined as

AND function, called detect-1V2-2V5-3V). A low to high

transition of the signals should occur within a certain time

after toggling the standby line. If an observer is detected

before the time-out elapses, of course, the process

should continue in order to minimize start up time.

Off

Mains is ap plied

Standby Supply starts running.

All stand by supply volta ges become a vailable .

st-b y µP resets

All I/O lines have a High default state:

- Switch P NX85x x in re set (act ive LOW).

- NVM power line is high, no NVM communication possible.

Initialise I/O pins of the st-by µP, start keyboard scanning, RC

because of the stby µP r eset in an F HP set) which w ill start the

Switch ON Platform and display supply by switching LOW the

- Keep the Audio-reset high.

detection. Wake up reasons are off.

PDPGO line is high (either HW wise in a non FHP set or

FHP PDP.

POD-MODE and the ON-MODE I/O lines.

+5V, and +12V are switched on

Wait 50ms and the n start pollin g the dete ct-

5V-12V every 40ms.

Stand by or

Protection

If the protection state was left by short circuiting the

SDM pins, detection of a protection condition during

startup will stall the startup. Protection conditions in a

playing se t will be ignor ed. Th e protect ion mode will

not be entered.

- Switch Audio-Reset high.

It is low in the standby mode if the standby

mode lasted longer than 10s.

Display sup ply is switched on through the ON-mode I/O line

detect-5V-12V received within

2900 ms after POD-mode I/O

line toggle?

Yes

activat e +5V/+1 2V supply

detection algorithm. See CHS protections.

Enable the +1V2 supply (ENABLE-1V2 )

Wait 100m s

Enable the supply for

+1.8V and +3. 3V (ENABLE-3V3)

Start polling the detect-1V2-2V5-3V3

every 40ms

Detection

received within

250 ms after enable-3V3

toggle?

Yes

Activate supply detection algorithms for DC-

DC outputs

Wait 20ms

No

“5V 12V supply” error

SP

ms is recommended by the

100

spec

PNX

85xx

.

No separate enable is present for the +1V8 supply in the TV522.

Only one detect line is present in the TV522: it detects +1V2 and +3V3

No

1V2 2V5 3V3 DCDC error

SP

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SUPPLY-F AULT I/O line

is High ?

No

Figure 5-3 “Off” to “Semi Stand-by” flowchart (part 1)

Supply fault error

The supply fault line is an OR function of DCDC, DCDC5050 and POD /CI supply sw itch.

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SUPPLY-F AULT I/O line

is High ?

No

Switch LOW the RESET-NVM_WP-NANDFLASH line. Add a 2ms delay before

trying to address the NVM to allow correct NVM initialization.

No

Relea se AVC system r eset

Feed warm boot script

Enable the supply fault detection

(pulling pin of the probe interface to

ground by inserting EJTAG probe)

Yes

algorithm

Set I²C slave address

of Standby µP to (A0h)

Detect EJTAG debug probe

EJTAG probe

connected ?

No

Cold boot?

Yes

Relea se AVC system r eset

Feed cold boot script

No

Supply fault error

SP

This will a llow access to NVM and NAND FLASH and can not be done earlier because the FLASH needs to be in Write Protect as long as the supplies are not available.

An EJTAG probe (e.g. WindPower ICE probe) can be connected for Linux Kernel debugging purposes.

Yes

Relea se AVC system r eset Feed initializing boot script

disable alive mechanism

The supply fault line is an OR function of DCDC, DCDC5050 and POD /CI supply sw itch.

No

Code = 5

Switch AVC PNX8 5xx

in re set (act ive low)

Wait 10ms

Switch the NVM r eset

line HI GH.

Disable all supply related protections and

switch off the +2V5, +3V3 DC/DC converter.

Wait 5ms

Boot process of the PNX5050 also starts at this point.

Bootscript ready

in 1250 ms?

Set I²C slave address

of Standby µP to (60h)

RPC start (comm. protocol)

No

Code = 53

Flash to Ram image transfer succeeded

No

SW initializat ion

Enable Alive check mechanism

MIPS reads the wake up reason

from standby µP.

In case of an LCD set, check t he

Power- OK display line

Yes

within 30s?

Yes

succeeded within 20s?

Yes

Wait until AVC starts to

commun icate

3-th try?

switch off the remaining DC/DC

converters

Switch POD-MODE and ON-MODE

I/O line high.

Power-ok display high ?

Yes

Reset t he Pacific by pulling LOW the Pacific

hardware reset line during 100ms.

No

Figure 5-4 “Off” to “Semi Stand-by” flowchart (part 2)

Log power-ok error and enter

protection

No

MP

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switch off the remaining DC/DC

3-th try?

Yes

Blink Code as

error code

Switch POD -MODE and ON- MODE

SP

- Channeldecoder type TDA10060 cannot be reloaded without reset of the channeldecoder.

- Channeldecoder type TDA10048 can be reloaded without reset.

conver ters

I/O line high.

Channel decoder

TDA 10048?

Power-ok display high ? No

Yes

Reset the Pacific by pulling LOW the Pacific

hardware reset line during 100ms.

Relea se Pacific rese t

and wait 200ms

Ping the Pacific through I²C

Pacific acknowledges?

Yes

Init Pa cific accordin g use case :

- lvds or CMOS input and output

- panel config… to be discussed with Stefan / SW if we will put this here or in the display excel overview of Stefan or in …..

Enable the Pacific output by sending the PanelConfig.PanelOn

YesNo

to the Pacific in case of a DFI set

Start 4 seconds preheating timer in case of

an LPL scanning backlight LCD set.

Initialize audio accord ing FMS infor mation :

Download firmware into the channel

decoder

Log power-ok err or and enter

protection

No

MP

Third Pacific boot retry?No

Yes

Log Pacific error

This is needed here because the Pacific has to deliver an output clock towards the DFI. Otherwise the DFI cannot deliver ambilight functionality in the lampadaire mode. The presence of the DFI can be determined via the display option.

No

Third try? No

Yes

Log channel decoder error

Downloaded

successfu lly?

Yes

initialize tuner , Master IF and channel

decoder

Initialize source selectio n

Wait until Cpipe delivers a stable output

Initialize video processin g IC 's :

- PNX5050 in /82

- scale r EPLD

initialize Au toTV by tr iggering C HS AutoTV I nit interfa ce

Initialize Pacific or EPLD related Ambilight

clock

Reset EPLD

Wait 100ms

Reset Pacific clock

settings (if applicable)

EPLD and Pacific should be reset when a stable input clock become s available at their input.

2009-Oct-09

Initialize Ambilight with Lights off.

Do not enter semi-standby state in case of an LPL scanning backlight LCD set before 4s preheating timer has elapsed.

Semi-Standby

Figure 5-5 “Off” to “Semi Stand-by” flowchart (part 3)

H_17650_094c.eps

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Service Modes, Error Codes, and Fault Finding

Semi Standby

Wait until previous on-state is left mor e than 2

seconds ago. (to prevent LCD display problems)

Assert RGB video blanking

and audio mute

EN 23PB52.3HU LA 5.

action holder: AVC

action holder: St-by

autonomous action

Rewrite Pacific register 0x03 (output format) :

this command is sometimes not processed properly by the

Pacific at initialisation time , r esending it here solves the issue.

Switch on the display by sending the

PanelConfig.PanelOn (I²C) command to the Pacific

wait 250ms (min. = 200ms)

Switch off the dimming backlight feature and

make sure PWM output is set to 100%

Switch on LCD backlight

The higher level requirement is that

audio and video should be demuted

without transient effects and that the

audio should be demuted maximum 1s

before or at the same time as the

unblanking of the video.

Initialize audio and video

processing IC's and functions

according needed use case.

Wait until valid and stable audio and video , corresponding to

the requested output is delivered by the AVC AND the

backlight PWM has been on for 1second.

Switch Audio-Reset low and wait 5ms

Release audio mute and wait 100ms before any other audio

handling is done (e.g. volume change)

Restore dimming backlight feature, PWM output and unblank

the video.

Active

Figure 5-6 “Semi Stand-by” to “Active” flowchart

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Service Modes, Error Codes, and Fault Finding

Active

Mute all sound outputs via softmute

Wait 100ms

Set main amplifier mute (I/O: audio-mute)

Force ext audio outputs to ground

(I/O: audio reset)

And wait 5ms

switch off LCD backlight

action holder: AVC

action holder: St-by

autonomous action

Mute all video outputs

Wait 250ms (min. = 200ms)

Switch off the display by sending the

PanelConfig.PanelOff (I²C) command to the Pacific

switch off ambient light

Semi Standby

Figure 5-7 “Active” to “Semi Stand-by” flowchart

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Service Modes, Error Codes, and Fault Finding

EN 25PB52.3HU LA 5.

Semi Stand by

If ambientlight functionality was used in semi -standby

(lampadaire mode), switch off ambient light

Delay transition until ramping down of ambient light is

finished . *)

transfer Wake up reasons to the Stand by µP.

Switch Memories to self- r efresh (this creates a more

stable condition when switching off the power).

Switch AVC system in reset state

action holder: MIPS

action holder: St-by

autonomous action

*) If this is not performed and the set is switched to standby when the sw itch off of the ambilights is still ongoing , the lights will switch off abruptly when the supply is cut.

Import ant remark:

release reset audio 10 sec after

entering standby to save power

Wait 10ms

Switch the NVM reset line HIGH.

Disable all supply related protections and switch off

the +1V8 and the +3V3 DC/DC converter

Wait 5ms

switch off the +1V2 DC/DC converters

Switch OFF all supplies by switching HIGH the POD -

MODE and the ON-MODE I/O lines.

Stand by

For PDP this means CPUGO becomes low.

H_16770_114.eps

260307

Figure 5-8 “Semi Stand-by” to “Stand-by” flowchart

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Service Modes, Error Codes, and Fault Finding

action holder: MIPS

action holder: St-by

autonomous action

MP

Log the appropriate error and

set stand-by flag in NVM

Redefine wake up reasons for protection

state and transfer to stand-by µP.

Switch off LCD lamp supply

Wait 250ms (min. = 200ms)

Switch off LVDS signal

Switch off 12V LCD supply within a time frame of

min. 0.5ms to max. 50ms after LVDS switch off.

SP

Ask stand-by µP to enter protection state

Switch AVC in r ese t state

Wait 10ms

Switch the NVM reset line HIGH.

Disable all supply related protections and switch off

the +1V8 and the +3V3 DC/DC converter.

Wait 5ms

switch off the +1V2 DC/DC converter

Switch OFF a ll supplies by swit ching HI GH the POD -

MODE and the ON-MODE I/O lines .

2009-Oct-09

Flash the Protection-LED in order to indicate

protection state*.

Protection

Figure 5-9 “Protection” flowchart

(*): This can be the standby LED or the ON LED depending on the availability in the set under discussion .

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5.5 Service Tools

5.5.1 ComPair

Introduction

ComPair (Computer Aided Repair) is a Service tool for Philips Consumer Lifestyle products. and offers the following:

1. ComPair helps you to quickly get an understanding on how to repair the chassis in a short and effective way.

2. ComPair allows very detailed diagnostics and is therefore capable of accurately indicating problem areas. You do not have to know anything about I yourself, because ComPair takes care of this.

3. ComPair speeds up the repair time since it can automatically communicate with the chassis (when the uP is working) and all repair information is directly available.

4. ComPair features TV software up possibilities.

Specifications

ComPair consists of a Windows based fault finding program and an interface box between PC and the (defective) product. The (new) ComPair II interface box is connected to the PC via an USB cable. For the TV chassis, the ComPair interface box and the TV communicate via a bi-directional cable via the service connector(s).

How to Connect

This is described in the ComPair chassis fault finding database.

TO

UART SERVICE

CONNECTOR

ComPair II

RC in

Optional

Switch

Power ModeLink/

Activity

RC out

2

C or UART commands

TO TV

TO I2C SERVICE CONNECTOR

Multi

function

UART SERVICE

CONNECTOR

2

C

I

TO

RS232 /UART

Note: If you encounter any problems, contact your local support desk.

5.6 Error Codes

5.6.1 Introduction

The error code buffer contains all detected errors since the last time the buffer was erased. The buffer is written from left to right, new errors are logged at the left side, and all other errors shift one position to the right. When an error occurs, it is added to the list of errors, provided the list is not full. When an error occurs and the error buffer is full, then the new error is not added, and the error buffer stays intact (history is maintained). To prevent that an occasional error stays in the list forever, the error is removed from the list after more than 50 hrs. of operation. When multiple errors occur (errors occurred within a short time span), there is a high probability that there is some relation between them.

Basically there are three kinds of errors:

• Errors detected by the Stand-by software. These errors will always lead to protection and an automatic start of the blinking LED for the concerned error (see paragraph “The Blinking LED Procedure”). In these cases SDM can be used to start up (see chapter “Stepwise Start-up”). Note that it can take up to 90 seconds before the TV goes to protection and starts blinking the error (e.g. error 53)

• Errors detected by main software that lead to protection. In this case the TV will go to protection and the front LED should also blink the concerned error. See also paragraph “Error Codes” -> “Error Buffer” -> “Extra Info”. For this chassis only error 63 is a protection error detected by main software.

• Errors detected by main software that do not lead to protection. In this case the error will be logged into the error buffer and can be read out via ComPair, via blinking LED method, or in case you have picture, via SAM.

PC

ComPair II Developed by Philips Brugge

Optional power

HDMI

2

I

C only

5V DC

10000_036_090121.eps

090819

Figure 5-10 ComPair II interface connection

Caution: It is compulsory to connect the TV to the PC as

shown in the picture above (with the ComPair interface in between), as the ComPair interface acts as a level shifter. If one connects the TV directly to the PC (via UART), ICs will be blown!

How to Order

ComPair II order codes:

• ComPair II interface: 312278591020.

• Software is available via the Philips Service web portal.

• ComPair RS232 cable: 310431112742 (to be used with chassis Q52x).

5.6.2 How to Read the Error Buffer

Use one of the following methods:

• On screen via the SAM (only if you have a picture). E.g.: – 00 00 00 00 00: No errors detected – 06 00 00 00 00: Error code 6 is the last and only

detected error

– 09 06 00 00 00: Error code 6 was first detected and

error code 9 is the last detected error

• Via the blinking LED procedure (when you have no picture). See next paragraph.

•Via ComPair.

• Via CSM. when CSM is activated the blinking LED procedure will start and the CSM content will be written to a USB stick (if present).

5.6.3 How to Clear the Error Buffer

Use one of the following methods:

• By activation of the “RESET ERROR BUFFER” command in the SAM menu.

• With a normal RC, key in sequence “MUTE” followed by “062599” and “OK”.

• If the content of the error buffer has not changed for 50+ hours, it resets automatically.

5.6.4 Error Buffer

In case of non-intermittent faults, clear the error buffer before you begin the repair (before clearing the buffer, write down the content, as this history can give you significant information). This to ensure that old error codes are no longer present.

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If possible, check the entire contents of the error buffer. In some situations, an error code is only the result of another error code and not the actual cause (e.g., a fault in the protection detection circuitry can also lead to a protection). There are several mechanisms of error detection:

• Via error bits in the status registers of ICs.

• Via polling on I/O pins going to the stand-by processor.

• Via sensing of analogue values on the stand-by processor or the PNX85xx.

• Via a “not acknowledge” of an I

2

C communication.

Take notice that some errors need more than 90 seconds before they start blinking or before they will be logged. So in case of problems wait 2 minutes from start-up onwards, and then check if the front LED is blinking or if an error is logged.

Table 5-2 Error code overview

Error/

Error Description

3I2C3 E MIPS PNX85xx Error logged.

5 PNX85xx does

not boot (HW cause)

6 5V, 12V supply P Stby P / Protection + Error

8 1V2, 1V4, 2V5,

3V3 supply

9 Supply fault P Stby P / Protection + Error

2

C-MUX1 E MIPS PCA9540 Error logged.

11 I

12 I2C-MUX2 E MIPS PCA9540 Error logged.

22 PNX5050 E MIPS PNX5050 Error logged.

23 HDMI mux E MIPS AD8190/

24 I2C switch E MIPS PCA9540 Error logged.

26 Master IF E MIPS TDA9898/

28 MOP (Ambilight

MOP on DFI

1)

panel)

34 Tuner E MIPS TD1716 Error logged.

37 Channel decoder E MIPS TDA10060/

38 MPEG4 E MIPS STi71xx Error logged.

46 Pacific3 E MIPS T6TF4 Error blinking + Error

53 PNX85xx does

not boot (SW cause)

63 Power OK E/P M IPS / Error logged in case of

65 DFI (EPLD on

75 iBoard n.a. n.a. n.a. n.a.

76 Pro:Idiom n.a. n.a. n.a. n.a.

77 DMSD n.a. n.a. n.a. n.a.

DFI panel)

1)

Detected

Prot

by Device Result

E Stby P PNX85xx Error blinking.

blinking.

P Stby P / Protection + Error

AD8191

9897/9890

E MIPS EP2CXXF4

E Stby P PNX85xx Error blinking.

E MIPS / Error blinking + Error

84C7N

TDA10048

blinking.

Error logged.

logged.

a PDP set. Protection in case of an LCD set.

logged.

Note

1) Where applicable.

Extra Info

• Rebooting. When a TV is constantly rebooting due to internal problems, most of the time no errors will be logged or blinked. This rebooting can be recognized via a ComPair interface and Hyperterminal (for Hyperterminal settings, see paragraph “Stand-by software upgrade). You will see that the loggings which are generated by the main software keep continuing. In this case (rebooting) diagnose has to be done via ComPair.

• Error 3 (I

2

C bus 3 blocked). At the time of release of this manual, this error was not working as expected (error 3 is logged and can be read out). Current situation: when this error occurs, the TV will constantly reboot due to the blocked bus. The best way for further diagnosis here, is to use ComPair (e.g. read out the NVM content). Instead of

error “3” it is possible you will see error “2” in the error buffer.

• Error 5 (PNX85xx doesn’t boot). Indicates that the main processor was not able to read his bootscript. This error will point to a hardware problem around the PNX85xx (supplies not OK, PNX 8535 completely dead, I and Stand-by Processor broken, etc...). When error 5 occurs it is also possible that I

2

I

C2 can be indicated in the schematics as follows: SCL-

2

C link between PNX

2

C2 bus is blocked (NVM).

UP-MIPS, SDA-UP-MIPS, SCL-SLAVE, SDA-SLAVE, SCL-2 or SDA-2.

• Error 11 (I

2

I

C-MUX1 bus. At the time of release of this manual, this

2

C MUX1). Indicates a blocked (short circuited)

error was not working as expected. Current situation: when this error occurs the TV will constantly reboot due to the blocked bus. The best way for further diagnosis, is to use ComPair (e.g. read out the NVM content).

• Error 12 (I

2

I

C-MUX2 bus. At the time of release of this manual, this

2

C MUX2). Indicates a blocked (short circuited)

error was not working as expected. Current situation: when this error occurs the TV will constantly reboot due to the blocked bus. The best way for further diagnosis, is to use ComPair (e.g. read out the NVM content).

• Error 24 (I

2

C switch). As a side effect of error 24 it is

possible that error 47(no existing error) will also be logged.

• Error 28 (DFI Ambilight MOP). It can take up to 2 minutes or more before this error is logged. So if you suspect that this MOP is defective: clear the error buffer, restart the TV and wait for about 2 minutes before checking the error buffer.

• Error 37 (Channel decoder). When this error occurs, there probably will be no picture and sound from tuner input. As a side effect of error 37 it is possible that error 4 (no existing error) is also logged.

• Error 46 (Pacific 3). When there is an actual problem with or around the Pacific during start-up, you will have no picture and error 46 will be blinked via the blinking LED procedure. For further diagnosis you can always dump the CSM content on USB stick (see CSM) or use ComPair.

• Error 53. This error will indicate that the PNX85xx has read his bootscript (if this would have failed, error 5 would blink) but initialization was never completed because of hardware problems (NAND flash, ...) or software initialization problems. Possible cause could be that there is no valid software loaded (try to upgrade to the latest main software version). Note that it can take up to 2 minutes before the TV starts blinking error 53.

• Error 63 (POWER OK). When this error occurs, it means that the POWER-OK line did not became “high”. This error is only applicable for TV’s with an LCD display. For PDP displays there will be no protection during a POWER-OK line failure, but error 63 will be logged in the error buffer. Caution: in case a PDP TV ends up into power-ok protection, it can indicate that the display option code is set to “LCD”. To change the display option code to “PDP” you need to activate SDM via the service pads (see figure “Service mode pads”). Then change the display option code blindly via a standard RC: key in the code “062598” directly followed by the “MENU” button and “XXX” (where XXX is the 3 digit decimal display option code as mentioned in figure “Display option code overview”).

• Error 65 (DFI EPLD error). When this error occurs it means that there is a problem with the I

2

C communication towards the EPLD (picture processing EPLD, not the Ambilight EPLD) on the DFI panel.

• Error 75 - 77. These errors are introduced specifically for the iTV part of these sets.

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Service Modes, Error Codes, and Fault Finding

EN 29PB52.3HU LA 5.

5.7 The Blinking LED Procedure

5.7.1 Introduction

The blinking LED procedure can be split up into two situations:

• In case of a protection. In this case the error is automatically blinked. This will be only one error, namely the one that is causing the protection. Therefore, you do not have to do anything special, just read out the blinks. A long blink indicates the decimal digit, a short blink indicates the units.

• In the “on” state. Via this procedure, you can make the contents of the error buffer visible via the front LED. This is especially useful for fault finding, when there is no picture.

When the blinking LED procedure is activated in the “on” state, the front LED will show (blink) the contents of the error-buffer. Error-codes > 10 are shown as follows:

1. “n” long blinks (where “n” = 1 - 9) indicating decimal digit,

2. A pause of 1.5 s,

3. “n” short blinks (where “n”= 1 - 9),

4. A pause of approximately 3 s,

5. When all the error-codes are displayed, the sequence finishes with a LED blink of 3 s,

6. The sequence starts again.

Example: Error 12 8 6 0 0. After activation of the SDM, the front LED will show:

1. 1 long blink of 750 ms (which is an indication of the decimal digit) followed by a pause of 1.5 s,

2. 2 short blinks of 250 ms followed by a pause of 3 s,

3. 8 short blinks followed by a pause of 3 s,

4. 6 short blinks followed by a pause of 3 s,

5. 1 long blink of 3 s to finish the sequence,

6. The sequence starts again.

Remark on the Supply Errors

The detection of a supply dip or supply loss during the normal playing of the set does not lead to a protection, but to a cold reboot of the set. If the supply is still missing after the reboot, the TV will go to protection.

Protections during Start-up

During TV start-up, some voltages and IC observers are actively monitored to be able to optimize the start-up speed, and to assure good operation of all components. If these monitors do not respond in a defined way, this indicates a malfunction of the system and leads to a protection. As the observers are only used during start-up, they are described in the start-up flow in detail (see paragraph “Stepwise Start-up”).

5.8.2 Hardware Protections

The only real hardware protection in this chassis is (in case of an audio problem) the audio protection circuit that will switch “off” immediately the supply of the SSB. The supply will buzz during the protection and +12VS drops to approximately 5V5 and +5V Stand-by to approximately to 1V9. Other indication of the audio protection is that the red LED lights up with an intensity of 50%.

Repair Tips

• It is also possible that you have an audio DC protection because of an interruption in one or both speakers (the DC voltage that is still on the circuit cannot disappear through the speakers). Caution: (dis)connecting the speaker wires during the ON state of the TV at high volume can damage the audio amplifier.

5.9 Fault Finding and Repair Tips

5.7.2 How to Activate

Use one of the following methods:

• Activate the SDM or CSM. The blinking front LED will show the entire contents of the error buffer (this works in “normal operation” mode).

• Transmit the commands “MUTE” - “062500” - “OK” with a normal RC. The complete error buffer is shown. Take notice that it takes some seconds before the blinking LED starts.

• Transmit the commands “MUTE” - “06250x” - “OK” with a normal RC (where “x” is a number between 1 and

5). When x= 1 the last detected error is shown, x= 2 the

second last error, etc.... Take notice that it takes some

seconds before the blinking LED starts.

5.8 Protections

5.8.1 Software Protections

Most of the protections and errors use either the stand-by microprocessor or the MIPS controller as detection device. Since in these cases, checking of observers, polling of ADCs, and filtering of input values are all heavily software based, these protections are referred to as software protections. There are several types of software related protections, solving a variety of fault conditions:

• Protections related to supplies: check of the 12V, +5V, +1V2, +1V4, 2V5 and +3V3.

• Protections related to breakdown of the safety check mechanism. E.g. since the protection detections are done by means of software, failing of the software will have to initiate a protection mode since safety cannot be guaranteed any more.

Read also paragraph “Error Codes” -> “Error Buffer” -> “Extra Info”.

5.9.1 Ambilight

Due to a degeneration process of the AmbiLight, it is recommended to change all ambilight units in case one unit needs to be repaired.

5.9.2 CSM

When you activate CSM and there is a USB stick connected to the TV, the software will dump the complete CSM content to the USB stick. The file (Csm.txt) will be saved in the root of your USB stick. If this mechanism works you can conclude that a large part of the operating system is already working (MIPS, USB...)

5.9.3 DC/DC Converter

Introduction

• The best way to find a failure in the DC-DC converters is to check their starting-up sequence at “power-on via the mains cord”, presuming that the standby microprocessor is operational.

• If the input voltage of DC-DC converters is around 12.7V (measured on decoupling capacitors (2U01 and 2U02) and the enable signals are “low” (active), then the output voltages should have their normal values. +12V and +5VPOD supplies start-up first (enabled by POD-MODE signal from the standby microprocessor). There is a supplementary condition for +12V to start-up: if +5V-POD does not start up due to a local defect, then +12V will not be available as well. +5V-ON supply is enabled by the ONMODE signal (coming also from the standby microprocessor) and is coming up a little bit later (20 ms) due to the slower rise time needed to charge the USB

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decoupling capacitor 2N31. +1V2 supply starts-up when +12V appears, then at least 100 ms later, +1V8, +2V5 and +3V3 will be activated via the ENABLE-3V3 signal from the standby microprocessor. If +12V value is less than 10 V then the last enumerated voltages will not show-up due to the under-voltage detection circuit 6U10 + 7U10 and surrounding components. Furthermore, if +12V is less than 8V then also +1V2 will not be available. The third DC-DC convertor that delivers +1V4 out of +12V is started up when the ENABLE-1V2 becomes active (low) and +12V is present. The +Vtun generator (present only for the analogue version of China platforms) will generate +33V for the analogue tuner as soon as the 12V/3.3V DC-DC converter will start to operate.

• The consumption of controller IC 7U00 is around 19 mA (that means almost 200 mV drop voltage across resistor 3U01) and the consumption of controller IC 7U64 is around 12 mA.

• The current capability of DC-DC converters is quite high (short-circuit current is 7 to 10 A), therefore if there is a linear integrated stabiliser that, for example, delivers 1.8V from +3V3 with its output overloaded, the +3V3 stays usually at its normal value even though the consumption from +3V3 increases significantly.

• The +1V8 and +2V5 supply voltages are obtained via linear stabilizer made with discrete components that can deliver a lot of current, therefore in case +1V8 or +2V5 are shortcircuited to GND then +3V3 will not have the normal value but much less.

• The SUPPLY-FAULT signal (active low) is an internal protection (error 9) of the DC-DC convertor and will occur if the output voltage of any DC-DC convertor is out of limits (10% of the normal value).

Fault Finding

• Symptom: +1V2 not present (even for a short while ~10 ms)

1. Check 12 V availability (resistor 3U01, MOS-FETs

7U03 and 7U08), and +5V-POD.

2. Check the voltage on pin 9 (1.5 V),

3. Check for +1V2 output voltage short-circuit to GND that

can generate pulsed over-currents 7...10 A through coil 5U02.

4. Check the over-current detection circuit (2U20 or 3U40

interrupted).

• Symptom: +1V4 not present (even for a short while ~10ms) while +12V is okay (also across input capacitors and ).

1. Check resistor and power MOS-FETs -1/2

2. Check the voltage on pin 4 (4 V)

3. Check enable signal ENABLE-1V2 (active “low”)

4. Check for +1V4 output voltage short-circuit to GND that

can generate pulsed over-currents 7...10 A through coil

5. Check the over-current detection reference( + ) and the

boot components ( + ).

• Symptom: +1V2 present for about 100ms, +1V8, +2V5 and +3V3 not rising.

1. Check the ENABLE-3V3 signal (active “low”),

2. Check the voltage on pin 8 (1.5 V),

3. Check the under-voltage detection circuit (the voltage

on collector of transistor 7U10-1 should be less than

0.8 V),

4. Check for output voltages short-circuits to GND (+3V3,

+2V5 and +1V8) that can generate pulsed overcurrents 7...10 A through coil 5U01,

5. Check the over-current detection circuit (2U18 or 3U31

interrupted).

• Symptom: +1V2 OK, +2V5 and +3V3 present for about 100 ms. Possible cause: SUPPLY-FAULT line stays “low” even though the +3V3 and +1V2 is available - the standby microprocessor is detecting that and switching “off” all supply voltages.

1. Check the drop voltage across resistor 3U01 or 3U7B

(they could be too high, meaning a defective controller IC or MOS-FETs),

2. Check if the boost voltage on pin 4 of controller IC 7U00 is less than 14 V (should be 19 V),

3. Check if +1V2 or +3V3 are higher than their normal values - that can be due to defective DC feedback of the respective DC-DC convertor (ex. 3U47, 3U77, or 3U70).

• Symptom: +1V2, +1V4, +1V8, +2V5 or +3V3 shows a high level of ripple voltage (audible noise can come from the filtering coils 5U01 or 5U02). Possible cause: instability of the frequency and/or duty cycle of a DC-DC converter or stabilizer.

1. Check the resistor 3U32 and 3U7B, capacitors 2U17

and 2U19, input and output decoupling capacitors.

2. Check a.c. feedback circuits

(2U23+2U24+3U55+3U63 for +1V2, and 2U07+2U08+3U17+3U24 for +3V3), compensation capacitors 2U34, 2U36, 2U37, 2U40 and 2U68.

• Symptom: +1V2, +1V4, +2V5 and +3V3 ok, no +Vtun (analogue sets only). Possible cause: the “+VTUN GENERATOR” circuit (7U24+7U26+surrounding components) is defective: check transistor 7U24 (it has to have gate voltage pulses of about 10 V amplitude and drain voltage pulses of about 35 V amplitude) and surroundings components. A high consumption (more than 6 mA) from +Vtun voltage can cause also +Vtun voltage to be too low or zero.

Note: when a pair of power MOSFETs (7U01+7U06 or 7U03+7U08) becomes defective the controller IC 7U00 should be replaced as well.

5.9.4 Exit “Factory Mode”

When an “F” is displayed in the screen’s right corner, this means that the set is in “Factory” mode, and it normally happens after a new SSB has been mounted. To exit this mode, push the “VOLUME minus” button on the TV’s keyboard control for 5 seconds and restart the set.

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EN 31PB52.3HU LA 5.

5.9.5 SSB Replacement

Follow the instructions in the flowchart in case you have to exchange the SSB. See figure “SSB replacement flowchart”.

Instruction note: SSB replacement

Set is going into protection after

replacing the SSB

(blinking LED, error 2).

Take care that speakers are connected! In some sets, the speakers are in the rear cover, and when the set is switched “on” without speakers, it is possible that the Audio protection is triggered.

Advise: remount rear cover before switching “on” (see also SCC_71772).

Set is starting up but no display.

START

Set is still

operating?

Create “repair” directory on USB stick and

connect USB stick to TV-set

Go to SAM mode (062596 i+) and

save the TV settings via “Upload to USB”.

- Replace SSB board by a Service SSB.

- Make the SSB fit mechanically to the set.

Start-up set.

Set behaviour?

Set is starting up & display is OK.

Refer to section 7.1.2 Service Attention Points for further details.

No

Set is starting up in “Factory” mode.

Update main software in this step, by using

Program “Display Option” code via 062598

MENU/HOME, followed by 3 digits code (this

code can be found on a sticker inside the set).

After entering “Display Option” code, set is

going to Standby (= validation of code).

Connect PC via ComPair interface to Service

Program “set type number”, “serial number”,

“autorun.upg” file.

Restart the set.

No

connector.

Start TV in Jett mode (DVD i+/OSD)

Open ComPair browser

and “display 12NC”.

Saved settings

on USB stick?

Yes

Go to SAM mode, and reload settings

via “Download from USB”.

Check latest software on Service website.

Update Main and Standby software via USB.

If not already done;

Check and perform alignments in SAM

according to the Service Manual.

E.g. option codes, colour temperature...

Noisy picture with bands/lines is visible and the

red LED is continuous “on”

(sometimes also the letter “F” is visible).

Press 5 s. the “Volume minus” button on the local

cntrl until the red LED switches “off”, and then

press 5 s. the MENU (*) button of the local cntrl.

(* in some chassis this button is named SOURCE)

The picture noise is replaced by blue mute!

Unplug the mainscord to verify the correct

disabling of the factory-mode.

Program “Display Option” code via 062598 MENU/

HOME, followed by 3 digits code (this code can be

found on a sticker inside the set).

After entering “Display Option” code, set is going

to Standby (= validation of code).

Restart the set.

In case of settings reloaded from USB, the set type, serial number, Display 12NC, are automatically stored when entering display options.

- Check if correct “Display Option” code is programmed.

- Verify “Option Codes” according sticker inside the set.

- Default settings for White drive ...see Service Manual

Final check of all menus in CSM.

Special attention for HDMI Keys.

END

Figure 5-11 SSB replacement flowchart

Q52xE SSB Board swap – v5.1 VDS/JA Updated 18-03-2009 (changes are indicated in red)

H_16771_007.eps

090828

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EN 32 PB52.3HU LA5.

Service Modes, Error Codes, and Fault Finding

5.9.6 Display option code

Caution: In case you have replaced the SSB, always check the

display option code in SAM, even if you have picture. With a wrong display option code it is possible that you have picture, but that in certain conditions you have unwanted side-effects.

5.9.7 Upgrade EDID NVM

To upgrade the EDID NVM you must short circuit pin 7 of the EDID NVM to ground. Therefore some test points (EDID1 and EDID2) are foreseen near the HDMI connectors, see ComPair for further instructions.

5.10 Software Upgrading

5.10.1 WARNING - Flashing iBoard and/or NVM

When flashing iBoard and/or NVM, always check that you have the correct software (PB52.2/.3 HU LA). No software version check is implemented in this chassis. Accidental software flashing from earlier chassis will cause the set to be inoperative!

Table 5-3 NAND-Flash content

5.10.2 Introduction

The set software and security keys are stored in a NANDFlash, which is connected to the PNX85xx via the PCI bus.

It is possible for the user to upgrade the main software via the USB port. This allows replacement of a software image in a stand alone set, without the need of an E-JTAG debugger. A description on how to upgrade the main software can be found in the DFU.

Important: When the NAND-Flash must be replaced, a new SSB must be ordered, due to the presence of the security keys!!! (copy protection keys, MAC address, ...). Perform the following actions after SSB replacement:

1. Set the correct option codes (see sticker inside the TV).

2. Update the TV software (see the DFU for instructions).

3. Perform the alignments as described in chapter 8 (section “Reset of Repaired SSB”).

4. Check in CSM if the HDMI keys are valid.

5.10.3 Main Software Upgrade

The software image resides in the NAND-Flash, and is formatted in the following way, see table 5-3 NAND-Flash content.

Nand Flash content FUS UPG Upgrade All UPG Flash Utils UPG

Partition Content erase program erase program erase program

JFFS2 partition 1 (application read write data) Channel table, EPG data x x x

JFFS2 partition 0 (Application read only once data) HDMI keys, back up display file x x

JFFS2 partition 0 (Application read only upgradeable data) wizard pictures, display file, cabinet file, upgrade assistant x x x

SQUASHFS partition Main software (MIPS) Linux structure (root file system) x x x x

BFFS partition 2 (DVD OK) Default software upgrade application TriMedia software boot batch

BFFS partition 1 (DVD cursor down) Back up software upgrade application boot batch file 1 Linux kernel

BFFS partition 0 Jaguar Boot loader boot batch file 0 xx

Block 0 BTM partition table x

• The above overview of the NAND Flash shows the content of the different partitions. It also shows which part of the one-zip file erases and programs which part of the NAND Flash.

• Remark: the above does not mean that you can reprogram your HDMI keys with the “UpgradeAll.upg” file from the one zip file. This can only be done in a secure environment (e.g. the factory).

• The “UpgradeAll.upg” file is only used in the factory.

• The “FlashUtils.upg” file is only used by service centers

file 2

JETT: needed for ComPair

Manual Software Upgrade

In case that the software upgrade application does not start automatically, you can also start it manually. How to start the software upgrade application manually:

1. Disconnect the TV from the Mains/AC Power.

2. Press the “OK” button on a Philips DVD RC-6 remote control (it is also possible to use the TV remote in “DVD” mode). Keep the “OK” button pressed while reconnecting the TV to the Mains/AC Power.

3. The software upgrade application will start.

xx x x

xx xx

which are allowed to do component level repair on the SSB.

Attention!

In case that you have started the download application

Automatic Software Upgrade

In “normal” conditions, so when there is no major problem with the TV, the main software and the default software upgrade application can be upgraded with the “AUTORUN.UPG” (FUS part of the one-zip file: e.g. 3104 337 03801 _FUS _Q582E_

0.37.0.0_commercial.zip). This can also be done by the consumers themselves, but they will have to get their software from the commercial Philips website or via the Software Update Assistant in the user menu (see DFU). The “autorun.upg” file must be placed in the root of your USB stick. How to upgrade:

manually, the “autorun.upg” will maybe not be recognized. What to do in this case:

1. Create a directory “UPGRADES” on your USB stick.

2. Rename the “autorun.upg” to something else, e.g. to “software.upg”. Do not use long or complicated names, keep it simple. Make sure that “AUTORUN.UPG” is no longer present in the root of your USB stick.

3. Copy the renamed “upg” file into this directory.

4. Insert USB stick in the side I/O.

5. The renamed “upg” file will be visible and selectable in the upgrade application.

1. Copy “AUTORUN.UPG” to the root of your USB stick.

2. Insert USB stick in the side I/O while the set is in ON MODE. The set will restart and the upgrading will start automatically. As soon as the programming is finished, you will get the message that you can remove your USB stick and restart the set.

Back-up Software Upgrade Application

If the default software upgrade application does not start (could be due to a corrupted boot 2 sector) via the above described method, you can try to activate the “back-up software upgrade application”.

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EN 33PB52.3HU LA 5.

How to start the “back-up software upgrade application” manually:

1. Disconnect the TV from the Mains/AC Power.

2. Press the “CURSOR DOWN” button on a Philips DVD RC6 remote control (it is also possible to use the TV remote in “DVD” mode). Keep the “cursor down” button pressed while reconnecting the TV to the Mains/AC Power.

3. The software upgrade application will start.

5.10.4 Stand-by Software Upgrade

There are two methods now to upgrade stand-by software:

Upgrade via USB

In this chassis it is possible to upgrade the Stand-by software via a USB stick. The method is similar to upgrading the main software via USB. Use the following steps:

1. Create a directory “UPGRADES” on your USB stick.

2. Copy the Stand-by software (part of the one-zip file, e.g. StandbySW_CFT01_9.0.0.0.upg) into this directory.

3. Insert the USB stick into the TV.

4. Start the download application manually (see paragraph “Manual start of the Software Upgrade Application”.

5. Select the appropriate file and press the “red” button to upgrade.

Upgrade via PC and ComPair interface

It will be possible to upgrade the Stand-by software via a PC and the ComPair interface. Check paragraph “ComPair” on how to connect the interface. To upgrade the Stand-by software, use the following steps:

1. Disconnect the TV from the Mains/AC Power.

2. Short circuit the SPI pins [2] on the SSB (see figure “Service mode pads” earlier in this chapter).

3. Keep the SPI pins shorted while connecting the TV to the Mains/AC Power.

4. Release the short circuit after approximately two seconds.

5. Start up Hyper Terminal (can be found in every Windows application via Programs -> Accessories -> Communications -> Hyper Terminal). Use the following settings: –COM1 – Bits per second = 38400 (9600)* – Data bits = 8 – Parity = none – Stop bits = 1 – Flow control = None

6. Press “Shift U” on your PC keyboard. You should now see the following info: – PNX2015 Loader V1.0 – 19-09-2003 – DEVID=0x05 –Erasing – MCSUM=0x0000 –=

7. If you do not see the above info, restart the above procedure, and check your Hyper Terminal settings and the connections between PC and TV.

8. Via “Transfer” -> “Send text file ...”, you can send the proper upgrade file to the TV (e.g. *.hex).

9. After successful programming, you must see the following info (this can take several minutes!): – DCSUM=0xC67E –:Ok – MCSUM=0xC67E – Programming – PCSUM=0xC67E –Finished

10. If you do not see this info, restart the complete procedure.

11. Close Hyper Terminal.

12. Disconnect and connect Mains/AC Power again.

(*) When having problems with upgrading, use the values between brackets.

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EN 34 PB52.3HU LA6.

6. Alignments

Index of this chapter:

6.1 General Alignment Conditions

6.2 Hardware Alignments

6.3 Software Alignments

6.4 Option Settings

Note: The Service Default Mode (SDM) and Service Alignment Mode (SAM) are described in chapter 5. Menu navigation is done with the CURSOR UP, DOWN, LEFT or RIGHT keys of the remote control transmitter.

Alignments

Description Test Point SupplyMin. Typ. Max.

+3V3-standby FU86 +3.15 +3.30 +3.45 DC-DC

+1V2-standby FU85 +1.20 +1.25 +1.30 DC-DC

+3V3-MP4 FAK5 +3.15 +3.30 +3.45 ST

+2V6-MP4 FAKC +2.50 +2.60 +2.70 ST

+1V1 FAK1 +1.05 +1.10 +1.15 ST

+12V1 F230 +11.40 +12.00 +12.60 I-board

6.3 Software Alignments

6.1 General Alignment Conditions

Perform all electrical adjustments under the following conditions:

• Power supply voltage (depends on region): – AP-NTSC: 120 V – AP-PAL-multi: 120 - 230 V – EU: 230 V

AC

– LATAM-NTSC: 120 - 230 V – US: 120 V

AC

or 230 VAC / 50 Hz (± 10%).

AC

/ 50 Hz (± 10%).

AC

/ 50 Hz (± 10%).

AC

/ 60 Hz (± 10%).

• Connect the set to the mains via an isolation transformer with low internal resistance.

• Allow the set to warm up for approximately 15 minutes.

• Measure voltages and waveforms in relation to correct ground (e.g. measure audio signals in relation to AUDIO_GND). Caution: It is not allowed to use heatsinks as ground.

• Test probe: Ri > 10 Mohm, Ci < 20 pF.

• Use an isolated trimmer/screwdriver to perform alignments.

6.1.1 Alignment Sequence

• First, set the correct options: – In SAM, select “Options”, and then “Option numbers”. – Fill in the option settings for “Group 1” and “Group 2”

according to the set sticker (see also paragraph “Option Settings”).

– Press OK on the remote control before the cursor is

moved to the left.

– In submenu “Option numbers” select “Store” and press

OK on the RC.

OR:

– In main menu, select “Store” again and press OK on

the RC.

– Switch the set to Stand-by.

• Warming up (>15 minutes).

6.2 Hardware Alignments

There are no hardware alignments foreseen for this chassis, but below find an overview of the most important DC voltages on the SSB. These can be used for checking proper functioning of the DC/DC converters, see table 6-1 SSB DC Voltages

Table 6-1 SSB DC Voltages

Description Test Point SupplyMin. Typ. Max.

- Audio power FU15 -11.40 -12.00 -12.60 PSU

+ Audio power FU16 +11.40 +12.00 +12.60 PSU

+5V-standby FU18/FM25 +5.14 +5.20 +5.46 PSU

+12V FU19/FM26 +11.40 +12.00 +12.60 PSU

+1V2 FU06 +1.20 +1.25 +1.30 DC-DC

+3V3 FU07 +3.15 +3.30 +3.45 DC-DC

+1V8 IHZ3 t.b.d. +1.80 t.b.d. DC-DC

+5V-ON FU80 +4.95 +5.00 +5.30 DC-DC

+3V3-PI t.b.d. t.b.d. +3.30 t.b.d. Pro:idiom

Put the set in SAM mode (see Chapter 5 “Service Modes, Error Codes and Fault Finding”). The SAM menu will now appear on the screen. Select ALIGNMENTS and go to one of the sub menus. The alignments are explained below.

The following item can be aligned:

• Whitepoint.

To store the data:

• Press OK on the RC before the cursor is moved to the left.

• In main menu select “Store” and press OK on the RC.

• Press MENU on the RC to switch back to the main menu.

• Switch the set to stand-by mode.

For the next alignments, supply the following test signals via a video generator to the RF input:

• EU/AP-PAL models: a PAL B/G TV-signal with a signal strength of at least 1 mV and a frequency of 475.25 MHz

• US/AP-NTSC models: an NTSC M/N TV-signal with a signal strength of at least 1 mV and a frequency of 61.25 MHz (channel 3).

• LATAM models: an NTSC M TV-signal with a signal strength of at least 1 mV and a frequency of 61.25 MHz (channel 3).

• DVB-T models: see table “SDM default settings” in chapter

5.

6.3.1 White Point

• Set “Active control” to “Off”.

• Choose “TV menu”, “TV Settings” and then “Picture” and put: – “Dynamic contrast” to “Off”. – “Color enhancement” to “Off”. – “Light sensor” to “Off” where applicable. – “Clear LCD” to “On” where applicable. – “Brightness” to “50”. – “Color” to “0”. – “Contrast” to “100”.

• Go to the SAM and select “Alignments”-> “Whitepoint”.

White point alignment LCD screens:

• Use a 100% white screen as input signal and set the

.

following values: – “Color temperature”: “Normal”. – All “Whitepoint” values to: “127”. – “Red BL offset” values to “8”. – “Green BL offset” values to “8”.

In case you have a color analyzer:

• Measure with a calibrated (phosphor- independent) color analyzer in the centre of the screen. Consequently, the measurement needs to be done in a dark environment.

• Adjust the correct x,y coordinates (while holding one of the White point registers R, G or B on 127) by means of decreasing the value of one or two other white points to the correct x,y coordinates (see table “White D alignment values”). Tolerance: dx: ± 0.004, dy: ± 0.004.

2009-Oct-09

Alignments

EN 35PB52.3HU LA 6.

• Repeat this step for the other color temperatures that need to be aligned.

• When finished press OK on the RC and then press STORE (in the SAM root menu) to store the aligned values to the NVM.

• Restore the initial picture settings after the alignments.

Table 6-2 White D alignment values

Normal (9000

Value Cool (11000 K)

K) Warm (6500 K)

x 0.278 0.289 0.314

y 0.278 0.291 0.319

6.4 Option Settings

6.4.1 Introduction

The microprocessor communicates with a large number of I ICs in the set. To ensure good communication and to make digital diagnosis possible, the microprocessor has to know which ICs to address. The presence / absence of these specific ICs (or functions) is made known by the option codes.

Notes:

• After changing the option(s), save them by pressing the OK button on the RC before the cursor is moved to the left, select STORE in the SAM root menu and press OK on the RC.

• The new option setting is only active after the TV is switched “off” / “stand-by” and “on” again with the Mains switch (the NVM is then read again).

6.4.2 Opt. No. (Option numbers)

Select this sub menu to set all options at once (expressed in two long strings of numbers).

If you do not have a color analyzer, you can use the default values. This is the next best solution. The default values are average values coming from production (statistics).

• Select a COLOUR TEMPERATURE (e.g. COOL, NORMAL, or WARM).

• Set the RED, GREEN and BLUE default values according to the values in the “Tint settings” table.

• When finished press OK on the RC, then press STORE (in the SAM root menu) to store the aligned values to the NVM.

• Restore the initial picture settings after the alignments.

Table 6-3 Tint settings

Colour Temp. R G B

Cool t.b.d. t.b.d. t.b.d.

Normal t.b.d. t.b.d. t.b.d.

Warm t.b.d. t.b.d. t.b.d.

An option number (or “option byte”) represents a number of different options. When you change these numbers directly,

2

C

you can set all options very quickly. All options are controlled via eight option numbers. When the NVM is replaced, all options will require resetting. To be certain that the factory settings are reproduced exactly, you must set both option number lines. You can find the correct option numbers on a sticker inside the TV set and in Table “Option code overview”.

Example: The options sticker gives the following option numbers:

• 57768 03076 08515 13923

• 59272 00068 00000 00000

The first line (group 1) indicates hardware options 1 to 4, the second line (group 2) indicates software options 5 to 8. Every 5-digit number represents 16 bits (so the maximum value will be 65536 if all options are set). When all the correct options are set, the sum of the decimal values of each Option Byte (OB) will give the option number. See tables “Option code overview” for the options.

6.4.3 Option Code Overview

Table 6-4 Option code overview

CTN Display type Display code

26HFL5561x/27 LPL LC260WXE-SSB1 214 41352 35877 41423 46707 63446 00102 00000 00000

32HFL5561x/27 LPL LC320WXE-SBA1 213 41352 35885 41423 46707 63445 00102 00000 00000

42HFL5581x/27 LPL LC420WUE-SBA1 205 57738 35885 41423 46707 63437 00102 00000 00000

Important: after having edited the option numbers as described above, you must press OK on the remote control

before the cursor is moved to the left!

Group 1 Group 2

OB1OB2OB3OB4OB5OB6OB7OB8

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7. Circuit Descriptions

Circuit Descriptions

Index of this chapter:

7.1 Introduction

7.2 Main Supply

Notes:

•Only new circuits (circuits that are not published recently) are described. For a description of most circuitry, refer to the Q528.1E LA Service Manual.

• Figures can deviate slightly from the actual situation, due to different set executions.

• For a good understanding of the following circuit descriptions, please use the wiring, block (chapter 6) and circuit diagrams (chapter 7). Where necessary, you will find a separate drawing for clarification.

7.1 Introduction

This chassis (member of the “TV522” platform) is a derivative from the PB52.1HU LA chassis with the same Pro:Idiom technology and iBoard functionality. It comes with the ME7 styling for the 26" and the PnS styling for all other sets.

7.1.1 Features

The main features for this chassis are:

• The introduction of a module referred to as “Light Guide” on the front side of the set (in some sets).

• Support of DVB-C reception (in some sets).

• For hospitality TV this chassis is provided with Pro:Idiom technology.

• For all other features: refer to the Q528.1E LA/LB and PB52.1HU LA/LB Service Manual.

7.1.2 Service Attention Points

• One SSB version is to be used in different sets. So if a SSB is installed in a TV-set, the technician has to make sure the options are set correctly. Section 5.9.5 SSB Replacement describes the way to do a board exchange.

• The ComPair connection to the set for this platform is made to a headphone jack on the back of the sets which carries a RS232 level connection to communicate. For this, the in chapter 5 paragraph “ComPair” mentioned RS232 cable is needed.

• The repair workshop repairing the SSBs on component level must load the latest set and NVM software in the SSB

®

7.1.3 PB522 Architecture Overview

before sending the boards back in the pool. This to make sure that the board is working in a proper way when it is mounted in a "to repair" set.

• In the CSM menu, the 12nc of the display will be mentioned.

For details about the chassis block diagrams refer to chapter “Block diagrams, Test Point Overview, and Waveforms”. An overview of the PB522 architecture can be found in Figure 7-1

®

.

HDMI 1(rear) HDMI 2(rear) HDMI 3(MPEG4)

Hybrid Tuner Saw

Decoder

TDA10060

DDR1

64MB

32

STi7101

MPEG4 HD

PB Micro

UPSD3333D

ADI8191

HDMI switch

Master IF

Pro:Idiom

LGDT1128

TS

CVBS

SAA7113

encoder

DDR-II

64MB

32

NXP

PNX8541

YUV20

BR/Pend

EPROM

32

EP2C8 ALT00

FPGA

FLASH

64MB

RGB30

Discreet

amp

Pac3

AmbiLight 2

PCI/XIO

USB2.0

Matrix

HD@60Hz FHD@60H z

2009-Oct-09

8

FLASH

I_17500_001.eps

030408

Figure 7-1 Architecture of PB522 platform

Circuit Descriptions

EN 37PB52.3HU LA 7.

7.1.4 Pro:Idiom® Technology

This chassis is equipped with the second generation Pro:Idiom

®

decryption device for the hospitality television receiver market. The LGDT1128A/29 device family includes enhanced electrostatic protection as well as adding MPEG 4

Receiver Block Diagram LGDT 1128A/29 Signal Description

•

Control Tuner for RF Channel Selection

•

Control Sub-Program selection in

multiplexed MPEG transport stream

Tuner Pro:Idiom

7.1.5 SSB Cell Layout

ATSC Demodulator

Decryption

decrypting ability in the LGDT 1129 series. Pro:Idiom leading content protection technology in the hospitality industry and the LGDT 1128A/29 device family makes integration of this technology into televisions and set top boxes simple and cost efficient. This device is mounted on the SSB.

Conditional Acces

Receiver

I2C

micro

Micro Bus

MPEG Decoder

Consumer

Remote Control

Display

Figure 7-2 Architecture of Pro:Idiom

Inputs: Data [7..0] Start of Packet Data Valid TS Clock

Reset

I

LGDT

1128A/29

2

C[3..0]

27 MHz

®

is the

Outputs: Data [7..0] Start of Packet Data Valid TS Clock

I_17500_003.eps

170408

DC - DC CONVERSION

CLASS - D

SYSTEM INTERFACE

DDR2

SDRAM

DDR2

SDRAM

PNX8541

Pro:Idiom

DDR

SDRAM

STI7100

HDMI

SWITCH

DDR

SDRAM

Figure 7-3 SSB top view

I_17500_071.eps

070408

2009-Oct-09

EN 38 PB52.3HU LA7.

Circuit Descriptions

7.2 Main Supply

Below find an overview of the PSUs that are used:

Table 7-1 Supply diversity

Supplier PSU Model Input Voltage Range

LGInnotek PLHL-T847A 26" Universal (90 to 270 V

LGInnotek PLHL-T827B 32" Universal (90 to 270 V

LGInnotek PLHL-T828B 42" Universal (90 to 270 VAC)

They are a black-box for Service. When defective, a new panel must be ordered and the defective panel must be sent for repair, unless the main fuse of the panel is broken. Always replace a defective fuse with one with the correct specifications! This part is available in the regular market.

7.2.1 PLHL-T847A (26"), PLHL-T827B (32"), PLHL-T828B (42")

Connector Pin Assignment

Pin no.

CN1 CN2, CN3 CN4 CN5 CN6

1 N HV +3V3Stdby +12V +12V

2 L HV Stdby +12V +12V

3- HV GND GND n.c.

4 - - GND GND GND

5 - - GND INV_ON GND

6- - +12V DIM -

7 - - +12V Boost -

8- - +12V GND -

9 - - +12V(audio) - -

10 - - GND_audio - -

11 - - -12V(audio) - -

12 - - - - -

13 - - - - -

14 - - - - -

Connector

)

AC

)

AC

2009-Oct-09

8. IC Data Sheets

This section shows the internal block diagrams and pin configurations of ICs that are drawn as “black boxes” in the electrical diagrams (with the exception of “memory” and “logic” ICs).

8.1 Diagram B03, B09, PNX85xx (IC 7H00)

Block Diagram

A/V INPUTS

VGA

HDMI

TDA10060

Channel

TD1736OF

Tuner

TDA9897

IF

IC Data Sheets

DDR-II

32 MB

16

PNX85xx

MIPS32@240MHz TV control, Pixel OSD

Source select 3D-Comb

Digital color decoder Audio decoding Full audio processing, inc SRS MPEG-2 HD/SD decode MA DI 8-bit video processing Enhanced PQ processing Single LVDS output HDMI / DVI CA option

DDR-II 32 MB

16

EN 39PB52.3HU LA 8.

LCD

Matrix Display

1368 × 768

SPDIF Out

TDA8933T

Audio Amp.

8/16

Pin Configuration

ball A1 index area

AB

AD

AF

AH

AK

USB2 Option

1 9 17 253 11 19 2771523513 21 29

A

B

C

D

E

F

G

H

J

K

L

M

N

P

R

T

U

V

W

Y

AA

AC

AE

AG

AJ

PNX85xx

Transparent top view

FLASH

16 MB

426121018 26412 22308 20 28614

H_16800_128.eps

230707

Figure 8-1 Internal block diagram & pin configuration

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8.2 Diagram B05A, TDA8932 (IC 7D10)

IC Data Sheets

Block Diagram

IN1P

IN1N

INREF

IN2P

IN2N

DIAG

CGND

POWERUP

2

3

12

15

14

4

7

6

OSCILLATOR

V

SSD

PROTECTIONS:

OVP, OCP, OTP,

UVP, TF, WP

MODE

PWM

MODULATOR

PWM

MODULATOR

MANAGER

VOICSOFERCSO

DDA

CTRL

81301

DRIVER

HIGH

DRIVER

LOW

DRIVER

HIGH

DRIVER

LOW

V

DDA

STABILIZER 11 V

V

SSP1

V

DDA

STABILIZER 11 V

V

SSP2

REGULATOR 5 V

V

SSD

28

BOOT1

29

V

DDP1

27

OUT1

26

V

SSP1

21

BOOT2

20

V

DDP2

22

OUT2

23

V

SSP2

25

STAB1

24

STAB2

18

DREF

ENGAGE

TEST

5

13

Pin Configuration

V

DDA

V

TDA8932

9

V

SSA

V

SSD(HW)

V

OSCREF

V

SSD(HW)

1, 16, 17, 32

SSD(HW)

DDA

SSA

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

TDA8932T

SSA

HALF SUPPLY VOLTAGE

32

V

SSD(HW)

31

OICSOP1NI

30

1PVHN1NI

29

VGAID

DDP1

28

1TOOBEGAGNE

27

1TUOPUREWOP

26

VDNGC

SSP1

25

STAB1

24

STAB2

V

23

SSP2

22

2TUOFERPVH

21

2TOOBFERNI

20

VTSET

DDP2

19

2PVHN2NI

18

FERDP2NI

17

V

SSD(HW)

11

HVPREF

30

HVP1

19

HVP2

2009-Oct-09

Figure 8-2 Internal block diagram and pin configuration

G_16860_045.eps

300107

8.3 Diagram B05C, TPA4411RTJ (IC 7HV0)

(TOP VIEW)

IC Data Sheets

FunctionalPinning Block Diagram

EN 41PB52.3HU LA 8.

TPA4411

SVDD

_

+

SVSS SVDD

+ _

SVSS

Av = −1.5 V/V

Short

Circuit

Protection

Charge

Pump

PVSS

C1P

PGND

C1N

NC

PVSS

SDL

PVDD

NC

20

19

18

1

2

3

4

5

9

8

7

6

NC

SVSSNCOUTL

NC − No internal connection

SGND

17

NC

16

10

SVDD

Audio In − R

INR

15

14

SDR

13

INL

12

NC

11

OUTR

SGND

Audio In − L

SDx

Bias

Circuitry

TERMINAL FUNCTIONS

TERMINAL

NAME QFN WCSP

C1P 1 A4 I/O Charge pump flying capacitor positive terminal

PGND 2 B4 I Power ground, connect to ground.

C1N 3 C4 I/O Charge pump flying capacitor negative terminal

NC B3, C3 No connection

4, 6, 8, 12,

16, 20

PVSS 5 D4 O Output from charge pump.

SVSS 7 D3 I Amplifier negative supply, connect to PVSS via star connection.

OUTL 9 D2 O Left audio channel output signal

SVDD 10 D1 I Amplifier positive supply, connect to PVDD via star connection.

OUTR 11 C2 O Right audio channel output signal

INL 13 C1 I Left audio channel input signal

SDR 14 B1 I Right channel shutdown, active low logic.

INR 15 A1 I Right audio channel input signal

SGND 17 A2 I Signal ground, connect to ground.

SDL 18 B2 I Left channel shutdown, active low logic.

PVDD 19 A3 I Supply voltage, connect to positive supply.

Exposed Pad -

I/O DESCRIPTION

(1)

Exposed pad must be soldered to a floating plane. Do NOT connect to power or ground.

Audio Out − R

Audio Out − L

C1P

C1N

I_17500_004.eps

180408

Figure 8-3 Internal block diagram and pin configuration

2009-Oct-09

EN 42 PB52.3HU LA8.

8.4 Diagram B06C, AD819xA (IC 7J00)

Block Diagram

IC Data Sheets

Pin Configuration

PP_OTO

100

1

AVCC

IN_B0

IP_B0

AVEE

IN_B1

IP_B1

VTTI

IN_B2

IP_B2

AVEE

IN_B3

IP_B3

AVCC

IN_A0

IP_A0

AVEE

IN_A1

IP_A1

VTTI

IN_A2

IP_A2

AVCC

IN_A3

IP_A3

AVEE

Figure 8-4 Internal block diagram and pin configuration

PIN 1 INDI CATOR

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

26

I2C_ADDR0

Figure 1.

TYPICAL APPLICATION

AUX_A2

AUX_A0

AUX_A1

99

97

98

27

29

28

DVEE

I2C_ADDR2

I2C_ADDR1

AUX_B2

AUX_B0

AUX_B3

AUX_COM0

AUX_B1

92

91

90

TOP VIEW

(Not to Scale)

34

35

36

OP0

ON0

VTTO

AUX_COM1

89

AD8197

37

OP1

ON1

AUX_A3

DVEE

95

93

96

94

31

33

30

32

DVCC

PP_CH0

PP_CH1

6471-001

04:20

AUX_COM2

AUX_COM3

AUX_C0

AUX_C3

AMUXVCC

AUX_C1

AUX_D0

AUX_D1

AUX_D2

AUX_D3

88

AUX_C2

84

87

38

39

ON2

DVCC

82

86

40

OP2

81

85

83

42

45

44

41

43

OP3

ON3

VTTO

RESET

PP_EQ

PP_EN

76

78

77

80

79

48

49

46

PP_PRE0

50

47

DVCC

PP_OCL

I2C_SCL

I2C_SDA

PP_PRE1

H_17650_080.eps

75

74

73

72

71

70

69

68

67

66

65

64

63

62

61

60

59

58

57

56

55

54

53

52

51

AVCC

IP_C3

IN_C3

AVEE

IP_C2

IN_C2

VTTI

IP_C1

IN_C1

AVEE

IP_C0

IN_C0

AVCC

IP_D3

IN_D3

AVEE

IP_D2

IN_D2

VTTI

IP_D1

IN_D1

AVCC

IP_D0

IN_D0

AVEE

150108

2009-Oct-09

8.5 Diagram B09, EP2C5F256C7N (IC 7F90)

Block Diagram

PLL PLLIOEs

Embedded Multipliers

IC Data Sheets

EN 43PB52.3HU LA 8.

IOEs

Logic Array

Figure 8-5 Internal block diagram and pin configuration

Logic Array

Logic

Array

Logic

Array

IOEs

LLPLLP IOEs

M4K BlocksM4K Blocks

I_18020_137.eps

190908

2009-Oct-09

EN 44 PB52.3HU LA8.

L

S

L

S

IC Data Sheets

8.6 Diagram B10C, T6TF4HFG (IC 7GE2)

Block Diagram

2

SYNC

Pat gen

Input Proc

MVL manager

Contr, Brightness

&

White-point corr

Contrast Reserve

&

Clip Measure

LVDS

encoder

input

CMOS

30

LVDS

decoder

PLL1

LVDS/CMOS RGB IN

LVDS

decoder

CLK_IN

PLL2

256B

MRAM

60 MHZ RES

XRAM

IC2_1

I2C_1

Pin Configuration

216 1 2

JTAG

3 4 5 6 7 8 9

10 11 12 13 14 15 16 17

-o input

18 19 20

VD

21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36

-e input

37 38 39

VD

40 41 42 43 44 45 46 47 48 49

R data input G data input B data input sync i

50 51 52 53 54

5556575859606162636465666768697071727374757677

Color gamut

mapping

Sharpness

Contr. enhance

H LTI

Histogram

Video Q meter

Noise estimator

Text enhance

Color processing

Content

Detection

32kB

16kB

ROM

Control

reg. IF

Interrupt

contr

UART

80C51

215

IC2_2

I2C_2

213

212

214

211

SPI

6

SI

CS

SO

JTAG

208

SCK

I2Cs0I2Cm

205

202

207

206

200

204

203

201

SPI 6 X GPIO PWM OSC

199

196

195

198

194

193

192

197

I2C_3

210

209

GPIO

RSTN

INT_N

I2Cs1

SPI

191

190

189

Interrupt test reset

188

182

185

183

187

186

184

181

180

PACIFIC3-N2

787980818283848586

Ambi-PWM LVDS-o output LVDS-e output

878889909192939495

B data outputA data output

Color LUT

& Dithering

Output buffering

AmbiLight

inp_sync

Test

control

6

PWM

179

174

176

175

173

172

969798

99

C data output

100

171

170

101

178

177

ADDR/DATA/RDN/WRN/

PSEN/TXD/RXD

T1

166

168

169

167

102

103

105

106

104

LVDS

CMOS

Timing control

Unit

PWM

BST

TDI

TCK

TDO

163

165

164

162 161 160 159 158 157 156 155 154 153 152 151 150 149 148 147 146 145 144 143 142 141 140 139 138 137 136 135 134 133 132 131 130 129 128 127 126 125 124 123 122 121 120 119 118 117 116 115 114 113 112 111 110 109

107

108

G_16840_099.eps

encoder

output

3

TMS

TRST

F data output

Proc data bus

UART

E data output

Proc address bus

D data output

sync o

clko

30

090207

LVDS/CMOS RGB OUT

CMOS RGB OUT /

ND

P FLASH AND UART

2

CLK_OUT

SYNC

PWM

TRIGOUT

2009-Oct-09

Figure 8-6 Internal block diagram and pin configuration

8.7 Diagram B11, STI710x (IC 7A00)

Block Diagram

IC Data Sheets

EN 45PB52.3HU LA 8.

ST40 core 266 MHz

UDI

MMU

2 x PDES

PTI

TSmerger/router

TSIN1 TS I/O

TSIN0

NRSS-A

16 K Icache

Int. control

32 K Dcache

PTI

CP

generator

and system

services

32

Clock

SDRAM

Video

LMI

System

FDMA

5 x 2-ch

DDR

LMI

PCM out

2-ch

PCM in

32

Audio decoder

and interfaces

Ethernet,

MII/RMII

MII/RMII for 100BT

Ethernet

AudioL

AudioR

ST231

core

S/PDIF

Audio DACs

Video decoder

H264/MPEG-2

SD

video in

Serial

ATA

interface

Digital

video input

STBus

ST231

core

DVI -HDC P

HDMI

TMDS main video

output (HD)

USB

2.0

2D gamma

blitter

Output stage

Main video

output (HD)

YPbPr

DACs

2x I/F

SmCard

6x GPIO

CUR

compo sitor

Peripheral I/O

and external interrupts

IR

Tx/Rx

ILC

3 x GDP

Display

DENC

DACs

Aux video

output (SD)

YC/CVBS

MAFE

interface

4x

UARTs

DEI

Main video

display

Aux video

display

PWM

3x

SSCs

EMI

EMPI

Flash

or companion chip

Figure 8-7 Internal block diagram and pin configuration

H_16780_085.eps

070907

2009-Oct-09

EN 46 PB52.3HU LA8.

/

IC Data Sheets

8.8 Diagram B12A, TDA1517ATW/N1 (IC 7111)

Not available at time of issue.

8.9 Diagram T01A, TDA10060 (IC7T18)

Block Diagram

PSC/SPI host

interface

interrupt

in-band tuner

in-band AGT

in-band AGI

in-band AFT

out-of-band tuner

out-of-band AGC

out-of-band VCO

PSC/SPI SLAVE

INTERFACE

IN-BAND AFE

PGA

12-bit A/D

AGC CONTROL

OUT-OF-BAND

AFE PGA

6-bit A/D

AGC CONTROL

VCO

OUT-OF-BAND

QPSK

RECEIVER

DVS-167 FEC DVS-178 FEC

HAB

ATSC 8/16 VSB

ADVANCED

RECEIVER

ATSC 8/16 VSB

ADVANCED

RECEIVER

ACQUISITION

PROCESSOR

TDA10060

internal bus to all blocks

ATSC FEC

ITU-T J.83

ANNEX

A/B/C FEC

MASTER

PLL

IN-BAND OUTPUT

INTERFACE

OUT-OF-BAND

OUTPUT

INTERFACE

54 MHz third overtone crystal

MPEG transport

out-of-band transport for CableCard POD

Pin Configuration

PSC MASTER

INTERFACE

tuner/peripheral

control

GPIO/GPO

INTERFACE

GPIO GPO antenna

144

1

EIA/CEA-909

INTERFACE

control

109

108

TDA10060HL

36

37

Figure 8-8 Internal block diagram and pin configuration

73

72

JTAG

INTERFACE

JTAG

controller

H_16800_028.eps

111007

2009-Oct-09

8.10 Diagram T01B, TDA989xHL (IC 7T57)

A

IC Data Sheets

EN 47PB52.3HU LA 8.

Block Diagram

4 MHz reference

input

(2)

R

EXTERNAL SOUND

FILTER

AM

BAND-PASS FILTER

+3 dB

FM CARRIER AGC

AM DEMODULATOR

FM NARROW-BAND PLL

35, 42

n.c.

SDA

SCL14i.c.

24

23

TDA9897

36

GCDIN

3

IF3A

4

IF3B

6

IF1A

7

IF1B

9

IF2A

10

IF2B

45

i.c.

TUNER

47

TAGC

48

GND

SIF AGC

PEAK AGC

n.c.

I2C-BUS

VIF AGC

DECODER

2, 5, 18, 37

ADRSEL32BVS22GNDD

25

AM average

FM peak

2

C-BUS

I

TOPNEG

RSSI

DETECTOR

AND

IF BASED

TUNER

AGC

8

CTAGC

VIF PLL

AND

ACQUISITION

HELP

2

C-BUS TOP2

I

AND RSSI

optional tuner AGC TOP for IF based tuner AGC and radio signal strength detector onset

sideband

Q

I

sideband

I

Q

V

LFSYN2 1

SYNTHESIZER

AND VCO

A

B

TDA9897

C

GROUP

DELAY

1NYSFLFIVFL2POT

standard

C

D

E

F

G

H

SIDEBAND

FILTER

NYQUIST

FILTER

3111

SOUND

CARRIER

TRAP

trap reference

SYNTHESIZER

AND VCO

EQUALIZER

38

VIF AFC

P

43, 44

SUPPLY

GNDA EXTFILO 40, 41 15

BAND-PASS

AND

(1)

EXTFILI 17

BP on/off

FM SWITCH

46 39

4 MHz FREQUENCY

REFERENCE

OUTPUT SWITCH

FM

AMPLIFIER

FM

AM

19

LFFM

SIF AGC FM AGC

VIF AGC

TAGC

AFC

2

C-bus

I

(2)

R

OPTXTALFREF

29

OUT2A

30

OUT2B

26

OUT1A

27

OUT1B

21

EXTFMI

CAF2

34

20

CDEEM

31

AUD

CAF1

28

16

MPP2

33

CVBS

12

port

MPP1

Pin Configuration

CIFAGC

LA TX

ADNGMEE

CGAT.c

FERFOLIFTXE

DNGFIVFL

48

.c

P

.

i

VILI

4746454443

P

V.c

1

2

3

4

(1)

5

6

7

TDA9897HL TDA9898HL

8

9

10

11

12

1314151617

.

i

18

2PPM

. n

F TXE

ADNGIM

.c.nMFFL

4140393837

42

202122

19

F TXE

DC

T P OD

D N G

LFSYN1

n.c.

23

24

SCL

SDA

BVS

NIDCGA2NYSFL

.c.n.c.n

2FACA3FI

SBVCB3FI

DUAA1FI

B2TUOB1FI

A2TUOCGATC

1FACA2FI

B1TUOB2FI

A1TUO2POT

LESRDA1PPM

H_16800_029.eps

111007

36

35

34

33

32

31

30

29

28

27

26

25

Figure 8-9 Pin configuration

2009-Oct-09

EN 48 PB52.3HU LA8.

IC Data Sheets

8.11 Diagram T01B, TD1736F/FHFXP (IC 1T04)

Block Diagram

RF input (F)

FM-trap

33V PLL

5V

RF out

5V Antenna power

2

1

4

AGC

5V

3

9

IIC bus

5

6

Pin Configuration

Terminal TD1736(O)F/FHFXP Remark

1 Antenna power option

2 RF Pin Output

3 External RF-gain control voltage (0.5V - 4.0V)

5 PLL chip address select (I

6 SCL (I

7 SDA (I

2

Max. permissible current: 100mA

Full band output (53MHz - 865MHz)

(only available in “O” type)

Source impedance limited to 1kohms

)renut / C

4MHz

7

8

11

seton noitacilppa eeS part MF 4

seton noitacilppa ees )renut / C

2009-Oct-09

tuptuo ecnerefeR zHM 4 8

9

+5V ± 5% supply voltage (V

TU

)

Tuner supply

dnuorG 01

delpuoc CA tuptuo - FI lacirtemmys-A 11

18710_300_090827.eps

Figure 8-10 Pin configuration

090827

9. Block Diagrams

Wiring Diagram 26" (ME7 styling)

WIRING DIAGRAM 26" (ME7)

Board Level Repair

Block Diagrams

EN 49PB52.3HU LA 9.

Component Level Repair Only For Authorized Workshop

CN4

11. -Vaudio

MAIN POWER SUPPLY IPB 26 PLHL-T847B B

(1005)

LCD DISPLAY (1004)

LV DS CONN.

30p

8G50

8207

8204

8301

8302

8303

10. GNDaudio

9. +Vaudio

8. +12.3V

7. +12.3V

6. +12.3V

5. GND1

4. GND1

3. GND1

2. STBY

1. 3V3 STBY

CN5

8. PWM DIM

7. BOOST

6. DIM

5. BL_ON_OFF

4. GND1

3. GND1

2. +12.3V

1. +12.3V

(B05A)

1. LEFT +

1D12

2. GNDSND

3. GNDSND

4. RIGHT -

(B01A)

1. +3V3-STANDBY

1U00

2. SATANDBYn

3. GND

4. GND

5. GND

6. +12V

7. +12V

8. +12V

9. +AUDIO-POWER

10. GND

11. -AUDIO-POWER

(B13A)

1B28

1. +12VTCON

2. +12VTCON

3. GND

4. GND

5. LAMP-ON-OUT

6. BACKLIGHT-OUT

7. BACKLIGHT-BOOST

8. GND

(B10A)

1. SDA-I2C4-DISP

1G50

2. SCL-I2C4-DISP

..38. VDISP

41. VDISP

39. VDISP

40. VDISP

(B08C)

1N51

1. LIGHT-SENSOR

FUSE

CN1

2. L

1. N

1N30

4. GND

3. USB20-2-DP

2. USB20-2-DM

1. OUTB

B

(B08B)

SSB

(1150)

2. GND

3. RC

8109

4. LED2-OUT

5. +3V3-STANDBY

6. LED1-OUT

7. KEBOARD

8. +5V-ON

TO

BACKLIGHT

8316

DANGEROUS

CN3

1. HV1

2. N.C.

3. HV 1

HIGH VOLTAGE

CN2

1. HV1

2. N.C.

3. HV 1

INLET

+ -

8308

1E90

(B07B)

12. SIDEIO-DETECT

11. AUDIO-HDPH-R-AP

10. AUDIO-HDPH-L-AP

9. GND

8. FRONT-AIN5-R

7. AUDIO MUTE

6. FRONT-AIN5-L

5. GND

4. FRONT_C

3. GND

2. FRONT_Y_CVBS

1. GND

TUNER BOARD

T

TUNER

(B02A)

8. SCL-SSB-MUX2

1C01

1T12

8p

7. SDA-SSB-MUX2

6. +1V2

5. +1V2

4. GND

8T02

(T01A)

3. +3V3

2. GND

1. +12V

(T01A)

20p

1T13

(T01A)

5p

1T11

8T03

8T01

1C02

(B02A)

5. IF-N

4. GND

3. IF-P

2. GND

1. CVBS-BO

1C00

(B02A)

20. GND

19. GND

18. RESET-SYSTEM-DETECT

17. GND

16. SDA-SSB

15. SCL-SSB

14. GND

13. TUN-FE-ERR . .

1. TUN-FE-DATA7

KEYBOARD CONTROL

(1114)

1309

4P

SIDE I/O

(1152)

D

1304

11P

8M01

J1

8P

IR LED PANEL

+ -

(1112)

J2

3P

RIGHT SPEAKER

(5213)

2009-Oct-09

LEFT SPEAKER

(5214)

18740_400_091005.eps

091005

Wiring Diagram 32" (P&S styling)

WIRING DIAGRAM 32"

Board Level Repair

(P & S)

Block Diagrams

EN 50PB52.3HU LA 9.

KEYBOARD CONTROL

(1114)

TO

BACKLIGHT

Component Level Repair Only For Authorized Workshop

8316

8319

DANGEROUS

HIGH VOLTAGE

CN2

1. HV1

2. N.C.

3. HV1

DANGEROUS

HIGH VOLTAGE

CN3

1. HV1

2. N.C.

3. HV1

MAIN POWER SUPPLY

(1005)

CN1

2. L

1. N

FUSE

8308

CN4

11. -Vaudio

10. GNDaudio

9. +Vaudio

8. +12.3V

7. +12.3V

6. +12.3V

5. GND1

4. GND1

3. GND1

2. STBY

1. 3V3 STBY

CN5

8. PWM DIM

7. BOOST

6. DIM

5. BL_ON_OFF

4. GND1

3. GND1

2. +12.3V

1. +12.3V

INLET

LCD DISPLAY

LV DS CONN.

30p

SSB

B

(1150)

1N30

(B08B)

4. GND

3. USB20-2-DP

2. USB20-2-DM

1. OUTB

1E90

(B07B)

12. SIDEIO-DETECT

11. AUDIO-HDPH-R-AP

10. AUDIO-HDPH-L-AP

9. GND

8. FRONT-AIN5-R

7. AUDIO MUTE

6. FRONT-AIN5-L

5. GND

4. FRONT_C

3. GND

2. FRONT_Y_CVBS

1. GND

(1004)

(B05A)

1. LEFT +

1D12

2. GNDSND

3. GNDSND

4. RIGHT -

8302

T

TUNER

(B01A)

1. +3V3-STANDBY

1U00

2. SATANDBYn

3. GND

4. GND

5. GND

6. +12V

7. +12V

8. +12V

(B02A)

8. SCL-SSB-MUX2

1C01

7. SDA-SSB-MUX2

6. +1V2

5. +1V2

4. GND

8T02

1T12

(T01A)

8p

TUNER BOARD

9. +AUDIO-POWER

3. +3V3

10. GND

2. GND

1. +12V

8301

11. -AUDIO-POWER

(T01A)

1T13

(T01A)

1T11

8G50

20p

5p

8T03

8T01

(B13A)

1B28

1. +12VTCON

2. +12VTCON

1C02

(B02A)

5. IF-N

4. GND

3. IF-P

2. GND

1. CVBS-BO

8207

3. GND

4. GND

5. LAMP-ON-OUT

6. BACKLIGHT-OUT

7. BACKLIGHT-BOOST

8. GND

1C00

(B02A)

20. GND

19. GND

18. RESET-SYSTEM-DETECT

17. GND

16. SDA-SSB

15. SCL-SSB

14. GND

13. TUN-FE-ERR . .

1. TUN-FE-DATA7

8204

(B10A)

1. SDA-I2C4-DISP

1G50

2. SCL-I2C4-DISP

..38. VDISP

8109

(B08C)

1N51

39. VDISP

40. VDISP

41. VDISP

1. LIGHT-SENSOR

2. GND

3. RC

4. LED2-OUT

5. +3V3-STANDBY

6. LED1-OUT

7. KEBOARD

8. +5V-ON

1308

4P

SIDE I/O

(1152)

D

1304

12P

IR LED PANEL

(1112)

TO

BACKLIGHT

J2

3P

J1

8P

RIGHT SPEAKER

(5213)

LEFT SPEAKER

(5213)

18740_401_091005.eps

091007

2009-Oct-09

Wiring Diagram 42" (P&S styling)

WIRING 42" (P&S)

8319

DANGEROUS

HIGH VOLTAGE

CN2

1. HV1

2. N.C.

Block Diagrams

EN 51PB52.3HU LA 9.

LCD DISPLAY (1004)

LVD S CONN.

51p

8316

DANGEROUS

HIGH VOLTAGE

CN3

1. HV1

2. N.C.

3. HV 1

CN4

11. -Vaudio

10. GNDaudio

9. +Vaudio

8. +12.3V

7. +12.3V

6. +12.3V

5. GND1

4. GND1

3. GND1

2. STBY

1. 3V3 STBY

8302

8G51

8207

8204

8109

8301

KEYBOARD CONTROL

(1114)

TO

BACKLIGHT

MAIN POWER SUPPLY IPB 42 PLHL-T828B B

(1005)

CN1

2. L

1. N

FUSE

CN5

8. GND

7. BOOST

6. DIM

5. BL_ON_OFF

4. GND1

3. GND1

2. +12.3V

1. +12.3V

INLET

SSB

B

(1150)

1N30 (B08B)

4. GND

3. USB20-2-DP

2. USB20-2-DM

1. OUTB

1E90 (B07B)

12. SIDEIO-DETECT

11. AUDIO-HDPH-R-AP

10. AUDIO-HDPH-L-AP

9. GND

8. FRONT-AIN5-R

7. AUDIO MUTE

6. FRONT-AIN5-L

5. GND

4. FRONT_C

3. GND

2. FRONT_Y_CVBS

1. GND

Board Level Repair

Component Level Repair Only For Authorized Workshop

1. LEFT +

1D12 (B05A)

2. GNDSND

3. GNDSND

4. RIGHT -

T

1. +3V3-STANDBY

2. SATANDBYn

3. GND

4. GND

1U00 (B01A)

1C01 (B02A)

8. SCL-SSB-MUX2

1T12 (T01A)

8p

TUNER BOARD

TUNER

5. GND

6. +12V

7. SDA-SSB-MUX2

6. +1V2

7. +12V

5. +1V2

8T02

8. +12V

4. GND

1B28 (B13A)

1. +12VTCON

9. +AUDIO-POWER

10. GND

11. -AUDIO-POWER

3. +3V3

2. GND

1. +12V

2. +12VTCON

8T01

20p

1T13 (T01A)

1T11 (T01A)

1C02 (B02A)

5. IF-N

4. GND

8T03

3. IF-P

2. GND

1. CVBS-BO

5p

8. GND

3. GND

4. GND

5. LAMP-ON-OUT

6. BACKLIGHT-OUT

7. BACKLIGHT-BOOST

1C00 (B02A)

20. GND

19. GND

18. RESET-SYSTEM-DETECT

17. GND

16. SDA-SSB

15. SCL-SSB

14. GND

13. TUN-FE-ERR . .

1. TUN-FE-DATA7

1. SDA-I2C4-DISP

1G50 (B10A)

2. SCL-I2C4-DISP..

38. VDISP

39. VDISP

40. VDISP

41. VDISP

1. LIGHT-SENSOR

1N51 (B08C)

2. GND

3. RC

4. LED2-OUT

5. +3V3-STANDBY

6. LED1-OUT

7. KEBOARD

8. +5V-ON

1309

4P

SIDE I/O

(1152)

D

1304

12P

IR LED PANEL

(1112)

8308

TO

BACKLIGHT

J2

3P

J1

8P

RIGHT SPEAKER

(5313)

LEFT SPEAKER

(5313)

18740_402_091005.eps

091005

2009-Oct-09

Block Diagram Video

VIDEO

MAIN TUNER

T01B

1T04 TD1736F/FHFXP

TUNER

VTU

CHANNNEL DECODER

T01A

MAIN

9

IF-OUT

ERF-GAIN

4-MHZ

FM-TRAP

V2

B06B

CONNECTOR

HDMI 2

HDMI 3

HDMI 1

11

IF-OUT

3

8

4

7T56

HDMI

1JA0

1

3

4

1

6

7

9 10

12

18 2

19

13

15

16

19

1JB0

1

3

4

1

6

7

9 10

12

18 2

19

13

15

16

19

1J40

1

3

4

1

6

7

9 10

12

18 2

19

13

15

16

19

1T06

1

SAW 45M75

1T55

1

SAW 44MHz

TUN-AGC

4-MHz

FM-TRAP-SWITCH

ARX2+

ARX2-

ARX1+

ARX1-

ARX0+

ARX0-

ARXC+

ARXC-

ARX-DCC-SCL ARX-DCC-SDA

ARX-HOTPLUG

BRX2+

BRX2-

BRX1+

BRX1-

BRX0+

BRX0-

BRXC+

BRXC-

BRX-DCC-SCL BRX-DCC-SDA

BRX-HOTPLUG

CRX2+

CRX2-

CRX1+

CRX1-

CRX0+

CRX0-

CRXC+

CRXC-

CRX-DCC-SCL CRX-DCC-SDA

CRX-HOTPLUG

5

4

5

4

7JA2

7JB2

7J42

TDA-IF-AGC

CEC-HDMI

HOT-PLUG

CEC-HDMI

HOT-PLUG

CEC-HDMI

HOT-PLUG

IF-FILTP1

IF-FILTN1

IF-FILTP3

IF-FILTN3

IF-OUT

1T69

54M

(CONTROL)

B03B

B03G

B03B

B03G

B03B

B03G

7T57 TDA9897HL/V2

7

IF1-B

6

IF1-A

PROCESSING

3

IF3-A

4

IF3-B

10

IF2-B

47

TAG C

46

FREF

36

AGC-DIN

7T18 TDA10060HL

142

AGCT_CTL

115

GPIO-2

21

XTAL-P

20

XTAL-N

33

CVBS

IF

26

OUT1-A

27

OUT1-B

16

MPP-2

141

AGCT-CTL

3

GPIO-0

8

IF-N

7

IF-P

DTV

RECEIVER

DATA

40

I2C ADDRESS = 4A (WRITE)

B11H

CVBS-BO

B06C

HDMI SWITCH

ARX2+

ARX2-

ARX1+

ARX1-

ARX0+

ARX0-

ARXC+

ARXC-

BRX2+

BRX2-

BRX1+

BRX1-

BRX0+

BRX0-

BRXC+

BRXC-

CRX2+

CRX2-

CRX1+

CRX1-

CRX0+

CRX0-

CRXC+

CRXC-

74

73

71

70

68

67

65

64 12

11

62

61

59

58

56

55

53

52

Block Diagrams

B02A

7T59

EF

CVBS-BO CVBS-BO

3T59

TDA-IF-IN-N

TDA-IF-IN-P

TUN-AGC-MON

7T06

7J00 AD8191ASTZ

9

8

6

5

3

2

TDA-IF-IN-N

TDA-IF-IN-P

TUN-FE-DATA(0-7) FE-DATA(0-7)

RESET-SYS-DETECT

7AD1 SAA7113H/V2

4

9-BIT VIDEO INPUT PROCESSOR

24

23

21

20

HDMI

SWITCH

18

17

15 14

34

OP0

33

ON0

37

OP1

36

ON1

40

OP2

39

ON2

43

OP3

42

ON3

44

IF-N

3T58

IF-P

DVID(0-7)

B11C

7AA1

7AA2

DDR SDRAM 16Mx16

DRX2+

DRX2-

DRX1+

DRX1-

DRX0+

DRX0-

DRXC+

DRXC-

VIDEO EXTERNALS

B07C

CONNECTOR

ANALOGUE EXTERNALS

B07A

PR

PB

CV1

1T11

1

5

3

1T13 1C00

DRAM STI7100

1002-2

10

15

5

1

6

11

VGA

1E30

Y

LMI-D

LMI-A

13

14

R33

R34

T33

T34

U33

U34

P33

P34

1

2

3

1C02 1

5

3

1

13

18

B11A

TUN-FE-DATA(0-7)

B03C

(CONTROL)

7A00 ST-7101BWC

DIGITAL

INTERFACE

B11C B11B

AV

B11D

INTERFACE

RESET-SYS-DETECT

7005

1

5

PRO: IDIOM

7B01 LGDT1129

CONTROL

CONTROL STI7100

FE-DATA(0-7)

B11B

EMI-D

EMI-A

RXC+

RXC-

RX0+

RX0-

RX1+

RX1-

RX2+

RX2-

B03C

(CONTROL)

VGA_R

VGA_G

VGA_B

ITV-VGA-H

4

ITV-VGA-V

8

CVI-PR

CVI-PB

CVI-Y

IF-N

IF-P

7A50 M29W640

FLASH

EEPROM

8Mx8

4Mx16

B03

M1

M2

A10

A9

B7

B6 A8

A7

B9 B8

K4

G2

R2

F3

T4

K3

R1

G1

7H00 PNX8541E

B03H

J3

B09A

PC_R

PC_G

PC_B

HSYNC_IN

VSYNC_IN

EN 52PB52.3HU LA 9.

PNX8541

ANALOGUE AV

VIDEO STREAMS

SWITCH/

ADC/MUX/SRC

VIDEO STREAMS

HDMI

PNX8541

MSP VMPG MPEG

DEMUX

AND

DECODING

VIDEC, 3D COMB AND VBI

CAPTURING

MAIN

VIDEO OUT

VIDEO LAYER

GFX LAYER

STILL

MPEG/PC

CPIPE-TV

GFX OSD

LAYER

MBVP-TV SNR/TNR

EDDI

HV SCALER

MEMORY

CONTROLLER

DIGITAL

B09B

VIDEO OUT/LVDS

VID_OUT_TTL

LVD S

CONTROL

B03D

PCI XIO

SDRAM

B03E

DDR

B09B

AG15

AH15

AJ21

AK21

AJ22

AK22

AG22

AH22

AJ23

AK23

AG23

AH23

AJ24

AK24

B03F

PCI --> NAND

B03E

DDR2-D(0-15)

DDR2-A(0-12)

PNX8541: DIGITAL VIDEO OUT/LVDS

10 BIT YUV

DV-xx_Y(0-9)

DV-xx_UV(0-9)

DV-HS

DV-VS

TX8535oA-

TX8535oA+

TX8535oB-

TX8535oB+

TX8535oC-

TX8535oC+

TX8535oCLK-

TX8535oCLK+

TX8535oD-

TX8535oD+

TX8535oE-

TX8535oE+

PNX8541: FLASH

7HA0 NAND512W3A2CN6E

NAND

FLASH

512Mx8

PNX 8541: SDRAM

7HG0 EDE2516ACSE

(0-12)

7HG1 EDE2516ACSE

(16-31)

DDR2

SDRAM

8Mx16x4

DDR2

SDRAM

8Mx16x4

FPGA 1080p: I/0 BANKS

B09E

7F90 EP2C5F256C7N

CYCLONE II

FPGA 1080P

D13

D15

FPGA 1080p: INTERFACE

B09C

9F35-9F46

A7

B7

D6

C6

B6

A6

TXFPGAeCLK+_G0

B5

TXFPGAeCLK-_G1

A5

B4

A4

B3

A3

B14

A14

C13

C12

B13

A13

TXFPGAoCLK+_B3

B12

TXFPGAoCLK-_B2

A12

D11

D10

B10

A10

TXFPGAeA-_G7

TXFPGAeA+_G6

TXFPGAeB-_G5

TXFPGAeB+_G4

TXFPGAeC-_G3

TXFPGAeC+_G2

TXFPGAeD-_R9

TXFPGAeD+_R8

TXFPGAeE-_R7

TXFPGAeE+_R6

TXFPGAoA-_B9

TXFPGAoA+_B8

TXFPGAoB-_B7

TXFPGAoB+_B6

TXFPGAoC-_B5

TXFPGAoC+_B4

TXFPGAoD-_B1

TXFPGAoD+_B0

TXFPGAoE-_G9

TXFPGAoE+_G8

RxP3eA-_G7

RxP3eA+_G6

RxP3eB-_G5

RxP3eB+_G4

RxP3eC-_G3

RxP3eC+_G2

RxP3eCLK+_G0

RxP3eCLK-_G1

RxP3eD-_R9

RxP3eD+_R8

RxP3eE-_R7

RxP3eE+_R6

RxP3oA-_B9

RxP3oA+_B8

RxP3oB-_B7

RxP3oB+_B6

RxP3oC-_B5

RxP3oC+_B4

RxP3oCLK+_B3

RxP3oCLK-_B2

RxP3oD-_B1

RxP3oD+_B0

RxP3oE-_G9

RxP3oE+_G8

ONLY FOR 1080P SETS

FPGA BY-PASS

PACIFIC 3

B10C

7GE2 T6TF4HFG

28

29

31

32

34

35

38

39

PACIFIC3

40

ENHANCEMENT

41

44

45

9

10

13

14

15

16

19

20

22

23

25

26

PICTURE

PACIFIC 3: LVDS

B10A

DUAL LVDS ONLY1080P ONLY

75

TXEA-

74

TXEA+

78

TXEB-

77

TXEB+

TXEC-

81

TXEC+

80

TXECLK-

84

TXECLK+

83

TXED-

87

TXED+

86

90

TXEE-

89

TXEE+

93

TXOA-

92

TXOA+

96

TXOB-

95

TXOB+

99

TXOC-

98

TXOC+

101

TXOCLK-

100

TXOCLK+

103

TXOD-_

102

TXOD+

107

TXOE-

106

TXOE+

7GE1 M25P05

512K

FLASH

5G00

5G01

5G02

5G03

5G04

5G05

5G06

5G07

5G08

5G09

5G10

5G11

1G50

32

31

30

29

28

27

25

24

22

21

20

19

CONNECTOR

17

16

15

14

13

12

10

9

7

6

5

4

LVDS

TO DISPLAY

D

VIDEO

S VIDEO

SIDE I/O

5

1302

1301

AV1

SIDE I/O

B07B

1E90

1304

2

1

3

4

2

FRONT_Y-CVBS

FRONT_C_IN

2

4

1E10

AV1-CVBS

FRONT_Y-CVBS

FRONT_C

J1

J2

P2

18730_404_090923.eps

091005

2009-Oct-09

Block Diagram Audio

AUDIO

MAIN TUNER

T01B

1T04 TD1736F/FHFXP

TUNER

VTU

CHANNNEL DECODER

T01A

HDMI

B06B

1

18 2

19

HDMI 2

CONNECTOR

1

18 2

19

HDMI 3

CONNECTOR

1

18 2

19

HDMI 1

CONNECTOR

MAIN

9

IF-OUT

ERF-GAIN

4-MHZ

FM-TRAP

V2

1JA0

10

12

13

15

16

19

1JB0

10

12 13

15

16

19

1J40

10

12

13

15

16

19

11

3

8

4

1

ARX2+

3

ARX2-

4

ARX1+

6

ARX1-

7

ARX0+

9

ARX0-

ARXC+

ARXC-

ARX-HOTPLUG

1

BRX2+

3

BRX2-

4

BRX1+

6

BRX1-

7

BRX0+

9

BRX0-

BRXC+

BRXC-

BRX-HOTPLUG

1

CRX2+

3

CRX2-

4

CRX1+

6

CRX1-

7

CRX0+

9

CRX0-

CRXC+

CRXC-

CRX-HOTPLUG

D

IF-OUT

7T56

ARX-DCC-SCL ARX-DCC-SDA

BRX-DCC-SCL BRX-DCC-SDA

CRX-DCC-SCL CRX-DCC-SDA

SIDE I/0

1T06

1

SAW 45M75

1T55

1

SAW 44MHz

TUN-AGC

4-MHz

FM-TRAP-SWITCH

CEC-HDMI

7JA2

HOT-PLUG

CEC-HDMI

7JB2

HOT-PLUG

CEC-HDMI

7J42

HOT-PLUG

4

5

4

5

B03B

(CONTROL)

B03G

(CONTROL)

B03B

(CONTROL)

B03G

(CONTROL)

B03B

(CONTROL)

B03G

(CONTROL)

IF-FILTP1

IF-FILTN1

IF-FILTP3

IF-FILTN3

IF-OUT

TDA-IF-AGC

1T69

54M

ARX2+

ARX2-

ARX1+

ARX1-

ARX0+

ARX0-

ARXC+

ARXCBRX2+

BRX2-

BRX1+

BRX1-

BRX0+

BRX0-

BRXC+

BRXC-

CRX2+

CRX2-

CRX1+

CRX1-

CRX0+

CRX0-

CRXC+

CRXC-

7T57 TDA9897HL/V2

7

IF1-B

6

IF1-A

PROCESSING

3

IF3-A

4

IF3-B

10

IF2-B

47

TAG C

46

FREF

36

AGC-DIN

7T18 TDA10060HL

142

AGCT_CTL

115

GPIO-2

21

XTAL-P

20

XTAL-N

33

CVBS

IF

26

OUT1-A

27

OUT1-B

16

MPP-2

141

AGCT-CTL

3

GPIO-0

8

IF-N

7

IF-P

DTV

RECEIVER

DATA

40

I2C ADDRESS = 4A (WRITE)

B11H

CVBS-BO

B06C

HDMI SWITCH

7J00 AD8191ASTZ

74

73

71

HDMI

70

SWITCH

68

67

65

64 12

11

9

8

6

5

3

2

62

61

59

58

56

55

53

52

ANALOGUE EXTERNALS

B07A

SIDE I/O

B07B

Block Diagrams

B02A

7T59

EF

CVBS-BO CVBS-BO

3T59

TDA-IF-IN-N

TDA-IF-IN-P

TUN-AGC-MON

7T06

24

23

21

20

18

17

15 14

34

OP0

33

ON0

37

OP1

36

ON1

40

OP2

39

ON2

43

OP3

42

ON3

44

TDA-IF-IN-N

TDA-IF-IN-P

TUN-FE-DATA(0-7) FE-DATA(0-7)

RESET-SYS-DETECT

7AD1 SAA7113H/V2

4

9-BIT VIDEO INPUT PROCESSOR

AUDIO IN

AV1

L+R

AUDIO IN

L+R

AV3

+

DIGITAL

AUDIO OUT

3T58

1E10

1E30

IF-N

IF-P

DVID(0-7)

B11C

7AA1

7AA2

DDR

SDRAM

16Mx16

DRX2+

DRX2-

DRX1+

DRX1-

DRX0+

DRX0-

DRXC+

DRXC-

RESET-SYS-DETECT

1C02

1T11

1

5

3

1T13 1C00

1

TUN-FE-DATA(0-7)

13

18

B03C

(CONTROL)

B11A

7A00 STI7101BWC

DRAM STI7100

AUDIO-IN1-L

AUDIO-IN1-R

CVI-AIN3-L

CVI-AIN3-R

DIGITAL

INTERFACE

B11C B11B

LMI-D

LMI-A

B11D

P33

P34

R33

R34

T33

T34

U33

U34

SPI-OUT SPDIF-OUT

PRO: IDIOM

7B01 LGDT1129

CONTROL

CONTROL STI7100

FE-DATA(0-7)

B11B

EMI-D

EMI-A

AV INTERFACE

RXC+

RXC-

RX0+

RX0-

RX1+

RX1-

RX2+

RX2-

B03C

(CONTROL)

SPDIF

B06A

7J50

1

4

&

2

IF-N

IF-P

FLASH

7A50 M29W640

EEPROM

8Mx8

4Mx16

B03

A10

AJ6

AK6

AH5

AJ5

AJ15

EN 53PB52.3HU LA 9.

7H00 PNX8541E

J3

M1

M2

A9

B7

B6 A8

A7

B9 B8

PNX8541

B03H

B09A

B03G

ANALOGUE AV

VIDEO STREAMS

HDMI

AUDIO

PNX8541

SPDIF DECODING,

MULTICHANNEL,

DOWNMIX AND SRC

ADC

SPDIF OUT

DELAYED

DEMDEC

MEMORY

CONTROL

B09B

B03B

CONTROL

B03D

PCI XIO

SDRAM

B03E

DDR

AUDIO

B03G

EPICS

DIGITAL VIDEO OUT / LVDS

STANDBY CONTROLLER

DAC

AJ13

AK12

AH16

V4

AH11

AH10

AJ10

AK9

B03F

PCI --> NAND

B03E

DDR2-D(0-15)

DDR2-A(0-12)

(16-31)

B03G

ADAC(1)

ADAC(2)

ADAC(3)

ADAC(4)

ADAC(5)

ADAC(6)

PNX8541: FLASH

7HA0 NAND512W3A2BN6E

NAND

FLASH

512Mx8

PNX8541: SDRAM

7HG0 EDE2516ACSE

(0-12)

PNX8541: AUDI O

DDR

SDRAM 1

8Mx16x4

7HG1 EDE2516ACSE

DDR

SDRAM 2

8Mx16x4

9HM1

9HM2

AUDIO LEFT / RIGHT

B05A

+AUDIO-L

-AUDIO-R

PNX8541: STANDBY CONTROLLER

B03B

B05C

B12A

DV-B3_AUDIO-MUTE

PNX8541: AUDIO

7HV1

A-PLOP-HDPH

IBOARD

LED2-3V3

B03B

MUTE_iB

B12B

AUDIO-RESET

7HV0 TPA4411RTJ

14

18

13

15

7D10 TDA8932BTW

2

14

AUDIO-RESET

HEADPHONE

DRIVER

7100

CLASS D

POWER

AMPLIFIER

9

11

27

22

5

B07B

7111 TDA1517ATW/N1

3

IN1+

18

IN2-

17

MODE

5D12 5D16

5D13 5D17

MUTE

6HW0

6HW1

SIDE I/O

AUDIO-HDPH-L-AP

AUDIO-HDPH-R-AP

OUT1A

OUT1B

POWER

AMPLIFIER

8

9

(CONTROL)

DC-DETECTION

7D13

AUDIO-MUTE

1E90 1304

10

11

7

B12B

5124

D

10

11

7

PEND_IR

5121

Only for HealthCare

LEFT+

RIGHT-

AUDIO-PROT

STANDBY

SIDE I/O

HEAD_PH_L

HEAD_PH_R

FRONT-DETECT

GALVANIC

SEPARATION

4120

B01A

B01B

1303

2

3

4

1

Only for HealthCare

1122-1

5

6

4

1D12

1

2

3

4

Speaker L

Speaker R

HEADPHONE

EXTERNAL

LOUDSPEAKER

AUDIO IN

L+R

1302

L_FRONT_IN

R_FRONT_IN

1304 1E90

(OPTIONAL)

6

8

FRONT-AIN5-L

FRONT-AIN5-R

AJ4

AK4

18730_405_090923.eps

091005

2009-Oct-09

Block Diagram Control & Clock Signals

CONTROL + CLOCK SIGNALS

RESET-ST7101

CPU-27MHZ

27MHZ-3V3

27M

1308

1

2

3

4

1B28

1

2

3

4

5

6

7

8

B11A

LMI-D(0-31)

LMI-A(0-12)

LMI-CLK LMI-CLKnot

LMI-CLKEN

B11C

DRAM STI7100

7AA1 EDD2516AETA

7AA2 EDD2516AETA

DDR

SDRAM

16Mx16

Only for MPEG4

B03B

7A10-3

1

7A12

D

SIDE I/O

4 3 21

USB 2.0

CONNECTOR

B13A

SUPPLY

TO POWER SUPPLY

B09D

FPGA 1080P: POW + CONTR

B08C

IR LED

CONTROL STI7100

7A00 ST-7101BWC

DRAM

B11C

STI7100

U1

U2

Y5

D19

C1

E27

+12VTCON

LAMP-ON-OUT

BACKLIGHT-OUT

BACKLIGHT-BOOST

B11B

B11D

FLASH

AV

B11B

FLASH

DVID(0-7)

FE-DATA(0-7)

AF5 17

WP-FLASH-ST

AH30

EMI-D(0-15)

EMI-A(1-22)

DRX

1309 1N30

1

2

3

4

B10B

DIGITAL

AUDIO/VIDEO

B08B

1

2

3

4

B03G

CLK_REF

7A50 M29W640F

FLASH EPROM

8Mx8

4Mx16

USB 2.0

B11H

7AD1 SAA7113H/V2

VIDEO INPUT PROCESSOR

B12A

(AUDIO)

B09E

7N30 RYC8620

5

OUTB

7FA3 EPCS1SI8N

SCD

Block Diagrams

I2C ADDRESS 4A (WRITE)

31

9-BIT

IR/LED PANEL

PEND_IR

1

2

3

4

DCLK

6

DATA0

2

TO

32

RC

B08A

B03C

B09E

1N51

8

7

6

5

4

3

2

1

B12B

IBOARD

RJ12

SMARTPLUG

1AD1

24M576

B12A

(AUDIO)

B08C

B12A

7262

7269

&

7261

USB 2.0

USB20-2-DM USB20-2-DP

USB20-PWE1

USB20-OC1

USB20-OC2

USB20-PWE2

PCI-CLK-USB20

RESET-SYS-DETECT

FPGA 1080P: I/O BANKS

7F90 EP2C5F256C7N

H4

CYCLONE II

F1

1080P FPGA

+5V-ON

LED1-OUT

+3V3_STANDBY+3V3_STANDBY

LED2-OUT

EN 54PB52.3HU LA 9.

1250

1

SPI_CLK_RJ

2

IR-IN_DATA_IN_RXD_SDA1_RJ IR-IN_DATA_IN_RXD_SDA1_IB

3

4

SPI_DATA_OUT_RJ

5

GND

6

IR_OUT

7220 UPSD3354DV

52

LN_PWR

51

MUTE_iB

MCU

IR-out-iB

RC_IN_MICRO

90

92

79

78

87

88

7

5

B04E

J2

H16

E14

N9

H2

IR-out-iB

49

LED1-OUT

LED2-OUT POR

TV-POR

IR_OUT

7N00 ISP1564HL

RC

1

28

44

40

26

25

PCI

HOST

CONTROLLER

PCI-CLK-PNX5050_CLK-MOP

DV-CLK

DV-CLK-PLL

KEYBOARD

B12B

LIGHT-SENSOR

75

1N01

74

4

9

8

42AA

42AB

43

46

48

34

35

31

1205

32

B12A

B12B

12M

B03D

B03B

+3V3-STANDBY

B03C

SPI_CLK_IB

42AB

SPI_DATA_OUT_IB

7208

IR-IN_DATA_IN_RXD_SDA1_IB

SPI_DATA_OUT_IB

SPI_CLK_IB

LED1-3V3

LED2-3V3

24M

IBOARD

POR

TV_POR

PNX8541: CONTROL

PCI-AD(0-31)

PCI-GNT-USB20

PNX 8541: STANDBY CONTROLLER

7HD0 NCP303LSN

RST

2

IN

3

GND

B03B

B06B

B03C

B03B

B12B

DETECT-1V2-2V5-3V3

RESET-SYS-DETECT

CTRL3-STBY_POWER-OK-DISP

LED1-3V3

LED2-3V3

B03B

CONTROL

PCI-REQ-USB20

1

RESET-STBY

DETECT-5V-12V

LIGHT-SENSOR

F103

I103

POWER

ON RESET

CEC-HDMI

KEYBOARD

B03

PNX85xx

7H00 PNX8541E

D10

VIDEO STREAMS

B03G

HOT-PLUG

AK17

RC

B06B

E22 E20

AA3

W1

AB2

AB4

AC3

Y3

AF4

AA1

AA2

AF3

B03E

B03D

B12B

B03D

B03B

B09B

U5

PNX85xx

SDRAM

CONTROL

IBOARD

B03C

B09B

B03H

CONTROL

POWER

DIGITAL VIDEO OUT/LVDS

CONTROL

STANDBY CONTROLLER

DIGITAL VIDEO OUT/LVDS

B02A

PRO: IDIOM

C5

D5 C4

B03E

DDR2-D(0-31)

DDR2-A(0-12)

N28

DDR2-CLK_P

DDR2-CLK_N

N29

B03D

A11

B11

A21

B03C

PCI-CLK-OUT

AK26

AJ26

IRQ-PCI

T3

T2

U4

AC1

AE2

V5

V25

Y4

AG1

1HF0

AG2

AD1

AE4

AE3 AD4

AE1

CTRL2-STBY_BACKLIGHT-CTRL_RESET-P3

AD3

AD2

W2

AC4

V4

AH16

W3

U1

U3

V3

FE-CLK

FE-VALID

FE-SOP

RESET-PI

B03B

PNX 8541: SDRAM

7HG0 EDE2516ACSE

7HG1

EDE2516ACSE

M8

N8

PNX 8541: CONTROL

PCI-CLK-PNX8535

PNX 85xx: CONTROL

3HF2

3HF5

3HF4

RESET-NVM_WP-NANDFLASH

SDM

SPI-PROG

CTRL1-STBY_LAMP-ON

SENSE+1V2-PNX8541

CTRL4-STBY_SELECT-PWM-ANA

27M

SPI-CLK

SPI-WP

SPI-CSB SPI-SDO

SPI-SDI

CTRL5-STBY_BACKLIGHT-BOOST

DV-B3_AUDIO-MUTE

7B01 LGDT1129

FE-DATA(0-7) TUN-FE-DATA

R11

R8 R9

B2

1C04

CONTROL

G1

H1

B9

B8

SDRAM

PCI-AD(24-31) --> NAND-AD(0-7)

PCI-CLK-PNX8535

PCI-CLK-PNX5050_CLK-MOP

PCI-CLK-USB20

RESET-SYS-DETECT

CTRL1-MIPS_LCD-PWR-ON

9H01

SDM

9H03

SPI-PROG

B01B

B01A

B03B

BACKLIGHT-CONTROL

7H02 M25P05-AVMN6P

6

512K

3

FLASH

1 5

2

RESET-PI

RESET-ST7101

AUDIO-RESET

ON-MODE

ENABLE-3V3

ENABLE-1V2

UART-SWITCH

B10B

B02A

B11A

AUDIO-MUTE

B05A

B01B

B01A

B01C

B01A

B03B

1C00 1T13

1

8

10

11

12

18

B09E

B08A

B08A B03B

B10B

CTRL4-P3

B05C

AUDI O

B05B

T01A

CHANNEL DECODER

1

8

10

11

12

RESET-SYS-DETECT

18

T01B

MAIN TUNER

1T04 TD1736F/FHFXP

TUNER

B03F

7HA3

B06C

B03B

7HC4

B10B

7G58 7G59

CONTROL

7G54 7G55

CONTROL

B10C

7GE2 T6TF4HFG

178

168

172

7T18 TDA10060HL

TUN-FE-CLK

TUN-FE-SOP

TUN-FE-VALID

PNX 8541: FLASH

XIO-SEL-NAND

56

DVB- T

57

CHANNEL DECODER

63

41

7T57

8 46

4-MHz

XIO-ACK

RESET-NVM_WP-NANDFLASH-INV

TDA9898HL

PROCESSING

7HA0 NAND512W3A2CN6E

NAND

FLASH

7

(512Mx8)

9

21

20

IF

HDMI SWITCH

7J00 AD8197AASTZ

RESET-SYS-DETECT

44

HDMI

SWITCH

PNX 8541: STANDBY CONTROLLER

7HC3 M24C64-WDW6P

8

EEPROM

(8Kx8)

PACIFIC 3: D ISPLAY-INTERFACING

BACKLIGHT-OUT

+12VTCON

VDISP

B09A

PACIFIC 3

RxP3CLK

7

B05C

PACIFIC 3

7GE1 M25P05-AVMN6P

6191

188 194 192 193

164

165

3

1 5

2

1GE1

60M

18740_405_091005.eps

512K

FLASH

1T69

19

091007

54M

2009-Oct-09

I2C IC Overview

I²C

PNX8541: CONTROL

B03C

+3V3-PER

Block Diagrams

B06C

HDMI SWITCH

B06B

HDMI

EN 55PB52.3HU LA 9.

B10C

PACIFIC 3

FPGA 1080P: I/O BANKS

B09E

I2C ADDRESS = 4A (WRITE)

B11H

B09A

SUPPLY

I2C3-SDA

I2C3-SCL

B09A

DDC-SDA

DDC-SCL

7H00

PNX8541

ERR

5

I2C1-SCL

I2C2-SDA

I2C2-SCL

B03B

I2CuP-SDA

I2CuP-SCL

STANDBY CONTROL

HDMI

ERR

53

I2C1SDA

RXD

TXD

RXD

TXD

AJ27

AJ28

ERR

3

E10

C9

DEBUG

B11G

1AM0

3

1

UART3

DEVELOPMENT

ONLY

AH27

AK27

AK28

AK29

B03B

AH3

AG4

U4

V3

AB1

AC5

E27

D28

7AM0 ST3232C

RS232

INTERFACE

R1-OUT

R1-IN

T1-OUT

R2-OUT

3HPE

3HPD

3HPG

3HPF

T1-IN

T2-IN

3HPJ

3HPH

12

11

9

10

SDA-SLAVE

SDA3

SCL3

3A11

3A12

SDA1

SCL1

SDA2

SCL2

13

14

PNX8541: STANDBY CONTROLLER

+3V3-STANDBY

3H41

3H38

7H02 M25P05

512K

FLASH

RESET-NVM_WP-NANDFLASH

UART-SWITCH UART-SWITCHn

3H59

3H61

SCL-SLAVE

SDA-2

SCL-2

3H03

RXD-UP

TXD-UP

RXD-MIPS

TXD-MIPS

3H02

B11A

3HPM

CONTROL STI7100

3A11

3A12

RXD_ASC2

AD31

AC30

TXD_ASC2

RXD_ASC3

AA34

TXD_ASC3

AB33

9HP6

9HP5

9HP8

9HP7

+3V3-STANDBY

3H58

3HPK

9A11

AJ31AJ30

ST-7101BWC

MPEG4

3HPQ

3HPT

3HPB

3HPA

3H60

SDA-SSB

SCL-SSB

DDC-SDA

DDC-SCL

CPU-I2C-SDA

CPU-I2C-SCL

9A10

7A00

ERR

38

1HP0

SDA-UP-MIPS

SCL-UP-MIPS

3JA5

3JB6

3JA7

3JB8

SCL-SSB-MUX1

SCL-SSB-MUX2

3C01

PI-SDA

3C00

PI-SCL

10

BIN-5V

3JB5

3JB7

56

7JB1

M24C02

EEPROM

1C01 1T12

1C00 1T13

7JE2 ST3232C

RS232

INTERFACE

T1-OUT

R1-IN

9

R2-OUT

T2-IN

R1-OUT

T1-IN

T2-OUT

R2-IN

UART

LEVEL ADAPTER

CIN-5V

3J45

3J46

3J47

3J48

56

7J41

M24C02

EEPROM

T01A

7

8

5

16

6

15

3JE2

14

3JE3

13

3JE1

12

3JE0

11

7

8

ARX-DDC-SDA

ARX-DDC-SCL

BRX-DDC-SDA

BRX-DDC-SCL

CRX-DDC-SDA

CRX-DDC-SCL

CHANNEL DECODER

SDA-SSB-MUX2

SCL-SSB-MUX2

9T16

9T15

3T38

70 69

7T18

TDA10060HL

DTV

RECEIVER

ERR

37

RSRX

RSTX

RXD0

TXD0

RXD_PC

TXD_PC

3T37

1JA0

16

15

1JB0

16

15

1J40

16

15

3x HDMI

CONNECTOR

MAIN TUNER

T01B

PROCESSING

3J12

3J11

1

18 2

19

1

18 2

19

1

18 2

19

9T51

9T52

SDA-SSB1

SCL-SSB1

3T57

23 24

7T57

TDA9898HL

IF

ERR

26

3F98

3GG2

198 200

7GE2-2

T6TF4AFG

PACIFIC 3

ERR

46

3GG3

3F95

C1 C2

7F90

EP2C5F256C7N

CYCLONE II FPGA 1080P

ERR

28

B12B

3241

UPSD3354DV

(OPTIONAL)

IBOARD

3242

29 30

7220

MCU

B10B

42

48

3205

3T77

3T53

76

1T04

TD1736F/FH

3T56

TUNER

ERR

34

ERR

75

23

24

11

2

3218

56

EEPROM

VIDEO EXTERNALS

B07C

1002-2

10

15

5

12

15

1

6

11

VGA

CONNECTOR

1002-1

10

2

5

3

1

6

IBOARD

B12A

3ADF

3ADG

23 24

7AD1

SAA7113H

VIDEO INPUT PROCESSOR

PACIFIC 3: DISPLAY-INTERFACING

9G53

SDA-I2C4-DISP

9G54

SCL-I2C4-DISP

SDA_I2C

SPI_CLK

3212

5VA

SDA1_iB

SCL1_iB

3280

3281

+3V3A

7280

M24C32

3219

4Kx8

DDC-5V

3008

3010

5002

5003

1122-2

2

3

1

RXD0

TXD0

SDA_VGA

SCL_VGA

RSRX

RSTX

UART

SERVICE

CONNECTOR

B10A

PACIFIC 3: LVD S

7020 M24C02

EEPROM

5

256x8

6

3G25

1G50

3G24

18740_406_091005.eps

091008

1

2

LVD S

COONECTOR

TO DISPLAY

3JA0

3JB0

3J40

PRO: IDIOM

AIN-5V

3JA6

3JA8

56

7JA1

M24C02

EEPROM

SDA-SSB-MUX1

AD30

AD32

9A15

9A14

3J01

89

AD8197AASTZ

90

PDRX-DDC-SDA

PDRX-DDC-SCL

7HP5 PCA9540BDP

2 CHANNEL

I2C

MULTIPLEXER

2

3J00

50 49

7J00

HDMI

SWITCH

ERR

23

4

5

ERR

85

86

93

94

80

81

98

99

11

PARX-DDC-SDA

PARX-DDC-SCL

PBRX-DDC-SDA

PBRX-DDC-SCL

PCRX-DDC-SDA

PCRX-DDC-SCL

3A11

3A12

3JC4

3JC5

+3V3-ANA

3HPS

3HPR

+3V3-STANDBY

3HPZ

3HPX

+3V3-STANDBY

3JA1

3JB1

3J41

B02A

1

3

2

1

ERR

24

3HPW

8

ERR

12

3HPU

7

3HPY

3HPC

SDA-SSB-MUX2

SDA-SSB

SCL-SSB

E14 D14

7B01

LGDT1129

PRO IDIOM

ERR

76

56

7HC3

M24C64

EEPROM

7HC4

(MAIN NVM)

8

SPDIF DEBUG / RS232 INTERFACE

B06A

7HC1

7HC0 74HC4066PW

2

9

3

10

5

12 4

3HC3

1

3HC6

8

RXD

TXD

11

2009-Oct-09

Supply Lines Overview

SUPPLY LINES OVERVIEW

A

MAIN

POWER SUPPLY

SUPPLY

B13A

B01b

B01a

1B28

2

3

4

5

6

7

8

B01A

1U00

2

3

4

5

6

7

9

10

11

5U00

7U00 NCP5422

Dual Out-of-Phase Synchronous

Buck Controller

+1V2-STANDBY

B01B

+3V3-STANDBY

3U91

7U86

+1V2 STAB .

B01C

+12V

B02A

+12V

+3V3

+1V2

DC / DC

PRO: IDIOM

CN5

1 1

2

3

4

5

6

7

8

CN4

1 1

2

3

4

5

6

7

88

9

10

11

1B29

T3A

LAMP-ON-OUT

BACKLIGHT-OUT

BACKLIGHT-BOOST

STANDBYn

7U03

3U01

14

16

7U08

15

7U01

1

7U06

2

5U80 5U81

7U87

7U07

IN OUT

5C00

Block Diagrams

PNX8541: POWER

B03A

+3V3

5HYA

5HY1

5HK3

VDDA-AUDIO

+1V2

+1V8

+1V2-STANDBY

+3V3-STANDBY

PNX8541: STANDBY CONTROLLER

B03B

+2V5

+3V3

+3V3-STANDBY

+5V-ON

+5V-STANDBY

+12V

PNX8541: CONTROL

B03C

+3V3-PER

+3V3-STANDBY

+3V3

PNX8541: CONTROL

B03D

+3V3-PER

PNX8541: SDRAM

B03E

+1V8

PNX8541: FLASH

B03F

+3V3

PNX8541: VIDEO STREAMS

B03G

VDD

VSS

+5V-ON

PNX8541: ANALOGUE AV

B03H

+3V3-PER

+12V

AUDIO LEFT / RIGHT

B05A

+AUDIO-POWER

5D14

-AUDIO-POWER

5D15

+3V3

AUDIO HEADPHONE

B05C

+3V3

3HJ1

3HJ3

5HY4

5HA0

5HM0

5HM1

7HP0

IN OUT

COM

3012

3D14

5D11

3D15

5D10

5HY7

+12VTCON

B10B

+3V3-STANDBY

B01B

+12V

+AUDIO-POWER

-AUDIO-POWER

+12VF

12V/1V2

COVERSION

+1V2

5U02

12V/3V3

COVERSION

+3V3

5U01

7U27

+1V8

5U03

IN OUT

COM

+1V2-STANDBY

+3V3-STANDBY

3U93

6006

COM

+5V-STANDBY

+1V2-STANDBY

+12V

+5V-ON

+12V

+3V3

+3V3-PI

+1V2

1C01

1

3

5

B10b

B01b,B03a,b,c, B05c,B06a,b, B08c,B12a,b

B01c,B02a,B03b,h, B10b,B11f,B12a

B05a

B01a

B03g

B01a

B01b

N.C.

B01a

B01c

B01b

B01a

B03a

B01a

B03a

B01a

B02a,B03a,c

B01a

B02a,B03a,b,c,f,g, B05a,c,B06a,c,B07c, B08a,B09a,d,e,B10b,c, B11a,b,d,e,f,g,h

B03a,e

B05a

B01c

B03b,B12b

B01a

B01a,B3a

B03a

B01a

B03b,g,B06c,B07c, B08b,c,B10b

B01a

TO 1T12

T01A

TUNER

B01a

EN 56PB52.3HU LA 9.

+3V3

+3V3-PER

VDDA-LVDS

RREF-PNX8535

VDDA-AUDIO

VDDA-DAC

VDDA-ADC

+1V2

+1V8

+1V2-STANDBY

+3V3-STANDBY

+2V5

+3V3

+3V3-STANDBY

+5V-ON

+5V-STANDBY

+12V

+3V3-PER

+3V3-STANDBY

+3V3

+1V2+1V2

+3V3-PER

+1V8

DDR2-VREF-CTRL

DDR2-VREF-DDR

+3V3

+3V3-NAND

VDD

AUDIO-VDD

VSS

AUDIO-VEE

+5V-ON

VDDA-AUDIO

+3V3+3V3

+3V3-PER

+12V

+AUDIO-POWER

VDDA

VDD

-AUDIO-POWER

VSSA

VSS

+3V3

+3V3-STANDBY+3V3-STANDBY

B01a

B01c

B01a

B01c

B01a

B01c

B01a

B01c

B01a

B03a

B01a

B09d

B03c,d,j

B03h

B03g

B03a

B03g

SPDIF

SPDIF DEBUG / RS232 INTERFACE

B06A

+3V3

+3V3-STANDBY

HDMI

B06B

1JA0

18

HDMI 2

CONNECTOR

1JB0

6JA3

18

HDMI 3

CONNECTOR

1J40

18

HDMI 1

CONNECTOR

B06C

B07C

B08A

B08B

B08C

B09A

B09B

B09D

B09E

RES

+3V3-STANDBY

HDMI SWITCH

+3V3

5JCA

5JCF

+5V-ON

6J00

3J07

VIDEO EXTERNALS

+3V3

+5V-ON

6006

USB 2.0

+3V3

USB 2.0

+5V-ON

IR LED

+3V3-STANDBY

+5V-ON

VIDEO STEAMS

+3V3

RREF-PNX8535

PNX8541: DIGITAL VIDEO OUT / LVDS

VDDA-LVDS

FPGA 1080P: POWER + CONTROL

+3V3

5FA6

5FA8

7FA4

IN OUT

COM

7FA5

IN OUT

COM

FPGA 1080P: I/O BANKS

+3V3

1V2-PLL

1V2-FPGA

+2V5out-FPGA

+Vin-FPGA

6JB3

6J43

5N57

5FA7

5FB1 5FA2

5FB2

+3V3

+3V3-STANDBY

AIN-5V

BIN-5V

CIN-5V

+5V-CON

+3V3-STANDBY

+3V3

+3V3-DIG

+3V3-ANA

+5V-ON

+5V-CON

+5V-MUX

+3V3

+5V-ON

DDC-5V

+3V3

+5V-ON

+3V3-STANDBY

+5V-ON

5N50

+3V3

RREF-PNX8535

VDDA-LVDS

+3V3

+3V3-FPGA

+Vin-FPGA

+2V5-STAB

+2V5out-FPGA

+1V2-STAB

+1V2-PLL

+1V2-FPGA

+3V3

+3V3-FPGA+3V3-FPGA

1V2-PLL

1V2-FPGA

+2V5out-FPGA

+Vin-FPGA

1N51

DEBUG

B10a

B11e

B11d

B11a,c,e

B11e

B11G

+3V3

I2C ADDRESS = 4A (WRITE)

B11H

+3V3

iBOARD

B12A

+3V3-STANDBY

4121

+12V

+3V3A

iBOARD

B12B

+3V3-STANDBY

5291

+12VIB

+5V-STANDBY

PS-LNA

CHANNEL DECODER

T01A

1T12

1

3

5

+5V-TUNER

MAIN TUNER

T01B

+12V

7T55

IN OUT

COM

+3V3

7T20

IN OUT

COM

1120

250mA

5T55

7116

9T14

IN OUT

7T54

COM

LN_PWR

+3V3-STAN D B Y

PS-LM

PS-LNA

+12VIB

+3V3A

+3V3-STAN D B Y

+3V3A

+12VIB

+5V-STANDBY

PS-LNA

+3V3-ATSC

+2V5-TUN

+5V-TUNER

5T53

18740_407_091005.eps

+3V3

+12V

+3V3

+1V2

+12V

+3V3

B12b

B12a

T01b

V1

T01a

091005

PACIFIC 3: LVDS

B10A

B01a

B12b

B01a

B12a

B01b

B12a

TO 1C01

B02A

SSB

T01b

T01a

IR/LED PAN E L

B09e

VDISP

PACIFIC 3: DISPLAY-INTERFACE

B10B

+12VTCON

7G54

+12V

3GC4

+3V3

+5V-ON

PACIFIC 3

B10C

+3V3

5GE2

6GE76GE6

7GE3

IN OUT

COM

CONTROL STI7100

B11A

+3V3

+2V6-MP4

B11B

+3V3

B11C

+2V6-MP4

B11D

+3V3

+3V3TMDS

B11E

+1V1

+2V6-MP4

+3V3

2V5-LMI

B11F

+3V3

+12V

5A10

FLASH

DRAM STI7100

5AA0

INTERFACE STI7100

POWER STI7100

5AE8

5AE4

5AE7

5AE2

5AE0

SUPPLY

7AKC

IN OUT

COM

7AK1

5AK0 5AK25AK1

IN OUT

COM

7GE5

IN OUT

COM

5G55

5G56

B10b

B13a

B01a

B01c

B01a

B11f

B01a

5

8

B11f

B01a

B11e

B11f

B01a

B11c

B01a

6G51

5GE3

5GE4

5GE5

5GE6

5GE1

5GE0

3AAN

3AAA

VDISP

+12VTCON

VDISP

+12V

+8V2-PAS

+3V3

+5V-ON

+3V3

+3V3-P3

+1V5

+1V5-P3

+1V5-PLL

+1V5-TX

+1V5-RX

+2V5-PF

+2V5-PLL

+2V5-P3

+3V3

+2V6-MP4

V_LVC04

+3V3

+2V6-MP4

2V5-LMI

LMI-VREF

LMI-VREF-ST

+3V3

+3V3TMDS

+1V1

+1VTMDS

+2V6-MP4

VDDE-2V5

+2V5-CLKGENA

+3V3

+3V3TMDS

VDDE-3V3

2V5-LMI

+3V3

+2V6-MP4

+12V

+1V1

2009-Oct-09

Circuit Diagrams and PWB Layouts

10. Circuit Diagrams and PWB Layouts

SSB: DC / DC

EN 57PB52.3HU LA 10.

C

D

G

H

owner.

is prohibited without the written consent of the copyright

owner.

M

IU20 B6 IU21 B5 IU26 C5 IU27 C8 IU28 C4 IU30 C5 IU31 C4 IU32 C2 IU33 C6

1514

152

IU34 C6 IU35 C4 IU36 C5 IU37 C6 IU38 C3 IU39 C4 IU40 C5 IU41 E4 IU43 D6

16

IU44 D1 IU45 D3 IU46 D5 IU47 D10 IU48 D5 IU50 D7 IU51 D11 IU52 D7 IU53 D8

IU54 E6 IU56 E4 IU57 E10 IU58 E3 IU59 E11 IU60 E8 IU61 D4 IU62 E3 IU63 E6

17

IU64 E7 IU67 F87U15-2 E10 IU68 G2 IU90 E8 IU91 D12 IU92 D12 IU93 D12 IU95 C7 IU96 C11

18

18 1917

IU98 D9 IU9A E12 IU9B E12 IU9C E12 IU9G F13

191

12 13 14

32 9

A

B

1B24 B12 1B25 A12 1U00 A11 2B24 B13

2U00 A2 2U01 A5 2U02 A10 2U03 A10

2U04 A5 2U05 B4 2U07 B8 2U08 B8 2U09 B8 2U13 B7 2U15 B6 2U16 C7 2U17 C1

2U18 C5 2U19 C3 2U20 D5 2U21 D9 2U22 D12 2U23 E8 2U24 D8

2U27 E7

1

4

2U28 E7 2U29 E6 2U32 E13 2U33 E12 2U34 G2 2U35 G8 2U36 G2 2U37 G2 2U39 E14

2 3 45

2U40 D8 2U41 E13 2U53 C2 2U90 D9 2U91 D92B25 A13 2U92 D9 2U94 B9 2U97 B1 3B23 B13

5

54

3U00 A2 3U01 A4 3U02 A3 3U03 A5 3U05 B1 3U68 F8 3U06 B5 3U07 B3 3U08 B7 3U12 B1

6

3U14 B3 3U15 B5 3U17 B8 3U19 B6 3U20 B5 3U23 C6 3U24 C8 3U26 C6

3U27 C7 3U28 D2 3U30 D4 3U31 C6 3U32 C4 3U33 C5 3U34 D1 3U35 D3 3U36 D5

6U00 A3 6U04 D7 6U06 E7 6U08 F7 6U10 E4 7U00 B4 7U01 A5 7U03 B6 7U05-1 C2

113

7U05-2 D3 7U06 B5

7U08 C6 7U09 C3 7U10-1 E3 7U10-2 E4 7U13-1 B2 7U13-2 A2

76

3U37 D6 3U38 D1 3U39 D3 3U40 D6 3U41 D11 3U43 D5 3U44 D10 3U45 D7 3U46 D7

81

3U47 E8 3U48 D7 3U49 D4 3U50 D11 3U52 E4 3U55 D8 3U58 E10 3U59 E11 3U60 E3

3U61 E3 3U62 E7 3U63 E8 3U64 E11

3U69 F8 3U70 F11 3U71 F92U26 E7 3U72 D10

3U73 F13 3U74 G1 3U75 G1 3U77 F13 3U78 B1 3UA1 E7 3UA2 D8 3UA3 B8 3UA4 B5

017 20

109

3UA5 C6 3UA6 B5 3UA7 B5 3UA8 B6 3UA9 B5

5U00 A10 5U01 B8 5U02 D8 5U03 E12

12

1211

7U15-1 D113U13 B3

7U27 E13 9U03 G11 FM24 B11 FM25 A11 FM28 B13 FU01 B7 FU02 B3

13

138 16

FU18 B11

FU03 B4

FU19 B11

FU05 D7

FU20 B117U07 E7

FU06 D12 FU07 E12

FU24 B11

FU11 F12

IU00 A11

FU12 F12

IU01 A7

FU15 A11

IU02 A5 IU03 A4

FU16 B11

IU05 A2

FU17 B11

678 9

14

IU06 A1 IU07 B3 IU08 B5 IU11 B2 IU12 B2 IU13 B5 IU16 B6 IU17 B7 IU18 B8

10 11

20

A

B

C

DC / DC

FM25

IU96

GND-SIG

FM24

FU07

FU06

2U22

+3V3

2U33

FU11

0V

FU12

0V

+12VF

+12V

1B25

1B24

+12V

+AUDIO-POWER

-AUDIO-POWER

IU91

6.3V330u

IU92

IU9A

10V330u

IU9B

D

A

2B25

10n

2B24

10n

FM28

3B23

100R

+3V3-STANDBY

STANDBYn

D

E

B

FLF

C

+1V2

IU93

7U27

5U03

10u

2U41

IU9C

LD1117DT18

2

3

OUTIN

COM

1

1u0

2U32

100u 4V

3U73

10R

IU9G

3U77

120R

+1V8

2U39

10u 10V

SENSE+1V2-FPGA

SENSE+1V2-PNX8535

ENABLE-3V3

ENABLE-1V2

D

E

F

G

H

I

J

K

L

G

M

5U00

10u

7U15-2

BC847BS

IU00

1U00

FU15

1

FU16

2

3

FU17

4 5 6

FU18

7

8

FU19

9

10

FU20

11

FU24

GND

IU47

6

10R

3U41

2

7U15-1

BC847BS

IU57

3

5

4

IU51

1

1K0

3U50

IU59

3U59

3K3

2K2

3U64

3U70

1K0

1%

9U03

56

IU01

12V/3V3 CONVERSION

FU01

3U27

6K8

6U04

BAS316

3U45

IU50

68R

3U48

68R 2U26

100n

3UA1

470R

BAS316

3U62

470R

IU64

6U08

PDZ18-B

+1V2

5U01

10u

3n3

6K8

22R

2U08

3U17

3U08

3UA3

IU17

IU18

1n0

100n

2U07

2U13

IU95

IU27

1n0

1K0

3U24

2U16

12V/1V2 CONVERSION

5U02

10u

3n3

6K8

22R

3U55

2U23

IU60

3U63

3U68

GND-SIG

2U24

IU53

100n

1K0

4K7

GND-SIG

3U46

3UA2

IU52

1n0

2U27

IU90

1n0

2U28

25V

22u

2U02

2U03

220u

47u

2U09

2U40

3U47

3U69

22u

2U94

47u

2U21

1u0

IU98

220R

1%

1K0

1%

IU67

3U71

22K

470n

2U35

22u

2U90

22u

10R

2U92

2U91

3U72

3U44

10K

3U58

10K

A

4

7U13-2 BC847BPN

IU06

10K

10u

2U17

GND-SIG

IU44

3U38

3

10K

3U05

IU12

0V

7U13-1 BC847BPN

10K

3U12

100n

7U05-1 BC847BS

6

2

1

RES

33K

E

AUDIO-PROT

3U78

B

F

2U97

C

3U34

33K

10K

100n

2U00

3U00

3U02

5

10K

IU05

6U00

IU07

BAS316

IU11

FU02

3U07

6

100R

2

1

IU32

RES 2U53

100n

3U35

10K

3K3

3U28

3V3

RES 7U09 BC847BW

IU45

3U39

3U13

22K

+1V2

5

SUPPLY-FAULT

10K

3U14

22K

3

7U05-2 BC847BS

4

IU38

NCP5422ADR2G

FU03

IU28

IU31

IU35

IU39

100n

2U19

2U05

GND-SIG

3U32

10R

3U01

2U01

IU03

1u0

3UA4

7U00

14

Φ

VCC

4

BST

H1

GATE

1

2

1

2

ROSC

VFB

COMP

L1

H2

GATE

L2

+1

-1

IS

+2

-2

GND

3

7

10

8

9

39K

D

7U10-1

1

6

IU62

GND-SIG

3U30

IU61

330R

3U49

4

1K0

7U10-2

100K

IU56

5

3

3U52

1K0

IU41

6U10

PDZ9.1-B

BC857BS

2

IU58

3U60

GND-SIG

+1V2-STANDBY

I

E

J

K

L

F

2U34

G

3U74

GND-SIG

1%

3U75

470R

GND-SIG

2U36

100p

4K7

2U37

GND-SIG

BC857BS

3U61

10K

12V UNDER-VOLTAGE DETECTION

100p

IU68

100n

7U01 FDS4488

22u

IU02

22R

3U06

1

IU21

2

IU26

16

15

5 6

1213 11

IU48

56

2U04

3U03

IU08

10R

3n3

7U06

3UA7

FDS4488

22R

10R

IU13

3U15

IU40

IU46

3U43

3K3

56

4R7

3UA6

3U33

6K8

2U20

IU16

4R7

3UA9

22R

3U20

3UA5

22R

4R7

IU30

3U23

IU33

4R7

IU36

3U26

3K3

100n

2U18

IU43

3U36

1K0

3K3

100n

3U40

10R

3U19

10R

IU34

IU37

3U31

DC_BST

3UA8

IU20

7U08

FDS4488

6K8

1u0

2U29

BC817-25W

BOOSTER

7U03 FDS4488

2U15

3n3

56

3U37

6K8

IU54

7U07

FU05

6U06

IU63

N

OIO

P

MULTI 12NC : 3139_283_30162 BD 12NC : 3139_283_30172

1

2

123 4

4

3

4

5

6

5678

7

8

9

106

2009-Oct-09

11

11102

12

9101112

EMANTESNHC

BDS MODULES

PCB SB PB522_LN

SUPERS.

2009-05-15

16

1716

17

43

1312

13

14

CLASS_NO

3PC333

-- -- --

2009-05-15

2009-07-3123

YiPing Guo

NAME

SV

DC398881

1

CHECK DATE

15

15149

13 14

3139 283 3017

C

ROYAL PHILIPS ELECTRONICS N.V. 2009

18

2009-07-31

2

2 2009-07-28

1

13010

191

2019

20

18730_500_090918.eps

A2

090918

N

O

P

SSB: DC / DC

Circuit Diagrams and PWB Layouts

EN 58PB52.3HU LA 10.

1

A

2U60 B4 2U61 B3

B

2 3

2

2U80 B1 2U83 B7

2U84 B4 2U85 B7

123 4

2U86 B8 2U87 C7

3

2U88 C8 2U89 B4

3U81 B1 3U82 B2

4

3U85 B6 3U86 C7

3U87 D7 3U90 B4

5

3U91 A3 3U92 B3

3U93 B3

4U80 C2

6

5U80 A4 5U81 B4

6U80 B4 6U81 B3

7U80 C1 7U81 C2

7

5

7U86 D6 7U87 C8

7U88 C5 FU80 A4

FU81 B4 FU82 B3

FU83 B4 FU84 B4

678

9

910

FU85 C8 FU86 B8

FU87 B5 FU88 C5

1098

10

IU85 C6 IU86 D7

11

12

128

13

1332

138

9

DC / DC

C

A

FU80

3U92

4K7

3U91

47R

3U93

100R

6U81

2U61

BZX384-C5V1

D

owner.

owner.owner.

is prohibited without the written consent of the copyright

E

+3V3-STANDBY

1u0

2U80

10K

RES

3U81

10K

3U82

B

+5V-STANDBY

RES

4U80

STANDBY

STANDBYn

7U81 PDTC114EU

C

F

G G

G

D

ON-MODE

7U80 PDTC114EU

100n

5U80

68u

FU81

2U60

1n0

1K0

3U90

5U81

FU83FU82

6u8

35V

2U89

22u

6U80

FU84

BAS316

220n

2U84

7U88

BC817-25

FU87

FU88

+3V3-STANDBY

5V-DRIVE

7U86 TS431AILT

IU85

3U85

3 1

K

A

5

2K2

1u0

2U85

RES

3U86

2U87

1n0

NCNC

IU86

4

REF

2

FU86

22u

2U83

68K

3U87

1K0

3

1

7U87 BC817-25W

2

10u

2U86

FU85

2U88

1u0

+1V2-STANDBY

A

B

C

D

A

B

C

DAD

D

E

F

G

H

I

J

12

MULTI 12NC : 3139_283_30162

BD 12NC : 3139_283_30172

1

2426

2 11

3 4

3 45 10

3

4

45

56

6

2009-Oct-09

567

CHN

DC398881

CLASS_NO

3PC333

1

-- -- --

2009-05-15

2009-07-31

NAME

SV

7

2

3

YiPing Guo

8

SETNAME

BDS MODULES

PCB SB PB522_LN

SUPERS.

DATECHECK

2009-05-15

98

98 11

9

10

8 9

43

C

11

3139 283 3017

03101

2

ROYAL PHILIPS ELECTRONICS N.V. 2009

123

12 13

H

I

2

2009-07-31

2009-07-282

J

A3

1312

13

18730_501_090918.eps

090918

SSB: DC / DC

Circuit Diagrams and PWB Layouts

EN 59PB52.3HU LA 10.

A

B

C

D

321

4

65

7

8

9

10 11

12 13

A

1

2 3 45

67

8

DC / DC

7U0W

L7805CD2T

1 3

A

+12V

B

5U0A

33R

2U70

10u

2U71

IU22

2U72

3U80

100K

10u

IU23

ST1S10PH

2

OUTIN

COM

2

7U0Z-1

16

A

INH

VIN

SYNC

GND

49

8

7U0Z-2

ST1S10PH

10 11

VIA

SW

7

SW

35

VFB

HSPA

FU52

10u

2U93

1K0

RES

3UC1

1%

4n7

RES 2U73

IU25

3UC2

3U83

100K

1%

18K

2U95

10u

2U96

220u 25V

5U0B

IU24

FU50

2U82

+5V-ON

16V

22u

A

B

1U21 D3 2U70 B2 2U71 B2 2U72 B2 2U73 B5 2U74 C3 2U82 B6 2U93 B5 2U95 B5 2U96 B6

3U80 B3 3U83 B5 3U88 D4 3UC1 B5 3UC2 B5 3UC3 D3

5U0A B2 5U0B B4 7U0W A4 7U0X D3 7U0Z-1 A3 7U0Z-2 B4 FU50 B6 FU51 D6 FU52 B5 IU22 B2 IU23 B3 IU24 B4 IU25 B5

B

C

D

is prohibited without the written consent of the copyright

owner.

E

F

G

H

I

C

D

RES

7U0X

BC847BW

12

100n

2U74

3

2

RES

1U21

3U88

1

33K

RES

3UC3

3 4

FU51

5678

ENABLE-3V3

C

D

E

F

G

H

I

J

MULTI 12NC : 3139_283_30162

BD 12NC : 3139_283_30172

1

2

63 45

2009-Oct-09

DC398881

CLASS_NO

3PC333

-- -- --

2009-05-15

2009-07-31

NAME

SV

7

1

2

3

YiPing Guo

CHECK

8

SETNAMECHN

BDS MODULES

PCB SB PB522_LN

SUPERS.

DATE

2009-05-15

9

10 11 12

2

2009-07-31

2009-07-282

3139 283 3017

03101

43

C

ROYAL PHILIPS ELECTRONICS N.V. 2009

3

J

A3

13

18730_502_090918.eps

090918

SSB: Pro:iDIOM

Circuit Diagrams and PWB Layouts

EN 60PB52.3HU LA 10.

21

A A

A

1C00 A4 1C01 F2 1C02 G2

B

1C04 E3

2C00 G5 2C04 E2 2C10 F7 2C11 F7

2C12 G7 2C13 G7 2C14 G7 2C15 G7

123 4

C

4 165 119 20

4

2C16 G7 2C17 G7 2C18 G7 2C19 H7

2C20 H7 2C21 H7 2C22 H7 2C23 H7

2C24 G3 2C25 G3 2C26 G3

678 91

63 15 16

3C01 C3 3C03 B5 3C04 E3 3C10 E8

3C11 E8 3C12 E9 3C13 E9 3C15 B11

3C16 B11 3C17 B11 3C18 B13 3C19 G11

8 17

3C20 G11 3C21 G13

5C00 F5 5C04 D2

7B01-1 C7 7B01-2 F9 7B01-3 B12 9C01 G3

FC00 C3 FC01 C3 FC02 D5 FC03 D53C00 B3

5678

FC04 F3 FC05 F3 FC06 F3 FC07 H3

10 11 125

FC08 G3 FC09 H3 FC0A H3 FC0B H3

FC0C B3 FC0D C3 FC0E B5 FC0F C5

FC0G C5 FC0H C5 FC0J C5 FC0K C5

FC0L C5 FC0M D5 FC0N D5 FC0P D5

13

FC0Q D5 FC0R D5 IC0E E6 IC0F E6

9 10111213

IC0G D2 IC0H E3 IC0J D8 IC0K D8

141310273 12

14

IC0L D8 IC0M D8 IC0N B12 IC0P B12

15

IC0Q B12 IC0R G12 IC0S G12 IC0T G13

17

18

19 20

19

14

PRO:IDIOM

A

D

TUN-FE-DATA7 TUN-FE-DATA6 TUN-FE-DATA5 TUN-FE-DATA4 TUN-FE-DATA3 TUN-FE-DATA2

FROM

CHANNEL

E

F

B

DECODER

TUN-FE-DATA1 TUN-FE-DATA0

TUN-FE-CLK TUN-FE-SOP TUN-FE-VALID TUN-FE-ERR

FC0C

SCL-SSB SDA-SSB

FC0D

RESET-SYS-DETECT

3C00 3C01

FC00

C

G

H

I

D

E

J

F

K

is prohibited without the written consent of the copyright

owner.

L L

L

M

G

H

ITV ProIdiom

TO TUNER PCB

+3V3

5C04

IC0G

2C04

1C01

910

1C02

3u3

1C04

DSO751SV

1

4

27M0

3

2

+12V

FC04

FC05

FC06

2C24

FC08

RES

9C01

FC0A

FC07

FC09

FC0B

10u

1 2

3

4 5 6 7

8

1 2

3

4 5

1C00 1 2

3

4 5 6 7

8

9

10 11 12 13 14

PI-SCL

15

PI-SDA

16 17 18 19 20

FC01

RESET-PI

IC0H

3C04

47R

+3V3

+1V2

SDA-SSB-MUX2 SCL-SSB-MUX2

2C25

CVBS-AM

CVBS-BO

IF-P

IF-N

100n

2C26

100n

FC0E

FC0F FC0G FC0H FC0J FC0K FC0L FC0M FC0N

FC0P FC0Q FC0R

FC02

FC03

RES

3C03

33R

TUN-FE-DATA7 TUN-FE-DATA6 TUN-FE-DATA5 TUN-FE-DATA4 TUN-FE-DATA3 TUN-FE-DATA2 TUN-FE-DATA1 TUN-FE-DATA0

TUN-FE-SOP TUN-FE-VALID TUN-FE-CLK

+3V3

30R

5C00

+3V3-PI

10u

2C00

FE-ERR

7B01-1

EP2C5F256C7N

Φ

CONTROL

C12

CPT_TS7

C11

CPT_TS6

C10

CPT_TS5

C9

CPT_TS4

C8

CPT_TS3

C7

CPT_TS2

C6

CPT_TS1

C5

CPT_TS0

B9

CPT_TS_SOP

B8

CPT_TP_DV

H1

CPT_TS_CLK

B2

RST

G1

27MHZ

B3

IC0E

SB1OUT

B14

IC0F

SB2OUT

R3

SB2IN

R14

SB1IN

MP_TS7 MP_TS6 MP_TS5 MP_TS4 MP_TS3 MP_TS2 MP_TS1 MP_TS0

MP_TS_SOP

MP_TS_DV

MP_TS_CLK

12C_ADDR0 12C_ADDR1

SIDOK

TRI_EN

2C10

2C11

2C12

2C13

2C14

2C15

2C16

2C17

2C18

2C19

2C20

2C21

2C22

2C23

P12 P11 P10

P9 P8 P7 P6 P5

R9 R8

R11

E14 D14 D15 D16

L5

E5

+3V3-PI

IC0J IC0K IC0L IC0M

3K3

3C10

A3 A7 A10 A14 C1 C16 F7 F10 G6 G8 G10 H7 H9 J8 J10

L10

P16 T3 T7 T10 T12 T14 T16

3.3V

3C11

7B01-2

EP2C5F256C7N

Φ

POWER

3C12

SDA SCL

100n

FE-DATA7 FE-DATA6 FE-DATA5 FE-DATA4 FE-DATA3 FE-DATA2 FE-DATA1 FE-DATA0

TS TO PNX8541

FE-SOP

FE-VALID

FE-CLK

PI-SDA PI-SCL

+3V3-PI

3K3

3C13

A1

A5 A12 A16

F6

F8

F9 F11

G7

G9

G11

GND

H8 H10

J5

J6

J7

J9 J11 J12

K6K7

K8K9 K10K11

L6L7

L8

L9P1 L11

T1

T5

AND ST7101

+3V3-PI

3C16 3K3

3C19 1K0

7B01-3

EP2C5F256C7N

L12 L13 L14 L16 M1 M2 M3 M4 M5 M6 M7 M8 M9 M10 M11 M12 M13 M14 M15 M16 N11 N12 N13 N14 N15 N16

R13 T15 T13 T11 T9 T8 T6 T4 T2 R16 R15 R12 R10 R7 R6 R5 R4 R2 R1 P15 P14 P13 P4 P3 P2 N10 N9 N8 N7 N6 N5 N4 N3 N2 N1 L15 L4 L3 L2 L1 K16 K15 K14 K1 K12 K5 K4 K3 K2 K1 J16 J15 J14 J13 J4

TEST_REQ FLASH_SEL SCAN_EN TEST_MODE FADDR5 FADDR4 FADDR3 FADDR2 FADDR1 FADDR0 FAE F0E FIFREN1 FIFREN2 FNVSTR FPROG FSERA FMASE FMUXENB FTMR FFME FHILO FTM3 FTM2 FTM1 FTM0

NC139 NC138 NC137 NC136 NC135 NC134 NC133 NC132 NC131 NC130 NC129 NC128 NC127 NC126 NC125 NC124 NC123 NC122 NC121 NC120 NC119 NC118 NC117 NC116 NC115 NC114 NC113 NC112 NC111 NC110 NC109 NC108 NC107 NC106 NC105 NC104 NC103 NC102 NC101 NC100 NC99 NC98 NC97

3

NC96 NC95 NC94 NC93 NC92 NC91 NC90 NC89 NC88 NC87 NC86 NC85 NC84

Φ

NC

NC10 NC11 NC12 NC13 NC14 NC15 NC16 NC17 NC18 NC19 NC20 NC21 NC22 NC23 NC24 NC25 NC26 NC27 NC28 NC29 NC30 NC31 NC32 NC33 NC34 NC35 NC36 NC37 NC38 NC39 NC40 NC41 NC42 NC43 NC44 NC45 NC46 NC47 NC48 NC49 NC50 NC51 NC52 NC53 NC54 NC55 NC56 NC57 NC58 NC59 NC60 NC61 NC62 NC63 NC64 NC65 NC66 NC67 NC68 NC69 NC70 NC71 NC72 NC73 NC74 NC75 NC76 NC77 NC78 NC79 NC80 NC81 NC82 NC83

A2

NC0

A4

NC1

A6

NC2

A8

NC3

A9

NC4

A11

NC5

A13

NC6

A15

NC7

B1

NC8

B4

NC9

B5 B6

B7 B10 B11 B12 B13 B15 B16

C2

C3

C4 C13 C14 C15

D1

D2

D3

D4

D5

D6

D7

D8

D9 D10 D11 D12 D13

E1

E2

E3

E4

E6

E7

E8

E9 E10 E11 E12 E13 E15 E16

F1

F2

F3

F4

F5 F12 F13 F14 F15 F16

G2 G3 G4

G5 G12 G13 G14 G15 G16

H2 H3 H4 H5

H6 H11 H12 H13 H14 H15 H16

3C18

1K0

IC0T

3C21

1K0

J1 J2J3

IC0N

3K33C15

IC0P

IC0Q

3K33C17

IC0R IC0S

1K03C20

A

B

C

D

E

F

G

H

A

B

C

D

E

F14F

G

H

I

J

K

L

M

N

123 4

O

P

MULTI 12NC : 3139_283_30162 BD 12NC : 3139_283_30172

1

2 3 4

2

3 456

56

5678

7

8

910

2009-Oct-09

910111213

1110

11 12 13 14

131291

CLASS_NO

NAME

SV

3PC333

-- -- --

2009-05-15

2009-07-31

YiPing Guo

DC398881

1

2

3

15

EMANTESNHC

BDS MODULES

PCB SB PB522_LN

CHECK DATE

SUPERS.

16 17

2009-05-15

N

14

O

2009-07-31

2

2 2009-07-28

3139 283 3017

P

20

A2

43

C

ROYAL PHILIPS ELECTRONICS N.V. 2009

18 198

18

13010

19

4

18730_503_090918.eps

090918

SSB: PNX 85xx: Power

Circuit Diagrams and PWB Layouts

EN 61PB52.3HU LA 10.

A

B

C

D

E

F

G

H

K

owner.

is prohibited without the written consent of the copyright

owner.

is prohibited without the written consent of the copyright

L

M

2HYB G7 2HYC E10 2HYD E10 2HYE E11 2HYF E11

65

2HYG E11 2HYH E11 2HYJ E11 2HYK E12 2HYN E12

2HYP E12 2HYR E12 2HYS C10 2HYT C10 2HYU C11

1

21

2HK0 D6 2HZT F7 2HK1 D6 2HK2 F6 2HK3 F4 2HK4 F5

2HK5 E3 2HK6 F5 2HK7 E4 2HK8 E4 2HK9 E3

2HKA C6 2HKB C6 2HKC D6 2HKD D6 2HY0 B6

4 11

2HY1 B6 2HY2 B6 2HY3 B6 2HY4 H7 2HY5 H7

567

2HY6 A6 2HY7 A6 2HY8 C6 2HY9 C6 2HYA G7

123 45

83

2HYV C11 2HYW C11 2HYY C11 2HYZ C11 2HZ0 C12

108 9

2HZ1 C12 2HZ2 D10 2HZ3 D10 2HZ4 D11 2HZ7 E10

2HZ9 E11

2HZB D3

2HZD D3

2HZF D3

2HZH B3

67

111097

2HZJ G7 2HZN F7 2HZP A3 2HZR A3 2HZS A3

2HZU A3 2HZV C3 5HK0 D5 5HK1 E5

8 9

12

5HK2 F3 5HK3 F3 5HK6 E3 5HKA B5 5HKC D5

5HY0 B5 5HY1 A4 5HY2 H7 5HY3 A5 5HY4 B4

5HY5 C5 5HY6 G7 5HY7 C4 5HY8 F7 5HY9 F7

5HYA D122HZ8 E10 7H00-11 C9 7H00-12 G142HZA G7 CHY1 D10 IHY0 C82HZC D3

10 11

15141312

IHY1 C8 IHY2 D82HZE D3 IHY3 D8 IHY4 D82HZG D4 IHY5 E8

16

1615141343

IHY6 E8 IHY7 E8 IHY8 E8 IHY9 F8 IHYA F8

IHYB F8 IHYC F8 IHYD F4 IHYE D10 IHZ0 A3

12 13

IHZ1 B3 IHZ2 C3 IHZ3 D3

18172

1817

19 20

14

A

B

PNX 8541 : POWER

C

5HY3

+1V2

30R

1u0

100n

2HY7

2HY6

5HY0

+1V2

30R

1u0

2HY2

2HY3

5HKA

+1V2

30R

100n

2HKA

5HY5

+3V3

30R

1u0

2HY9

2HY8

5HKC

+3V3

30R

100n

2HKC

2HKD

5HK0

+1V2

30R

22u

2HK1

2HK0

2HK6

100n

2HK2

100n

2HKB

100n

+3V3-PER

2HY1

100n

2HY0

7H00-11 PNX8535

IHY0

AE7

VDDA-ADC

VDDA-DAC

+1V8

VDDA-LVDS

5HY8

30R

1u0

100n

2HZT

2HZN

5HY9

+1V2

30R

1u0

100n

2HZJ

2HZA

5HY6

+1V2

30R

1u0

100n

2HYA

2HYB

5HY2

30R

1u0

100n

2HY5

2HY4

AE6

AF7

AF8

J5

IHY1

J6 K6

AB27

IHY2

J26

P18 R18 T18 U18

IHY3

G26

IHY4

W27 F27

IHY5

D7

IHY6

C8

E7

IHY7

F7

IHY8

E8

AG24 AH24 AF23

IHY9

AE22

IHYA

AE21

IHYB

P6

IHYC

R6

1V2A AUDIO ADC

ADC

3V3A AUDIO

REF

DAC

1V2A VIDEO ADC

DLL0

1V2A DDR

DLL3

1V8_2V5 DDR

PLL

3V3A DDR

DLL1 DLL2

EQ

1V2A HDMI

PLL

PLLCCO

3V3A HDMI

BIAS

3V3 HDMI

3V3 LVDS

3V3A LVDS

3V3A LVDS PLL

1V2A CAB

3V3A 1.7 MCAB

VDD

1V2 CORE

1V2 SB CORE

3V3 PER

3V3 SB PER

AJ1

AJ25

AH30

W29

Y27

Y26

AH29

V27

AE12 AE13 AE14

F10 F21 F22

F9 U25 V25

W25

AA5 AA6 AB5 AB6

AC26 AC27 AD26

AE17 AE18 AE19

F14 F15 F16 F17 F24 F25

F6 G25

G6

V6

W5 W6

AD25 AG11 AG13

AH1

AH13

E23

NC

E24 K25 K26

Y5

AH2

AG3

AH21

AH26

AH28

AH25

AG29

AG30

VSS

U6

V13

V14

V15

V16

U17

V17

V18

1u0

2HYT

2HYS

CHY1

1u0

2HZ3

2HZ2

IHYE

10u

2HYC

2HYD

1u0

2HZ7

AF26

AF28

AF29

AF30

AF27

AG28

AG25

AG26

AG27

VSSVSS

U13

T29

T5

U15

T25

T26

T6

U14

U16

1u0

100n

2HYV

2HYU

100n

2HZ4

10u

2HYE

100n

2HZ8

AF21

AF22

AF24

AF25

T15

T14

T16

T17

2HYY

2HYW

100n

10u

100n

2HYF

2HYH

2HYG

100n

2HZ9

AE5

AF12

AF13

AE24

AE25

AE28

AE29

AE30

VSS

T13

R13

R14

R15

R16

R25

P25

R17

100n

2HZ0

2HZ1

2HYZ

SENSE+1V2-PNX8535

100n

2HYJ

2HYK

AD6

AD5

AB29

AA26

AB25

AA27

N30

P13

P14

P15

P16

P17

AA25

N27

100n

2HYP

2HYR

2HYN

J25

F26

W26

AB26

VSSA DDR DLL

VSS

N13

N14

N18

K29

M25

N15

N16

N25

N17

+1V2

+1V2-STANDBY

+3V3-PER

5HYA

+3V3

220R

100n

+3V3-STANDBY

F4

F5

E4

H3H4H5N5N6

G5

VSSA VIDEO

E1E2E3

VSSA VIDEO

B1

C1

C2

D1D2D3

AF9

AE9

7H00-12

AE15

AE16

PNX8535

VSSA AUDIO

VSS

G30

H27

H26

K27

VSS

E26

F19

F18

E25

F12

F13

E9

AJ30

AK25

D9

AK30

C28

D27

D8

B29

AJ29

A

D

B

C

E

F

G

D

H

E

I

J

F

K

G

L

M

H

M

2HZB

IHZ0

100n

2HZP

2HZS

2HZR

IHZ1

100n

2HZH

IHZ2

100n

2HZV

IHZ3

1u0

10n

2HZE

2HZC

2HZD

A

B

VDDA-LVDS

VDDA-DAC

VDDA-ADC

C

5HY1

+3V3-PER

220R

1u0

100n

2HZU

5HY4

VDDA-AUDIO

30R

5HY7

VDDA-AUDIO

30R

+1V8

10n

2HZF

2HZG

D

I

J

E

F

+1V2

2HK5

RREF-PNX8535

+3V3-PER

5HK6

30R

6.3V

100n

2HK9

330u

5HK3

120R

5HK2

120R

1u0

100n

2HK7

2HK8

IHYD

2HK3

5HK1

120R

10u

100n

2HK4

G

H

N

1 5678 9 10111213 14

O

P

MULTI 12NC : 3139_283_30162

BD 12NC : 3139_283_30172

2 12 13

2

2 3

311

3 4

4

456

76

7 8 910

98

10 11

2009-Oct-09

11

N

O

DC398881

CLASS_NO

3PC333

1

-- -- --

2009-05-15

2

3

2009-07-31

YiPing Guo

NAME

SV

13125

14 15

1514

SETNAMECHN

BDS MODULES

PCB SB PB522_LN

SUPERS.

DATECHECK

2009-05-15

16

2

3139 283 3017

03101

43

C

ROYAL PHILIPS ELECTRONICS N.V. 2009

17 18 19 20

18 1916 17

5

20

2009-07-31

2009-07-282

O

P

A2

18730_504_090918.eps

090918

Circuit Diagrams and PWB Layouts

SSB: PNX 85xx: Standby Controller

EN 62PB52.3HU LA 10.

A

B

C

D

E

F

G

H

K

is prohibited without the written consent of the copyright

owner.

is prohibited without the written consent of the copyright

owner.

M

N

12

1HB0 G9 1HF0 A4 2H00 B2 2H01 D2 2H05 D9 2H06 D2 2H07 E2 2H08 H12 2H10 A13 2H11 G12

A

+3V3-STANDBY

B

+3V3-STANDBY

C

+3V3-STANDBY

D

I

E

J

F

L

G

H

2

2H90 E12 2H91 F12 2HC0 F8 2HC1 E5 2HD0 B1 2HF0 A4 2HF1 A4

3H00 B11 3H01 B11 3H02 B11

3

3 45 11 12

3H03 B11 3H04 B11 3H05 B11 3H06 B11 3H07 B11 3H08 B11 3H10-1 B1 3H10-2 B1 3H10-3 B1 3H10-4 B1

3H11 C13 3H12 C12 3H16-1 B1 3H16-2 B1 3H16-3 B1 3H16-4 B1 3H18 F11 3H21-1 C1 3H21-2 C1 3H21-3 C1

12

PNX 8541 : STANDBY CONTROLLER

+3V3-STANDBY

4HD0

3HD0

1K2

DV-B3_AUDIO-MUTE

2K2

3HD3

2HD0

100n

3H10-4 3H10-3 3H10-2 3H10-1 10K 3H16-3 3H16-4 3H16-2 3H16-1

3H3910K

3H46 27K

3H51 10K

3H21-4 10K

3H21-1 3H27-4 3H27-3 10K

3H27-1 10K

3H60 10K

3H64

3H69 10K

3H70

SPI-PROG

SDM

RXD

UART-SWITCHn

TXD

UART-SWITCHn

UART-SWITCH

FHD0

IHD0

FHF0

10K 10K 10K

10K 10K 10K 10K

10K3H42

10K3H48

10K3H21-3

10K3H21-2 10K 10K

10K3H27-2

10K3H58

10K

10K3H67

100K

FH00

FH01

7HD0

NCP303LSN10T1

2

IN

3

GND

5

CD

FHC5

FHC6

FHC7

6HW0

BAS316

6HW1

BAS316

RST

NC

2H06

9H03

9H01

2H07

IH15

4

3H21-4 C1 3H22 G11 3H25 F13 3H27-1 C1 3H27-2 C1 3H27-3 C1 3H27-4 C1 3H29 F12 3H32 A11 3H33 G12

+3V3-STANDBY

1

4

2H00 1n0

CTRL4-STBY_SELECT-PWM-ANA

100p

1

7HC1

PDTC114EU

3H35 D5 3H36 E4 3H38 B7 3H39 B1 3H41 B7 3H42 C1 3H43 C5 3H44 B7 3H46 C1 3H47 C5

10K

3HD2

RESET-NVM_WP-NANDFLASH

ENABLE-1V2

REGIMBEAU_CVBS-SWITCH

ENABLE-3V3

CTRL1-STBY_LAMP-ON

AUDIO-RESET

UART-SWITCH

CEC-HDMI

SUPPLY-FAULT

DETECT-1V2-2V5-3V3

DV-B2_DEBUG-BREAK

EJTAG-DETECT

DETECT-5V-12V

CTRL3-STBY_POWER-OK-DISP

RESET-SYS-DETECT

KEYBOARD

2H01

100n

+3V3-STANDBY

100R

3HC3

100R

3HC4

3HC5

100R

3HC6

100R

+3V3-STANDBY

10K

3HC7

3

2

3HW0

47K

AUDIO-MUTEAUDIO-RESET

761

3H70 D1 3H71 D5 3H72 D5 3H73 D5 3H74 D5 3H77 G11 3H78 G13 3H79 H11 3H80 C7 3H81 C9

76

5

3H48 C1 3H49 C5 3H50 B7 3H51 C1

3H52 C5

3H53 B7 3H54 C7 3H56 C7 3H57 B5 3H58 D1

3H59 D5 3H60 D1 3H61 D5 3H63 D5 3H64 D1 3H65 D5 3H66 D5 3H67 D1 3H68 D5 3H69 D1

3H82 D9 3H83 C7 3H84 E10 3H85 C8 3H86 H12 3H87 D12 3H88 D7 3H89 E11 3H90 D8 3H91 E12

8 17169

8

3H92 H12 3H93 D7 3H94 E12 3H95 D8 3H96 F10 3H97 F11 3H98 F12 3H99 C5 3HB0-1 H8 3HB0-2 H8

3HB0-3 G8 3HB0-4 G8 3HB1 H8 3HB2 H8 3HB3 H8 3HB4 H6 3HC0 E7 3HC1 E9 3HC2 E7 3HC3 E2

3HC4 F2 3HC5 F3 3HC6 G3 3HC7 G3 3HC8 H4 3HC9 F9 3HD0 A1 3HD2 A2 3HD3 A1 3HF1 A5

109

10

3HW0 H2 4HD0 A1 6H00 D11 6H01 D8 6H05 F11 6HW0 H2 6HW1 H2 7H00-6 A6 7H02 B13 7H03 C10

7H04 H13 7H14 G11 7H16 D7 7H18 D8 7H21 D13 7H22 C11 7H90 D13 7H91 F13 7H92 G13 7H93 F11

3 45678

IHD1

100R3H43

75R3H57

100R 100R3H49

100R3H99

100R 100R3H61 100R 100R 100R

100R3H71 100R 100R 100R

100R

AG1

AG2

AA3

U5 U4 U3 U2 U1 V5 V4 V3

AA2 AA1 AB4 AB3 AB2

V2 V1 W4 W3 W2 W1 Y4 Y3

AB1 AC5 AC4 AC3 AC2 AC1

AF4 AF3 AF2 AF1

AE2 AE4

RESET-ST7101

RESET-STBY

7H00-6 PNX8535

STANDBY CONTROL

I

XTAL

O

RESET_IN

0 1 2

3

P0

4 5 6 7

0 1 2

P1

3

7

0 1 2

3

P2

4 5 6 7

0 1 2

P3

3

4 5

0 1

P5

2

3

4

P6

5

RESET-NVM_WP-NANDFLASH

SCL-UP-MIPS

SDA-UP-MIPS

7HB0 PDTC114EU

SPI

I2C uP

PWM

+3V3-STANDBY

9HB0

RES

SDO

PSEN

SDI CLK CSB

SCL SDA

ALE

0 1

EA

3HB4

AD4 AE1 AD1 AE3

IHDG

AG4

IHDH

AH3

AD3

IHDK

AD2

Y1

IHDM

Y2

IHDN

AA4

+3V3-STANDBY

+5V-ON

SCL-SSB-MUX1

SDA-SSB-MUX1

DV-B0_UART2-RX

10K

DV-B1_UART2-TX

47R

3H38 3H41 47R

IHDJ

IHDL

IH84

ON-MODE

3H50 100R

3H53

3H54 100R

+3V3-STANDBY

100K

3H83

7H16 BC847BW

3H88

1K0

+3V3-STANDBY

FHC0

3HC2

10K

MAIN NVM

FHC1

FHC2

RC

CVBS-AM

100R3H44

100R

75R3H56

3H80

IH85

+12V

3H93

3HC0

IHC1

7

6

5

7HC3 M24C64-WDW6

3HB0-3 100R

3HB0-1 3HB1 100R

9HB2 3HB2 100R

100K

IH83

10K

9HC0

10K

2HC0

100n

WC

SCL

ITV CONTROL connector

+3V3-STANDBY

LED1-3V3

LED2-3V3

AV1-BLK

ON-MODE

RESET-PI

RXD-UP

TXD-UP

AV2-BLK

RESET-PI

RC

SDM

2HF0

27p

2HF1

V3

SOR

7HC0-1

1

13

7HC0-2

4

5

7HC0-3

8

6

7HC0-4

11

12

+3V3-STANDBY

1

X1

714

14

1

X1

7

1

X1

714

1

X1

714

1

27p

1

RESET-STBY

LED1-3V3 RESET-NVM_WP-NANDFLASH

ENABLE-1V2 REGIMBEAU_CVBS-SWITCH ENABLE-3V3 CTRL1-STBY_LAMP-ON AUDIO-RESET UART-SWITCH

RC LED2-3 CEC-HDMI SUPPLY-FAULT DETECT-1V2-2V5-3V3

DV-B2_DEBUG-BREAK EJTAG-DETECT AV1-BLK ON-MODE RESET-PI DETECT-5V-12V CTRL4-STBY_SELECT-PWM-ANA CTRL3-STBY_POWER-OK-DISP

RXD-UP TXD-UP

RESET-SYS-DETECT AV2-BLK SDM

KEYBOARD LIGHT-SEN DC_PROT POWER_DOWN

SPI-PROG SPI-WP

74HC4066PW

IHC5

IHC6

74HC4066PW

IHC7

74HC4066PW

IHC8

74HC4066PW

27M

1HF0

FHD1

3HF1

100R

FHD2 FHD3

FHD4

IHD2 IHD3 IHD4

3H47

FHD5

3H52 100R

FHDA FHDB FHDC

FHDE

IHD6

3H59

IHD7

FHDF

3H63 3H65 3H66 3H68 100R

3H72 3H73 3H74

3H35

10K3H36

2HC1

100n

2

3

9

10

10K

3HC8

3

7HC2 PDTC114EU

2

RXD-UP

RXD-MIPS

TXD-UP

TXD-MIPS

11

7HB0 H6 7HC0-1 E4 7HC0-2 F4 7HC0-3 G4 7HC0-4 G4 7HC1 H2 7HC2 H4 7HC3 F7 7HC4 E8 7HD0 A2

IHF1

CTRL2-STBY_BACKLIGHT-CTRL_RESET-P3

CTRL5-STBY_BACKLIGHT-BOOST

IHF2

IHF3

IHF4

100K

3H85

IH80

7H18 BC847BW

3H90

IH86

27K

3H95

IHC0

9HC1

RES

7HC4 BC857BW

IHC2

84

Φ

(8Kx8)

EEPROM

ADR

FHC3

FHB0

100R3HB0-4

FHB1

100R3HB0-2

FHB2

100R

FHB3 FHB4 FHB5 FHB6

100R3HB3

FHB7

+3V3-STANDBY

BAS316

6H01

10K

+3V3-STANDBY

1

0

2

1

3

2SDA

BOLT_ON_SCL

BOLT_ON_SDA

9H01 E2 9H03 E2 9H07 C12 9HB0 H6 9HB2 H8 9HC0 E8 9HC1 E8 9HC2 F9 FH00 E2 FH01 E2

SPI-SDO

SPI-SDI SPI-CLK SPI-CSB

SCL-UP-MIPS SDA-UP-MIPS

3H81

3H82

100K

3HC1

10K

3HC9

IHC3

9HC2

PSEN

68K

22K

13

FH23 G12 FHB0 G8 FHB1 G8 FHB2 H8 FHB3 H8 FHB4 H8 FHB5 H8 FHB6 H8

FHC0 E7

FHC1 F7 FHC2 F7 FHC3 F8 FHC5 F2 FHC6 G2 FHC7 G2 FHD0 A2 FHD1 A5 FHD2 B5 FHD3 B5

14

1413

FHD4 B5 FHD5 C5 FHDA C5 FHDB C5 FHDC C5 FHDE C5 FHDF D5 FHF0 H2 IH15 H2 IH16 C13

1512

IH17 C12 IH20 F12 IH21 G11 IH22 G12 IH70 G12 IH71 H11 IH72 H12 IH73 H12 IH80 C8 IH81 C9

IH82 D9 IH83 D8 IH84 D7 IH85 D7 IH86 D8 IH90 D11 IH91 D11 IH92 E12 IH93 E12FHB7 H8 IH95 F11

1615

IH96 F11 IH97 F12 IH98 F12 IHC0 E8 IHC1 E8 IHC2 F8 IHC3 F9 IHC5 E3 IHC6 F3 IHC7 F3

IHC8 G3 IHD0 B2 IHD1 A5 IHD2 B5 IHD3 C5 IHD4 C5 IHD6 D5 IHD7 D5 IHDG B7 IHDH B7

9101112

+3V3-STANDBY

SPI-SDI

SPI-PROG

SPI-WP

SCL-UP-MIPS SDA-UP-MIPS

CTRL2-STBY_BACKLIGHT-CTRL_RESET-P3 CTRL5-STBY_BACKLIGHT-BOOST

PSEN

ALE

EA

ALE

EA

7H03

NCP303LSN10T1

IH81

2

IN

RST

3

2H05

100n

+5V-STANDBY

GND

IH82

5

CD

1HB0 1 2

3

4 5 6 7

8

9 10

1112

NC

DETECT-5V-12V

1

4

+3V3

+2V5

+3V3-STANDBY

3H3210K

3H01 10K

3H03 4K7

3H06 10K

3H08

IH90

3H84

10K

IH95

3H96

8K2

3H18

100K

3H77

100K

10K3H00

4K73H02

RES

10K3H04 10K3H05

10K3H07

10K

POWER-OK-DISPLAY

IH91

3H89

100K

IH96

3H97

47K

BAS316

7H93 BC847BW

IH21

68K

3H22

7H14 BC847BW

IH71

68K

3H79

6H00

BAS316

6H05

7H22 PDTC114EU

+3V3-STANDBY

3H87

3H91

+3V3-STANDBY

3H94

3H98

3H29

3H33

3H86

3H92

SPI-SDO

SPI-CLK

SPI-CSB

SPI-WP

+3V3-STANDBY

68K

22K

68K

22K

4K7

180K

4K7

180K

2H90

100n

2H91

100n

2H11

100n

2H08

100n

IHF5

5

IHF6

6

IHF7

1

IHF8

3

7

10K

3H12

IH17

9H07

NCP303LSN10T1

IH92

2

3

IH93

5

CD

NCP303LSN10T1

IH97

2

3

IH98

5

CD

IH20

NCP303LSN10T1

IH22

2

3

FH23

5

CD

IH70

NCP303LSN10T1

IH72

2

3

IH73

5

CD

17

IHDJ B7 IHDK B7 IHDL B7 IHDM C7 IHDN C7 IHF1 B8 IHF2 B8 IHF3 C8 IHF4 C8 IHF5 A12

13 14

+3V3-STANDBY

2H10

100n

8

VCC

2

Φ

D

Q

512K

C

FLASH

S

W

HOLD

7H02

VSS

M25P05-AVMN6

4

IH16

3H11

100R

7H21 PDTC114EU RES

7H90

IN

1

RST

GND

4

NC

7H91

IN

1

RST

GND

4

NC

3H25

10R

7H92

IN

1

RST

GND

4

NC

3H78

10R

7H04

IN

1

RST

GND

4

NC

18

IHF6 B12 IHF7 B12 IHF8 B12 IHF9 A13

IHF9

CTRL3-STBY_POWER-OK-DISP

SPI-SDI

DETECT-1V2-2V5-3V3

+1V2-FPGA

DETECT-1V2-2V5-3V3

SENSE+1V2-PNX8535

DETECT-1V2-2V5-3V3

19

20

A

B

BB

C

A

D

E

B

F

C

G

H

D

H

I

E

J

F

K

L

G

M

H

N

O

P

1

MULTI 12NC : 3139_283_30162 BD 12NC : 3139_283_30172

12

2 3 4567

3

4

543

521

67 15

7

8

9

10

8 9 10111213

DC398881

CLASS_NO

3PC333

1

-- -- --

2009-05-15

2

3

2009-07-31

YiPing Guo

NAME

SV

118 910 20

1211 12

13

14 15

146

SETNAMECHN

BDS MODULES

PCB SB PB522_LN

SUPERS.

2009-05-15

DATECHECK

16

16 17

17

43

C

14

3139 283 3017

03101

ROYAL PHILIPS ELECTRONICS N.V. 2009

6

1918

2

201918

2009-07-31

2009-07-282

O

P

A2

18730_505_090918.eps

090918

2009-Oct-09

SSB: PNX 85xx: Control

Circuit Diagrams and PWB Layouts

EN 63PB52.3HU LA 10.

A

B

C

D

owner.

is prohibited without the written consent of the copyright

owner.

is prohibited without the written consent of the copyright

E

F

G

H

109

10

IHFA

330R

3HF9

IHFC

IHFD

PCI-CLK-PNX5050_CLK-MOP

EJTAG-TRSTN

EJTAG-TDI

EJTAG-TMS

4K7

3HPZ

3HPC

PCI-CLK-PNX8535

PCI-CLK-USB20

100K

3HFQ

4K7

3HPX

4K7

3HPY

SCL-SSB-MUX1

SCL-SSB-MUX2

SDA-SSB-MUX1

SDA-SSB-MUX2

11

11 12 13

A

+3V3

10K3HFM

10K3HFN

10K3HFP

B

C

D

E

12

1HFG B5 1HP0 E3 2HF2 B1 2HF3 E5 2HF4 E4 2HP1 D5

3HF0 A5 3HF2 B7 3HF3 A7 3HF4 B7 3HF5 B7 3HF9 A8 3HFG B6 3HFJ C6 3HFK C6 3HFL C7 3HFM B8 3HFN B8 3HFP C8 3HFQ C8 3HFY C2 3HPA E4 3HPB E4 3HPC D8 3HPD D2 3HPE E2 3HPF E2 3HPG E2 3HPH E2 3HPJ E2 3HPK D4 3HPM D4 3HPQ E5 3HPR D6 3HPS D6 3HPT D5 3HPU E6 3HPW D6 3HPX D8 3HPY D8 3HPZ D7

6HF0 A7 7H00-4 A4 7HP5 E6 9HF1 B2 9HF2 C2 9HF3 C2 9HP5 D2 9HP6 D2 9HP7 D2 9HP8 D2 9HPA D2 9HPB D2 9HPC D2 9HPD D2 FHP0 E4 FHP1 E4 FHP2 E4 FHP3 B3 FHP4 B3 FHP5 B3 FHP6 B3 FHP7 B3 FHP8 B3

FHP9 B5 FHPA B5 FHPB B5 FHPC C5 FHPD C5 FHPE C5 FHPF C5 FHPG C5 FHPH C5 FHPI C6 FHPK D7 FHPL D7 FHPM E7 FHPN D7 IHF0 A4 IHFA A7 IHFB B7 IHFC B7 IHFD B7 IHP1 C3 IHP2 C3 IHP5 D2 IHP6 E2 IHP7 E2 IHP8 E2 IHP9 D5 IHPA E5

13

A

B

C

D

E

F

G

H

+3V3-PER

3HPK

3HPA

6

AJ26

AK26

2K2

47R

3HPB

3HPM

IHF0

2K2

47R

2HF3

3HPT

3HPQ

3HF0

0R

100n

77

RESET-SYS-DETECT

1HFG

15

EJTAG FOR PNX8541

IHP9

47R

IHPA

47R

PCI-CLK-OUT

1 2

3

4 5 6 7

8

9 10 11 12 13 14 16

1 SCL

FHP9 FHPA FHPB

FHPC

FHPD

FHPE

FHPF FHPG FHPH

2HP1

100p

SDA

FHPI

+3V3-STANDBY

INP

FIL

8

RESET-SYS-DETECT

PCI-CLK-OUT

3HFJ

100R

+3V3

3

VDD

I2C

-BUS CTRL

VSS

6

SC0

SC1

SD0

SD12

7HP5

PCA9540B

9

+3V3-PER

10K

3HF3

6HF0

EJTAG-TRSTN

EJTAG-DETECT

3HFL

10K

SML-310

3HF2

0R

3HF4

22R

3HF5

22R

EJTAG-TDI

EJTAG-TDO

EJTAG-TMS

EJTAG-TCK

RESET-STBY

10K

100R3HPR

100R3HPW

100R

+3V3-STANDBY

FHPK

FHPN

FHPL

FHPM

IHFB

47R3HFG

3HFK

5

8

4

3HPS

7

3HPU

1

21

325

12

43

4

5

3 45678

PNX8541 : CONTROL

7H00-4

PNX8535

A

B

C

D

E

+1V2

2HF2

100n

EJTAG-TDI EJTAG-TCK EJTAG-TMS EJTAG-TRSTN EJTAG-TDO

SCL1 SDA1 SCL2 SDA2 SCL3 SDA3

9HF1

CA-CTRLEN_BOOTMODE CTRL1-MIPS_LCD-PWR-ON IRQ-PCI CA-INT RXD-MIPS TXD-MIPS

CA-CTRLEN_BOOTMODE

SCL-SLAVE SCL-UP-MIPS SDA-SLAVE SDA-UP-MIPS SCL-2 SCL-UP-MIPS SDA-2

SCL-SSB SCL-SSB-MUX1 SCL-SSB SDA-SSB SDA-SSB-MUX1 SDA-SSB SDA-SSB-MUX2

SCL1

SDA1

SCL2

SDA2

SCL3

SDA3

3HPD 47R

3HPF 47R

3HPH

3HPJ

9HP5 9HP6 9HP7 9HP8

9HPA 9HPB 9HPC 9HPD

47R3HPE

47R3HPG

47R

9HF2

3HFY

10K

SCL-SSB-MUX2

IHP5

IHP6

IHP7

IHP8

FHP3 FHP4 FHP5 FHP6 FHP7 FHP8

IHP1

IHP2

RES

9HF3

SDA-UP-MIPS

SCL-SLAVE

SDA-SLAVE

SCL-2

SDA-2

SCL-SSB

SDA-SSB

AK1 AJ2 AK3 AJ3 AK2

AK27 AH27 AK29 AK28 AJ28 AJ27

AE27

T1 T2 T3 G27 E27 D28

MIPS C0NTROL

TDI TCK

EJTAG

TMS TRST TDO

SCL

I2C1

SDA SCL

I2C2

SDA SCL

I2C3

SDA

VPP_ID

0 1 2

GPIO

3

4 5

+3V3-PER

SCL-SSB

SDA-SSB

1HP0

45

RESET_SYS

27MHz_OUT

100n

2HF4

FHP0

1

FHP1

2

FHP2

3

1

I

J

MULTI 12NC : 3139_283_30162

BD 12NC : 3139_283_30172

2 3 45

1

2

2 3 45678

DC398881

CLASS_NO

3PC333

YiPing Guo

8

1

CHECK DATE

-- -- --

2009-05-15

2009-07-3123

NAME

SV

7

3

4

5

6

7

2009-Oct-09

EMANTESNHC

BDS MODULES

PCB SB PB522_LN

SUPERS.

2009-05-15

9

I

2

2009-07-31

2 2009-07-28

J

3139 283 3017

43

C

ROYAL PHILIPS ELECTRONICS N.V. 2009

109

11

7

13010

1312

121110

13

J

A3

18730_506_090918.eps

090918

SSB: PNX 85xx: Control

Circuit Diagrams and PWB Layouts

EN 64PB52.3HU LA 10.

A

B

C

D

is prohibited without the written consent of the copyright

owner.

E

F

G

H

1

2

1

3 4

321

2

4

5

3 4

65

6

7

8

5678

98

PNX 8541 : CONTROL

A

7H00-5 PNX8535

B

C

D

XIO-ACK

XIO-AD25

XIO-SEL-NAND

PCI-AD0 PCI-AD1 PCI-AD2 PCI-AD3 PCI-AD4 PCI-AD5 PCI-AD6 PCI-AD7 PCI-AD8 PCI-AD9 PCI-AD10 PCI-AD11 PCI-AD12 PCI-AD13 PCI-AD14 PCI-AD15 PCI-AD16 PCI-AD17 PCI-AD18 PCI-AD19 PCI-AD20 PCI-AD21 PCI-AD22 PCI-AD23 PCI-AD24 PCI-AD25 PCI-AD26 PCI-AD27 PCI-AD28 PCI-AD29 PCI-AD30 PCI-AD31

3HEV

100R

IHE0

IHE1 IHE2

IHE3

A11 B10

B11 C11 D11 E11

A20 B20 C20 D20 A19 B19 C19 D19 E19 A18 B18 C18 D18 E18 A17 B17 E15 D15 C15 B15 A15 E14 D14 C14 B14 A14 E13 D13 C13 B13 A13 E12

ACK AD25

0 1 2

3

0 1 2

3

4 5 6 7

8

9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29

30 31

XIO

XIO SEL

PCI AD

PCI XIO

PCI CTRL

CBE

PCI_CLK

DEVSEL

FRAME

IRDY TRDY STOP IDSEL

PAR PERR SERR

REQ

GNT REQ_B GNT_B

INTA_OUT

PCI-DEVSEL

D12

0

C12

1

B12

2

A12

3

A21

A16 C17 D17

E17

B16

B21

C16 D16

D21

C21

E16

E21

E22

E20

3HEU 100R

IHE4

IHE5

IHE6

PCI-CBE0 PCI-CBE1 PCI-CBE2 PCI-CBE3

PCI-CLK-PNX8535

PCI-DEVSEL

PCI-FRAME

PCI-IRDY PCI-TRDY PCI-STOP

PCI-AD24

PCI-PAR PCI-PERR PCI-SERR

PCI-REQ

PCI-GNT

PCI-REQ-B

PCI-GNT-B

PCI-INTA-OUT

PCI-FRAME PCI-IRDY

PCI-TRDY PCI-STOP

PCI-PERR PCI-SERR

PCI-REQ PCI-GNT

PCI-REQ-B PCI-GNT-B

IHEA IHEB IHEC IHED IHEE IHEF

IHEG

IHEH

IHEI

IHEJ

/PCI-FRAME

/PCI-IRDY

/PCI-TRDY

/PCI-PERR

3HES

3HEW

109

3HEA 10K 3HEB-2 10K

9HE1

10K

9HE2

10K3HET

9HE3

10K

9HE4

10K3HEB-1 10K3HEB-3

10K3HEC 10K3HEB-4

10K3HED

+3V3-PER

PCI-REQ-PNX8535

PCI-GNT-PNX8535

PCI-REQ-USB20

PCI-GNT-USB20

1110

1211

3HEA B7 3HEB-1 B7 3HEB-2 B7 3HEB-3 B7 3HEB-4 B7 3HEC B7 3HED B7 3HES C7 3HET C7 3HEU C4 3HEV B2 3HEW C7

7H00-5 A3

A

B

9HE1 B7 9HE2 C7 9HE3 C7 9HE4 C7 IHE0 B2 IHE1 B2 IHE2 B2 IHE3 B2 IHE4 C4 IHE5 C5 IHE6 C5 IHEA B7 IHEB B7 IHEC B7 IHED B7 IHEE B7 IHEF B7 IHEG B7 IHEH B7 IHEI C7 IHEJ C7

C

D

13

1312

A

B

C

D

E

F

G65G

H

123 4

I

J

MULTI 12NC : 3139_283_30162 BD 12NC : 3139_283_30172

1

2 13

3 4

3

5

CLASS_NO

3PC333

-- -- --

2009-05-15

2009-07-31

NAME

YiPing Guo

SV

7

4

56

7

67

DC398881

1

2

3

8

SETNAMECHN

BDS MODULES

PCB SB PB522_LN

SUPERS.

2009-05-15

DATECHECK

98

910

101

8

I

2009-07-31

2

2009-07-282

J

3139 283 3017

43

C

ROYAL PHILIPS ELECTRONICS N.V. 2009

11

03101

1211

12

8

132

J

A3

18730_507_090918.eps

090918

2009-Oct-09

SSB: PNX 85xx: SDRAM

Circuit Diagrams and PWB Layouts

EN 65PB52.3HU LA 10.

A

B

C

D

E

F

G

H

K

is prohibited without the written consent of the copyright

owner.

M

N

123 4

21

123 4567

A

B

3HJZ

1K0

3HJA

3HJB

3HJC

3HJD

3HJ0

100R

C

D

DDR2-CKE

DDR2-CLK_P

DDR2-CLK_N

10K

DDR2-DQS0_N

10K

DDR2-DQS1_N

10K

DDR2-DQS2_N

10K

DDR2-DQS3_N

RES

E

I

F

J

G

L

H

I

1

PNX 8541 : SDRAM

DDR2-DQS0_P DDR2-DQS0_N DDR2-DQS1_P DDR2-DQS1_N DDR2-DQS2_P DDR2-DQS2_N DDR2-DQS3_P DDR2-DQS3_N

DDR2-DQM0 DDR2-DQM1 DDR2-DQM2 DDR2-DQM3

DDR2-CLK_P DDR2-CLK_N DDR2-ODT DDR2-CKE DDR2-WE DDR2-CS DDR2-RA

S

DDR2-CAS

DDR2-BA0 DDR2-BA1

DDR2-A0 DDR2-A1 DDR2-A2 DDR2-A3 DDR2-A4 DDR2-A5 DDR2-A6 DDR2-A7 DDR2-A8 DDR2-A9 DDR2-A10 DDR2-A11 DDR2-A12

100n

2HG1

2HG0

DDR2-A0 DDR2-A1 DDR2-A2 DDR2-A3 DDR2-A4 DDR2-A5 DDR2-A6 DDR2-A7 DDR2-A8 DDR2-A9 DDR2-A10 DDR2-A11 DDR2-A12

DDR2-BA0 DDR2-BA1

DDR2-CLK_P DDR2-CLK_N DDR2-CS DDR2-CKE

S

DDR2-RA DDR2-CAS DDR2-WE DDR2-ODT

DDR2-DQM1 DDR2-DQM0

2 3

1615

IHG2

2HH3

100n

K9

0 1 2

3

4 5 6 7

8

9 10 11 12 13 14 15

U

L

NC

L8

DDR2-VREF-DDR

161598712

12 13

+1V8

3HJ3

560R

3HJ4

560R

M2

K8 K2

L7 L3 L1 L9 J1

J9 F8 F2 G7 G3 G1 G9 E1 E9

E7 D8

J7 H8

A1 A2 A8 A9 D2 H2 V8

AA1 AA2 AA8 AA9

3HHB 33R

3HHC 33R

3HHE 33R

3HHG 33R

3HHJ 33R

3HHM 33R 3HHN 33R

3HHR 33R

3HHY 3HHZ 33R

1817

2HG0 F2 2HG1 F2 2HG2 F2 2HG3 F2 2HG4 F3 2HG5 F3 2HG6 F3 2HG7 F3 2HG8 F4

A

2HG9 F6 2HGA F6 2HGB F6 2HGC F6 2HGD F7 2HGE F7 2HGF F7 2HGG F7 2HGH F8 2HGJ F8 2HGK F8

B

2HGM F9 2HGN F9 2HGP F9 2HGR F9 2HGS F10 2HGT F10 2HGU E8 2HGV E8 2HGW E9 2HGX B10 2HGY E9 2HGZ E9

C

2HH0 E9 2HH1 E10 2HH2 E10 2HH3 D11 2HH4 A3 2HH5 A5 2HHA F6 2HHK E5 2HHM E5 2HHN D11 2HHP D11 2HHQ D10

D

3HG1 D4 3HG2 D4 3HG3 D4 3HG4 D4 3HG5 D4 3HG6 D4 3HG7 D4 3HG8 D4 3HG9 D4 3HGA D4 3HGB C4

E

3HGC C4 3HGD C4 3HGE C4 3HGF C4 3HGG C4 3HGH C4 3HGJ C4 3HGK C4 3HGM C4 3HGN C4 3HGP F7 3HGR F7

F

3HGS F7

DDR2-D16

33R3HHD

33R3HHF

33R3HHH33R3HGW

33R3HHK

33R3HHP

33R3HHS 33R3HHT 33R3HHU

33R3HHV 33R3HHW 33R

DDR2-D17 DDR2-D18 DDR2-D19 DDR2-D20 DDR2-D21 DDR2-D22 DDR2-D23 DDR2-D24 DDR2-D25 DDR2-D26 DDR2-D27 DDR2-D28 DDR2-D29 DDR2-D30 DDR2-D31

DDR2-DQS3_P

DDR2-DQS3_N

DDR2-DQS2_P

DDR2-DQS2_N

3HGT F7 3HGU F7 3HGV G7 3HGW G7 3HGY G7 3HGZ G7 3HH0 G7 3HH1 G7 3HH2 G7 3HH3 G7 3HH4 G7

G

3HH5 G7 3HH6 G7 3HH7 G7 3HH8 G7 3HH9 H7 3HHA H7 3HHB F12 3HHC F12 3HHD F12 3HHE F12 3HHF F12

H

3HHG G12 3HHH G12 3HHJ G12 3HHK G12 3HHM G12 3HHN G12 3HHP G12 3HHR G12 3HHS G12 3HHT G12 3HHU G12 3HHV G12

I

3HHW G12 3HHY H12 3HHZ H12 3HJ0 C1 3HJ1 B10

43

56

65 17 18

7 8

109

8 9

+1V8

VDDL

DDR2

SDRAM

8MX16X4

VSSDL

U9M7D7

DDR2-VREF-CTRL

7H00-2 PNX8535

100n

2HH5

T30

VREF

AE26

IREF

AA28

P

AA29

DQS0

N

Y28

P

Y29

DQS1

N

H28

P

H29

DQS2

N

G28

P

G29

DQS3

N

U29

0

U

30

1

M30

DQM

2

M29

3

N28

P

N29

CLK

N

P27

ODT

U26

CKE

R28

WEB

P28

CSB

P29 E29

RASB

P30

CASB

T27

0

R29

BA

1

P26

0

R30

1

N26

2

U28

3

M26

4

R27

5

M27

6

V26

7

A

M28

8

R26

9

T28

10

L26

11

U27

12

J27

NC

1u0

2HHK

2HHM

330u 6.3V

F7

K3

D9

F1

Φ

E2

K9

F9H9K1

K7

F3

VDDQ

VREF

0 1 2

3

4 5 6 7

DQ

8

9 10 11 12 13 14 15

U U

DQS

L

NC

VSSQ

J2

J8

L2

L8

E8

H7

G2

G8

DDR

V30

0

AD28

1

AB28

2

AB30

3

AD29

4

V29

5

AD27

6

V28

7

W30

8

AC30

9

AA30

DQ

10

AC28

11

AD30

12

W28

13

AC29

14

Y30

15

E30

16

L28

17

J29

18

J28

19

L29

DQ

20 21

L27

22

E28

23

F30

24

K30

25

H30

26

K28

27

L30

28

F29

29

J30

30

F28

31

100n

2HG9

100n

2HGB

2HGA

2HGC

M2

K8 K2 L7 L3 L1 L9

J1

J9 F8 F2

G7 G3 G1 G9

E1 E9

E7 D8

J7 H8

A1 A2 A8 A9 D2 H2 V8

AA1 AA2 AA8 AA9

100n2HHA

100n

2HGE

2HGD

DDR2-VREF-DDR

3HGP 33R

3HGS33R

3HGV 33R

3HGY 33R

3HH0 33R

3HH2 33R

3HH4 33R

3HH7 33R

3HH9 33R

100n

2HGF

2HGG

33R3HGR

33R3HGT 33R3HGU

33R3HGZ

33R3HH1

33R3HH3

33R3HH5 33R3HH6

33R3HH8

33R3HHA

67

DDR2-D0 DDR2-D1 DDR2-D3 DDR2-D2 DDR2-D6 DDR2-D5 DDR2-D4 DDR2-D7 DDR2-D8

DDR2-D9 DDR2-D10 DDR2-D11 DDR2-D12 DDR2-D13 DDR2-D14 DDR2-D15 DDR2-D16 DDR2-D17 DDR2-D19 DDR2-D18 DDR2-D22 DDR2-D23 DDR2-D20 DDR2-D21 DDR2-D24 DDR2-D30 DDR2-D26 DDR2-D25 DDR2-D28 DDR2-D31 DDR2-D27 DDR2-D29

22u

DDR2-D0

DDR2-D1

DDR2-D2

DDR2-D3

DDR2-D4

DDR2-D5

DDR2-D6

DDR2-D7

DDR2-D8

DDR2-D9 DDR2-D10 DDR2-D11 DDR2-D12 DDR2-D13 DDR2-D14 DDR2-D15

DDR2-DQS1_P DDR2-DQS1_N DDR2-DQS0_P DDR2-DQS0_N

100n

2HH0

100n

2HGR

MT47H32M16BT-37E

2HH1

2HGS

IHG1

100n

2HH2

100n

2HGT

2HGH

DDR2-A0 DDR2-A1 DDR2-A2 DDR2-A3 DDR2-A4 DDR2-A5 DDR2-A6 DDR2-A7 DDR2-A8 DDR2-A9 DDR2-A10 DDR2-A11 DDR2-A12

DDR2-BA0 DDR2-BA1

DDR2-CLK_P DDR2-CLK_N DDR2-CS DDR2-CKE DDR2-RAS DDR2-CAS DDR2-WE DDR2-ODT

DDR2-DQM3 DDR2-DQM2

DDR2-VREF-CTRL

100n

2HGV

2HGU

100n

2HGJ

2HGK

2HGW

100n

2HGM

3HJF 220R

2HGZ

2HGY

100n

2HGP

2HGN

8 9 10111213

+1V8

3HJ5

IHG0

5K6

3HJY

100n

2HH4

820R

3HJV 22R

22R3HJW

3HGN 22R

22R3HGM 22R3HGK 22R3HGJ

3HGH 22R

22R3HGG

3HGE 22R

22R3HGF

3HGD 22R

22R3HGC

3HGB 22R

22R3HGA 22R3HG9 22R3HG8

3HG7 22R

22R3HG6

3HG5 22R

22R3HG4 22R

3HG3

22R3HG2

3HG1 22R

100n

2HG2

100n

2HG4

2HG5

2HG6

220R3HJE

2HG3

100n

2HG7

100n

2HG8

MT47H32M16BT-37E

7HG0

D1H1M9

R9V1M1

VDD

R8

0

R3

1

R7

2

T2

3

T8

4

T3

5

T7

A

6

U2

7

U8

8

U3

9

R2

10

U7

11

V2

12

P2

0

P3

1

BA

P1

2

M8

CK

N8

CK

P8

CS

N2

CKE

N7

RAS

P7

CAS

N3

WE

N9

ODT

E3

U

DM

J3

L

V3

RFU

V7

VSS

T1

D3

H3

M3

45

14131211

1413

10 11

+1V8

3HJ1

560R

2HGX

330u 6.3V

DDR2-VREF-DDR

3HJ2

560R

+1V8

100u

2HHN

2HHQ

22u

100n

V1

M1

R9

D1H1M9

7HG1

R8 R3 R7 T2 T8 T3 T7 U2 U8 U3 R2 U7 V2

P2 P3 P1

M8 N8 P8 N2 N7 P7 N3 N9

E3 J3

V3 V7

VDDL

VDD 0 1 2

3

4 5 6 7

8

9 10 11 12

0 1

BA

2

CK CK CS CKE RAS CAS WE ODT

U

DM

L

RFU

DDR2

SDRAM

8MX16X4

A

VSS

VSSDL

T1

H3

U9

D3

M3

M7

6.3V330u 1u0

2HHP

F7

F9

F1

H9

K1

F3

D9

Φ

D7

K7

K3

VDDQ

VREF

DQ

DQS

VSSQ

J8

J2

L2

E8

E2

H7

G2

G8

20191110

2019

3HJ2 C10 3HJ3 B12 3HJ4 C12 3HJ5 A4 3HJA C1 3HJB C1 3HJC D1 3HJD D1 3HJE G3 3HJF G9 3HJV B4 3HJW C4 3HJY A4 3HJZ B1

7H00-2 A5 7HG0 F4 7HG1 F10 IHG0 A4 IHG1 C10 IHG2 C12

A

B

C

D

E

F

G

H

I

J

K

L

M

N

O

P

MULTI 12NC : 3139_283_30162

BD 12NC : 3139_283_30172

123 45

O

DC398881

CLASS_NO

3PC333

1

-- -- --

2009-05-15

2

3

2009-07-31

NAME

YiPing Guo

SV

4321

678 9

7

856

910 19

10 11 12 13 14

13 14 201211

15 16

15 16 17 18

SETNAMECHN

BDS MODULES

PCB SB PB522_LN

SUPERS.

DATECHECK

2009-05-15

43

C

17 18

3139 283 3017

03101

ROYAL PHILIPS ELECTRONICS N.V. 2009

9

19 20

2

2009-07-31

2009-07-282

O

P

A2

18730_508_090918.eps

090918

2009-Oct-09

SSB: PNX 85xx: Flash

Circuit Diagrams and PWB Layouts

EN 66PB52.3HU LA 10.

A

B

CDC

D

is prohibited without the written consent of the copyright

owner.

is prohibited without the written consent of the copyright

E

F

G

1

2

43

654321

65

7

123 45678

A

B

C

D

+3V3

+3V3-NAND

5HA0

30R

3HA0

10K

+3V3-NAND

XIO-SEL-NAND

PDTC114EU

+3V3-NAND

3HA2

3

7HA3

2

PCI-AD24 PCI-AD25 PCI-AD26 PCI-AD27 PCI-AD28 PCI-AD29 PCI-AD30 PCI-AD31

PCI-AD0 PCI-AD1

PCI-CBE2 PCI-CBE1

10K

+3V3-NAND

IHAC

1

IHAD

IHA0

3HA4-2 100R IHA1 IHA2

3HA4-4 100R IHA3

3HA5-1 100R IHA4

3HA5-2 100R IHA5

3HA5-3 100R IHA6

IHA7

3HAC 100R

IHA8

IHA9

3HAF

IHAA

3HAE 100R

RES

9HA0

100R3HA4-1

100R3HA4-3

100R3HA5-4

100R3HAD

100R

3HA3

2K2

RESET-NVM_WP-NANDFLASH-INV

RESET-NVM_WP-NANDFLASH

NAND-AD(0) NAND-AD(1) NAND-AD(2) NAND-AD(3) NAND-AD(4) NAND-AD(5) NAND-AD(6) NAND-AD(7)

NAND-CLE NAND-ALE

NAND-REn

NAND-WEn

XIO-ACK

NAND-AD(0) NAND-AD(1) NAND-AD(2) NAND-AD(3) NAND-AD(4) NAND-AD(5) NAND-AD(6) NAND-AD(7)

NAND-CLE NAND-ALE XIO-SEL-NAND NAND-REn NAND-WEn RESET-NVM_WP-NANDFLASH-INV XIO-ACK

FHA1 FHA2 FHA3 FHA4 FHA5 FHA6 FHA7 FHA8

FHA9 FHAA FHAB FHAC FHAD FHAE FHAF

+3V3-NAND

7HA0 NAND512W3A2CN6

29

30 31 32

41 42 43 44

16 17 9

8

18 19 7

[FLASH]

512Mx8

0 1 2

3

IO

4 5 6 7

CLE ALE CE RE WE WP R B

98

IHAB

100n

2HA1

100n

2HA0

12

37

VCC

Φ

VSS

13

36

1 2

3

4 5

6 10 11 14 15 20 21 22 23

NC

24 25 26 27 28

33 34 35 38 39

40 45 46 47 48

111098

1110

2HA0 A8 2HA1 A8

3HA0 B2 3HA2 D2 3HA3 D3 3HA4-1 B3 3HA4-2 B3 3HA4-3 B3 3HA4-4 B3 3HA5-1 B3 3HA5-2 B3 3HA5-3 B3 3HA5-4 C3

A

B

C

D

3HAC C3 3HAD C3 3HAE C3 3HAF C3

5HA0 B2 7HA0 B6 7HA3 D2 9HA0 D3 FHA1 B6 FHA2 B6 FHA3 B6 FHA4 B6 FHA5 B6 FHA6 B6 FHA7 B6 FHA8 C6 FHA9 C6 FHAA C6 FHAB C6 FHAC C6 FHAD C6 FHAE C6 FHAF C6 IHA0 B3 IHA1 B3 IHA2 B3 IHA3 B3 IHA4 B3 IHA5 B3 IHA6 C3 IHA7 C3 IHA8 C3 IHA9 C3 IHAA C3 IHAB A7 IHAC D3 IHAD D3

1312

A

B

C

D

E

F

G

H

123 45678

I

J

MULTI 12NC : 3139_283_30162 BD 12NC : 3139_283_30172

1

2 1312111098

DC398881

CLASS_NO

3PC333

-- -- --

2009-05-15

2009-07-3123

NAME

SV

7

32 13

431

56

654 8

7

1

YiPing Guo

CHECK

EMANTESNHC

BDS MODULES

PCB SB PB522_LN

SUPERS.

DATE

2009-05-15

2

2 2009-07-28

3139 283 3017

43

C

ROYAL PHILIPS ELECTRONICS N.V. 2009

10

13010

1211109

18730_509_090918.eps

2009-Oct-09

2009-07-31

A3

H

I

J

090918

SSB: PNX 85xx: Audio

Circuit Diagrams and PWB Layouts

EN 67PB52.3HU LA 10.

A

B

C

D

E

G

H

K

owner.

is prohibited without the written consent of the copyright

1 8

2 3 45

2HM3 B1 2HM8 C1 2HMD A11 2HME B11 2HMF B11 2HMG A5

2HMH B5 2HMJ B12 2HMK C12 2HML D12 2HP4 E12 2HP5 E11

2HP6 E11 2HP7 E11 2HP8 E10 2HPA E13 2HPB E12 2HR0 C7

2HR1 C7 2HR2 C7 2HR3 C7 2HR8 D7 2HR9 D7 2HRA D7

2HRB D7 2HRC E3 2HRD D7 2HRE E4 2HRF D7 2HRG E7

2HRH E7 2HRJ E7 2HRK E7 2HRM F6 2HRN F6 2HRP F7

2HRQ F13 2HRR F13 2HRS F13 2HRT F14 2HRU F6 2HRV F6

2HRW G7 2HRX F4 2HRY G7 2HRZ F4

3012 D13 3013 E13

123 45

A

AUDIO-VDD

AUDIO-VEE

10K

3HMY

3HMA

IHNQ

IHNP

2

5

6

7HM2-1 BC847BS

1

AUDIO-VDD

3HMW

3

7HM2-2 BC847BS

4

IHNN

10K

AUDIO-VEE

3HMT

FHNA

+AUDIO-L

10K

FHNB

-AUDIO-R

B

ADAC(1)

F

C

ADAC(2)

3HMU

5K6

9HM1

3n3

2HM3

3HMV

5K6

9HM2

3n3

2HM8

D

VGA-AIN4-R

VGA-AIN4-L

I

2HRC

33p

2HRE

IHN2

IHN3

33p

E

J

F

L

Card_CVBS_out

Card_Aud_out_L Card_Aud_out_R

FHRR

FHRS FHRT

3HRD

33R5HRR

220R5HRS 220R5HRT

7HRR-1

10K

BC847BS

7HRR-2

BC847BS

3HRC 150R

150R3HRE

3HRB

10K

2HRX 1u0

CVBS_MON_OUT

1u02HRZ

Audio-out-R

G

3HP0 E11 3HP1 F11 3HP2 F11 3HP3 F11 3HP4 F11 3HP5 F11

9

3HP6 F11 3HP7 F11 3HP8 F11 3HP9 F11 3HPN F11 3HR0 C6

7

3HMA B3 3HMD A9 IHNE D11 3HME A10 3HMF B11 3HMJ C10 3HMK C11

3HML C12 3HMT C3 3HMU B2 3HMV C2 3HMW C2 3HMY B2

6

IHNH

VDD

VSS

Audio-out-L

A-PLOP

AUDIO-IN1-R

AUDIO-IN1-L

CVI-AIN3-R

CVI-AIN3-L

FRONT-AIN5-R

FRONT-AIN5-L

VDDA-AUDIO

RES

5HM0

220R

5HM1

220R

IHR5

IHNJ

2HMG

2HMH

3HR1

22K

3HR3

22K

3HR8

22K

3HRA

22K

3HRJ

22K

3HRL

22K

5HRZ

AUDIO-VDD

1u0

AUDIO-VEE

1u0

3HR2

3HR9 12K

3HRH 12K

100n

2HRU

2HRN

12K3HR0

12K

12K3HR7

12K3HRK

100n

2HRV

INHR

INHS

INHT

INHU

INHV

INHW

30R

2HRM

10

3HR1 C5 3HR2 C6 3HR3 C5 3HR7 D6 3HR8 D5 3HR9 D6

7 8 9 10111213

RES

2HR0 33p

33p2HR2

2HR833p

33p2HRA

33p2HRJ

2HRG 33p

10u

100n

2HRP

10u

75R

100n

3HRF

2HRY

2HRW

3HRA D5 3HRB G4 3HRC F3 3HRD G2 3HRE F3 3HRF G7

2HR1

1u0

2HR3

1u0

2HR9

1u0

2HRB

1u0

2HRD

1u0

2HRF

1u0

2HRK

1u0

2HRH

1u0

4K7

3HRM

11

3HRJ E5 3HRK E6 3HRL E5 3HRM G7 3HRN G8

IHN4

IHN5

FHN0

FHN1

IHN6

IHN7

FHN2

FHN3

IHN8

IHN9

IHNA IHNB IHNC

IHND

4K7

3HRN

12

5HM0 A5 5HM1 B5 IHN8 E8 5HP2 D11 5HRR F2 5HRS F2 5HRT F2

5HRZ E5 7H00-1 D9 7HM2-1 B3 7HM2-2 C3 7HMD-1 A11 7HMD-2 C12

13

7HP0 D12 7HRR-1 G3 7HRR-2 G3 9HM1 B2 9HM2 C2 FHMD A13

RES

IHME

ADAC(7)

ADAC(8)

3HMD

5K6

3HME

10K

GND

IHMJ

7H00-1

PNX8535

AUDIO

AK6

R

AJ6

AIN1

L

AG5

R

AF5

AIN2

L

AJ5

R

AH5

AIN3

L

AH4 AF10

R

AK5

AIN4

L

AK4

R

AJ4

AIN5

L

AG6

R

AF6

AADC

L

AH8

POS

AH7

NEG

AJ7

POS

AK7

AADC1_VR

NEG

AH6

VCOM_ADC1

L5

AOUT1

L3

RES_REF

M6

GND1

AK15

SPDIF_IN

VREF

VSSA_AUDIO_DAC1

3V3A_AUDIO_DAC1

ADAC1

ADAC2

ADAC3

ADAC4

ADAC5

ADAC6

DAC_CAP

ADAC

SPDIF_OUT

OSCLK

SCK

SD

14

FHMJ C13 FHN0 C8 FHN1 D8 FHN2 D8 FHN3 D8 FHN4 D12

IHMF

IHMG

AG12

P

AK13

N

AH12

P

AJ12

N

AK11

P

AJ11

N P

AG10

N

AG9

P

AK10

N

AH9

P

AJ9

N

AE10 AF11

AG7

R

AG8

L

AJ13

1

AK12

2

AH11

3

AH10

4

AJ10

5

AK9

6

AK8

7

AJ8

8

AJ15

AF14 AJ14 AK14

WS

AH14

1

AG14

2

3

2

AUDIO-VDD

IHMD

IHMH

AUDIO-VEE

3HMJ

5K6

FHNA B3 FHNB C3 FHRR F2 FHRS F2 FHRT F2 IHMD A10

2HMD

100n

GND

8

7HMD-1 LM358D

1

4

2HME

100n

GND

3HMF

10K

2HMF

33p

3HMK

10K

GND

100n

2HP7

2HP8

3HP0 33R

3HP333R

3HP5 33R

3HP7

3HP9 33RRES

3HPN 68R

100n

IHMK

IHML

2HP6

33R3HP1

33R3HP2

33R3HP4

33R3HP6 33R 33R3HP8 RES

IHME A9 IHMF A10 IHMG A10 IHMH B10 IHMJ C9 IHMK C11

IHNE

100n

2HP5

1615

IHML C11 IHN2 D4 IHN3 D4 IHN4 C8 IHN5 C8 IHN6 D8

AUDIO-VDD

2HMJ

100n

GND

8

7HMD-2

5

LM358D

67

4

2HMK

100n

AUDIO-VEE

GND

3HML

10K

2HML

33p

VDDA-AUDIO

5HP2

FHN4

30R

2HP4

10u

2HPB

SPDIF-OUT

100n

IHN7 D83HRH E6

IHN9 E8 IHNA F8 IHNB F8 IHNC F8

10n

ADAC(8) ADAC(7)

ADAC(1) ADAC(2) ADAC(3) ADAC(4) ADAC(5) ADAC(6) ADAC(7) ADAC(8)

LD2985BM33R

5

OUT IN

4

7HP0

COM

2

ADAC(8) ADAC(7)

ADAC(5) ADAC(6)

FHMD

FHMJ

INHBP

IHND F8

IHNF D13 IHNG D13 IHNH A5 IHNJ B5

1

3

2HRQ

Audio-out-L

Audio-out-R

+3V3

22K

3012

IHNG

22K

3013

3n3

2HPA

2HRR

IHNN C3 IHNP C2 IHNQ B3 IHR5 E5 INHR C6 INHS C6

+5V-ON

IHNF

10u

3n3

18176

19

20

A

INHT D6 INHU D6 INHV E6 INHW E6

14

A

B

C

D

E

B

F

C

G

D

H

I

E

J

F

3n3

RES

2HRT

2HRS

K

L

G

M

N

O

P

MULTI 12NC : 3139_283_30162 BD 12NC : 3139_283_30172

1

2 3 4

123 4567

5 19 20

6 1211

7

2009-Oct-09

1098

M

8

9 10111213 14

N

O

2009-07-31

P

A2

13

14

CLASS_NO

3PC333

-- -- --

2009-05-15

2009-07-3123

YiPing Guo

NAME

SV

DC398881

1

CHECK DATE

15

EMANTESNHC

BDS MODULES

PCB SB PB522_LN

SUPERS.

2009-05-15

2

2 2009-07-28

3139 283 3017

43

C

ROYAL PHILIPS ELECTRONICS N.V. 2009

11

13010

181716

18730_510_090918.eps

090918

Circuit Diagrams and PWB Layouts

SSB: PNX 85xx: Analog A/V

EN 68PB52.3HU LA 10.

1

A

B

A

C

B

D

E

F

C

R5

D

G

H

I

E

F

J

G

K

owner.

is prohibited without the written consent of the copyright

owner.

L

M

H

I

N

O

P

MULTI 12NC : 3139_283_30162 BD 12NC : 3139_283_30172

1

2

2 20

12

3 7654 11

54

6 1817

3 4567

7 8

109

8 91011

12 13

1312

14

141 11

PNX 8541 : ANALOGUE AV

5HR2

FHRA

IHRC

IHRE

FHRG

IHRK

IHRN

IHRP

IHRR

IHRS

IHRU

47R

220R

47R

12p

2HS8

IHUL

2HS2

2HTP

2HSK

2HSD

2HTU

2HUC

IHRA

330n

100p

2HS9

3HRS

27R

5HR0

IHRF

330n

100p

2HS3

5HRC

IHRH

330n

100p

2HTR

5HR5

330n

100p

5HR3

330n

100p

5HRG

330n

100p

3HS9

100R

3HST

100R

3HT4

27R

3HS3

390R

3HS4

390R

2HUR

1u0

560p

7 8

101 19 20

10 11

IHUM

100p

2HSM

2HSE

2HTV

IHRQ

3HUP

3HUN

3HRU

27R

3HRR

27R

3HSH

27R

3HS1

IHRL

27R

100p

3HRW

27R

100p

3HSM

27R

100p

2HSR

100n

2HSS

100n

IHUN

3HUR

3HU6

1K0

7HUR-1 BC847BPN

330R

3HU5

330R

3HUU

3HUT

IHUR

BC847BPN 7HUR-2

IHUS

10K

3HUW

100R

IHUT

82K

IHUP

IHUQ

47K

IHUU

7HUX BC847BW

3HUX

560R

3HUY

2HUW

68R

33R

5HUX

220R

1u0

100n

2HUX

100p

2HUY

9101112

NAME

11

12

12 13

14

7H00-9 PNX8535

VIDEO ANALOGUE

VSYNC_OUT SPARE10

ADC1

CVBS1_Y1_YC1 CVBS2_Y2_YC2

ADC2

CVBS3_Y3_YC3

ADC2

ADC3

ADC4

DAC1

DAC2

3V3_VIDEO_DAC

3V3_TEST_DAC

3V3_VIDEO_REF

1

2

IHTA

IHTB

IHTC

F1 F2

Y1_G1

G1

Y2_G2

G2

Y3_G3 Y4_G4

REF1

SPARE20

CVBS4

REF2

SPARE30

Pr1_R1 Pr2_R2 Pr3_R3 Pr4_R4

REF3

SPARE40

Pb1_B1 Pb2_B2 Pb3_B3 Pb4_B4

REF4

SPARE52 SPARE53

FM_P FM_N

SPARE60

C1|YC1 C2|YC2 C3|YC3

REF6

CVBS1_Y

CVBS2_C

HSYNC_IN VSYNC_IN

VDAC_BIAS

G3 G4

H1 H2

J1 J2 J3 J4

K1 K2 K3 K4

L1 L2

P4 P5 R1 R2 R3 R4

M1

IF_N

M2

IF_P

M3 M4 M5

N1

N2 N3

C4

N4 P1 P2 P3

A3

P

B3

N

A2

P

B2

N

ITV-VGA-H

F3 T4

ITV-VGA-V

A1

AGC

D4 C3

L4

K5

IHR1

IHR2

IHR3

IHR4

IHRV

FHR4

IHR6

3HS675R

IHR7

FHR5

ITV-VGA-H

IHR8

ITV-VGA-V

FHR6

3011 4K7

FHR7

2HT3 22n

2HT5 22n

2HTK 22n

2HSV22n

2 3 4

3 4

IHTD

2HTG

22n

3HTA

IHTE

2HTH

22n

3HTB

IHTF

2HTJ

22n

3HTC

2HUZ 22n

22n2HT7

22n2HT6

22n2HUN

22n2HUP 22n2HST

22n2HSW 22n2HT9

22n2HSY

75R3HVB 75R3HS7

4K73HS5

2HT2

100n

2HT0

2HSZ

56

5HTA

IHTG

330n

47R

100p

2HTA

47R

2HTB

47R

2HTC

100n

2HT4

22n

2HT1

100p

10u

5HTB

330n

5HTC

330n

2HUK 270p

5HR7

30R

5HR6

30R

2HTD

IHTH

2HTE

IHTJ

2HTF

270p2HUL

+3V3-PER

62

3HTD

27R

100p

3HTE

27R

100p

3HTF

27R

100p

IHUV

3HVA

22R

47R

3HUZ

56

7

8 13

8

IHRB

IHRM

IHRD

IHRG

IHRJ

IHRT

2HUQ

2HS7

22n

3HRV

2HS4

22n

3HRT

2HS1

22n

3HRP

2004

22n

3HSJ

2HSJ

22n

3HS2

2HSC

22n

3HRY

2HSA

22n

3HSN

2HT8

22n

3HS8

2HSP

22n

3HSV

2HUB

22n

3HT3

2HSU

3HUM

22n

75R

3HUL

93 45

CLASS_NO

-- -- --

2009-05-15

2009-07-31

SV

+12V

CVBS_MON_OUT

DC398881

3PC333

YiPing Guo

151098

CARD-Y

AV1-Y

VGA_G

CARD-PB

VGA_R

CARD-PR

VGA_B

CVI-Y

CVI-PB

CVI-PR

FRONT_Y-CVBS

FRONT_C

CVBS-BO

IF-N

IF-P

AV1-CVBS

TO ITV

Monitor

Connector

SETNAMECHN

1

2

3

BDS MODULES

PCB SB PB522_LN

16 17

1615

12

SUPERS.

2009-05-15

DATECHECK

1615

16157

183

2004 C7 2HS1 B7 2HS2 B7 2HS3 B8 2HS4 A7 2HS7 A7 2HS8 A7 2HS9 A8 2HSA E7 2HSC D7 2HSD D7 2HSE D8 2HSJ C7

A

2HSK D7 2HSM D8 2HSP F7 2HSR G8 2HSS H8 2HST E3 2HSU G7 2HSV F3 2HSW F3 2HSY F3 2HSZ H3 2HT0 H4

B

2HT1 H4 2HT2 G4 2HT3 C3 2HT4 G4 2HT5 D3 2HT6 E3 2HT7 D3 2HT8 E7 2HT9 F3 2HTA A4 2HTB B4

C

2HTC C4 2HTD A4 2HTE B4 2HTF C4 2HTG A3 2HTH B3 2HTJ B3 2HTK E3 2HTP C7 2HTR C8 2HTU E7 2HTV E8

D

2HUB G7 2HUC I7 2HUK F4 2HUL F4 2HUN E3 2HUP E3 2HUQ I6 2HUR I8 2HUW H10 2HUX H10 2HUY I10 2HUZ D3

E

3011 G3 3HRP B7 3HRR B8 3HRS A8 3HRT B7 3HRU A8 3HRV A7 3HRW D8 3HRY D7 3HS1 C8 3HS2 D7

F

3HS3 G8 3HS4 H8 3HS5 G3 3HS6 F3 3HS7 F3 3HS8 F7 3HS9 E8 3HSH C8 3HSJ C7 3HSM E8 3HSN E7 3HST F8

G

3HSV F7 3HT3 G7 3HT4 G8 3HTA A4 3HTB B4 3HTC C4 3HTD A5 3HTE B5 3HTF B5 3HU5 I9 3HU6 I8 3HUL I7

H

3HUM I7 3HUN I8 3HUP H8 3HUR H8 3HUT I9 3HUU H9 3HUW I9 3HUX I10 3HUY I10 3HUZ H5 3HVA H6

I

3HVB F3 5HR0 B8 5HR2 A8 5HR3 D8 5HR5 C8 5HR6 G4 5HR7 G4 5HRC C8 5HRG E8 5HTA A4

5HTB B4 5HTC B4 5HUX H11 7H00-9 C1 7HUR-1 I8 7HUR-2 I9 7HUX I10 FHR4 F3 FHR5 G3 FHR6 G3 FHR7 G3 FHRA A7 FHRG C7 IHR1 C3 IHR2 D3 IHR3 E3 IHR4 F3 IHR6 F3 IHR7 F3 IHR8 G3 IHRA A8 IHRB A6 IHRC A7 IHRD B6 IHRE B7 IHRF B8 IHRG C6 IHRH C8 IHRJ C6 IHRK C7 IHRL C8 IHRM D6 IHRN D7 IHRP E7 IHRQ E8 IHRR E7 IHRS F7 IHRT G6 IHRU G7 IHRV F3 IHTA A3 IHTB B3 IHTC B3 IHTD A4 IHTE B4 IHTF B4 IHTG A5 IHTH B5 IHTJ B5 IHUL I7 IHUM I8 IHUN H8 IHUP I8 IHUQ I8 IHUR H9 IHUS I9 IHUT I9 IHUU I10 IHUV H5

19 20

19

2

3139 283 3017

43

C

ROYAL PHILIPS ELECTRONICS N.V. 2009

1714

17 189

18

12

03101

19 20

2009-07-31

2009-07-282

A

B

C

D

EE

E

F

G

H

I

J

K

L

M

N

O

P

A2

2009-Oct-09

18730_511_090918.eps 090918

Circuit Diagrams and PWB Layouts

SSB: TCON Pwr. & Backl. Contr.

EN 69PB52.3HU LA 10.

A

B

C

D

14

32

5 8

6

123 4

Panel TCON Power & Backlight control

A

RES

CTRL1-STBY_LAMP-ON

B

LAMP-ON-OUT

IG90

3G90

100R

7

131211109

A

56

3G90 B4 9G90 B3 9G91 C3 IG90 B4

B

C

A

D

B

is prohibited without the written consent of the copyright

owner.

E

F

G

H

I

J

CTRL2-STBY_BACKLIGHT-CTRL_RESET-P3

CTRL4-STBY_SELECT-PWM-ANA

BACKLIGHT-OUT

9G90

9G91

C

12

3 456

MULTI 12NC : 3139_283_30162

BD 12NC : 3139_283_30172

1 8

3 4

56

7

CLASS_NO

2009-05-15

2009-07-31

NAME

SV

3PC333

-- -- --

YiPing Guo

DC398881

E

C

F

G

H

I

SETNAMECHN

2009-07-31

2

1

2

3

BDS MODULES

PCB SB PB522_LN

SUPERS.

2009-05-15

DATECHECK

3139 283 3017

43

C

ROYAL PHILIPS ELECTRONICS N.V. 2009

13

03101

1211109

2009-07-282

J

A3

132

2009-Oct-09

18730_512_090918.eps

090918

SSB: Audio Left / Right

Circuit Diagrams and PWB Layouts

EN 70PB52.3HU LA 10.

1

15

1 7 14

A A

A

B

21

2

3

326 20

32

3

123 4

4

56 15

5

54

6 1716

6

7

8

9

56

11

10

11 127

119

1110

7 8

12

13

13 20

13

14

14 15

15

91011

16

168

16

12 13

17

7151413121

AUDIO LEFT/RIGHT

C

D

E

F

G

GG

G

H

I

J

K

K K

K

owner.

is prohibited without the written consent of the copyright

L

M

N

A

5D14

B

+AUDIO-POWER

2D12

GNDSND

FD20

10u

1n0

C

4D02

4D03

GNDSND

2D74

cDA0

RES

VDD

TDA8932BTW

2

-2V8

3

-2V8 15

-2V8 14

-2V8 12

-7V6 10

31

11

-8V2 18

4V7

5

3V2

6

-2V6 13

EMC

1n0

7D10

IN1P

IN1N

IN2P

IN2N

INREF

OSCREF

OSCIO

HVPREF

DREF

ENGAGE

POWERUP

TEST

CGND VSSA

7

VDDA

8

VDDA

CLASS D

POWER

AMPLIFIER

VSSP

9

26

23

VSSA

2D26

GNDSND

Φ

33

GNDSND

GND_HS

100n

29

20

VDDP

VSSD|HW

1

16

2D55 100n

2D56 100n

GNDSND

BOOT1 BOOT2

STAB1 STAB2

17

OUT1

OUT2

DIAG

HVP1

HVP2

32

100n

2D27

ID25

27

ID28

22

30

19

28 21

25 24

34 35 36 37 38

VIA

39 40 41

2D35

EMC

FD27

1n0

2V6

4

GNDSND

ID36

2D44 15n

8V9

2D45 15n

3V9

ID38

ID39

-1V3

2D48 100n

VSS

VSSA

VSS

3D37

PDPLCD

*

6K810K

3D20

22K

12K

3D21 3D22

10K

6K8

10K

6K8

3D23 3D24

22K12K

3D25

6K8

10K

ID23

3D21

12K

*

1u0

3D24

12K

*

2D42

2D43

3D34

3D44

10K

ID33

100n 100n 39K3D27

GNDSND

100n2D47

4K7

2D32 220p

ID27

ID29

2D36 220p

ID34

ID35

NC

ID41

ID42

ID46

ID48

2D51

470n

2D52

3D25

MUTE

3D43

ID22

2D301u0

10K

ID26

2D33 1u0

10K 10K3D23

2D34

ID31

ID32

2D391u0

10K

VSSA

FD30

VDDA

47K

3D41

ID53

10K

12K

3D45

FD21

FD25

BAS316

ID52

FD28

6D01

+3V3

3D40

GNDSND

3D20

*

3D22

* *

*

10K

A-STDBY

7D16 PDTC114ET

+AUDIO-L

-AUDIO-R

DETECT-1V2-2V5-3V3

ID51

10K

GNDSND

7D13 BC847BW

22K

3D39

GNDSND

67

D

E

F

G

AUDIO-MUTE

ON-MODE

H

ENABLE-3V3

123 45

FD16

10R3D14

2D10

GNDSND GNDSND

ID18

GNDSND

2D16

3D29

3D19

ID24

2D31

ID30

2D37

10R

2D49 1n0

2D53 1n0

VDDA

12V2

100n

VDD 12V2

25V220u

5D12

22u

10R

1n0

GNDSND

1n0

5D13

22u

ID43

ID49

2D38

-AUDIO-POWER

1n0

2D14

GNDSND

ID19

2D25

2D24

220n

2D29

1n0

470n

2D28

1n0

2D40

2D41

470n

1n0

220n

22R

GNDSND

220n

GNDSND

2D46

ID44

2D50

ID50

3D42

8 910111213

5D15

ID20

3D18

22R

2D58

5D16 220R

2D57

3D36

220K

3D38

220K

GNDSND

10u

GNDSND

2n2

1u0

2D54

GNDSND

220R5D17

10u

2D5F

FD19

3D15

2D11

5D10 30R5D11 30R

ID17

GNDSND

100n

2D17

220u 25V

VSSA

-12V2

VSS

FD13

10R

TO SPEAKERS

+3V3

3D28

3D33

47K

7D15 BC847BW

1 2

3

4

1735446-4

3D35

GNDSND

1D12

7D11

BC857BW

FD29

10K

LEFT + GNDSND GNDSND RIGHT -

AUDIO-PROT

GNDSND

(DC-DC)

STANDBY

7D71 PDTC114ET

FD22

FD23 FD24 FD26

ID40

ID45

7D12 BC847BW

ID47

GNDSND

DC-DETECTION

18

19

1918

1D12 E12 2D10 B8 2D11 B12 2D12 B7 2D14 B10 2D16 C9 2D17 C12 2D24 E10 2D25 E10 2D26 E6 2D27 E7

A

2D28 E9 2D29 E10 2D30 E5 2D31 E9 2D32 E6 2D33 F5 2D34 F5 2D35 F8 2D36 F6 2D37 F9 2D38 F9 2D39 F5

B

2D40 F9 2D41 F10 2D42 F5 2D43 F5 2D44 F8 2D45 F8 2D46 G10 2D47 G5 2D48 G7 2D49 G9 2D50 G10 2D51 G6

C

2D52 G5 2D53 G9 2D54 H11 2D55 H7 2D56 H7 2D57 F11 2D58 E11 2D5F H11 2D74 D2

3D14 B8 3D15 B11

D

3D18 E11 3D19 E9 3D20 E4 3D21 E5 3D22 F4 3D23 F4 3D24 F5 3D25 F4 3D27 F5 3D28 F12 3D29 G9 3D33 G12

E

3D34 G5 3D35 G12 3D36 G11 3D37 G2 3D38 G11 3D39 G2 3D40 G4 3D41 G4 3D42 G10 3D43 H4 3D44 H5 3D45 H4

F

4D02 H1 4D03 H1 5D10 C11 5D11 C8 5D12 E9 5D13 F9 5D14 B7 5D15 B11 5D16 F11 5D17 F11 6D01 G4

G

7D10 E6 7D11 F12 7D12 G11 7D13 G3 7D15 G12 7D16 H4 7D71 G13 FD13 B12 FD16 B8 FD19 B11 FD20 B8 FD21 E4

H

FD22 F11 FD23 F11 FD24 F11 FD25 F4 FD26 F11 FD27 F7 FD28 F4 FD29 G12

FD30 G4 ID17 C12 ID18 C8 ID19 E10 ID20 E11 ID22 E4 ID23 E5 ID24 E9 ID25 E7 ID26 F4 ID27 F5 ID28 F7 ID29 F5 ID30 F9 ID31 F4 ID32 F4 ID33 F5 ID34 F6 ID35 F6 ID36 F7 ID38 F7 ID39 G7 ID40 G12 ID41 G6 ID42 G6 ID43 G9 ID44 G10 ID45 G11 ID46 G6 ID47 G11 ID48 G6 ID49 G9 ID50 G10 ID51 G2 ID52 H4 ID53 H5 cDA0 E2

20

A

B

C

D

E

F

G

H

I

J

J18J

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O

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MULTI 12NC : 3139_283_30162 BD 12NC : 3139_283_30172

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2 14

O

DC398881

CLASS_NO

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1

-- -- --

2009-05-15

2009-07-3123

NAME

YiPing Guo

SV

6

65

3

32

4

5

6

7

8 157 20

8

8 9

9

10

104

11

11 1211

12

13

14

1413

CHECK DATE

157

15

EMANTESNHC

BDS MODULES

PCB SB PB522_LN

SUPERS.

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16

17161514

17

1716

2

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192

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14

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2009-Oct-09

SSB: Audio Headphone

Circuit Diagrams and PWB Layouts

EN 71PB52.3HU LA 10.

A

B

C

D

is prohibited without the written consent of the copyright

owner.

is prohibited without the written consent of the copyright

E

F

G

2HVA C1 2HVB B3 2HVC B3

3

2HVD C1 2HVE C1 2HVG C7

3HV4 B8 3HV7 B8

3HV8 D7 3HVN C4 3HVP B4

5

54

3HVR C4 3HVS C4 3HVT C8

3HVW B6 3HVX C6 3HVY C8

64

3HVZ C8 5HV0 A3 7HV0-1 B2

7

7HV0-2 D4 7HV1 D8 7HVA-1 B7

7HVA-2 B9 9HV1 D3 FHV1 B4

FHV2 C4 FHVA C9 IHV0 D2

IHV1 A3 IHV2 C2 IHV3 C2

IHV4 C2 IHV5 C2 IHV6 C3

IHV7 C3 IHVA B6 IHVB B7

5678

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IHVC B73HV3 B7 IHVD B8 IHVE B8

IHVF B9 IHVG D7 IHVH D8

1186

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2HV2 C4 2HV3 D2 2HV4 C4

2

2HV6 C1 2HV7 B9 2HV9 C2

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1332

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D

E

F

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D

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30R

5HV0

IHV1

10u

100n

2HVB

2HVC

7HV0-1 TPA4411RTJ

2HV9

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IHV2

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IHV5

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3

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2HVE

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2HVA

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SDR

SDL

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7

5

IHV0

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2

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19

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9

L

IHV7

11

R

4 6

8

NC

12 16 20

3HVP

33R

3HVN

33R

3HVS

33R

3HVR

33R

7HV0-2 TPA4411RTJ

22 23

FHV1

FHV2

VIA

2HV4 2HV2

AUDIO-HDPH-L-AP

1n0

AUDIO-HDPH-R-AP

1n0

24 25

AUDIO-RESET

IHVB

3HVWIHVA

22K

3HVX

2HVG

1n0

RESERVED

3HV3

22K

3HV8

22K

IHVC

IHVG

7HVA-1 BC847BPN

2

1

3HVY

3

IHVE

6

1

47K

7HV1

2

BC847BW

+3V3-STANDBY+3V3

3HVZ

IHVH

3HV7

22K

47K

+3V3-STANDBY

IHVF

3HV4

IHVD

22K

5

4

3

2HV7

7HVA-2 BC847BPN

100n

A-PLOP

B

C

RES

3HVT

FHVA

12K

A-PLOP-HDPH

D

10u

2HV3

9HV1

H

I

J

12

MULTI 12NC : 3139_283_30162 BD 12NC : 3139_283_30172

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2 1312

2 1311109

H

3 456

DC398881

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1

-- -- --

2009-05-15

2009-07-3123

NAME

YiPing Guo

SV

7

3

43

5 121110

54

6

7

CHECK DATE

8

BDS MODULES

PCB SB PB522_LN

7 8 9

EMANTESNHC

SUPERS.

2009-05-15

43

C

9

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1513010

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H

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18730_514_090918.eps

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Circuit Diagrams and PWB Layouts

SSB: SPDIF/Debug/RS232 Int.

EN 72PB52.3HU LA 10.

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B

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owner.

is prohibited without the written consent of the copyright

E

F

G

21

1

1J10 D2 1J11 D1 1JEA D4

2 3

1JEB D5 1JEC D6 1JED D7

1JEF D9 1JEG D9

1JEH C91JEE D8 2J11 D1

2J61 B3 2J62 B2 2JE1 A7

45

4

2JE2 B5 2JE3 B7 2JE4 B7

2JE5 B5

3J11 D3 3J12 D3

3J50 A2 3J51 B3 3J53 B3

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SPDIF

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B

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1

2

3

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2J61

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3JE0 D5 3JE1 C5 3JE2 B8

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220R

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53

3JE3 C8

6J11 D3 6J12 C3

6

7J50 B2 7JE2 A6 FJ11 D2

FJ12 D2 FJ13 D1 FJEC A6

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7

IJ56 B3 IJ57 B3 IJ58 B2

8 9

IJE1 B6 IJE4 B7 IJE2 B7 IJE3 B62J12 D2

IJE5 B6 IJE6 B6

IJE7 B6 IJE8 B7 IJE9 B6

98

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IJED C6 IJEE C7 IJEF C5

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DEBUG / RS232 INTERFACE

+3V3-STANDBY

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10 11 12 13

131211

9

A

B

C

A

FJEC

7JE2

ST3232C

16

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2JE2

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2JE5

3JE1

100R

3JE0

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100n

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1

SPI-OUT

RXD

TXD

RXD0

TXD0

IJEF

IJE1

1

IJE3

3

IJE5

4

IJE6

5

IJE7 IJE8 IJE9

IJEB IJED

RS232

C1+

C1-

C2+

C2-

T1

IN

T2

R1

IN OUT

R2

Φ

V+

T1

OUT

T2

R1 R2

GND 15

2JE1

100n

IJE2

6

V-

2

IJE4

2JE3 100n

100n2JE4

D

B

E

4111

IJEA

701

IJEC

2131

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98

3JE2

100R

3JE3

100R

RSRX

RSTX

E

F

C

1JEH

REF EMC HOLE

G

RXD_PC

TXD_PC

D

H

UART SERVICE CONNECTOR

I

J

123

MULTI 12NC : 3139_283_30162 BD 12NC : 3139_283_30172

1

2

2 3

1J11

FJ13

2J11

100p

3

1J10

2J12

FJ12

FJ11

100R

100p

+3V3-STANDBY

4

4 13

3J12100R

3J11

2

3

6J11

BAV99 COL

IJ12

1JEA

REF EMC HOLE

1

1JEB

REF EMC HOLE

45 8 9

DC398881

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-- -- --

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2009-07-3123

YiPing Guo

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SV

7

56

5 8

6

2009-Oct-09

7

1JEC

REF EMC HOLE

1JED

REF EMC HOLE

1JEE

REF EMC HOLE

1JEF

REF EMC HOLE

1JEG

REF EMC HOLE

67

SETNAME

1

CHECK DATE

8 13

BDS MODULES

PCB SB PB522_LN

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2009-05-15

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ROYAL PHILIPS ELECTRONICS N.V. 2009

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12

16

D

H

I

2009-07-31

2

2 2009-07-28

JJ

A3

18730_515_090918.eps

090918

SSB: HDMI

Circuit Diagrams and PWB Layouts

EN 73PB52.3HU LA 10.

11 12

9JA7 B9

9JA1 B9

FJ40 F2

9JA2 A9

FJ41 F2

9JA4 B2

FJ42 F2

9JA5 B2

FJ43 F2

12

FJ44 G2 FJ45 G1 FJ4A E4 FJ4B E4

15

IJ4A E7

IJ4C F5 IJ4D F6 IJ4E G6

1514

IJ4F G6 IJ4G G5 IJ4H G6 IJ4J E10 IJA0 B2

13 14

13 20

FJB5 C9

FJB0 B9

FJA6 C1

FJA0 B2 FJA1 B2 FJA2 B2 FJA3 B2 FJA5 C2

FJA7 C1 FJAA A4 FJAB A4 FJAC C69JA6 B9

FJB1 B9 FJB2 B9 FJB3 B9 FJB4 C9

FJBA A11 FJBB A11 FJBC C13 IJ40 F2

16 17

IJAF C5

IJAA A7 IJAB A7

IJAG C5 IJAH C6

IJAC B5

IJAJ C6

IJAD C5

IJBA A15

IJAE C5

IJBB A15 IJBC B12 IJBD B13 IJBE C13 IJBF C13FJ4C G6

IJBG C12 IJBH D13IJ4B E7

18

12 13 14 15

19

19181716

20

A

B

7JA2 C5 7JB1 B12 7JB2 D12 9J40 F23JB0 A14 9J41 F2

10

9J42 F2 9J43 E1 9J44 A1 9J4G E11 9JA0 B2

4

1

A

B

1J40 E1 1J41 F4 1J42 F4 1J43 F4 1J44 H5

1J45 A8 1JA0 A1 1JA1 B3 1JA2 B4 1JA3 B4

2

1JA4 D5 1JB0 A9 1JB1 B11 1JB2 B11 1JB3 B11

1

3

1JB4 D12

2JA0 B4

2J40 F4

2JA1 B5 2JA2 D4

2J41 F5 2J42 H5

2JA4 D6

2J43 H6

2JB0 B11

2 3 45678 91011

45

2JB1 B12 2JB2 D12 2JB3 D13

3J40 E7 3J41 E7

3J44 F6 3J45 F6 3J46 F6 3J47 G6 3J48 G6

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3J49 H4 3J4B H4 3J4C G5 3J4D G6 3J4E E10

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3JA5 B6 3JA6 B6 3JA7 C6 3JA8 C6 3JA9 D4

711

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3JAB D4

3JB4 B13

3JAC C4

3JB5 B13

3JAD C6

3JB6 B14 3JB7 C13 3JB8 C13

3JB1 A14

3JB9 D11 3JBB D12 3JBC C12 3JBD D14

5J40 F5

8

5JA0 B4 5JB0 B12 6J41 H4 6J42 H4 6J43 H4

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6JB3 D11

6JA1 D4

7J41 F4

6JA2 D4

7J42 G5

6JA3 D4

7J4A E11

6JB1 D11 6JB2 D11

7JA1 B4

HDMI

C

A

D

B

E

FJA6

F

C

G

D

H

9J44

1JA0

1 2

3

4 5 6 7

8

9 10 11 12 13 14 15 16 17 18 19 2021 2223

FJA7

9JA0

FJA0

FJA1

9JA4

FJA2

FJA3 FJA5

HDMI CONNECTOR 2

3JA9

1JA2

1K0

BAT54 COL

1JA3

M24C02-WDW6

6JA1

BAS316

FJAA

FJAB

2JA0

6JA2

5JA0

30R

100n

7JA1

1

0

2

1

3

2 SDA

3JAC

22R

RES

100K

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BAS316

IJAC

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EEPROM

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2JA2

100n

2JA1

84

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IJAG

BC847BW

4n7

1JA4

IJAD

7

WC

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6

SCL

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5

7JA2

10K

3JA4

FJAC

22R3JA7

22R3JA8

IJAH

10n

2JA4

ARX2+

ARX-DDC-SCL

ARX2-

ARX-DDC-SDA

ARX1+

AIN-5V

ARX1-

ARX0+

ARX0-

ARXC+

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3JAD

3JA0

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3JA6

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1J45

1JB0

1 2

3

4

3

5

4

6

5

7

6

8

7

9

8

10

9

11

10

12

11

13

12

14

13

15

14

16

15

17

16

18

17

19

18

20

19

21

2021 2223

2223 2425 2627 2829

HDMI CONNECTOR 3

IJBA

22R

PBRX-DDC-SCL

PBRX-DDC-SDA

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0001-0015

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3JB9

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7JB1

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2JB2

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10K

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6

SCL

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IJBG

7JB2

3JB4

FJBC

22R3JB7

22R3JB8

IJBH

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BRX2+

BRX-DDC-SCL

BRX-DDC-SDA

BRX2-

BRX1+

BIN-5V

BRX1-

BRX0+

BRX0-

BRXC+

FJB0

9JA1

9JA6

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BRX-HOTPLUG

BRXC-

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EDID NVM

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6JB3

3JB0

3JB1

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3JB5

3JBD

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C

A

D

B

E

F

C

G

D

H

E

I

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1J40

F

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is prohibited without the written consent of the copyright

owner.

is prohibited without the written consent of the copyright

owner.

G

L

M

H

N

1

O

P

MULTI 12NC : 3139_283_30162 BD 12NC : 3139_283_30172

1

9J43

1

2

3

4

5

6

7

8

9 10 11 12

FJ40

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9J41

FJ41

9J42

FJ42

FJ43 FJ44

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3J4E

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3J4F

3J4G

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12

CLASS_NO

3PC333

-- -- --

2009-05-15

2009-07-31

YiPing Guo

DC398881

1

2

3

SETNAMECHN

BDS MODULES

PCB SB PB522_LN

15 16 17

+3V3-STANDBY

SUPERS.

DATECHECK

16

2009-05-15

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14

3139 283 3017

43

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ROYAL PHILIPS ELECTRONICS N.V. 2009

18

IJ4A

22R

PCRX-DDC-SDA

IJ4B

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13

10

12

12114

13

3J49

1J42

1K0

BAT54 COL

1J43

M24C02-WDW6

6J41

BAS316

FJ4A

FJ4B

2J40

6J42

5J40

30R

100n

7J41

1

0

2

1

3

2 SDA

RES

3J4B

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2J42

2J41

100n

8

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4

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1J44

IJ4D

7

WC

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CRX-DDC-SDA

CRX1+

CIN-5V

CRX1-

CRX0+

CRX0-

CRXC+

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CRXC-

PCEC-HDMI

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CRX-DDC-SDA

CIN-5V CRX-HOTPLUG

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3J40

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3J45

3J4D

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3 4567

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I

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G

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M

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N

513111

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2009-07-31

2

2009-07-282

P

2019

20

A2

03101

17

2009-Oct-09

18730_516_090918.eps

090918

SSB: HDMI Switch

Circuit Diagrams and PWB Layouts

EN 74PB52.3HU LA 10.

A

B

C

D

is prohibited without the written consent of the copyright

owner.

E

F

G

H

1

2JC0 B7 2JC1 B7

2 3

2JCA C7 2JCB C7

2JCC C7 2JCD C8

2JCE C8 2JCF C7

32

2JCG C7 2JCH C7

123

4

2JCJ C8 2JCK C8

2JCL C8 2JCM C8

56

2JCN C9 2JCP C9

2JCQ C9 2JCR C9

65

2JCS C9 2JCT C10

3J00 B2

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7

3J02 A2 3J07 B7

3JC1 B8 3JC2 D5

8 9

8

3JC3 D5 3JC4 D5

3JC5 D5

5JCA C7

5JCF C7 6J00 A7

7J00 A4 9J00 B2

1049

FJ00 B2 FJ01 B2

FJ02 B2 FJ07 C53J01 B2

1110

11 12

FJ08 D5 FJ09 D4

FJ10 D4 FJC0 B8

12

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IJC0 B6

13

A

B

BB

HDMI SWITCH

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AVEE

1

AMUXVCCDVCC

AUX

606672

+5V-MUX

7J00

82

AD8191ASTZ

VTTI

VTTO

OTO

OCL

PP

OP0 ON0

OP1 ON1

OP2 ON2

OP3 ON3

COM0 COM1 COM2 COM3

AUX

+5V-ON

6J00

BAT54 COL

+5V-CON

+3V3

TO ST7101

+5V-CON

IJC0

3J07

1K0

5JCA

220R

5JCF

220R

2JCA

2JCF

FJC0

1n0

100n

2JC0

2JC1

3JC1

100K

FJCA

2JCB

2JCG

100n

2JCC

2JCH

1n0

100n

2JCD

2JCJ

10u

100n

2JCE

2JCK

1n0

100n

2JCL

1n0

2JCM

1n0

2JCP

2JCN

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+3V3-DIG

FJCF

1n0

100n

2JCR

2JCQ

100n

1n0

2JCT

2JCS

+3V3-ANA

1n0

7 19 57 69

35 41

100

48 76

EN

77

EQ

34 33

37 36

40 39

43 42

90

89 88 87

FJ09

99 98 97

FJ10

96

94 93 92 91

86 85 84 83

81 80

79 78

3JC2 22R 3JC3 22R

A0 A1 A2 A3

B0 B1 B2 B3

C0 C1 C2 C3

D0 D1 D2 D3

FJ07 FJ08

+3V3-ANA

3JC4

47K

3JC5

47K

RXC+

RXC-

RX0+

RX0-

RX1+

RX1-

RX2+

RX2-

DDC-SCL

DDC-SDA

+3V3-ANA

PDRX-DDC-SCL

PDRX-DDC-SDA

+3V3-ANA

PBRX-DDC-SCL

PBRX-DDC-SDA

PARX-DDC-SCL

PARX-DDC-SDA

PCRX-DDC-SCL PCRX-DDC-SDA

A

B

C

D

E

C

D

E

F

G

HH

A

B

C

D

E

RESET-SYS-DETECT

SCL-SSB

SDA-SSB

DRXCDRXC+ DRX0DRX0+ DRX1DRX1+ DRX2DRX2+

BRXCBRXC+ BRX0BRX0+ BRX1BRX1+ BRX2BRX2+

ARXCARXC+ ARX0ARX0+ ARX1ARX1+ ARX2ARX2+

CRXCCRXC+ CRX0CRX0+ CRX1CRX1+ CRX2CRX2+

9J00

3J00

47R

3J01

47R

+3V3-DIG

+3V3-ANA

10K

RES

3J02

FJ00

FJ01 FJ02

47

44

RESET

26

0

27

1

I2C_ADDR

28

2

49

SCL

50

SDA

30

0

31

PP_CH

1

45

0

46

PP_PRE

1

14

IN

A0

15

IP

17

IN

18

A1

IP

20

IN

A2

21

IP

23

IN

24

A3

IP

2

IN

B0

3

IP

5

IN

B1

6

IP

8

IN

B2

9

IP

11

IN

12

B3

IP

64

IN

C0

65

IP

67

IN

C1

68

IP

70

IN

C2

71

IP

73

IN

C3

74

IP

52

IN

D0

53

IP

55

IN

D1

56

IP

58

IN

D2

59

IP

61

IN

D3

62

IP

63

75

32

38

AVCC

Φ

I2C

DVEE

4

29

95

10

162551

I

J

123 456

MULTI 12NC : 3139_283_30162 BD 12NC : 3139_283_30172

1

1 12

2

7 8

DC398881

CLASS_NO

3PC333

YiPing Guo

8

1

CHECK DATE

-- -- --

2009-05-15

2009-07-3123

NAME

SV

7

32

4

456

65

7

EMANTESNHC

BDS MODULES

PCB SB PB522_LN

SUPERS.

2009-05-15

9

910113 10

43

C

910

2

22009-07-28

3139 283 3017

18

13010

ROYAL PHILIPS ELECTRONICS N.V. 2009

11

12 13

2009-07-31

13

I

J

A3

18730_517_090918.eps

090918

2009-Oct-09

SSB: Analog Externals

Circuit Diagrams and PWB Layouts

EN 75PB52.3HU LA 10.

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B

C

D

E

G

H

K

is prohibited without the written consent of the copyright

owner.

M

N

1

12

F

I

J

L

3

4

43

6

7

8 17

9 18

10 11

115 14

12

12 13

13

148 9 16

1552

15 1610

17

18

19

20

ABA

12

3 4

5678

9

10

ANALOGUE EXTERNALS

A

1E10-1

MTJ-032-37BAA-432 NI

2

1

YELLOW

B

AV1

C

1E10-2

MTJ-032-37BAA-432 NI

5 6 4

WHITE

1E10-3

MTJ-032-37BAA-432 NI

8

9 7

RED

D

E

AV3

BLACK

GREEN

SPDIF OUT

1E30-2

2

6

4

FE26

5

3

Y

1

F

G

WHITE

RED

1E30-1

8

(L)

PR

9

7

H

FE10

3E12

100R

3E14

100R

3E30

100R

5E38

75R

3E10

100p

3E13

100K

2E13

100p

2E15

3E15

100K

IE30

100p

2E31

75R

3E34

30R

100p

2E39

IE41

3E40

100R

2E41

100p

2E10

FE11

1010

4E20

4E21

FE12

1011

FE30

FE34

100p

1E45

2E34

FR36

100p

2E36

1E46

FE38

1E47

FE40

FE44

1E44

100p

2E44

6E10

1E39

PESD5V0S1BA

1n0

6E12

2E12

PESD5V0S1BA

1n0

6E14

2E14

PESD5V0S1BA

1E51

1E50

1n0

2E30

6E306E34

PESD5V0S1BA

75R

3E36

6E36

PESD5V0S1BA

22p

2E38

6E38

PESD5V0S1BA PESD5V0S1BA

1n0

6E40

2E40

PESD5V0S1BA

75R

3E44

6E44

PESD5V0S1BA

IE10

AV1-CVBS

RES

CARD SLOT Y Pb Pr INTERFACE

1E21

1

Card_Aud_out_L

Card_Aud_out_R

FE22 FE20 FE21

FE23

2

3

4 5 6 7

8

BM08B-SRSS-TBT

910

5E21

33R

100p

2E21

5E20

33R

100p

2E20

5E22

33R

100p

2E22

CVI-AIN3-R

CVI-PB

SPI-OUT

CVI-AIN3-L

CVI-PR

CVI-Y

CARD-Y

CARD-PB

CARD-PR

75R

3E38

75R

3E27

75R

3E17

IE11

AUDIO-IN1-L

IE12

AUDIO-IN1-R

1010 C3 1011 C3 1E10-1 A2 1E10-2 B2 1E10-3 C2 1E21 B10 1E30-1 G2 1E30-2 E2 1E39 B4 1E44 H3 1E45 E3 1E46 F3 1E47 G3 1E50 H3

A

1E51 D3 2E10 B3 2E12 C4 2E13 C5 2E14 C4 2E15 C5 2E20 C8 2E21 B8 2E22 D8 2E30 D4 2E31 D4

B

2E34 E3 2E36 F3 2E38 G4 2E39 G4 2E40 H4 2E41 H4 2E44 H3

3E10 B4 3E12 B4 3E13 C4 3E14 C4 3E15 C4

C

3E17 D7 3E27 C7 3E30 D4 3E34 E4 3E36 F4 3E38 B7 3E40 G4 3E44 H4

4E20 C3 4E21 C3 5E20 C8 5E21 B8

D

5E22 C8 5E38 G4 6E10 B4 6E12 C4 6E14 C4 6E30 D4 6E34 E4 6E36 F4 6E38 G4 6E40 H4 6E44 H4

E

FE10 A3 FE11 B3 FE12 C3 FE20 B9 FE21 B9 FE22 B9 FE23 C9 FE26 E2 FE30 D3 FE34 E3 FE38 F3 FE40 G3

F

FE44 H3 FR36 F3 IE10 A6 IE11 B6 IE12 C6 IE30 D4 IE41 G4

B

C

D

E

F

G

H

I

J

K

G

L

M

H

M

N

O

P

MULTI 12NC : 3139_283_30162 BD 12NC : 3139_283_30172

1

2

3PC333

-- -- --

2009-05-15

2009-07-31

YiPing Guo

DC398881

10

SETNAMECHN

1

2

3

BDS MODULES

PCB SB PB522_LN

SUPERS.

DATECHECK

15 16

O

2

2009-07-31

2009-07-282

3139 283 3017

P

03101

19

17

43

C

ROYAL PHILIPS ELECTRONICS N.V. 2009

18 19 20

18

2009-05-15

1615

A2

12

3

541

3 4

6

7 8

7

8 910

5678

9

10

11

12

13 14

13

9

CLASS_NO

NAME

SV

143 45 20

18730_518_090918.eps

090918

2009-Oct-09

SSB: Side I/O

Circuit Diagrams and PWB Layouts

EN 76PB52.3HU LA 10.

A

B

C

D

owner.

is prohibited without the written consent of the copyright

E

F

G

H

A

B

C

21

AUDIO-MUTE

3

5

64

7

98

10

123 4567

3E96

47R

SIDE I/O

FE9DFE9C

5E76

220R

1E90

9E90 1 2

3

4 5 6 7

8

9

10 11

5E70 220R

FE90

5E71 220R 9E91 5E72 220R

FE91

FE92

FE93 FE94 FE95 FE96 FE97

5E74 220R

5E77 220R

5E79 220R

5E81 220R12

FE9H

220R5E73

220R5E75

220R5E78

220R5E80

2E90

100p

2E91

100p

2E92

FE98

FE99

3E92

FE9A

100R

3E93

FE9E

100R

1n0

2E93

5E90

FE9F

30R

100p

2E94

5E91

FE9G

30R

100p

2E95

IE90

IE91

FE9B

IE93

FRONT_C

FRONT_Y-CVBS

FRONT-AIN5-L

FRONT-AIN5-R

AUDIO-HDPH-L-AP

AUDIO-HDPH-R-AP

SIDEIO-DETECT

11

A

B

C

12

1E90 A2 2E90 B4 2E91 B4 2E92 B4 2E93 B5 2E94 C5 2E95 C5

3E92 A5 3E93 A5 3E96 B1

5E70 A2 5E71 A2 5E72 A2 5E73 A2 5E74 A2 5E75 A2 5E76 B1 5E77 B2 5E78 B2 5E79 B2 5E80 B2 5E81 B2 5E90 B5 5E91 C5 9E90 A5 9E91 A5 FE90 A2 FE91 A2 FE92 A2 FE93 B2 FE94 B2 FE95 B2 FE96 B2 FE97 B2 FE98 A5 FE99 A5 FE9A A5 FE9B A6 FE9C A1 FE9D A1 FE9E B5 FE9F B5 FE9G C5 FE9H B3 IE90 A6 IE91 A6 IE93 B6

13

A

B

C

D

E

F

G

H

I

J

MULTI 12NC : 3139_283_30162 BD 12NC : 3139_283_30172

1

123 456

EMANTESNHC

BDS MODULES

PCB SB PB522_LN

SUPERS.

2009-05-15

910113 45

6

2009-Oct-09

DC398881

CLASS_NO

3PC333

-- -- --

2009-05-15

2009-07-3123

NAME

SV

7

1

YiPing Guo

CHECK DATE

8 12 132

7

I

2

2009-07-31

2 2009-07-28

3139 283 3017

43

C

ROYAL PHILIPS ELECTRONICS N.V. 2009

20

13010

18730_519_090918.eps

J

A3

090918

SSB: External Video

Circuit Diagrams and PWB Layouts

EN 77PB52.3HU LA 10.

A

B

C

D

owner.

is prohibited without the written consent of the copyright

owner.

is prohibited without the written consent of the copyright

E

F

G

H

A

B

C

D

1

1002-1 A1 1012 A2 1013 A2 1014 B3

1002-1

2 3

1116 A3 1121 B3 1123 C3 1124 D3

2002 D1 2007 D8 2011 C3 2030 D1

3

2031 D2 2073 A7 2074 D5 2075 C5

3010 A9 3020 C5 3026 D5

12

1A 2A 3A 4A 5A 6A 7A 8A 9A

10B 11B 12B 13B 14B 15B

2002

220R5002 220R5003

SDA_VGA

SCL_VGA

330p

1012

330p

2030

FE0A FE0B

FE09

FE01 FE02 FE03

FE04

FE05 FE06

FE07 FE08

1B 2B 3B 4B 5B 6B 7B 8B 9B

1617 1819

RSRX RSTX

1013

2031

330p

5002 A1 5003 A1 5005 A4 5008 C4

6

654

6

5013 A43008 A9 5014 B4 5015 C4 5016 D4

7

6006 C5 6007 A3 6008 B3 6013 C3

6014 B3 6015 C3 6016 D3 7005-1 C6

8

7005-2 C7 7005-3 D6 7005-4 D7 7005-5 D6

7005-6 D7 7020 A7 FE01 B1 FE02 B1

9

91

9

FE03 B1 FE04 C1 FE05 C1 FE06 C1

FE07 C1 FE08 C1 FE09 D1 FE0A A1

10

FE0B A1 FE0C A8 IE01 A5 IE02 A5

432

4

3027 D8 3029 C8 3055 A4 3056 B4

3057 B4 3064 C3 3065 C5 3066 D5

5

5 8

5

3067 C4 3068 D4 3069 A8 3070 A8

3 45678 9

DDC-5V

10K

3069

FE0C

10K

3070

7

6

5

2007

3029

100R

3027

100R

100n

IE0C

4

IE0D

8

12

3064

150R

1116

1121

1014

IE05

2011

1123

1124

100n

6007

6008

6014

6013

BAS316

6015

6016

6006

BAS316

2K2

3065

220R

3066

220R

+5V-ON

IE01

IE02

IE03

2075

IE09IE07

2074

100p

VGA_R

VGA_G

VGA_B

3020

100R

3026

100R

IE0B

74LVC14APW

A0EI80EI

74LVC14APW

7005-1

1

7005-3

5

7005-5

11

+3V3

7020 M24C02-WDW6

1 2

3

714

10

714

DDC-5V

(256x8)

EEPROM

0 1

ADR

2 SDA

74LVC14APW

VGA_H

2

74LVC14APW

VHA_V

6

74LVC14APW

2073

100n

8

Φ

WC

SCL

4

7005-2

3

714

7005-4

9

714

7005-6

13

714

5005

33R

75R

3055

BZX384-C6V8

IE04

5008

220R

BZX384-C6V8

5016

220R

BZX384-C6V8

3056

3057

5013

33R

75R

5014

33R

75R

DDC-5V

5015

2u2

IE06

3067

3068

114

112

11 12

IE03 B5 IE04 C4 IE05 C3 IE06 C4

SCL_VGA

SDA_VGA

3008

DDC-5V

4K7

IE07 D4 IE08 C5 IE09 D5 IE0A C6

3010

4K7

ITV-VGA-H

ITV-VGA-V

12 13

IE0B D6 IE0C C8 IE0D D8

131211101

13

A

B

C

D

A

B

C

D

E

EDE

E

F

G

H

123

I

J

MULTI 12NC : 3139_283_30162 BD 12NC : 3139_283_30172

1

1 98

1

2

21

2 10

45678

DC398881

CLASS_NO

3PC333

-- -- --

2009-05-15

2009-07-3123

NAME

SV

7

3

4

4 11 12 132

456 9

5

6

65

7

YiPing Guo

8

1

CHECK DATE

EMANTESNHC

BDS MODULES

PCB SB PB522_LN

SUPERS.

2009-05-15

910

109

10 11

43

C

9

3139 283 3017

13010

ROYAL PHILIPS ELECTRONICS N.V. 2009

11

12

12 133

IFII

I

2009-07-31

2

2009-07-28

2

J

13

1312

A3

21

18730_520_090918.eps

090918

2009-Oct-09

SSB: USB 2.0

Circuit Diagrams and PWB Layouts

EN 78PB52.3HU LA 10.

A

B

C

D

E

G

H

K

is prohibited without the written consent of the copyright

owner.

M

F

I

J

L

162

21

3 201716137654

3

1

4

2

3 45678

7

8 1918151498

1110

12

14

9

10 11 12

155 131211109

16

USB 2.0

5N04

FN02

30R

5N00

30R

5N01

30R

5N02

30R

5N03

30R

3N12

3N03

2N22

2N23

IN14

100n

2N07

IN17

100n

2N15

2N14

IN03

100n

2N16

2N18

2N17

IN12

2N04

IN02

2N05

V3.6V3.6u2

2N19

2N20

100n

2N06

22u

100n

2N21

2

IN10

2N13

100n

2N25

PCI-AD0 PCI-AD1 PCI-AD2 PCI-AD3 PCI-AD4 PCI-AD5 PCI-AD6 PCI-AD7 PCI-AD8

PCI-AD9 PCI-AD10 PCI-AD11 PCI-AD12 PCI-AD13 PCI-AD14 PCI-AD15 PCI-AD16 PCI-AD17 PCI-AD18 PCI-AD19 PCI-AD20 PCI-AD21 PCI-AD22 PCI-AD23 PCI-AD24 PCI-AD25 PCI-AD26 PCI-AD27 PCI-AD28 PCI-AD29 PCI-AD30 PCI-AD31

100n

IN09

100n

18 43 58

70 69 68 67 66 65 63 62 59 57 56 54 53 52 51 50

34 33 31 30

29 28 27 26 22 21 20 15 14 13 12 10

82

VREG3V3

VREG1V8

89

84

IN06

16

0 1 2

3

4 5 6 7

8

9

AD

10 11 12 13 14 15 16 17 18 19 20

AD

21 22 23 24 25 26 27 28 29

30 31

91

IN04

100n

2N09

2N10

2N08

FN00

27p

12M

1N01

27p

4K7

IN01

100R3N13

IN00

11K

IN13

IN11 IN08

100n

2N11

2N12

7N00

112540

55

71

ATX1

ATX2

19

32

VCCIO

GNDD

49

647694

98

77

AUX 1 2

CONTROLLER

95

ISP1564HL

74

IN05

1

XTAL

75

2

5

RST

96

SCL

97

SDA

7

PCICLK

99

PME

60

C0 BE0

48

C1 BE1

35

C2 BE2

23

C3 BE3

9

REQ

8

GNT

24

IDSEL

4

INTA

36

FRAME

39

DEVSEL

37

IRDY

42

CLKRUN

47

PAR

44

PERR

45

SERR

38

TRDY

41

STOP

81

RREF

78

OC1

79

PWE1

83

DM1

85

DP1

87

OC2

88

PWE2

90

DM2

92

DP2

6

100

HOST

PCI

VDDA

Φ

86

AUX

1

2733

93

3V3

1V8

VAUX

GNDA GNDA

17

466172

80

A

B

C

+3V3

D

RESET-SYS-DETECT

PCI-CLK-USB20

IRQ-PCI

USB20-OC1

USB20-1-DM USB20-1-DP

USB20-OC2

USB20-2-DM USB20-2-DP

PCI-CBE0

PCI-CBE1

PCI-CBE2

PCI-CBE3

PCI-REQ-USB20 PCI-GNT-USB20 PCI-AD22 IRQ-PCI PCI-FRAME PCI-DEVSEL PCI-IRDY

PCI-PAR PCI-PERR PCI-SERR PCI-TRDY PCI-STOP

USB20-OC1 USB20-PWE1 USB20-1-DM USB20-1-DP

USB20-OC2 USB20-PWE2 USB20-2-DM USB20-2-DP

E

+3V3

3N18

10K3N01

10K

PCI-GNT-USB20

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FN01

F

3N19 10K

+3V3

G

+3V3

3N20 10K

3N17

15K3N14 15K3N15

15K3N16 15K

17

18 19 20

1N01 D5 2N04 C8 2N05 C8 2N06 C9 2N07 A5 2N08 C5 2N09 C5 2N10 C5 2N11 C5 2N12 C6 2N13 D9 2N14 B5 2N15 B6 2N16 C5

A

2N17 C5 2N18 C6 2N19 C8 2N20 D8 2N21 D8 2N22 D5 2N23 D5 2N25 E9

3N01 E1 3N03 G5 3N12 E5 3N13 F5

B

3N14 G1 3N15 G1 3N16 G1 3N17 G1 3N18 F1 3N19 G1 3N20 G1

5N00 A4 5N01 B4 5N02 B4 5N03 C4

C

5N04 A4 7N00 D6 FN00 D5 FN01 E2 FN02 F4 IN00 F5 IN01 E5 IN02 C8 IN03 B6 IN04 C6 IN05 D5 IN06 C8

D

IN08 G5 IN09 D8 IN10 D9 IN11 G5 IN12 C8 IN13 G5 IN14 A6 IN17 B6 IN19 F2

E

F

G

A

B

C

D

E

F

G

H

I

J

K

L

M

N

O

P

MULTI 12NC : 3139_283_30162 BD 12NC : 3139_283_30172

1

2

12

3 4

45

5

3 456

76321

8 9101112

9876

2009-Oct-09

10

7 8 9

1211

13

10

CLASS_NO

-- -- --

2009-05-15

2009-07-3123

NAME

SV

DC398881

3PC333

YiPing Guo

11 12

1

BDS MODULES

PCB SB PB522_LN

CHECK

513114

EMANTESNHC

SUPERS.

2009-05-15

DATE

16

16 17

N

O

2009-07-31

2

2 2009-07-28

3139 283 3017

P

43

C

ROYAL PHILIPS ELECTRONICS N.V. 2009

815141

1817

22

13010

19 20

P

A2

18730_521_090918.eps

090918

SSB: USB 2.0

Circuit Diagrams and PWB Layouts

EN 79PB52.3HU LA 10.

A

B

C

D

owner.

is prohibited without the written consent of the copyright

E

F

1

32 12

4

123 4567

USB 2.0

A

LM3526MX-LNOPB

FN30

FN31

FN32

FN33

FN36 FN37 FN38

B

C

USB20-PWE1

USB20-OC1

USB20-OC2

USB20-PWE2

USB20-1-DM USB20-1-DP

USB20-2-DM USB20-2-DP

56

5

+5V-ON

IN30

2N30

9N30

7N30

*

1

ENA_

2

FLGA

3

FLGB

4

ENB_

GND

*

7

IN

8

OUTA

5

OUTB

6

100n

61

25V220u

2N31

IN31

FN34

5N30

220R

5N33

220R

2N33

FN35

7

2N32

6.3V47u

25V220u

RES

2N34

47u 6.3V

FN39

FN40 FN41

FN42

832

1N30 1 2

3

TO SIDE AV USB

4

9

98

10

10 11

11 12

A

B

C

1N30 C6 2N30 A3 2N31 A3 2N32 B5 2N33 B4 2N34 B5 5N30 B4 5N33 B4 7N30 B3 9N30 B3 FN30 B2 FN31 B2 FN32 B2 FN33 B2 FN34 B4 FN35 B4 FN36 C2 FN37 C2 FN38 C2 FN39 C5 FN40 C5 FN41 C5 FN42 C5 IN30 A3 IN31 B4

13

A

BB

B

C

D

E

F

G

H

I

J

MULTI 12NC : 3139_283_30162 BD 12NC : 3139_283_30172

1

2 3

2 12

12

43 11

4 105

5

3 4567

DC398881

CLASS_NO

3PC333

-- -- --

2009-05-1532

2009-07-31

NAME

SV

7

6

7

1

YiPing Guo

8 91213

8

SETNAMECHN

BDS MODULES

PCB SB PB522_LN

SUPERS.

DATECHECK

2009-05-15

9

10 11

43

C

3139 283 3017

03101

23

ROYAL PHILIPS ELECTRONICS N.V. 2009

G

H

I

2

2009-07-31

2009-07-282

J

A3

13

18730_522_090918.eps

090918

2009-Oct-09

SSB: IR LED

Circuit Diagrams and PWB Layouts

EN 80PB52.3HU LA 10.

AA

A

B

C

D

owner.

is prohibited without the written consent of the copyright

E

F

220R

220R 220R

220R

+5V-ON

5

54

FN50

FN51 FN52

FN53 FN54

FN55

2N55

100p

2N54

100p

8

6

645

4

7

567

8

9

109

10

1086

A

3N51

3N52-1

100R

3N52-2

100R

3N52-3

100R

3N52-4

5

100R

100p

2N53

2N52

2N51

100p

IN50

IN51

18

IN52

27

IN53

36

IN54

4

3N53 100R

KEYBOARD

LED1-OUT

LED2-OUT

IR-out-iB

LIGHT-SENSOR

RC

B

C

11

1N51 B2 2N51 C4 2N52 C4 2N53 C3 2N54 C3 2N55 C3

3N51 B5 3N52-1 B5 3N52-2 B5 3N52-3 C5 3N52-4 C5 3N53 C6

5N50 B3 5N51 B3 5N52 C3 5N53 C3 5N54 C3 5N55 C3 5N57 B2 FN50 B3 FN51 C3 FN52 C3 FN53 C3 FN54 C3 FN55 C3 FN56 C2 FN57 B2 FN58 B2 FN59 C2 FN60 C2 FN61 C2 FN62 C2 FN63 C2 IN50 B5 IN51 B5 IN52 B5 IN53 C5 IN54 C5

1

1 13

12

21

A

B

C

3

32

3 45

1

432

2 3

IR LED

+3V3-STANDBY

5N57

220R

FN57

1N51

8

7 6 5 4

3

2 1

TO LED PANEL

FN58 FN59 FN60

FN61 FN62

FN63

FN56

5N50

5N51 5N52

5N53

5N54

5N55

121099

1211

12

13

131211

A

B

C

D

E

EDE

E

F

G

H

I

J

MULTI 12NC : 3139_283_30162 BD 12NC : 3139_283_30172

1

15

2 9

2 128 9

123 45

DC398881

CLASS_NO

3PC333

-- -- --

2009-05-15

2009-07-3123

NAME

YiPing Guo

SV

7

4

3

32 1312

3

4

56

5

6543

6

7

8

84

6

1

PCB SB PB522_LN

CHECK DATE

7

EMANTESNHC

BDS MODULES

SUPERS.

2009-05-15

10 11

10 1110

9

1098

3139 283 3017

43

C

ROYAL PHILIPS ELECTRONICS N.V. 2009

11

2

2 2009-07-28

24

13010

132

12 13

12

13

18730_523_090918.eps

2009-07-31

A3

G

H

HH

H

I

J

090918

2009-Oct-09

Circuit Diagrams and PWB Layouts

SSB: PNX85xx: Video Streams

EN 81PB52.3HU LA 10.

A

B

C

D

is prohibited without the written consent of the copyright

owner.

is prohibited without the written consent of the copyright

E

F

1

15

12

32

4

4 11 12

56

8

7

832

3 456

VIDEO STREAMS

7H00-10 PNX8535

C25 D23 C23 C29 C30 D30 A28 A29

A24 D25 C24

A30 D29 B23

E5 A4 B4 C6 D6 E6 A5 B5

D5 C4 C5 A6

0 1 2

3

4 5 6 7

MOVAL MOSTRT VS2_MOCLK_CI

VS1 1 2

0 1 2

3

4 5 6 7

FEVAL FESOP FECLK FEERR

VIDEO STREAMS

CA_MDO

CD

FEDATA TNR_TSDI

CA_MDI

MIVAL

MISTRT

MICLK

RST

DATA_DIR

DATA_EN

OOB_EN ADD_EN

VCCEN VPPEN

A26

0

C27

1

B27

2

A27

3

A25

4

D26

5

C26

6

B26

7

B25 B30 B28

RX2RX2+

B24 D22 A22 C22 B22 A23 D24

RREF-PNX8535

RX1RX1+ RX0RX0+ RXCRXC+

DDC-SCL DDC-SDA

PNX 8535 : DIGITAL VIDEO IN

7H00-3

PNX8535

P

RX_0

N P

RX_1

N P

RX_2

N P

RX_C

N

CEC

SCL SDA

RREF

HDMI

HOT_PLUG

DDC

3HW1

12K

IHW1

B8 B9 A7 A8 B6 B7 A9 A10

C10 C9 E10

C7

A

B

C

+3V3

3HW2

4K7

FE-ERR

FE-DATA0 FE-DATA1

FE-DATA2 FE-DATA3

FE-DATA4 FE-DATA5 FE-DATA6

FE-DATA7

FE-VALID FE-SOP FE-CLK FE-ERR

9

7

11109

3HW1 C5 3HW2 C1

7H00-10 A3 7H00-3 B6 9HW0 C1 IHW1 C6

12

13106

13

A

B

C

A

D

D10

B

HOT-PLUG

E

F

C

G

9HW0

123

H

I

J

MULTI 12NC : 3139_283_30161 BD 12NC : 3139_283_30171

1

2 131211

SUPERS.

DATECHECK

7

2009-05-15

10

3139 283 3017

43

C

ROYAL PHILIPS ELECTRONICS N.V. 2009

03101

111098 98

456

DC398881

CLASS_NO

3PC333

-- -- --

2009-05-15

2009-07-31

NAME

SV

7

32 1312

4

65

6543

7

1

2

3

YiPing Guo

SETNAMECHN

BDS MODULES

PCB SB PB522_LN

G

H

I

2009-07-31

2

2009-07-282

J

25

A3

18730_524_090918.eps

090918

2009-Oct-09

Circuit Diagrams and PWB Layouts

SSB: PNX85xx: Dig. Video Out / LVDS

EN 82PB52.3HU LA 10.

A

B

C

D

owner.

is prohibited without the written consent of the copyright

E

F

G

12 5

12

3 9

12

4

43

5

3 45

PNX8541 : DIGITAL VIDEO OUT / LVDS

A

7H00-8

PNX8535

B

C

D

VID_OUT_TTL

R0_Y2 R1_Y3 R2_Y4 R3_Y5

R_OUT

R4_Y6 R5_Y7 R6_Y8 R7_Y9

G0_UV2 G1_UV3 G2_UV4 G3_UV5

G_OUT

G4_UV6 G5_UV7 G6_UV8 G7_UV9

B0_UART B1_UART

B2_GPIO B3_GPIO

B_OUT

B4_UV0 B5_UV1

B6_Y0 B7_Y1

VSYNC

HSYNC

AUX2

1H10

1 2

3

5

4

CLK

AJ19

AH19

AG19

AF19 AK20

AJ20

AH20

AG20

AG17

AF17 AK18

AJ18

AH18

AG18

AF18 AK19

AF15 AK16

AJ16

AH16

AG16

AF16

AJ17

AH17

AK17 AH15

AG15

AF20

FHF1

FHF2

FHF3

IHW7

IHW8

3HW6 3HW7 3HW8

3HW9 3HWA 3HWB 3HWC 3HWD

3HWE

3HWF 3HWG 3HWH

3HWI

3HWJ 3HWK

3HWL

3HWM 3HWN 3HWO 3HWP 3HWQ 3HWR 3HWS

3HWT

3HWU 3HWV 3HWX 3HWY

22R 22R 22R 22R 22R 22R 22R 22R

IHW5

DV-R0_Y2 DV-R1_Y3 DV-R2_Y4 DV-R3_Y5 DV-R4_Y6 DV-R5_Y7 DV-R6_Y8 DV-R7_Y9

DV-G0_UV2 DV-G1_UV3

IHW6

DV-G2_UV4 DV-G3_UV5 DV-G4_UV6 DV-G5_UV7 DV-G6_UV8 DV-G7_UV9

DV-B0_UART2-RX DV-B1_UART2-TX

DV-B2_DEBUG-BREAK

DV-B3_AUDIO-MUTE

DV-B4_UV0 DV-B5_UV1

DV-B6_Y0 DV-B7_Y1

DV-CLK

DV-VS DV-HS

DV-FF_DE

DV-B0_UART2-RX

DV-B1_UART2-TX

6

7F7

7H00-7

PNX8535

LVDS

AG21

IREF

AK23

P

CLK

AJ23

N

AK21

P

A

AJ21

N

AK22

P

B

AJ22

N

AH22

P

C

AG22

N

AH23

P

D

AG23

N

AK24

P

E

AJ24

N

8

86 13

67

3HW5

IHWA

IHWB IHWC IHWD

IHWE

IHWF IHWG IHWH

IHWJ

IHWK

IHWL IHWM IHWN

12K

VDDA-LVDS

TX8535oCLK+

TX8535oCLK-

TX8535oA+

TX8535oA-

TX8535oB+

TX8535oB-

TX8535oC+

TX8535oC-

TX8535oD+

TX8535oD-

TX8535oE+

TX8535oE-

10

A

B

C

D

1H10 D2

3HW5 B6 3HW6 B3 3HW7 B3 3HW8 B3 3HW9 B3 3HWA B3 3HWB B3 3HWC B3 3HWD B3 3HWE B3 3HWF B3 3HWG B3 3HWH B3 3HWI B3 3HWJ C3 3HWK C3 3HWL C3 3HWM C3 3HWN C3 3HWO C3 3HWP C3 3HWQ C3 3HWR C3 3HWS C3 3HWT C3 3HWU C3 3HWV D3 3HWX D3 3HWY D3

7H00-7 B5 7H00-8 A2 FHF1 D2 FHF2 D2 FHF3 D2 IHW5 B4 IHW6 B4 IHW7 C3 IHW8 C3 IHWA B6 IHWB B6 IHWC B6 IHWD C6 IHWE C6 IHWF C6 IHWG C6 IHWH C6 IHWJ C6 IHWK C6 IHWL C6 IHWM C6 IHWN C6

11109

11 12

12

13

A

B

C

D

E

F

G

12

H

I

J

MULTI 12NC : 3139_283_30162 BD 12NC : 3139_283_30172

1

2 3

3 4

3

4

45 9

5

6

567

DC398881

CLASS_NO

3PC333

-- -- --

2009-05-15

2009-07-31

NAME

SV

7

1

2

3

YiPing Guo

88

SETNAMECHN

BDS MODULES

PCB SB PB522_LN

SUPERS.

DATECHECK

2009-05-15

910

10

H

I

2

2009-07-31

2009-07-282

J

3139 283 3017

03101

12

26

132 11

1312

43

C

ROYAL PHILIPS ELECTRONICS N.V. 2008

11

J

A3

18730_525_090918.eps

090918

2009-Oct-09

Circuit Diagrams and PWB Layouts

SSB: FPGA 1080p: Interface

EN 83PB52.3HU LA 10.

3F65 D5 3F66 D5

RxP3eA-_G7

RxP3eA+_G6

RxP3eB-_G5

RxP3eB+_G4

RxP3eC-_G3

RxP3eC+_G2

RxP3eCLK-_G0

RxP3eD-_R9

RxP3eD+_R8

RxP3eE-_R7

RxP3eE+_R6

8

3F67 D5

3F69 E5 3F70 E5

21

3F39 C2 3F40 C2

3F41 C2 3F42 C2

A

1

3F35 B2 3F36 B2

3F37 B2 3F38 C2

1

B

A

C C

C

FPGA -single/dual odd LVDS-output

D

is prohibited without the written consent of the copyright

owner.

is prohibited without the written consent of the copyright

E

F

G

H

B

C

D

E

TxFPGAoA-

TxFPGAoA+

TxFPGAoB-

TxFPGAoB+

TxFPGAoC-

TxFPGAoC+

TxFPGAoCLK+

TxFPGAoCLK-

TxFPGAoD-

TxFPGAoD+

TxFPGAoE-

TxFPGAoE+

FPGA 1080p : INTERFACE

3F35

270R

3F37

270R

3F38

270R

3F40

270R

3F41

270R

3F43

270R

3F44

270R

3F46

270R

3F47

270R

3F49

270R

3F50

270R

3F52

270R

3 94

321

3

32

3F43 C2 3F44 D2

3F45 D2 3F46 D2

2

3F36

120R

3F39

120R

3F42

120R

3F45

120R

3F48

120R

3F51

120R

4

3F47 D2 9F35 B93F49 D2 3F48 D2

3F50 E2

3 4

RxP3oA-_B9

RxP3oA+_B8

RxP3oB-_B7

RxP3oB+_B6

RxP3oC-_B5

RxP3oC+_B4

RxP3oCLK+_B3

RxP3oCLK-_B2

RxP3oD-_B1

RxP3oD+_B0

RxP3oE-_G9

RxP3oE+_G8

3F51 E2 3F52 E2

5

3F53 B5 3F54 B553F56 C5

3F55 B5 3F59 C5

TxFPGAeA-

TxFPGAeA+

TxFPGAeB-

TxFPGAeB+

TxFPGAeC-

TxFPGAeC+

TxFPGAeCLK+

TxFPGAeCLK-

TxFPGAeD-

TxFPGAeD+

TxFPGAeE-

TxFPGAeE+

6

654

6

3F57 C5 3F58 C5

3F60 C5

3F61 C5 3F62 D5

7

3F63 D5 3F64 D5

FPGA -dual even LVDS-output

3F53

270R

3F54

3F57

3F60

3F63

3F66

3F69

120R

3F55

270R

3F56

270R

3F58

270R

3F59

270R

3F61

270R

3F62

270R

3F64

270R

3F65

270R

3F67

270R

3F68

270R

3F70

270R

678

RxP3eCLK+_G1

98

91011

921

9F36 B9

9F37 B9 9F38 C9

10

9F39 C9 9F40 C9

9F41 C9 9F42 C9

9F43 C9 9F44 D9

1110

11

9F45 D9 9F46 D93F68 E5

910

FPGA - bypass

Tx8535oA- RxP3oA-_B9

Tx8535oA+ RxP3oA+_B8

Tx8535oB- RxP3oB-_B7

Tx8535oB+

Tx8535oC- RxP3oC-_B5

Tx8535oC+ RxP3oC+_B4

Tx85

35oCLK+ RxP3oCLK+_B3

Tx8535oCLK- RxP3oCLK-_B2

Tx8535oD- RxP3oD-_B1

Tx8535oD+ RxP3oD+_B0

Tx8535oE- RxP3oE-_G9

Tx8535oE+ RxP3oE+_G8

9F35

9F36

9F37

9F38

9F39

9F40

9F41

9F42

9F43

9F44

9F45

9F46

1254

121110

12

RxP3oB+_B6

13

A

B

C

D

E

A

B

C

D

E

F

G

H

I

II

I

J

1

MULTI 12NC : 3139_283_30162

BD 12NC : 3139_283_30172

1

15

1

2 121110

2

32

32 13

3

43 12

4

456

DC398881

CLASS_NO

3PC333

-- -- --

2009-05-15

2009-07-31

NAME

YiPing Guo

SV

7

6

5

6

7

8

7

1

2

3

CHECK DATE

PCB SB PB522_LN

EMANTESNHC

BDS MODULES

SUPERS.

2009-05-15

9101098

9

1098554

43

9

3139 283 3017

C

ROYAL PHILIPS ELECTRONICS N.V. 2009

118

11

13010

12

018

27

18730_526_090918.eps

2009-Oct-09

2

2009-07-31

2 2009-07-28

A3

131211

132 13

I

J

090918

Circuit Diagrams and PWB Layouts

SSB: FPGA 1080p: Power & Control

EN 84PB52.3HU LA 10.

A

B

C

D

owner.

is prohibited without the written consent of the copyright

E

F

G

HGH

H

I

A

B

C

D

1

26

2

3

42

43

123

5

4

65

6543

5

7

6

8

9

7

1010 11

8

118 9

9

FPGA 1080P : POWER + CONTROL

1

6

5

2FA6

IFA2

IFA3

IFA9

1u0

5FA1

30R

FFB2

nCSO

DCLK

ASDO

DATA0

+2V5-STAB

FPGA_TCK

FPGA_TDO

FPGA_TMS

FPGA_TDI

+3V3

CONF-DONE

nCONFIG

+3V3-FPGA

3FA1

IFA6

+3V3-FPGA

FFA7

7FA0 BC847BW

3FB2

10K

3FC6

100K

3

2

10K

+3V3-FPGA

3K3

3FA0

6FA0

SML-310

7FA1 BC847BW

100K

3FA2

RES

3FC7

IFA7

1

100K

2FC1

3FC8

FFAA

100K

1u0

ON-MODE

IFA1

7FA3

SCD

1K0

VCC

Φ

GND

EPCS4SI8

8

7

CS_

DCLK

ASDI

4

5

IFB2

4

10n

2FA7

+3V3-FPGA

1K0

RES

3FA3

1K0

3FB9

2

LD3985M25

1

3

INH BP

1K0

DATA

7FA4

COM

2

3FA4

3

OUTIN

+3V3-FPGA

10n

2FF2

2FF1

FFA0

1u0

4u7

1u0

4u7

1u0

IFB3

2FA8

2FA9

2FC0

2FD1

2FE1

2FF3

4u7

220u 25V

10n

100n

5FA2

2FA0

5FB1

+3V3

+2V5

IFB1

220R

5FB2

220R

STPS2L30A

+1V2-STAB

+2V5-STAB

E

220R

2FB9

5FA6

30R

2FD0

5FA7

30R

2FE0

5FA8

30R

2FF0

9FA1

6FA6

9FA2

6FA7

RES

2FA1

1u0

2FB0

10n 10n

2FD2

10n

2FE2

10n

2FF4

7FA5

LD1117DT12

3

OUTIN

COM

1

2FA2

2FB1

2FD8

2FE3

2FF6

10n

2FA4

2FA3

10n

2FB2

2FB3

10n

2FD4

2FD3

10n

2FE5

2FE4

FFB0

10n

2FF7

FFB1

2

1u0

2FC2

F

1

2

10n

2FB4

10n

2FD5

FFA3

10n

2FE6

+Vin-FPGA

3

+1V2-PLL

10n

2FB5

10n

2FD9

10n

+1V2-STAB

10n

2FB6

10n

2FD6

+2V5out-FPGA

FFA1

22u

10n

2FF5

2FB7

RES

FFA2

2FE7

10n

2FD7

1FA0

JTAG

11 12

+1V2-FPGA

10n

+3V3

+3V3-FPGA

10n

+3V3

FFA9

FFA4

FFA5

FFA6

FFA8

3FA7 100R

3FB8 100R

1 2

3

4 5 6 7

8

9

10

100R3FA6

100R3FA8

2FA5

100n

+3V3-FPGA

3FA5

45678 9

12

12 13

12111098

1FA0 E4 2FA0 B2 2FA1 B2 2FA2 B2 2FA3 B3 2FA4 B3 2FA5 C5 2FA6 C6

A

B

C

D

E

F

2FA7 C6 2FA8 F2 2FA9 B2 2FB0 B2 2FB1 B2 2FB2 B3 2FB3 B3 2FB4 B3 2FB5 B3 2FB6 B3 2FB7 B4 2FB9 B2 2FC0 B2 2FC1 D8 2FC2 F3 2FD0 C2 2FD1 C2 2FD2 C2 2FD3 C2 2FD4 C3 2FD5 C3 2FD6 C3 2FD7 C4 2FD8 C2 2FD9 C3 2FE0 D2 2FE1 D2 2FE2 D2 2FE3 D2 2FE4 D3 2FE5 D3 2FE6 D3 2FE7 C4 2FF0 D2 2FF1 A5 2FF2 A5 2FF3 D2 2FF4 D2 2FF5 B4 2FF6 D2 2FF7 D3

3FA0 B8 3FA1 B8 3FA2 B8 3FA3 E6 3FA4 E6 3FA5 E5 3FA6 E5 3FA7 E5 3FA8 F5 3FB2 C8 3FB8 F5 3FB9 F6 3FC6 B8 3FC7 C8 3FC8 D8

5FA1 A7 5FA2 B1 5FA6 C1 5FA7 D1 5FA8 D1 5FB1 B1 5FB2 B1 6FA0 B8 6FA6 E1

13

6FA7 F1 7FA0 C8 7FA1 B9 7FA3 A6 7FA4 B6 7FA5 E2 9FA1 E1 9FA2 E1 FFA0 A3 FFA1 B4 FFA2 C4 FFA3 D3 FFA4 E4 FFA5 E4 FFA6 F4 FFA7 C8 FFA8 F4 FFA9 F4 FFAA C9 FFB0 D3 FFB1 E3 FFB2 D7 IFA1 A6 IFA2 A6 IFA3 A6 IFA6 B8 IFA7 C8 IFA9 B6 IFB1 B1 IFB2 C6 IFB3 E2

A

B

C

D

E

F

G

H

I

J

MULTI 12NC : 3139_283_30162 BD 12NC : 3139_283_30172

2

1

2 3

2

DC398881

CLASS_NO

3PC333

YiPing Guo

8

1

CHECK DATE

-- -- --

2009-05-15

2009-07-3123

NAME

SV

7

3

49

5 11

6

654

6541

7

EMANTESNHC

BDS MODULES

PCB SB PB522_LN

SUPERS.

2009-05-15

9

10

2

2009-07-31

2 2009-07-28

J

3139 283 3017

43

C

ROYAL PHILIPS ELECTRONICS N.V. 2009

28

13010

12 13

13121110

J

A3

18730_527_090918.eps

090918

2009-Oct-09

Circuit Diagrams and PWB Layouts

SSB: FPGA 1080p: I/O Banks

EN 85PB52.3HU LA 10.

3F93 C7 3F94 C7

31

3F95 B9 3F98 B9

2 3

2

A

3F75 B2

B

3F76 B4

3F77 A2 3F78 C2

1

C

4

7F90-1 A3 7F90-2 A8

2

7F90-3 D8 7F90-4 A12

3

5

7F90-5 D12 7F90-6 D3

6 17 18 19

6

7F90-7 F13 9F90 B2

9F91 B4 9F92 C13

7

9F93 E14 9F94 B5

81 13 14 15

9F95 B5 9F96 B11

9F97 B11 9F98 B11

FF90 B4 FF91 B9

1098

FF92 B9 FF93 C7

45678 9

FF94 C7 IF73 B9

11

IF74 D9 IF75 D9 IF78 C13

1211109

IF76 B13 IF89 B4

IF81 E12 IF82 E12

1312

IF83 E12 IF84 E13

14

IF85 F13 IF86 F12

IF87 G12 IF88 G12

IF90 B2

10 11

16

IF91 B2 IF92 B2

12

171615

IF93 C7 IF94 B9

IF95 B9 IF96 B2

13 14

187

19

20

A

B

C

FPGA 1080P : I/O BANKS

D

A

E

B

F

C

G

DV-CLK-PLL

PCI-CLK-PNX5050_CLK-MOP

DV-CLK

DATA0 DCLK

+3V3-FPGA

7F90-1

RES

3F77

1K01K0

9F90

IF90

3F75

IF91

IF96

47R

IF92

3F78

EP2C5F256C7N

Φ

CONTROL

0

H1

1

J2

2

J1

3

H16

CLK

CONF_DONE

4

H15

5

J15

6

J16

7

F1

DATA0

H4

DCLK

STATUS

CONFIG

MSEL

G5H2

CE

0 1

TCK TMS TDO

TDI

3F76 10K

FF90

M13

J5

L13

J13

9F91

IF89

K12

F2 G1 G2 H5

+3V3-FPGA

nCONFIG

CONF-DONE

MSEL1

FPGA_TCK FPGA_TMS FPGA_TDO

MSEL1

+3V3

ASDO nCSO

SD1-DQ9 SD1-CS SD1-DQ10

9F94

SD1-A5 SD1-DQ13 SD1-DQ14 SD1-DQM SD1-CKE SD1-DQ15

RES

9F95

SD1-DQ16 SDA-AMBI-3V3 SCL-AMBI-3V3

3F93 3F94

C3 F4 P1 P2 N1 N2 L1 L2 K4 K5 K1 K2

FF93

E1

47R

FF94

E2

47R

D3

IF93

D4

7F90-2

EP2C5F256C7N

Φ

BANK1

IO_L4|PLL1_OUTp

IO_M4|PLL1_OUTn

IO_F3|VREFB1N0 IO_J4|VREFB1N1

IO_L3 IO_M1 IO_M2 IO_M3

IO_P3

+1V2-PLL

IF94

E3

IF95

E4

D5

E5

FF91

C1

3F95 47R

C2

FF92

L4

M4

F3 J4

IF73

L3 M1 M2 M3

P3

SDA-SSB

47R3F98

SCL-SSB SD1-CLK

SD1-A9 SD1-DQ11FPGA_TDI SD1-DQ12

SD1-A8

SD1-A4

DV-HS DV-FF_DE DV-B0_UART2-RX DV-VS DV-B5_UV1 DV-B4_UV0

DV-B3_AUDIO-MUTE DV-B2_DEBUG-BREAK DV-B6_Y0 DV-B7_Y1 DV-G2_UV4 DV-G0_UV2 DV-G4_UV6 DV-G3_UV5 DV-G7_UV9 DV-G5_UV7 DV-G6_UV

+1V2-FPGA

8

D13 C14 D16

9F96

RES

D15 G13 G12 H11 J11 F16

9F97

RES

F15

RES

9F98

G15 G16 J12 H12 K15 K16 L16 L15

EP2C5F256C7N

7F90-4

Φ

BANK3

IO_N12|LVDS42n IO_M14|VREFB3N1 IO_H13|VREFB3N0

IO_E14|PLL2_OUTp IO_D14|PLL2_OUTn

IO_E16 IO_L14 IO_P14

M16 M15

N16 N15 P16

IF76

P15 N14 N13

M12

+1V2-PLL

N12

M14

H13 E14

IF78

D14 E16

L14

P14

RES9F92

DV-R0_Y2 DV-R1_Y3 DV-R3_Y5 DV-R4_Y6

DV-R5_Y7 DV-R6_Y8

DV-R2_Y4 DV-G1_UV3 DV-CLK-PLL

DV-B1_UART2-TX

DV-R7_Y9

A

B

C

D

E

F

G

H

K

is prohibited without the written consent of the copyright

owner.

is prohibited without the written consent of the copyright

M

N

H

7F90-3

C4

IO_C4|LVDS10p

C5

IO_C5|LVDS10n

G7

IO_G7|LVDS11p

G6

IO_G6|LVDS11n

F9

IO_F9|LVDS12p

F10

IO_F10|LVDS12n

E6

IO_E6|LVDS13p

F6

IO_F6|LVDS13n

A3

IO_A3|LVDS14p

B3

IO_B3|LVDS14n

A4

IO_A4|LVDS15p

B4

IO_B4|LVDS15n

A5

IO_A5|LVDS16p

B5

IO_B5|LVDS16n

C6

IO_C6|LVDS17p

D6

IO_D6|LVDS17n

A6

IO_A6|LVDS18p

B6

IO_B6|LVDS18n

F8

IO_F8|LVDS19p

F7

IO_F7|LVDS19n

B7

IO_B7|LVDS20p

A7

IO_A7|LVDS20n

EP2C5F256C7N

Φ

BANK2

IO_B9|LVDS21p

IO_D8|VREFB2N1

IO_C11|VREFB2N0

IO_A8 IO_A11 IO_B11

8 9

B9

IF74

A9

IF75

D10 D11

A10

B10 G11 G10

A12

B12

A13

B13 C12 C13

A14

B14

D8

C11

A8 A11 B11

TxFPGAoD+

TxFPGAoD-

TxFPGAoE+

TxFPGAoE+1V2-FPGA

TxFPGAoCLK+

TxFPGAoCLK-

TxFPGAoC+

TxFPGAoC-

TxFPGAoB+

TxFPGAoB-

TxFPGAoA+

TxFPGAoA-

MP-LED5

MP-LED3 MP-LED4 MP-LED1 MP-LED2

CTRL2-FPGA CTRL1-FPGA

CTRL3-FPGA CTRL4-FPGA

SD1-DQ1 SD1-DQ2

+1V2-PLL

+1V2-FPGA

M11 L11 T14

IF81

R14 T13 R13 T12 R12

IF82

P12

IF83

P13 K11 K10 R10 T10 L9 L10 T11 R11

IF86

T9 R9 T8 R8

IF87 IF88

10 11 12 13

VCCIO1

VCCIO2

VCCIO3

VCCIO4

VCCINT

1

VCCA_PLL

2

1

VCCD_PLL

2

7F90-6

EP2C5F256C7N

Φ

POWER

GND_PLL1

GND_PLL2

GNDA_PLL

A1 A16 B15

B2

C8

GND

C9

E8

E9

G8

H14

H3 H8 H9

J14

GND

J3

J8

J9

K9

M8 M9

P8

P9

GND

R15

R2

T1

T16

L5

N5

D12

F12

M6

1

E11

2

TxFPGAeE+ TxFPGAeETxFPGAeD+ TxFPGAeDTxFPGAeCLK+ TxFPGAeCLKTxFPGAeB+ TxFPGAeBTxFPGAeC+ TxFPGAeC-

TxFPGAeA+ TxFPGAeA-

+1V2-FPGA

+1V2-PLL

D

I

+3V3-FPGA

+2V5out-FPGA

E

J

F

L

+Vin-FPGA

+3V3-FPGA

+1V2-FPGA

+1V2-PLL

B1 G3 K3 R1

A15 A2 C10 C7 E10 E7

B16 G14 K14 R16

M10 M7 P10 P7 T15 T2

G9 H10 H7 J7

M5 E12

L6 F11

G

123 4 14

56

7

3|LVDS47n

B8 C15 C16 D1 D2 D7 D9 E13 E15 F13 F14 F5 G4

7F90-5

EP2C5F256C7N

Φ

BANK4

IO_N11|VREFB4N0

7F90-7

EP2C5F256C7N

Φ

NC

IO_N10|LVDS59n

IO_L7|LVDS60p IO_L8|LVDS60n

IO_N8|VREFB4N1

IO_L12

IO_P11

IO_T6

J10

K13

NCNC

D

9F93

+1V2-FPGA

SD1-DQ4 SD1-DQ3 SD1-DQ6 SD1-DQ7 SD1-DQ8

SD1-WE SD1-A2

SD1-A3 SD1-CAS SD1-RAS

DV-CLK-PLL

SD1-DQ5

E

T7 R7 T5 R5 T4 R4 P5 P4 T3 R3 N9

IF84

N10

L7 L8

N11

N8

L12

IF85

P11

T6

F

H6

+1V2-FPGA

J6

K6 K7 K8

+1V2-FPGA

N3 N4 N6 N7

P6

R6

SD1-A6 SD1-A7

SD1-A1 SD1-A10 SD1-A11

SD1-A0

G

H

I

J

K

L

M

NN

N

O

P

MULTI 12NC : 3139_283_30162

BD 12NC : 3139_283_30172

12

1 151413

2

O

DC398881

CLASS_NO

3PC333

-- -- --

1

2

2009-05-15

3

2009-07-31

NAME

YiPing Guo

SV

3

4

5

6

67

7

8

8 9

109

10

11 16 20

113

12

13 14 15

SETNAMECHN

BDS MODULES

PCB SB PB522_LN

SUPERS.

2009-05-15

DATECHECK

17

43

3139 283 3017

C

ROYAL PHILIPS ELECTRONICS N.V. 2009

18 19

181716

19

2

29

03101

20

2009-07-31

2009-07-282

O

P

A2

18730_528_090918.eps

090918

2009-Oct-09

SSB: Pacific 3: LVDS

Circuit Diagrams and PWB Layouts

EN 86PB52.3HU LA 10.

A

B

C

D

E

F

G

H

K

is prohibited without the written consent of the copyright

owner.

is prohibited without the written consent of the copyright

M

1

2 3

2

3

45678 12

1

2

3

8 91011 1817161514

45

67

1110

13124567

8 9

1413 19

PACIFIC 3 : LVDS

A

CTRL-DISP1

SCL-I2C4-DISP SDA-I2C4-DISP

CTRL-DISP2 CTRL-DISP3 CTRL-DISP4

3G24 100R

B

C

D

E

I

J

F

G

L

H

Dual LVDS input only

RxP3eA+_G6

100R

3G06

3G07

3G08

3G09

3G10

3G11

3G01 3G00

20 G3

3G03

40G3

3G05

100R

RxP3eA-_G7

RxP3eB+_G4

RxP3eB-_G5

RxP3eC+_G2

RxP3eC-_G3

RxP3eCLK-_G0

RxP3eCLK+_G1

RxP3eD+_R8

RxP3eD-_R9

RxP3eE+_R6

RxP3eE-_R7

RxP3oA+_B8

RxP3oA-_B9

RxP3oB+_B6

RxP3oB-_B7

RxP3oC+_B4

RxP3oC-_B5

RxP3oCLK-_B2

RxP3oCLK+_B3

RxP3oD+_B0

RxP3oD-_B1

RxP3oE+_G8

RxP3oE-_G9

TXEA-

TXEA+

TXEB-

TXEB+

TXEC-

TXEC+

TXECLK-

TXECLK+

TXED-

TXED+

TXEE-

TXEE+

TXOA-

TXOA+

TXOB-

TXOB+

TXOC-

TXOC+

TXOCLK-

TXOCLK+

TXOD-

TXOD+

TXOE-

TXOE+

Dual LVDS only

4

3

5G00 1

2

4

3

5G01 1

2

4

3

5G021

2

3

4

5G031

2

4

3

5G04

2

1

4

3

5G05

2

1

4

3

5G06 1

2

3

4

5G07

2

1

3

4

5G08 1

2

4

3

5G09 1

2

4

3

5G10 1

2

3

4

5G11 1

2

2G00 2G01 4p7

DLW21S

2G02 2G03 4p7

DLW21S

2G04

DLW21S

2G06 2G07

DLW21S

2G08 2G09 4p7

DLW21S

2G10 2G11 4p7

DLW21S

2G12

DLW21S

2G14

DLW21S

2G16 2G17 4p7

DLW21S

2G18 2G19

DLW21S

2G20 2G21 4p7

DLW21S

2G22

DLW21S

4p7

4p7 4p72G05

4p7 4p7

4p7

4p7 4p72G13

4p7 4p72G15

4p7

4p7 4p7

4p7

4p7 4p72G23

15 19

16

10 11

1G50

FG00

50 48 49 46 47 44 45 425143

VDISP

100R3G25

2G24

FG01 FG02 FG03 FG04 FG05 FG06

FG07 FG08

FG09 FG10 FG11 FG12

FG13 FG14 FG15 FG16 FG17 FG18

FG19 FG20

FG21 FG22 FG23 FG24

FG25 FG26

100p

2G25

41 40

39 38 37 36 35 34 33 32 31 30

29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9

8

7 6 5 4

3

2 1

LVDS CONNECTOR

1817

1G50 A11 2G00 B6 2G01 B6 2G02 C6 2G03 C6 2G04 C6 2G05 D6 2G06 D6 2G07 D6 2G08 D6 2G09 E6 2G10 E6

A

2G11 E6 2G12 F6 2G13 F6 2G14 F6 2G15 F6 2G16 G6 2G17 G6 2G18 G6 2G19 G6 2G20 H6 2G21 H6

B

2G22 H6 2G23 H6 2G24 E10 2G25 E10

3G00 F2 3G01 F2 3G02 G2 3G03 G2 3G04 H2 3G05 H2 3G06 B2 3G07 C2

C

3G08 C2 3G09 D2 3G10 D2 3G11 E2 3G24 D9 3G25 D9

5G00 B6 5G01 C6 5G02 C6 5G03 D6 5G04 D6 5G05 E6

D

5G06 F6 5G07 F6 5G08 G6 5G09 G6 5G10 H6 5G11 H6 FG00 A10 FG01 B10 FG02 B10 FG03 B10 FG04 B10

E

FG05 C10 FG06 C10 FG07 C10 FG08 C10 FG09 C10 FG10 C10 FG11 C10 FG12 C10 FG13 C10 FG14 C10 FG15 C10 FG16 D10

F

FG17 D10 FG18 D10 FG19 D10 FG20 D10 FG21 D10 FG22 D10 FG23 D10 FG24 D10 FG25 D10 FG26 D10

G

H

20

A

B

C

D

E

F

G

H

I

J

K

L

M

Single / Dual LVDS input only

N

O

P

MULTI 12NC : 3139_283_30162 BD 12NC : 3139_283_30172

2 31

12

456 171612

3 4

6521

7 8

8743

5678 91011

913 14 1510 11

910

2009-Oct-09

12

N

DC398881

CLASS_NO

3PC333

1

-- -- --

2009-05-15

2

3

2009-07-31

NAME

YiPing Guo

SV

3111

14

15 16 17 18

SETNAMECHN

BDS MODULES

PCB SB PB522_LN

SUPERS.

DATECHECK

2009-05-15

2

3139 283 3017

03101

43

C

ROYAL PHILIPS ELECTRONICS N.V. 2009

18

30

19919 20

20

2009-07-31

2009-07-28

OO

P

A2

18730_529_090918.eps

090918

Circuit Diagrams and PWB Layouts

SSB: Pacific 3: Display Interfacing

EN 87PB52.3HU LA 10.

1

A

B

2 1312

2

1

3

3 4

43

4 19

2 3 4

PACIFIC 3 : DISPLAY-INTERFACING

5

6

7 16

7

8

56

9 1816

A

C

C C

IG51

D

E

+12VTCON

B

+5V-ON

9G77

9G78

9G79

9G80

RES

3G63

RES

47R

C

F

G

H

D

E

I

F

J

K

G

CTRL4-P3

CTRL1-MIPS_LCD-PWR-ON

CTRL1-FPGA

CTRL2-FPGA

CTRL3-FPGA

CTRL4-FPGA

CTRL1-MIPS_LCD-PWR-ON

CTRL3-STBY_POWER-OK-DISP

CTRL5-STBY_BACKLIGHT-BOOST

CTRL1-STBY_LAMP-ON

CTRL2-STBY_BACKLIGHT-CTRL_RESET-P3

CTRL4-STBY_SELECT-PWM-ANA

ON-MODE

9G52 RES

7G52

SI4835BDY

RES

IG52

3G59

47K

2G57

1u0

IG53

VDISP-SWITCH

IG59

FG58

IG61

IG62

IG63

FG59

6G50

BZX384-C5V6

3G71

100R

3G86

47R

3G96

47R

7G54

SI3441BDV

IG54

RES

3G60

100R

3G80

3G81

3G84

3G85

3G88

3G89

3G91

3G93

3G98

100K

3G64

47K

47R

I2C-BUFFER

owner.

is prohibited without the written consent of the copyright

owner.

is prohibited without the written consent of the copyright

M

N

O

P

+5V-ON

L

+3V3

H

SDA-SSB-MUX1

SCL-SSB-MUX1

I

12

5G50

120R

5G51

120R

IG71

7G50 PCA9515A

IG70

8

VCC

SDA03SDA1 6

SCL02 SCL1 7

EN5

NC

GND

4

9G53

9G54

3

2G51

1

5G55

FG50

220R

5G56

2G54

220R

100n

6G51

3G56

2G76

FG52

2K2

RES

100K

3G50

3G72

1

4K7

10K

SML-310

IG56

3G67

10K

+3V3-STANDBY

7G57 BC847BW

2G50

100n

3G51

16V10u

IG55

7G55

BC847BW

3

2

3G99

FG51

IG58

IG65

9G50

100n

IG72

IG74

4

+3V3

10K

VDISP

+3V3

10K

3G68

IG57

100n

2G60

+3V3

RES

3G76

3G77

47R

100p

2G64

2G63

4K7

3G94

1

10K

47R

3G78

3G79

47R

100p

2G66

2G65

6G52-1

BAV99S

6

56

BACKLIGHT-OUT

FG54

CTRL-DISP1

FG55

CTRL-DISP2

FG56

CTRL-DISP3

FG57

CTRL-DISP4

RESERVED

NOTE : CAN BE

CAPACITOR OR

WIRE BRIDGE

IG81

6G52-2 BAV99S

2

5

FHP

IRQ

PDWN

CPU-GO

PDP-GO

4

3

SDA-I2C4-DISP

SCL-I2C4-DISP

MULTI 12NC : 3139_283_30162 BD 12NC : 3139_283_30172

12

2

3

4

5

541

67

610

74

7 16

86

8

9 7141312

910

98

109876

7

1110 11

8 9

12

13

14

14131211

10 11 12 13

TO DISPLAY

RES

2G69

FG84

1G70

FG80

1 2

3

FG81

4

FG82

5

1735446-5

100p

2G70

CTRL1-STBY_LAMP-ON

LAMP-ON-OUT

BACKLIGHT-CONTROL

CTRL4-STBY_SELECT-PWM-ANA

BACKLIGHT-OUT

CTRL5-STBY_BACKLIGHT-BOOST

CTRL2-STBY_BACKLIGHT-CTRL_RESET-P3

BACKLIGHT-BOOST

2G71

100p

3GA7 1K0

3GB0 100RFG83

100p

2G72

IGB2

+3V3

3G69

3G73

100R3GA9

7G51

BC847BW

3018

4K7

2G55

470p

10K

47K

P3-VS

SDA-I2C4-DISP

SCL-I2C4-DISP

+3V3

3GA5

IGB1

1

2

9G55

IGB3

2

9G49

9G48

RES

+5V-ON

10K

IGA1

RES

3G54

3

+3V3

3G61

3GA4

6

7G59-1 BC847BS

1

+3V3

4K7

3G58

1

2K2

RES

3G62

1K0

10K

3GC0

4K7

2G78

470p

IGB4

IGB7

IGB9

4K7

3G57

3G70

IGA2

SCL-AMBI-3V3

SDA-AMBI-3V3

27K

3GA6

3

12K 7G53 BC847BW

2

RES

2G59

22K

RES

7G56 PDTC114EU

5

7G59-2 BC847BS

7G65 BC847BW

2K2

3GC1

+3V3

IGB5

RES

15K

3G65

1u0

IGBA

3

4

3GB8

IGA3

3

1

2

RES

3GC8

1K0 RES

3GB5

100R RES

3GA8

100R

SDI

RESET

7 8 91011

DC398881

CLASS_NO

3PC333

-- -- --

2009-05-15

2009-07-31

NAME

YiPing Guo

SV

10

11 12

11

1312

13

14

15

2G67

470p

3G92

10K

7G61-1

BC847BS

4K7

1

2

3

1514

15

3G95

3GA2

2G58

1u0

12K

1

9G59

IG85

RES

2G68

470p

3GA1

10K

7G61-2

BC847BS

4K7

4

IG83

9G60

RES

47K

3G55

IGB6

4

7G58-2

5

BC847BPN

3

9G56

RES

3GB9

IGA4

5

10K

1u0

33K

2G79

3GC2

SETNAMECHN

BDS MODULES

PCB SB PB522_LN

+5V-ON

IG80

2

2K2

3GA0

6

+5V-ON

IG82

5

2K2

3GA3

3

IG84

+12V

1R0

3GC4

6

2G75

7G58-1

2

BC847BPN

1

IGB8

1K0

3G66

47K

6

3GB7

IGA5

2

7G66-1 BC847BPN

4

1 BC847BPN 7G66-2

3

9G82

RES

IGA6

1K0

3GC3

12 13

SUPERS.

DATECHECK

2009-05-15

16

17

1716

17

SCL-AMBI

SDA-AMBI

RES

6G55

1u0

+8V2-PAS

173

18 19910

18

FGB1

+8V2-PAS

RES

BZX384-C8V2

19

1G70 A7 2G50 G4 2G51 H3 2G54 B4 2G55 E9 2G57 C2 2G58 G11 2G59 F11 2G60 C4 2G63 E4

A

2G64 E5 2G65 E5 2G66 E5 2G67 A11 2G68 B11 2G69 B7 2G70 B8 2G71 B8 2G72 B9 2G75 D12 2G76 B4

B

2G78 H10 2G79 I11

3018 E9 3G50 H4 3G51 H4 3G54 D10 3G55 D11 3G56 B4 3G57 E10 3G58 D10 3G59 B2 3G60 D3

C

3G61 E10 3G62 E10 3G63 C2 3G64 C3 3G65 F11 3G66 F12 3G67 C4 3G68 C4 3G69 F9 3G70 F10 3G71 D2 3G72 D4

D

3G73 F9 3G76 D4 3G77 D5 3G78 D5 3G79 D5 3G80 D3 3G81 D3 3G84 E3 3G85 E3 3G86 E2 3G88 E3

E

3G89 F3 3G91 F3 3G92 A11 3G93 F3 3G94 F4 3G95 B11 3G96 F2 3G98 G3 3G99 G4 3GA0 B12 3GA1 B11 3GA2 B11

F

3GA3 B12 3GA4 G10 3GA5 D9 3GA6 E11 3GA7 A9 3GA8 B7 3GA9 B9 3GB0 B9 3GB5 A7 3GB7 H12 3GB8 H11 3GB9 H11

G

3GC0 H10 3GC1 H10 3GC2 I11 3GC3 I12 3GC4 D12 3GC8 I11

5G50 G2 5G51 H2 5G55 A4 5G56 B4 6G50 C3

H

6G51 B4 6G52-1 H5 6G52-2 H6 6G55 D13 7G50 H2 7G51 D9 7G52 B2 7G53 E10 7G54 B3 7G55 C4 7G56 F10 7G57 F4

I

7G58-1 E12 7G58-2 E11 7G59-1 G10 7G59-2 G10 7G61-1 A12 7G61-2 B12

3139 283 3017

43

C

ROYAL PHILIPS ELECTRONICS N.V. 2009

18

181 0271

19

1912

03101

31

20

7G65 H10 7G66-1 H12 7G66-2 H12 9G48 H10 9G49 H10 9G50 H4 9G52 A2 9G53 I3 9G54 I3 9G55 D10 9G56 E12 9G59 B12 9G60 C12 9G77 B1 9G78 B1 9G79 B1 9G80 C1 9G82 I12 FG50 A4 FG51 B3 FG52 B4 FG54 D5 FG55 D5 FG56 E5 FG57 E5 FG58 E2 FG59 F2 FG80 A8 FG81 B8 FG82 B8 FG83 B8 FG84 A7 FGB1 D13 IG51 B1 IG52 B2 IG53 C2 IG54 C3 IG55 C4 IG56 C4 IG57 C5 IG58 D4 IG59 E2 IG61 E2 IG62 F2 IG63 F2 IG65 F3 IG70 H3 IG71 H2 IG72 H3 IG74 H3 IG80 A12 IG81 H5 IG82 B12 IG83 C11 IG84 C12 IG85 B11 IGA1 H10 IGA2 H10 IGA3 H11 IGA4 H11 IGA5 H12 IGA6 H12 IGB1 D9 IGB2 E9 IGB3 E10 IGB4 E10 IGB5 E11 IGB6 E11 IGB7 F10 IGB8 E12 IGB9 G10 IGBA G11

2

20

2009-07-31

2009-07-282

A

B

C

D

E

F

GG

G

H

HIH

I

J

K

L

M

N

O

P

A2

2009-Oct-09

18730_530_090918.eps

090918

SSB: Pacific 3

Circuit Diagrams and PWB Layouts

EN 88PB52.3HU LA 10.

A

B

C

D

E

F

G

H

K

owner.

is prohibited without the written consent of the copyright

M

N

1

12

123 45678 91011

+2V5-PF

A

+3V3

B

STPS2L30A

C

+2V5-PF

D

+3V3

E

+2V5-PLL

I

F

J

+1V5-PLL

G

+3V3-P3

+2V5-P3

H

L

I

+1V5-P

123

6GE6

5GE1

600R

IGH7

IGH9

100n

2GJ5

3

PACIFIC 3

FGE1

10n

1u0

10n

2GG5

2GG3

2GG4

7GE5

IGH8

100n

2GK0

5GE0

600R

7GE3

LD3985M25

OUTIN

INH BP

COM

2

7GE2-3 T6TF4HFG-0002

PLL2_VCCA_2V5 PLL1_VCCA_2V5

SSCG_VCC_1V5

PLL2_VCCD_1V5 PLL1_VCCD_1V5

VDD_3V3

VDD_2V5

6

VDD_1V5

LD1117DT

3

IN

GND

IGH0

FGH0

1u0

2GG0

5

IGH1

4

2GJ7

SUPPLY

SSCG_GND

PLL2_GNDA PLL1_GNDA

PLL2_GNDD PLL1_GNDD

6GE7

STPS2L30A

1

3

54

212

58

56

214

210 201 196 184 180 174 167 158 150 144 138 130 124 118 113 110

166

209 197 190 182 176 156 147 136 119 111 105

94 85 72 65 43

39 33

24 21 12

+2V5-PLL

OUTIN

COM

3GH4

3GH5

2GG1

67

5GE2

+3V3

120R

10n

5GE3

220R

5GE5

220R

5GE6

220R

7GE2-1

2GE2

7

8

9 10

13 14

15 16

20 19

22 23

25 26

28 29

31 32

34 35

38 37

40 41

44 45

46 47 48 49 52 53

10n

2GE4

2GE3

4u7

2GF5

2GF4

1u0

2GG8

2GG7

1u0

2GH2

2GH1

GND-TX

1u0

2GH6

GND-RX

+1V5-RX +1V5-TX

113042

CLKI HSI

N

VDD_RX_1V5

ORX0

P

N

ORX1

P

N

ORX2

P

N

OCLK

P

N

ORX3

P

B<9:0>

N

ORX4

P

N

ERX0

P

N

ERX1

P

N

ERX2

P

N

ECLK

P

G<9:0>

N

ERX3

P

N

ERX4

P

R<9:0>

GND-RX

10n

1u0

2GL1

2GE1

2GE0

FGH1

2

OUT

1K0

3GH3

1

1u0

120R

2GK3

120R

FGE0

+2V5-P3

10n

2GG2

FGH2

+2V5-PF

1u0

10n

2GJ6

242

GND_HS

241 240 239 238 237 236 235 234 233 232 231 230 229

VIA

228 227 226 225 224 223 222 221 220 219 218 217

199 216 211 208 203 195 189 186 181 175

GND

171 163 157 152 142 131 125 112 108 5

59

55 213

57 215

2GK1

100n

2GK2

+1V5

4V

47u

RxP3CLK RxP3HS_DE

RxP3oA-_B9 RxP3oA+_B8

RxP3oB-_B7 RxP3oB+_B6

RxP3oC-_B5 RxP3oC+_B4

RxP3oCLK-_B2 RxP3oCLK+_B3

RxP3oD-_B1 RxP3oD+_B0

RxP3oE-_G9 RxP3oE+_G8

RxP3eA-_G7 RxP3eA+_G6

RxP3eB-_G5 RxP3eB+_G4

RxP3eC-_G3 RxP3eC+_G2

RxP3eCLK-_G0 RxP3eCLK+_G1

RxP3eD-_R9 RxP3eD+_R8

RxP3eE-_R7 RxP3eE+_R6

RxP3R5 RxP3R4 RxP

3R3 RxP3R2 RxP3R1 RxP3R0

IGEE

+1V5 +1V5-P3

5GE4

220R

T6TF4HFG-0002

10n

2GE6

2GE5

10n

2GF6

2GF7

FGET

+1V5-PLL

10n

2GG9

10n

2GH3

GND-TX

10n

2GH7

2GH8

GND-RX

+3V3-P3

70

79

91

63

VDD_TX_1V5

LVDS

GND

172736516071768297

GND-TX

10n

18

2GE7

2GF8

2GH4

GND-TX

IGEG

2GH9

GND-RX

50

VDD_RX_3V3

10n

647388

2GE8

2GF9

IGEF

2GH5

GND-TX

PWM

VDD_TX_3V3

OTX0

OTX1

PA<0:9>

OTX2

OTX3

OTX4

OTX5

ETX0

PB<0:9>

ETX1

ETX2

ETX3

ETX4

ETX5

PC<0:9>

+1V5-RX

4567

87432

985

11

124 103

1514

151413121110965 18 19

16

16 17 1813

12 13 14

U16

+3V3-P3

10n

2GF1

2GF0

10n

2GK4

+1V5-TX

2GF2

FGES

10n

2GK5

2GK6

2GE9

10n

2GG6

10n

104

61

3

62

4

66

5

67

6

68

7

69

8

74

P

75

N

77

P

78

N

80

P

81

N

83

P

84

N

86

P

87

N

89

P

90

N

92

P

93

N

95

P

96

N

98

P

99

N

100

P

101

N

102

P

103

N

106

P

107

N

10n

2GF3

10n

7GE1

M25P05-AVMN6

10n

2

TXEA+

TXEA-

TXEB+

TXEB-

TXEC+

TXEC-

TXECLK+

TXECLK-

TXED+

TXED-

TXEE+

TXEE-

TXOA+ TXOA-

TXOB+ TXOB-

TXOC+

TXOC-

TXOCLK+ TXOCLK-

TXOD+

TXOD-

TXOE+ TXOE-

+3V3-P3

Q

FLASH

8

VCC

Φ

512K

VSS

4

2GH0

D

C

S

W

HOLD

+3V3-P3

4G10

4K7

3GE5 4K7

3GE6

3GE2 4K7

6GE0

6GE2

6GE3

RxP3VS

P3-JTAG-TCK P3-JTAG-TD-CON-PACIFIC P3-JTAG-TD-PACIFIC-PNX5050 P3-JTAG-TMS P3-JTAG-TRST

CTRL4-P3 CTRL4-P3

RxP3FF

SDA-SSB SCL-SSB

BAV70W

PWM-3

IGF1

PWM-OR

4K7

3GH2

PWM-3

SDA-AMBI-3V3 SCL-AMBI-3V3

FGE7

FGE8 FGE9

FGEC

FGEA

FGE5 FGE6

IGF2

100n

5

6

1

3

7

8 91011

+3V3

10K

3GFB

3GFC

3GG1 4K7

BAS316

6GE1

3GH0

2K2

3GE1

100R

2GL2

RES

10p

2GL3

RES

10p

+3V3

10K

3GF0

3GFA

3GH9

10K

IGE0

2

60M

+3V3

10K

3GF1 3GF3 3GF5 100R

3GF8 3GF9 100R

+3V3-P3

3GG0 100R

3GE9 100R

3GE4

1

47R

3GE3

1GE1

3

1K0

100R

22R3GF7 100R

RES

FGEG FGEH

RES

47R3GG2 47R3GG3

+3V3

10K

RES 2GJ3

3GH8

3GH7

10p

2GJ4

10p RES

FGG2

47R3GG4 47R3GG5

FGG3

7GE0 P87LPC764BDH

1GE0

10M

7

6

IGF3

1 20 19 18 17 16 14 13

10n

2GJ2

FGE3

IGE1

FGE2

IGE2

FGEB FGER

FGED

FGEF

FGEJ FGEK

IGE3

IGE4

IGE5 IGE6

IGE7

1M0

CLKOUT X2

X1

P2<0:1> CMP2 2B 2A

CIN

1B 1A CMPREF CMP1 T1

P0<0:7>

165

164

172

193 191 192 194

4

173 207

3

205 1 2 206

177

178 179 183 185 187 188

198 200

202 204

114

Φ

uC

4Kb OTP

VSS

5

+3V3-P3

47K

3GE0

4u7

2GJ0

7GE2-2

T6TF4HFG-0002

OSC_Z

MISC

OSC_CLK_I

RSTN

SI SCK SO

CS

VSI

T1 TCK TDI TDO TMS TRST TRIGOUT

MINTN

00 01 02

GPIO

03 04 05

SCL SDA

MSDA MSCL

SSDA SSCL

DEO

+3V3

9GE2

15

VDD

TXD RXD

SCL

T0

SDA

0

INT

1

RST

6 7

P1<0:7>

RES

109

IGE8

115

IGE9

116

IGEA

168

0

169

1

170

2

117

0

120

FGEL

1

121

FGEM

2

122

3

123

4

126

5

127

FGEN

6

128

FGEP

7

129

FGEQ

8

132

9

133

0

134

1

135

2

137

3

139

4

140

5

141

6

IGEB

143

IGEC

145

IGED

146

148

7

149

6

151

5

153

4

154

3

155

2

159

1

160

0

161 162

IGF8 IGF9

IGFA

PWM

A<19:0>

PE<7:9>

PF<0:9>

2GJ1

100n

12 11 10

9

8

4

3

2

CLKO

PD

PE

PSEN

WRN

VSO HSO

RXD RDN TXD

D

RESERVED FOR AMBILIGHT

12 13 14

17

CTRL2-STBY_BACKLIGHT-CTRL_RESET-P3

RES

9GE0

BACKLIGHT-CONTROL

RES

3GE8 4K7

RES

3GF2 4K7

3GF6

3GG6

FGG1

3GG7

3GG9

1K0

4K7

PWM-OR

+3V3

RES

+3V3

RES

20

19

U16 A7 1GE0 G11 1GE1 B11 2GE0 A4 2GE1 A4 2GE2 A4 2GE3 A4 2GE4 A5 2GE5 A5 2GE6 A5 2GE7 A5

A

2GE8 A6 2GE9 A6 2GF0 A6 2GF1 A6 2GF2 A6 2GF3 A7 2GF4 B4 2GF5 B5 2GF6 B5 2GF7 B5 2GF8 B5

B

2GF9 B6 2GG0 D2 2GG1 D2 2GG2 D2 2GG3 A1 2GG4 A2

P3-VS

4K73GE7

4K73GF4 4K7

2GG5 A2 2GG6 B6 2GG7 C4 2GG8 C5 2GG9 C5 2GH0 B7

C

2GH1 D4 2GH2 D5 2GH3 D5 2GH4 D5 2GH5 D6 2GH6 E4 2GH7 E5 2GH8 E5 2GH9 E5 2GJ0 B12 2GJ1 G12 2GJ2 H11

D

2GJ3 G11 2GJ4 G11 2GJ5 E1 2GJ6 E2 2GJ7 E2 2GK0 B2 2GK1 B3 2GK2 B3 2GK3 C3 2GK4 B6 2GK5 B6

E

2GK6 B6 2GL1 A4 2GL2 B10 2GL3 B10

3GE0 A12 3GE1 A10 3GE2 B8 3GE3 B11 3GE4 B11 3GE5 B8 3GE6 B8 3GE7 C13

F

3GE8 C13 3GE9 E10 3GF0 C10 3GF1 C11 3GF2 D13 3GF3 D11 3GF4 D13 3GF5 D11 3GF6 D13 3GF7 D11 3GF8 D11 3GF9 D11

G

3GFA C10 3GFB C10 3GFC C10 3GG0 D10 3GG1 D10 3GG2 E10 3GG3 E10 3GG4 H10 3GG5 H10 3GG6 H13 3GG7 H13

H

3GG9 H13 3GH0 H10 3GH2 I8 3GH3 B3 3GH4 C2 3GH5 C2 3GH7 G10 3GH8 G10 3GH9 D10

4G10 C8 5GE0 C2 5GE1 A1

I

5GE2 A3 5GE3 B4 5GE4 C4 5GE5 D4 5GE6 D4 6GE0 G8 6GE1 H10

20

6GE2 H8 6GE3 H8 6GE6 B1 6GE7 B2 7GE0 G11 7GE1 C7 7GE2-1 E4 7GE2-2 B12 7GE2-3 E2 7GE3 D2 7GE5 B2 9GE0 B13 9GE2 G12 FGE0 C2 FGE1 A2 FGE2 C11 FGE3 C11 FGE5 D9 FGE6 E9 FGE7 D9 FGE8 D9 FGE9 D9 FGEA D9 FGEB C11 FGEC D9 FGED D11 FGEF D11 FGEG D11 FGEH E11 FGEJ E11 FGEK E11 FGEL C13 FGEM C13 FGEN D13 FGEP D13 FGEQ D13 FGER D11 FGES B6 FGET C5 FGG1 H13 FGG2 H11 FGG3 H11 FGH0 C2 FGH1 B3 FGH2 D2 IGE0 B10 IGE1 C11 IGE2 C11 IGE3 D11 IGE4 D11 IGE5 E11 IGE6 E11 IGE7 E11 IGE8 C13 IGE9 C13 IGEA C13 IGEB E13 IGEC E13 IGED E13 IGEE B4 IGEF C6 IGEG D5 IGF1 H9 IGF2 H10 IGF3 H11 IGF8 H12 IGF9 H12 IGFA H12 IGH0 B2 IGH1 D2 IGH7 B1 IGH8 B2 IGH9 C1

A

B

C

D

E

F

G

H

I

J

K

L

M

N

O

P

MULTI 12NC : 3139_283_30162 BD 12NC : 3139_283_30172

1

2 3 49

O

DC398881

CLASS_NO

3PC333

1

-- -- --

2

2009-05-15

3

2009-07-31

YiPing Guo

NAME

SV

12

7

9

0186

1175

11

21018654321

13

14

15 16 1713

SETNAMECHN

BDS MODULES

PCB SB PB522_LN

SUPERS.

2009-05-15

DATECHECK

1615

2

3139 283 3017

13043

10

C

ROYAL PHILIPS ELECTRONICS N.V. 2009

17 18 19 20

18

32

2019

2009-07-31

2009-07-282

O

P

A2

18730_531_090918.eps

090918

2009-Oct-09

SSB: Control STI7100

Circuit Diagrams and PWB Layouts

EN 89PB52.3HU LA 10.

A

B

C

D

E

F

G

H

K

owner.

is prohibited without the written consent of the copyright

MM

N

4

121238

4

123 456

5

65

87

910

9

7 8

CONTROL STI7100

RES

IA19

100n

2A18

74LVCU04APW

7A10-4

74LVCU04APW

5A10

220R

7A10-1

2A19

1

9

A

+2V6-MP4

V_LVC04

B

C

7A10-5

74LVCU04APW

11

7A10-6

74LVCU04APW

13

D

EMI-A(2)

EMI-A(1)

EMI-A(4)

E

EMI-A(3)

I

J

F

RES

3A31-3

+3V3

10K

G

L

RES 3A19

+3V3

10K

H

1

EMI-A(10)

EMI-A(14)

EMI-A(8)

EMI-A(7)

EMI-A(6)

EMI-A(5)

EMI-A(9)

PCMOUT4

EMI-A(13)

EMI-A(12)

EMI-A(14)

EMI-A(15)

PCMOUT3

PCMOUT2

2 3 4

V_LVC04

1n0

100n

2A20

1

2

714

V_LVC04

7A10-2

7A12

2560TK

1

14

1

3

4 FA10

IA17

7

+3V3

4

2

1

714

1

714

14 1

7

74LVCU04APW

8

10

12

RES

3A29-2

27

10K

RES

3A29-1

1 8

10K

RES

3A29-4

45

10K

RES

3A29-3

3 6 9A15

10K

RES

3A30-4

45

10K

RES

3A30-3

3 6

10K

RES

3A30-2

27

10K

RES

3A30-1

1 8

10K

RES

3A31-2

27

10K

RES 3A36

10K

RES

3A32-1

1 8

10K

RES

3A31-4

45

10K

RES 3A35

10K

RES

3A32-3

3 6

10K

RES

3A40-2

27

10K

RES

3A40-1

1 8

10K

3

IA21

9A21

RES

9A20

Mode pin

MODE[1:0]

MODE[3:2]

MODE[7:4]

MODE[9:8]

MODE[12:11]

MODE[13]

MODE[14]

MODE[15]

MODE[16]

+3V3

7A10-3

74LVCU04APW

EMI pin

EMIADDR[2:1]

EMIADDR[4:3]

EMIADDR[8:5]

EMIADDR[10:9]

PCMOUT4MODE[10]

EMIADDR[13:12]

EMIADDR[14]

EMIADDR[15]

PCMOUT3

PCMOUT2

V_LVC04

1

6

5

IA29

714

IA22

PLL1 startup configuration

EMI banks port size at boot

Reserved

56

10K3A10-3 10K3A10-4

3A10-2 10K

3A16

10K

3A26

68R

15p

RES

2A21

Purpose

PLL0 startup configuration

Reserved

STx71000 master/slave mode

Reserved

Long resetout mode

Reserved

JTAG-TDI

JTAG-TMS

JTAG-TCK

JTAG-TRSTn JTAG-TDO

CPU-27MHZ

JTAG-TDO

RES

IA18

2A23

18p

1A10

2A22

IA20

18p

27MHZ-3V3 RESET-ST7101

TMUCLK

CPU-27MHZ

CPU-notRESET

ASEBRKn

TRIG-IN TRIG-OUT

27MHZ-3V3

FE-CLK FE-VALID

FE-SOP

FE-DATA0 FE-DATA1 FE-DATA2 FE-DATA3 FE-DATA4 FE-DATA5 FE-DATA6 FE-DATA7

CLK_REF

DVID0 DVID1 DVID2 DVID3 DVID4 DVID5 DVID6 DVID7

SDA-SSB

SCL-SSB CPU-I2C-SCL

3A23 47R

7 8 9101112

3A18 10K

3A28

560R

27M

3A27

1M0

11

1110

10K

3A21

33R3AM0

IA16

9A22

3A17 10K

+3V3

3A25-1

10K

3A25-4 10K

3A22

3A10-1

8 1

3A15

10K

12

1267

10K

3A20-2

27

22R3A14

3A13 10K

10K 10K3A25-2 10K3A25-3

13

1413

15143

16 17

9 101112

10K

3A20-4

3A20-3

45

3 6

7A00-4

STI7100YWC

Φ

TDI TMS TCK TRST TDO

SYSA

CLKIN

SYSB SYSBCLKOSC SYSBCLKINALT SYSCLKOUT

RTCCLKIN TMUCLK RSETIN WDOGRSTOUT ASEBRK

IN

TRIGGER

OUT

0 1

SYSITRQ

2

3

NMI

BYTECLK BYTECLKVALID ERROR PACKETCLK

0 1 2

3

TSIN0DATA

4 5 6 7

BYTECLK BYTECLKVALID ERROR PACKETCLK

0 1 2

3

TSIN1DATA

4 5 6 7

BYTECLK BYTECLKVALID ERROR PACKETCLK

0 1 2

3

TSIN2DATA

4 5 6 7

IA30

IA31

DIGITAL

INTERFACE

TSIN0

TSIN1

TSIN2

AP5

C2A

AN5

DAA

C1A

IA24

4

0

3A33

1K5

3A37 100R

IA25 IA26 IA27

3A34

470R 2A24

2A25

9A1027M 9A11

+3V3

10K

3A38

9A12

RES RES9A13

9A14

10n

PDRX-DDC-SDA

AM25

REF

AP25

DM

USB

AN25

DP

AM32

0

AP33

1

AN33

2

AP34

3

PIO0

AN34

4

AM33

5

AM34

6

AL32

7

AL3

0

AL33

1

AK34

2

AK33

3

AJ34

PIO1

4

AJ33

5

AH34

6

AH33

7

AJ30

0

AJ31

1

AH30

2

AH31

3

AG30

PIO2

4

AG31

5

AE31

6

AE30

7

AE32

0

AE34

1

AE33

2

AD34

3

AD33

PIO3

4

AC34

5

AC33

6

AB34

7

AD32

0

AD30

1

AD31

2

AC3

3

PIO4

AC31

4

AB30

5

AB31

6

AA30

7

AB33

0

AA34

1

AA33

2

Y34

3

Y33

PIO5

4

AA31

5

Y30

6

Y31

7

AM30

REF

AP31

RXN

AN31

RXP

ATA

AP30

TXN

AN30

TXP

FA11

IA28

D22 E21 D21 D20 E22

C1

IA23

AP27 AN27

IA15

E27 E17 D16 E18 D19 E19 E20

D17 D18

IA14

AK25

IA13

AK26

IA12

AK27

IA11

AK28

IA10

E16

AK6 AJ5 AH4 AJ4

AH5 AG4 AK1 AK2 AJ1 AJ2 AH1 AH2

AG5 AF5 AE4 AF4

AE5 AD4 AD5 AC4 AC5 AB4 AB5 AA4

AM3 AN3 AP2 AP3

AP1 AN2 AN1 AM2 AM1 AL2 AL1 AL3

10K

3A39

3A11

47R

3A12

47R

CPU-I2C-SCL CPU-I2C-SDA

WP-FLASH-ST

CPU-I2C-SCL CPU-I2C-SDA

PDRX-DDC-SCL

RXD-ASC2 TXD-ASC2

TXD-ASC3 RXD-ASC3

CPU-I2C-SDA

18 19 20

1A10 B7 2A18 A2 2A19 A2 2A20 A3 2A21 C6 2A22 B7 2A23 B7 2A24 G11 2A25 G11

3A10-1 A8 3A10-2 A5 3A10-3 A5 3A10-4 A5

A

3A11 H9 3A12 H9 3A13 C8 3A14 B8 3A15 D8 3A16 A6 3A17 C8 3A18 B7 3A19 H1 3A20-2 A8 3A20-3 A9 3A20-4 A9 3A21 A8

B

3A22 C8 3A23 C7 3A25-1 C8 3A25-2 C8 3A25-3 C8 3A25-4 C8 3A26 C5 3A27 B7 3A28 B7 3A29-1 E3 3A29-2 D3 3A29-3 E3

C

3A29-4 E3 3A30-1 F3 3A30-2 F3 3A30-3 F3 3A30-4 E3 3A31-2 G3 3A31-3 F1 3A31-4 H3 3A32-1 G3 3A32-3 H3 3A33 B11

D

3A34 F11 3A35 H3 3A36 G3 3A37 D11 3A38 D12 3A39 G9 3A40-1 H3 3A40-2 H3 3AM0 A7

5A10 A2 7A00-4 B10 7A10-1 B2

E

7A10-2 C4 7A10-3 C5 7A10-4 C2 7A10-5 C2 7A10-6 D2 7A12 C4 9A10 D11 9A11 D11 9A12 D11 9A13 E11 9A14 E11 9A15 E11

F

9A20 D4 9A21 C4 9A22 B8 FA10 C6 FA11 C9 IA10 D9 IA11 C9 IA12 C9 IA13 C9 IA14 C9 IA15 B9

G

IA16 B8 IA17 C4 IA18 B7 IA19 A3 IA20 B7 IA21 D4 IA22 D5 IA23 B9 IA24 B11 IA25 F11 IA26 F11 IA27 G11 IA28 C9 IA29 C5

H

IA30 H9 IA31 H9

201918171615

A

B

C

D

E

F

G

H

I

J

K

L

M

N

O

P

MULTI 12NC : 3139_283_30162

BD 12NC : 3139_283_30172

1

2 3

4

45

O

DC398881

CLASS_NO

3PC333

1

-- -- --

2

2009-05-15

3

2009-07-31

NAME

YiPing Guo

SV

7

8

9101112

98

103

11

1256

13 14

13 17

14

15 16

SETNAMECHN

BDS MODULES

PCB SB PB522_LN

SUPERS.

DATECHECK

2009-05-15

1615

2

3139 283 3017

19

33

03101

20

43

C

ROYAL PHILIPS ELECTRONICS N.V. 2009

17 18 19 206712

18

2009-07-31

2009-07-282

O

P

A2

18730_532_090918.eps

090918

2009-Oct-09

SSB: Flash STI7100

Circuit Diagrams and PWB Layouts

EN 90PB52.3HU LA 10.

A

B

C

D

owner.

is prohibited without the written consent of the copyright

owner.

is prohibited without the written consent of the copyright

EE

F

G

A

B

C

D

1

2A50 A3

3A50 D3

3A52

FA52

3A51 B5 3A52 C1

+3V3

10K

FLASH-notRES

3A53-1 B9 3A53-2 B9 3A53-4 C6

3A53-3 B9

3A54 C5 3A55 B5

3A56 B6 3A57 C6

3A58 C6

7A00-2 A7

5432 321

7A50 B2 9A51 C6

FA50 D3 FA51 D4

6

654

FA52 D1 IA51 C63IA53 C6

IA52 C6

8

7

IA54 C6 IA55 B8

8

IA56 B8 IA57 B8

10

119

123 45678 9

FLASH

+3V3

EMI

EMIDATA

7A00-2

TI7100YWC

S

Φ

EMI

EMIBUS

EMIDMAREQ

EMIFLASHCLK

EMIADDR

NC

GNT REQ

AM31

L31 C30 A29

AN9

AM21

IA55

AM20

IA56

AN22

0 1

1 2

3

4 5 6 7

8

9 10 11 12 13 14 15 16 17 18 19 20 21 22 23

AL22

AN21

AL9 AK10 AL10 AK11 AL11 AK12 AL12 AK13 AL13 AK14 AL14 AK15 AL15 AK17 AL17 AK18 AL18 AK19 AL19 AK20 AL20 AK21 AL21

IA57

3A53-1 10K

8 1

6 3 72

3A53-2 10K

ET

+3V3

EMI-A(1) EMI-A(2) EMI-A(3) EMI-A(4) EMI-A(5) EMI-A(6) EMI-A(7) EMI-A(8) EMI-A(9) EMI-A(10) EMI-A(11) EMI-A(12) EMI-A(13) EMI-A(14) EMI-A(15) EMI-A(16) EMI-A(17) EMI-A(18) EMI-A(19) EMI-A(20) EMI-A(21) EMI-A(22)

EMI-RB FLASH-notRESET EMI-WRnot EMI-OEnot EMI-FLASH-CSnot

M29W640FT70N6F

7A50

25 24 23 22 21 20 19 18

8

7 6 5 4

3

2 1 48 17 16 9 10 13

15 12 11 28 26 47

0 1 2

8Mx8/4Mx16

3

4 5 6 7

8

9 10

A

11

64M-1

12 13 14 15 16 17 18 19 20 21

RB RP WE OE CE BYTE

37

EPROM

0

27

46

2A50

100n

D

VPP/WP_

AP9

10K3A53-4

IA51 IA52

IA54

IA53

AL6 AM5 G5

AK9 AL8 AM8 AP8 AK8

AP11 AN11

AP10 AP22 AP21

AK22

AN10

AP20 AP19 AP18 AP17 AP15 AP14 AP13 AP12 AN20 AN19 AN18 AN17 AN15 AN14 AN13 AN12

NC

CSA CSB CSC CSD CSE

BE0 BE1

OE LBA BAA

READYORWAIT

RDNOTWR

0 1 2

3

4 5 6 7

8

9 10 11 12 13 14 15

+3V3

EMI-FLASH-CSnot

29

0

31

1

33

2

35

3

38

4

40

5

42

6

44

7

30

8

32

9

34

10

36

11

39

12

41

13

43

14

45

15

A-1

FA50

14

3A50

10K

FA51

EMI-D(0) EMI-D(1) EMI-D(2) EMI-D(3) EMI-D(4) EMI-D(5) EMI-D(6) EMI-D(7) EMI-D(8)

EMI-D(9) EMI-D(10) EMI-D(11) EMI-D(12) EMI-D(13) EMI-D(14) EMI-D(15)

WP-FLASH-ST

EMI-A26 EMI-A25

+3V3

EMI-OEnot

+3V3

EMI-RB EMI-WRnot

EMI-D(0) EMI-D(1) EMI-D(2) EMI-D(3) EMI-D(4) EMI-D(5) EMI-D(6) EMI-D(7) EMI-D(8) EMI-D(9) EMI-D(10) EMI-D(11) EMI-D(12) EMI-D(13) EMI-D(14) EMI-D(15)

3A51

10K

3A55

10K

3A54

10K

3A56

47R

3A57

47R

9A51

3A58 47R

45

10K3A53-3

EMI-A(1) EMI-A(2) EMI-A(3) EMI-A(4) EMI-A(5) EMI-A(6) EMI-A(7) EMI-A(8)

EMI-A(9) EMI-A(10) EMI-A(11) EMI-A(12) EMI-A(13) EMI-A(14) EMI-A(15) EMI-A(16) EMI-A(17) EMI-A(18) EMI-A(19) EMI-A(20) EMI-A(21) EMI-A(22) EMI-A(23)

+3V3

A

B

C

D

1312

131211109

A

B

C

D

DD

E

F

G

H

1

I

J

MULTI 12NC : 3139_283_30162 BD 12NC : 3139_283_30172

1

2 1312111098

H

2

5

4

6

6543

5678 9

DC398881

CLASS_NO

3PC333

-- -- --

2009-05-15

2009-07-31

NAME

SV

7

1

2

3

YiPing Guo

SETNAMECHN

BDS MODULES

PCB SB PB522_LN

SUPERS.

2009-05-15

DATECHECK

3139 283 3017

43

C

ROYAL PHILIPS ELECTRONICS N.V. 2008

I

2009-07-31

2

2009-07-282

J

34

03101

12111098

A3

132 3 4

18730_533_090918.eps

090918

2009-Oct-09

SSB: DRAM STI7100

Circuit Diagrams and PWB Layouts

EN 91PB52.3HU LA 10.

A

B

C

D

E

G

H

K

owner.

is prohibited without the written consent of the copyright

owner.

M

N

1

A

B

C

F

D

+2V6-MP4

E

I

F

J

G

H

L

I

21

1 13

32

43

2 3 4

DRAM STI7100

LMI-VREF

2V5-LMI

1%

1K0

5AA0

220R

3AAN

1%

1K0

3AAP

FAA1

IAA0

100n

2AAE

2AAA

2ABG

2AAF

2AA6

FAA0

10u

1n0

100n

2AA7

2AA8

100n

2AAJ

2AAH

2AAG

1n0

2AB0

2AAZ

54

678 9

56

LMI DDR SDRAM SYS

2AA0

22u

7AA1

29

30 31 32 35 36 37 38 39

40 28 41 42

26 27

20 47

49

46 45 44 24 23 22 21

18333915

1

0 1 2

3

4 5

A 6 7

8

9 10 11

AP 0

BA

1

L

DM

U

VREF

CK

CK CKE CS RAS CAS WE

VSS

48

34

2V5-LMI

VDDQVDD

Φ

DDR SDRAM 16Mx16

VSSQ

666125258

LMI-D(7) LMI-D(6) LMI-D(5) LMI-D(4) LMI-D(3) LMI-D(2) LMI-D(1) LMI-D(0) LMI-D(15) LMI-D(14) LMI-D(13) LMI-D(12) LMI-D(11) LMI-D(10) LMI-D(9) LMI-D(8) LMI-D(23) LMI-D(22) LMI-D(21) LMI-D(20) LMI-D(19) LMI-D(18) LMI-D(17) LMI-D(16) LMI-D(30) LMI-D(31) LMI-D(28) LMI-D(29) LMI-D(26) LMI-D(27) LMI-D(24)

LMI-DQS0 LMI-DQS1 LMI-DQS2 LMI-DQS3

3AAB 390R

100n

2AAS

1n0

2AB7

2AAT

2AAV

100n

1n0

EDD2516AETA-6B-E

100n

2AAU

1n0

2AAW

LMI-A(0) LMI-A(1) LMI-A(2) LMI-A(3) LMI-A(4) LMI-A(5) LMI-A(6) LMI-A(7) LMI-A(8) LMI-A(9) LMI-A(10) LMI-A(11) LMI-A(12)

LMI-BA0 LMI-BA1

LMI-DQM0 LMI-DQM2

LMI-CLKnot LMI-CLK LMI-CLKEN LMI-CSnot LMI-RASnot LMI-CASnot LMI-WEnot

100n

2AAK

1n0

2AB1

2AAN

2AAM

1n0

2AB4

2AB3

2AB2

100n

2AAL

100n

2AAP

2AAR

1n0

2AB5

2AB6

2AA1

98

10

12

7 8 9 101112

22u

61

55

14 17 19 25

NC

43 50 53

0 1 2

3

4

10

512

11

6

13

D

7

54

8

56

9

57

10

59

11

60

12

62

13

63

14

65

15

16

L

51

DQS

U

64

2V5-LMI

22u

2ABC

2 4 5 7

8

1 83AA1-1 22R

3AA1-3 22R3 6 3AA1-4 4 5

3AA3-4 5 4 22R

7 2 22R3AA3-2 8 13AA3-1 22R

543AA5-4 22R

3AA5-2 22R72

8 122R3AA5-1

3AA7-2 22R27

1 8 22R3AA7-1 453AA7-4 22R

3 622R3AA7-3

3AA9 22R

LMI-DQS0 LMI-DQS2

22R3AA1-2 2 7

22R

33AA3-3 22R6

22R3AA5-3 6 3

22R3AAL

LMI-D(0) LMI-D(1) LMI-D(2) LMI-D(3) LMI-D(4) LMI-D(5) LMI-D(6)

LMI-D(7) LMI-D(16) LMI-D(17) LMI-D(18) LMI-D(19) LMI-D(20) LMI-D(21)

LMI-VREF

LMI-D(22) LMI-D(23)

3AA2-1 1 8

273AA2-2 22R

3AA2-3 3AA2-4 4 5

3AA4-4

3AA4-2 22R72

3AA6-4 22R54

3AA6-2 22R7

27

3AA8-2 22R

1 8 22R3AA8-1

3AA8-4 22R45

3AAK

3AAM

LMI-A(0) LMI-A(1) LMI-A(2) LMI-A(3) LMI-A(4) LMI-A(5) LMI-A(6) LMI-A(7) LMI-A(8) LMI-A(9) LMI-A(10) LMI-A(11) LMI-A(12)

LMI-BA0 LMI-BA1

LMI-DQM1 LMI-DQM3

LMI-CLKnot LMI-CLK

1n0

LMI-CLKEN

2AA9

LMI-CSnot LMI-RASnot LMI-CASnot LMI-WEnot

V1

0

V2

1

W1

2

W2

3

Y1

22R

22R3 6 22R

22R5

3 22R3AA4-3 6

22R3AA4-1 8 1

3

22R3AA6-3 6

2

22R3AA6-1 8 1

622R3AA8-33

22R

Y2 AA1 AA2 E2 E1 F2 F1 G2 G1 H2 H1 AD1 AD2 AE1 AE2 AF1 AF2 AG1 AG2 L2 L1 M2 M1 N2 N1 P2 P1

AB1 J2 AC2 K1

A14 B14 A15 B15 A16 B16 A17 B17 A1 B2 A2 B3 A3 B4 A4 B5 A20 B20 A21 B21 A22 B22 A23 B23 A7 B8 A8 B9 A9 B10 A10 A11

A18 A5 B19 B7

4 5 6 7

8

9 10 11 12 13 14 15

LMISYSDATA

16 17 18 19 20 21 22 23 24 25 26 27 28 29

30 31

0 1

LMISYSDATASTROBE

2

3

0 1 2

3

4 5 6 7

8

9 10 11 12 13 14 15 16

LMIVIDDATA 17 18 19 20 21 22 23 24 25 26 27 28 29

30 31

0 1

LMIVIDDATASTROBE

2

3

3AAC 390R

7A00-3

STI7100YWC

Φ

LMI

LMISYSDATAMASK

LMISYS

LMIVIDDATAMASK

LMIVID

13

EDD2516AETA-6B-E

LMISYS

LMISYSADD

LMIVIDBKSEL

GNDBCOMP

LMIVID

LMIVIDADD

LMIVIDBKSEL

GNDBCOMP

VREF

CLKEN

VREF

CLKEN

CLK CLK CS0

1

CS RAS CAS

WE

0 1 2

3

4 5 6 7

8

9 10 11 12

0

1

0

1

2

3

REF

CLK CLK CS0

CS1 RAS CAS

WE

0 1 2

3

4 5 6 7

8

9 10 11 12

0

1

0

1

2

3

REF

14131211 1576

14 15

LMI DDR SDRAM SYS

2AA2

7AA2

11833

A

BA

DM

CK CK

VSS

344866612

IAA3

3AAG422R

IAA5

3AAH 120K

LMI-VREF2-ST

IAA7

3AAT 120K

3

Φ

DDR SDRAM 16Mx16

3ABK 3ABL 3ABM 3ABN

29

0

30

1

31

2

32

3

35

4

36

5

37

6

38

7

39

8

40

9

28

10

41

11

42

AP

26

0

27

1

20

L

47

U

49

VREF

46 45 44

CKE

24

CS

23

RAS

22

CAS

21

WE

U1 U2

L4 M5 K5

J4

J5

M4 N5 N4 P5 U4 V5 V4

W5 W4

U5 P4 T5 T4

K4

L5

AB2

J1

AC1

K2

H5 Y5 R1 R2

A13 B13 D11 E11 E14 D15 E15

E10 D10

E9 D9 D6 E6 D5 E5 D4 E7 D8 E8 D7

D14 E13

A6

A19

B6

B18

C11 D13 B12 B11

9

VDDQVDD

2AA3

22u22u

155561

VSSQ

525864

D

IAA4

IAA6

DQS

2V5-LMI

3AAA

3AAD

2V5-LMI

3AAR

3AAS

LMI-CLK

LMI-CLKnotLMI-CLKnot

171110

3AAQ

120R

16

2V5-LMI

22u

2ABB

14 17 19 25

NC

43 50 53

0 1 2

3

4 512 6 7

8

9 10 11 12 13 14 15

L

U

1K0 1%1%1K0

1K0

2 4 5 7

8

10 11 13 54 56 57 59 60 62 63 65

16 51

LMI-VREF-ST

2AB8

1n0

10u

2AB9

100n

2AAB

LMI-CSnot

LMI-RASnot LMI-CASnot

LMI-WEnot

LMI-A(10) LMI-A(11) LMI-A(12)

LMI-DQM0 LMI-DQM1 LMI-DQM2 LMI-DQM3

LMI-CLKENLMI-D(25)

FAA2

2ABA

FAA3

LMI-CLK

LMI-A(0) LMI-A(1) LMI-A(2) LMI-A(3) LMI-A(4) LMI-A(5) LMI-A(6) LMI-A(7) LMI-A(8) LMI-A(9)

LMI-BA0 LMI-BA1

100n

LMI-D(8)

LMI-D(9) LMI-D(10) LMI-D(11) LMI-D(12) LMI-D(13) LMI-D(14) LMI-D(15) LMI-D(24) LMI-D(25) LMI-D(26) LMI-D(27) LMI-D(28) LMI-D(29) LMI-D(30) LMI-D(31)

LMI-DQS1 LMI-DQS3

LMI-VREF-ST

18

2019181716

19

2AA0 A6 2AA1 A6 2AA2 A10 2AA3 A11 2AA6 C2 2AA7 C2 2AA8 C3 2AA9 C8 2AAA D1 2AAB I12 2AAE D2 2AAF D2

A

2AAG D2 2AAH D3 2AAJ D3 2AAK D3 2AAL D3 2AAM D3 2AAN D4 2AAP D4 2AAR D4 2AAS D4 2AAT D4 2AAU D5 2AAV E4

B

2AAW E5 2AAZ E3 2AB0 E3 2AB1 E3 2AB2 E3 2AB3 E3 2AB4 E4 2AB5 E4 2AB6 E4 2AB7 E4 2AB8 H11 2AB9 H12

C

2ABA H12 2ABB A12 2ABC A7 2ABG D2

3AA1-1 D7 3AA1-2 D7 3AA1-3 D7 3AA1-4 D7 3AA2-1 D8 3AA2-2 E8 3AA2-3 E8

D

3AA2-4 E8 3AA3-1 E7 3AA3-2 E7 3AA3-3 E7 3AA3-4 E7 3AA4-1 E8 3AA4-2 E8 3AA4-3 E8 3AA4-4 E8 3AA5-1 F7 3AA5-2 E7 3AA5-3 E7

E

3AA5-4 E7 3AA6-1 F8 3AA6-2 F8 3AA6-3 F8 3AA6-4 F8 3AA7-1 F7 3AA7-2 F7 3AA7-3 F7 3AA7-4 F7 3AA8-1 F8 3AA8-2 F8 3AA8-3 F8

F

3AA8-4 F8 3AA9 G7 3AAA H11 3AAB B4 3AAC B9 3AAD H11 3AAG F11 3AAH F11 3AAK G8 3AAL G7 3AAM G8

G

3AAN B2 3AAP C2 3AAQ D13 3AAR I11 3AAS I11 3AAT I11 3ABK F11 3ABL F11 3ABM F11 3ABN F11

5AA0 D1 7A00-3 D9

H

7AA1 A5 7AA2 A10 FAA0 B3 FAA1 C2 FAA2 H12 FAA3 H12 IAA0 D1 IAA3 F10 IAA4 F11 IAA5 F10 IAA6 I11 IAA7 I10

I

20

A

B

C

D

E

F

G

H

I

J

K

L

M

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O

P

12 12 1356

MULTI 12NC : 3139_283_30162 BD 12NC : 3139_283_30172

12

12 9

3 4

3 45

6758 9

7 8

2009-Oct-09

910

10 11

10 113 45678 19 20

12 13 14 1512 13 14 15 16 17

11

CLASS_NO

3PC333

-- -- --

2009-05-15

2009-07-3123

NAME

YiPing Guo

SV

DC398881

1

EMANTESNHC

BDS MODULES

PCB SB PB522_LN

CHECK DATE

SUPERS.

16 17 18 19

2009-05-15

2

2 2009-07-28

3139 283 3017

43

C

ROYAL PHILIPS ELECTRONICS N.V. 2009

18

35

13010

20

18730_534_090918.eps

2009-07-31

A2

090918

O

P

SSB: Interface STI7100

Circuit Diagrams and PWB Layouts

EN 92PB52.3HU LA 10.

A

B

C

D

is prohibited without the written consent of the copyright

owner.

is prohibited without the written consent of the copyright

owner.

E

F

GFG

1

2

21

1

2 3

6543

4

7

6

75

8

A

B

C

D

E

PCMOUT2 PCMOUT3 PCMOUT4

3AC1

2AC0 1u0

470R

IAC4

IAC5

L34 L33 K34 K33 J34 J33 H34 H33 U30 T31 T30 R31 R30 P31 P30 N31

M34 M33

C28 C27

B28 A28

B27 A27

D24 E24 E26 D26

A25 B25 C25 D25 E25

0 1 2

3

4 5 6 7

8

VIDDIGOUTYC 9 10 11 12 13 14 15

VSYNC HSYNC

VBGFIL IREF

MRIGHT PRIGHT

MLEFT PLEFT

SPDIF SCLK

LRCLK PCMCLK

0 1 2

3

4

7A00-1

STI7100YWC

Φ

AV

INTERFACE

VIDDIGOUT

VIDANA

AUDANA

AUDANAOUT

AUDOUT

VIDANA

AUDDIGAUDPCMOUT

R0OUT G0OUT B0OUT

IDUMPR0 IDUMPG0 IDUMPB0

C1OUT

CV1OUT

Y1OUT

IDUMPC1

IDUMPCV1

IDUMPY1

REXT0 REXT1

GNDAREXT0 GNDAREXT1

TXCP TXCN

TX0P

TX0N

TX1P

TMDS

TX1N

TX2P

TX2N

TMDSREF

DATAIN

DSTRBIN

DLRCLKIN

D34 F34 E34

D33 F E33

A34 C34 B34

A33 C33 B33

A31 A32

B31 B32

U33 U34 T33 T34 R33 R34 P33 P34

T32

D29 D28 E28

RES

+3V3

33

FAC4

IAC2

3AC2

12K

3AC3

22K

3AC4

12K

3AC5

IAC3

FAC0

COMPENSATION RESISTOR

22K

3AC9

100R

3ACC

100R

DRXC+

DRXC-

DRX0+

DRX0-

DRX1+

DRX1-

DRX2+

DRX2-

+3V3TMDS

2AC1

1u0

2AC2

100n

+3V3

3AC6

3AC7

3ACB

FAC1

FAC5

1K2

1K0

2K2

FAC3

+3V3

3ACA

7AC0 BC847BW

3AC8

68R

180R

FAC2

2AC3

100n

IAC1

111098

A

B

12

2AC0 D2 2AC1 B6 2AC2 C6 2AC3 C7

3AC1 D1 3AC2 C4 3AC3 C4 3AC4 D4 3AC5 D4 3AC6 B6 3AC7 C6 3AC8 C7 3AC9 E4 3ACA C6 3ACB C6 3ACC E4

7A00-1 B3 7AC0 C6 FAC0 E4 FAC1 B6 FAC2 C7 FAC3 C6 FAC4 C6 FAC5 C6 IAC1 C7 IAC2 C4 IAC3 D4 IAC4 D2 IAC5 D2

C

D

E

13

1312

A

B

C

D

E

F

G

H

IHI

J

1

MULTI 12NC : 3139_283_30162 BD 12NC : 3139_283_30172

1

2

2 1312

H

CLASS_NO

2009-05-15

2009-07-31

NAME

SV

3PC333

-- -- --

YiPing Guo

6

DC398881

1

2

3

7

SETNAMECHN

BDS MODULES

PCB SB PB522_LN

SUPERS.

2009-05-15

DATECHECK

98

10

8

2009-07-31

2

2009-07-282

3139 283 3017

43

C

ROYAL PHILIPS ELECTRONICS N.V. 2009

1110

11

03101

12

36

13

I

J

A3

2

4

3

43

3

4

65

5

7

18730_535_090918.eps

090918

2009-Oct-09

SSB: Power STI7100

Circuit Diagrams and PWB Layouts

EN 93PB52.3HU LA 10.

A

B

C

D

E

F

G

H

K

owner.

is prohibited without the written consent of the copyright

owner.

is prohibited without the written consent of the copyright

M

N

181714

181712 13543

7A00-6 A13 7A00-7 A6 IAE1 C2

IAE2 D2 IAE3 E4 IAE4 D2

13 14

A24 B24 C14 C15 C16 C17 C18 C19 C20 C21 C22 C23 C24 D23 E23

J3

K3

L3

M3

GNDE

N3 P3 R3 R4 R5 T3

AD

3

AE3 AF3

AG3

AH3

AJ3 AM4 AM6

AN4

AN6

AP4

AP6

V30

U31

AH32 AK32

AJ32

AG34 AG33 AG32

IAE5

100n

2AFJ

2AFK

2AFH

VDDE-3V3

19

IAE5 E14 IAE6 B12AE8 C2 IAE8 G52AE9 H9

2AE1 B2 2AE2 C2 2AE3 F4

2

2AE4 F4 2AE5 H8 2AE6 H8

2AE7 C2

2AEA H9

2AEC F11

43

2AED B2 2AEE B2 2AEF B2

2AEG B2 2AEH G4 2AEJ B3 2AFJ F13

123 4

POWER STI7100

IAE6

+1V1

10V

1u0

+2V6-MP4

+3V3

+2V6-MP4

1u0

2AE1

10u

5AE8

+1V1

220R

1n0

2AE8

5AE2

30R

1n0

2AF4

5AE7

30R

1n0

2AGC

5AE4

220R

1n0

100n

2AFY

2AFW

2AED

2AEB

2AF5

2AGD

2AG4

2AEF

2AEE

1n0

100n

2AE7

2AE2

100n

1n0

2AG5

2AG6

100n

2AEJ

2AEK

2AEG

IAE1

+1VTMDS

100n

IAE2

+3V3TMDS

IAE4

+2V5-CLKGENA

1n0

2AG7

2AG9

2AG8

6 15 16

2AEK B3 2AEL H9 2AEM H10

1n0

100n

2AEP

2AEN

1n0

100n

2AGA

2AGB

+1V1

2V5-LMI

+1V1

2AEN B3 2AEP B3 2AER H11

1n0

2AFP

2AFN

2AFQ

+2V5-CLKGENA

IAE3

22u

100n

2AE4

2AE3

2AGN

765 16

2AEU H102AEB C2 2AEZ H9

VDDE-3V3

VDDE-2V5

1n0

2AFR

VDDE-2V5

+1VTMDS

+3V3TMDS

VDDE-2V5

+1V1

VDDE-2V5

22u

2V5-LMI

30R5AE9

1n0

100n

2AGT

2AEH

30R5AE5

1n0

100n

2AGH

2AGG

8

2AF0 H10 2AF4 D2 2AF5 D2

2AFB F12 2AFC F12

5

USB2 AL24 AM24

USBVDDBC2V5 AL25

USBVDDBS AN24

USBVDDP2V5 AP24

USBVDDP

SATA-I AN29

SATAVDDT0 AP29

SATAVDDT1 AM29

SATAVDDR0 AL28

SATAVDDR1 AL30

SATAVDDREF AM26

SATAVDDOSC2V5 AL26

SATAVDDOSC AL29

SATAVDDDLL

TMDS W31

TMDSVDDC0 Y32

TMDSVDDC1 W34

TMDSVDDC2 W32

TMDSVDDCK AC32

TMDSVDDP W33

TMDSVDDX AA32

TMDSVDDSL AB32

TMDSVDDD W30

TMDSVDDE3V3 V31

TMDSVDD

VDAC

DA_HD_0_VCCA

DA_SD_0_VCCA H32

VDDE2V5_VID_ANA

ADAC B29

AUD_VCCA D31

VDDE2V5_AUD_ANA

CLOCKGENA

CKGA_PLL1_AVDDPLL2V5

CKGA_PLL1_DVDDPLL1V0

CKGA_PLL2_AVDDPLL2V5

CKGA_PLL2_DVDDPLL1V0 C3

CKGA_PLL_VDDE2V5

CLOCKGENB

CKGB_4FS0_VCCA J30L32

CKGB_4FS0_VDDD

CKGB_4FS1_VCCA H30

CKGB_4FS1_VDDD G32

VDDE2V5_4FS_ANA N30

AVDDPLL80v0 K30

DVDDPLL80v0 E29

VDDE2V5_PLL80_ANA

CLOCKGENC C29

FS0_VCCA G30

FS0_VDDD E31

VDDE2V5_FS0_ANA

LMI

T2 U3 V3 W3 Y3

LMISYSVDDE2V5

Y4 AA3 AA5 AB3 AC3

IAE8

H4

LMISYSDLL_VDD C4

C5 C6 C7 C8

LMIVIDVDDE2V5

C9 C10 C13 D12 E12 A12

LMIVIDDLL_VDD

ANALOG

9

01H 8FA29H TEA2

2AFD F12 2AFE F12 2AFF F12

678

7A00-7

STI7100YWC

Φ

POWER (MISC)

CKGA_PLL1_AGNDPLL2V5 CKGA_PLL1_DGNDPLL1V0 CKGA_PLL2_AGNDPLL2V5 CKGA_PLL2_DGNDPLL1V0

10987

2AFG F13 2AFH F13

USBVSSC2V5

USBVSSBS

USBVSSP2V5

USBVSSP

SATAVSST

SATAVSSR SATAVSSREF SATAVSSOSC

SATAVSSDLL

TMDSVSS TMDSVSSC1 TMDSVSSC2 TMDSVSSCK

TMDSVSSP TMDSVSSX

TMDSVSSSL

TMDSVSSD TMDSGNDE

DA_HD_0_GNDA

DA_SD_0_GNDA GNDE_VID_ANA

AUD_GNDA

AUD_GNDAS

GNDE_AUD_ANA

CKGB_4FS0_GNDA CKGB_4FS0_GNDD CKGB_4FS1_GNDA CKGB_4FS1_GNDD

GNDE_4FS_ANA

AGNDPLL80v0 DGNDPLL80v0

GNDE_PLL80_ANA

FS0_GNDA

FS0_GNDD

GNDE_FS0_ANA

LMISYSDLL_VSS

LMIVIDDLL_VSS

GND_ANA1

GND_ANA2

C0

2AFK F13 2AFL H10 2AFN B3

AN23

AL23 AM23 AP23

AP28 AN28 AM27

AL27 AM28

N34 N33 V34 V32 P32 V33 U32 N32 R32

C32D30

F30E30 J32

A30 B30 E32

D1B1 D3F3 D2C2 E3E4

M31

J31M30

H31L30

F31

D

32 K31 K32

C31 G31

F32

G3T1

C12

D27 M32

11

2AFP B4 2AFQ B4 2AFR B4

+1V1

VDDE-2V5

+1V1

2AFS H11 2AFT H11 2AFW F1

1n0

2AE5

2AE6

2AFY F2 2AG4 F2 2AG5 F2

1n0

2AE9

2AEL

F4 F5 G4 N16 N17 N18 N19 P17 P18 R13 R17 R18 R22 T13 T14 T21 T22 U13 U14 U21 U22 V13 V14 V21 V22 W13 W14 W21 W22 Y13 Y17 Y18 Y22 AA17 AA18 AB17 AB18 AB19 AF30 AK16 AL7 AB16 AL16 AM7 AM16 AM17 AM18 AM19 AN7 AN16 AP16

13121110

2AG6 F2 2AG7 F2 2AG8 F3

9

7A00-5

STI7100YWC

Φ

POWER

(1V0)

VDD

1n0

2AEZ

2AEA

100n

2AET

2AEM

2AG9 F3 2AGA F3 2AGB F3

GND

100n

2AEU

10

14

H3 N13 N14 N15 N20 N21 N22 P13 P14 P15 P16 P19 P20 P21 P22 R14 R15 R16 R19 R20 R21 T15 T16 T17 T18 T19 T20 U15 U16 U17 U18 U19 U20 V15 V16 V17 V18 V19

W15 W16 W17 W18 W19 W20

Y14 Y15 Y16 Y19 Y20 Y21

AA13 AA14 AA15 AA16 AA19 AA20 AA21 AA22 AB13 AB14 AB15 AB20 AB21 AB22

AK4 AK5

AK29 AK30 AK31

AL4 AL5

AL31 AM22 AN26 AN32

AP26

AP32

V20

100n

2AF0

2AF8

15

2AGC E2 2AGH H4 2AGD E2 2AGG H4

2AGN F3 2AGP H11

11

VDDE-2V5

VDDE-3V3

+3V3

100n

2AFL

2AER

2AGP

2AGT G4 5AE0 E11 5AE2 D1

5AE4 E1 5AE5 H4 5AE7 E1

5AE8 C1 5AE9 G4 7A00-5 A10

12

7A00-6

STI7100YWC

Φ

POWER

(2V5, 3V3)

AK3 AK7

VDDE 2V5

A26 B26 C26 G33 G34 AF31 AF32 AF33 AF34 AK23 AK24

VDDE 3V3 AM9 AM10 AM11 AM12 AM13 AM14 AM15 AP7 AN8

GNDE 3V3

5AE0

220R

2AEC

100n

2AFT

2AFS

1n0

2AFD

2AFE

1n0

100n

2AFF

2AFG

1n0

2AFB

2AFC

+1V1

1

A

B

C

D

I

E

J

F

L

G

H

2019

20

A

B

C

A

D

E

B

F

C

G

H

D

H

I

E

J

F

K

L

G

M

H

N

O

P

MULTI 12NC : 3139_283_30162 BD 12NC : 3139_283_30172

1

123

2

12

3 456

45

3 4

67

56

7 8

8 9 10111213 14 15

9

2009-Oct-09

3PC333

-- -- --

YiPing Guo

DC398881

11

SETNAMECHN

1

2

3

BDS MODULES

PCB SB PB522_LN

SUPERS.

DATECHECK

7 8 910

CLASS_NO

2009-05-15

2009-07-31

NAME

SV

10 15 16

11 12 13 14

12 13 14

3139 283 3017

2009-05-15

43

C

17 18

18

ROYAL PHILIPS ELECTRONICS N.V. 2009

2

2009-07-31

2009-07-282

03101

37

917161

19 20

20

18730_536_090918.eps

A2

090918

O

P

SSB: Supply

Circuit Diagrams and PWB Layouts

EN 94PB52.3HU LA 10.

A

B

C

D

is prohibited without the written consent of the copyright

owner.

E

F

G

H

A

B

C

D

E

1

2013 C7 2AK0 D2 2AK1 D2

2AK3 D5 2AK4 D6 2AK5 D6

2AK6 D5 2AKA B6 2AKB B6

2AKC A7 2AKD A9 2AKE A9

3009 C8 3015 B9 3AK0 D4

3AK1 E4 3AK2 D5 3AKA C7

3AKC B8 3AKD A8

3AKF E8 3AKG E8 3AKH E8

65432

3AKJ D9

4AK0 D3 4KA1 D5

5AK0 D1 5AK1 D4 5AK2 D5

7

7AK1-1 D3 7AKA C7 7AKB C8

123 45

SUPPLY

EN_1S10

+12V

5AK0

10u

2AK0

4AK0

FAKH

22u

100n

2AK1

2

5

7AK1-1

ST1S10PHR

INH

SYNC

6

1

A

SW

VIN

VFB

GND

HSPA

49

8

IAK0

7

3

5AK1

3u6

3AK0

3AK1

IAK1

12K

22K

3AK2

47K

2AK6

IAK2

22u

2AK3

7AKC A8 7AKF E9 9AK2 C8

8

9AK4 D8 FAK1 D6

FAKA C7 FAKB C9 FAKC A9FAK5 B6

FAKF E8 FAKG B8 FAKH D2

109

FAKJ E9 FAKK E8 IAK0 D4

IAK1 D43AKB C7 IAK2 D5 IAKA C7

11 12 13

IAKB C8

A

678 9

B

+3V3

3AKA

3AKB

2K2

1K2

+3V3

2AKC

FAKA

1u0

IAKA

2013

INH_5973

2

1

7AKA

NCP303LSN10T1

2

IN

3

GND

5

CD

100n

MPEG4_PWR

7AKC

LD29150PT

INH

GND

3

RST

NC

FAKF

3AKF

100R

A

B

C

D

E

F

2AKD

RES

RES 3015

100R

10u 10V

FAKC

100n

2AKE

FLASH-notRESET

CPU-notRESET

BUF-RST-TARGETn

+2V6-MP4

4

OUTIN

5

ADJ

NC

+3V3

10K

3009

1

4

IAKB

FAKG

3AKC

9AK2

3AKD

9AK4

56K

47K

FAKB

7AKB

PDTC114EU

D

+3V3

+12V

G

10K

3AKJ

FAKJ

7AKF BC847BW

EN_1S10

E

3AKG

10K

3AKH

22K

FAKK

H

RES

+3V3

FAK5

10V

330u

100n

2AK5

2AKB

10n

2AKA

4KA1

5AK2

3u6

10V330u

2AK4

FAK1

22u

+3V3

+1V1

12

I

J

MULTI 12NC : 3139_283_30162 BD 12NC : 3139_283_30172

1

3 45678 9

45

6

2009-Oct-09

I

DC398881

CLASS_NO

3PC333

-- -- --

2009-05-15

2009-07-3123

NAME

SV

1

YiPing Guo

CHECK DATE

7

EMANTESNHC

BDS MODULES

PCB SB PB522_LN

SUPERS.

2009-05-15

108 92

2

2009-07-31

2 2009-07-28

3139 283 3017

43

C

ROYAL PHILIPS ELECTRONICS N.V. 2009

113

13010

12

38

13

J

A3

18730_537_090918.eps

090918

SSB: Debug

Circuit Diagrams and PWB Layouts

EN 95PB52.3HU LA 10.

A

B

C

D

owner.

is prohibited without the written consent of the copyright

owner.

is prohibited without the written consent of the copyright

E

F

G

H

A

B

C

D

E

1

21

2

3

4

56456

7

8

123 45678

DEBUG

FOR DEVELOPMENT ONLY

RES

1AM2 1 2

3

4 5 6 7

8

9 10 11 12 13 14

1516

1AM0 1 2

3

45

1AM1 1 2

3

45

ST40 DEBUG LINK

100R

100R3AM4

FAMJ

FAM3 FAM4 FAM5 FAM6

FAM7

FAM8

FAM9 FAMA FAMB

FAME

FAM0 FAM2 FAM1

FAMC

FAMD

BM14B-SRSS-TBT

UART3

UART4

TXD-ASC2 TXD-ASC3

RXD-ASC3

RXD-ASC2

TRIG-OUT TRIG-IN ASEBRKn JTAG-TMS

JTAG-TCK

JTAG-TDI JTAG-TDO RST-TARGETn JTAG-TRSTn

BUF-RST-TARGETn

IAM4

2AM1

100n

2AM4

100n

3AM1 100R

3AM6

100R

9AM1

IAM0

IAM1

IAM2

IAM3

IAM5

IAMB IAMA

7AM1-1 74LVC07APW

+3V3

2AM0

7AM0 ST3232C

16

VCC

Φ

RS232

1

C1+

3

C1-

4

C2+

5

C2-

T1

IN

OUT

T2

R1

IN OUT

8

R2

GND

15

+3V3

14

7

+3V3

14

7

RES

9AM2

1

7AM1-2 74LVC07APW

3

2

4

100n

IAM6

6

V-

2

V+

4111

T1

701

T2

2131

R1

9

R2

3AM7

10K

3AM8

10K

IAM7

IAM8 IAM9

RES9AM0

2AM2 100n

2AM3

100n

3AM2 100R

3AM3

3AM5 100R

+3V3

9

10

11

A

B

C

D

1AM0 B6 1AM1 C6 1AM2 D6 2AM0 A5 2AM1 A3 2AM2 B5 2AM3 B5 2AM4 B3

3AM1 B3 3AM2 B5 3AM3 B5 3AM4 C5 3AM5 C5 3AM6 C3 3AM7 D4 3AM8 E4

7AM0 A4 7AM1-1 D3 7AM1-2 E4 9AM0 D4 9AM1 D3 9AM2 E4 FAM0 B6 FAM1 B6 FAM2 B6 FAM3 D6 FAM4 D6 FAM5 D6 FAM6 D6 FAM7 D6 FAM8 D6 FAM9 D6 FAMA D6 FAMB E6 FAMC C6 FAMD C6 FAME E6 FAMJ D6 IAM0 A3 IAM1 B3 IAM2 B3 IAM3 B3 IAM4 B3 IAM5 B3 IAM6 B5 IAM7 B5 IAM8 B5 IAM9 B5 IAMA B3 IAMB B3

1312

12111098

13

A

B

C

D

E

F

G

E

H

12

I

J

MULTI 12NC : 3139_283_30162 BD 12NC : 3139_283_30172

12

1

10

87653

I

2

2009-07-31

2 2009-07-28

J

3139 283 3017

43

C

ROYAL PHILIPS ELECTRONICS N.V. 2009

111098

119

13010

12

39

13

J

A3

4

DC398881

CLASS_NO

3PC333

1

-- -- --

2009-05-15

2009-07-31

NAME

SV

7

3

45

6

65432

7

2

3

YiPing Guo

CHECK DATE

8

EMANTESNHC

BDS MODULES

PCB SB PB522_LN

SUPERS.

2009-05-15

18730_538_090918.eps

090918

2009-Oct-09

SSB: I2C Busses

Circuit Diagrams and PWB Layouts

EN 96PB52.3HU LA 10.

AKA

B

C

D

E

G

H

K

owner.

is prohibited without the written consent of the copyright

owner.

is prohibited without the written consent of the copyright

M

1

123 45

43

5432

52 2019181716

678 9

96

67

10

11 12

1110

8 9

13

14

10 11

I2C ADDRESS = 4A(WRITE)

A

7AD1

SAA7113

MULTI-STANDARD

DATA SLICER

SYNCHRONIZATION

VSSDE2

VSSDE1

VSSDA

35

30

16

VBI DATA

BYPASS

UPSAMPLING

FILTER

CHROMINANCE

BRIGHTNESS

CONTRAST

SATURATION

LUMINANCE

CIRCUIT

RTS0

26

FAD5

FAD6

3ADB 4K7

RTS1

27

4K73ADC

RTCO

25

2ADD

16V

22u

OUTPUT

FORMATTER

2

I

C-BUS

CONTROL/

INTERFACE

CLOCKS

CLOCK

GENER’N

POWER

ON

CONTROL

VSSA0

VDDA0

11

10

100n

2ADE

VP0

VP1

VP2

VP3

VP4

VP5

VP6

VP7

SDA

SCL

XTAL

XTALI

LLC

CE

40

IADC

10K

+3V3

3ADD

IADD

1AD1

IADE

IADF

IADG

IADH

IADJ

IADK

IADL

FAD7

FAD8

3ADH-4 33R

3ADH-2 33R

3ADJ-333R

3ADJ-1 33R

3ADF

3ADG

2ADF

10p

2ADG

10p

3ADE

33R

22

21

20

19

15

14

13

12

23

24

31

24.576M

32

17

IADM

DVID0

IADN

33R3ADH-3

33R3ADH-1

33R3ADJ-4

33R3ADJ-2

33R

IADP

IADQ

IADR

IADS

IADT

IADU

DVID1

DVID2

DVID3

DVID4

DVID5

DVID6

DVID7

SDA-SSB

SCL-SSB

CLK_REF

B

CVBS-BO

C

F

D

E

I

J

F

G

SDA-SSB

L

SCL-SSB

3AD1

IAD7

18R

56R

3AD2

+3V3

3AD8 4K7

+3V3

RES 3AN6

4K7

RES 3AN7

4K7

+3V3

47n2AD1

2AD2 47n

2AD3 47n

47n2AD4

2AD5 47n

47n

2AD6

+3V3

5AD1

+3V3

5AD2

4K73AD9

3AD4 4K7

3AD6

3AD7

2AD8 100n

4K73AD5

100R

1K0

3ADK

FAD1

FAD9

FAD2

FAD3

FAD4

IAD1

IAD2

IAD3

IAD4

IAD5

IAD8

IAD9

3u3

10V22u

2AD7

IADA

3u3

100n2AD9

AI11

4

AI1D5

AI12

7

9

43

1

75R

3AD3

6

28

29

2

41

3

42

38

37

39

8

36

AOUT

AI21

CONVERSION

AI2D44

AI22

AGND

VSSD1

VDDD1

VSSA1

VSSA2

VDDA1

VDDA2

TDI

TCK

TMS

TRST

TDO

ANALOG

PROCESSING

AND

A/D

ANALOG

PROCESSING

CONTROL

TEST

CONTROL

BOUNDARY

SCAN

AND SCAN TEST

VDDDE2

VDDDA33VDDDE1

34

18

IADB

H

100n

2ADB

2ADA

2ADC 100n

15

15141312

1716

1AD1 F8 2AD1 B3 2AD2 B3 2AD3 B3 2AD4 C3 2AD5 C3 2AD6 C3 2AD7 D4 2AD8 E3 2AD9 E3 2ADA H5 2ADB H5 2ADC H5

A

2ADD H6 2ADE H7 2ADF E8 2ADG F8

3AD1 B2 3AD2 B2 3AD3 C4 3AD4 F3 3AD5 F3 3AD6 F3 3AD7 F3 3AD8 F3

B

3AD9 F3 3ADB H6 3ADC H6 3ADD H7 3ADE F9 3ADF E8 3ADG E8 3ADH-1 C8 3ADH-2 C8 3ADH-3 B8 3ADH-4 B8 3ADJ-1 C8

C

3ADJ-2 C8 3ADJ-3 C8 3ADJ-4 C8 3ADK G3 3AN6 G2 3AN7 H2

5AD1 D3 5AD2 E3 7AD1 A5 FAD1 F4 FAD2 F4

D

FAD3 F4 FAD4 F4 FAD5 G6 FAD6 G6 FAD7 E8 FAD8 E8 FAD9 F4 IAD1 B4 IAD2 B4 IAD3 B4 IAD4 C4 IAD5 C4

E

IAD7 B2 IAD8 C4 IAD9 D4 IADA E4 IADB H5 IADC G7 IADD B8 IADE B8 IADF C8 IADG C8 IADH C8 IADJ C8

F

IADK C8 IADL C8 IADM B9 IADN B9 IADP C9 IADQ C9 IADR C9 IADS C9 IADT C9 IADU C9

1918

2087

A

B

C

D

E

F

G

HGH

I

J

K

G

L

H

M

N

O

P

MULTI 12NC : 3139_283_30162 BD 12NC : 3139_283_30172

123

123 4567

45678 9

2009-Oct-09

10 11

8 9

12 13

13

10 11

DC398881

CLASS_NO

3PC333

1

-- -- --

2009-05-15

2

2009-07-31

SV

YiPing Guo

3

NAME

14 15 16 17

SETNAMECHN

BDS MODULES

PCB SB PB522_LN

SUPERS.

2009-05-15

DATECHECK

16114

17 187 14 158 1265

3139 283 3017

43

C

ROYAL PHILIPS ELECTRONICS N.V. 2009

18 19 20

18730_539_090918.eps

40

03101

19

090918

N

O

2009-07-31

2

2009-07-282

P

A2

20312 910

SSB: i-Board

Circuit Diagrams and PWB Layouts

EN 97PB52.3HU LA 10.

A

B

C

D

E

F

G

H

K

owner.

is prohibited without the written consent of the copyright

M

1

2

3

3 13 18

4

5

6

7

76

9

1098

10

118

1211

12

13

14

15

16

17

19

1918

20

AA

1135

2

I138

HC NON HC 1K5 560R

560R 1K5

NC 0R0 0R0 NC

8

9

12 13

171 2 6

7 14 19 20

*

3130

3131

I117

2120

3126

1

I136 BC857BS 7112-1

6

1K0

2K2

PEND_IR

220u 16V

I118

I119

7115 B2 7116 B54114 D3 F103 F4 F105 C3 F106 D34118 F83110 F5 F110 E94119 C8 F111 E9 F112 B2

1K5

5

5V-DRIVE

2121

3136 C9 3137 D10 3138 C11 3139 D9 3141 B5 3142 B5 3143 B9 3144 C9

PS-LN

F121

7116

BC807-25

4124

PS-LNA

I112

0R

RES

3116

3115

I115

RES

3117

3108

10K

I107

3109

10K

RES

3110

1

100R

47K

4113 C3

4115 D3 4116 D33109 E4

4120 D8 4121 A3

10K

3141

3142

F122

10K

2115

1u0

2116

1u0

+12V

47K

3112

I108

7100 BC847BW

4122 B8 4123 C8 4124 B4 5121 E83117 D5

5124 E8 5125 B1

LN_PWR

470p

2117

100p

2118

EMC

3111

47K

2111

I113

I116

I110

I109

10u

2127

TDA1517ATW

3

18

5

16V100u

2112

330u 10V

+12VIB

7111

IN1+

IN2-

MODE

SVRR

5126 B3 6112 D8 6114 B9 6115 A11 6116 C10

7101 G3 7102 G4

2128

SGND 1 2

4

3

3106 D2 3107 D2 3108 E4

3111 E6 3112 E5 3113 C4

3114 D4 3115 D4 3116 D5

3125 A7 3126 A7 3127 A8

3128 A9 3129 B7 3130 B7 3131 B7 3132 B8 3133 B11 7100 E5 3134 A10 3135 B10

45678 910

1120 D7 1122-1 E11 1122-2 E11 1125 E9 1135 A7 2100 G2 2101 G3 2102 G4

2103 F2 2111 E6 2112 F6 2113 C4 2114 D4 2115 C5 2116 D5 2117 D5

1

2118 D5 2120 D7 2121 D7 2122 E8 2123 E9 2127 A6 2128 A6 2129 A8

2130 A8 2131 B10 2132 B10 2133 B10 2134 C10 2135 B1 2136 B2 2137 B3

2

2138 B4 2139 B4

3100 G3 3101 G3 3102 F4 3103 F3 3104 F3 3105 E2

A

11

12

4113 4114

RES

RES 4116

1K0

3104

PS-LN

6u8

5126

5

F113

16

OUT

4

FB

15

C2+

F115

13

2137

C2-

F117

22 23

VIA

GND_HS

21

F105 F106

4115

47K

3103

1

I104I105

7104 BC857BW

7101

BC847BW

I102

1

47K

2101

3101

2

3

2

1u0

+3V3A

16V100u

22u

2138

2139

I111

2113

1u0

2114

1u0

F103

+3V3A

I103

2

5

100n

2102

3113

10K

3114

I114

10K

POWER ON RESET

*

3102

1K0

7102

NCP303LSN30

INP

OUTP

CD

GND

NC

3

4

+3V3-STANDBY

TPS60111PWP

19

B

5125

6u8

2135

18

F112

7 14 17

6.3V 6

22u

F114

1u0

8

2136

F116

3

2

C

ADAC(3)

IBOARD

I

J

D

E

ADAC(4)

ADAC(5) ADAC(6)

POR1

LED2-3V3

MUTE_iB

POR

F119

7107

BSH111

10K

3107

2

3

I106

7115

1

2103

1u0

CLK

CONVERTER

COM

IN

SKIP

C1+

C1-

ENABLE

SYNC

GND PGND

1

20

+12V+3V3A

3106

F120

3105

4121

Φ

DC/DC

9

10

12K

10K

F

L

I101

I100

2100

G

TV_POR

3100

1u0

47K

+3V3-STANDBY

3125

100n

I137

3129

I139

+12V

1120

16

15

VP1 VP2

Φ

POWER

AMPLIFIER

PGND

10

11

5K6

3126 3127

4122 4123

250mA

OUT1A OUT1B

OUT2A OUT2B

HS

21

7104 F3 7107 E2 7111 D6 7112-1 A7 7112-2 B8 7113-1 B8 7113-2 C9 7114 C10

*

NC

2130

4n7

I133

2u2

2122

220u 16V

3127

*

4

BC857BS 7112-2

3

3132

560R

I120

5124 SD16613-01

P21

P14

560R

I134

*

4120

2

4118

F113 B3 F114 B2 F115 B3 F116 C2 F117 C35122 E93122 D8 F118 D95123 A9 F119 D2 F120 E2

4122

*

6112

5121

6u8

NC

3

+3V3-STANDBY

22u

2129

I131

7113-1 BC847BS

2

4123

4119

BZX384-C3V3

S2 8

S15

F118

3122

F121 A5 F122 B5 I100 G2 I101 G2 I102 G3 I103 F4 I104 F3

3128

6114

6

1

I123

100R

I122

GND-ISO

1K8

BAS316

3143

3144

7113-2

BC847BS

2123

I132

2

4

10K

2K2

3

4

1n0

5123

EEH116

I121

220R

5122 F111 F110

1125

I106 F2 I107 E5 I108 E5 I109 E6 I110 E6 I111 C4 I112 C5 I113 E6

15

+3V3-STANDBY

3136

5

1K0

I124

1K0

3139

I125

I114 D4 I115 D5 I116 E6 I117 D7 I118 E7 I119 E7 I120 E8 I121 D9

GND-ISO

9

7

1m0 6.3V

BZX384-C5V1

7114

TCMT1103

RXD_PC TXD_PC

I122 E9 I123 D9 I124 D9 I125 C10 I126 D11 I127 D10 I128 C11 I129 B11

3134

2131

2132

2133

1u0

3135

2K2

2134

1u0

6116

I130 A11 I131 A8 I132 B9 I133 B8 I134 A8 I136 A7 I137 A7 I138 B7I105 F2

I130

1K0

6115

BAS316

100p

I129

10R

3133

14

I128

23

3138

180R

I127

1K0

3137

I126

MSJ-035-39D B PC

GND-ISO

MSJ-035-39D B PC

11

5 6 4

1122-1

1122-2

2

3

1

I139 B7

B

C

D

A

E

F

B

F

G

C

H

D

I

J

E

K

F

L

M

G

M

N

O

P

MULTI 12NC : 3139_283_30162 BD 12NC : 3139_283_30172

1

267

N

123

432

3

45

5 13

6

45

8

7

8

9

10

6

7

11 129

11 1514

12

8

13 1918

91011

EMANTESNHC

BDS MODULES

PCB SB PB522_LN

SUPERS.

DATE

2009-05-15

16

17

1716

14

CLASS_NO

3PC333

-- -- --

2009-05-15

2009-07-3123

YiPing Guo

NAME

SV

DC398881

1

CHECK

15

O

2009-07-31

2

2 2009-07-28

3139 283 3017

P

43

C

ROYAL PHILIPS ELECTRONICS N.V. 2009

18

41

13010

19 20

A2

20

18730_540_090918.eps

090918

2009-Oct-09

Circuit Diagrams and PWB Layouts

EN 98PB52.3HU LA 10.

SSB: i-Board

A

B

C

D

E

F

G

H

is prohibited without the written consent of the copyright

owner.

I

J

K

L

123

1

45

3

53

678 9 10111213 14 15 16 17

6

6 127

7

8 9

9

105

10

118

122

13

14

15

164

16

174

17

18

1918

2011

202 15 19

IBOARD

A

B

C

D

D D

E

JTAG

RES

SYSTEM

72A1 74HC4053PW

14

15

4

5293

6u8

32AD

32AF 10R 32AG

2243

+3V3-STANDBY

MDX

2292

100R 100R32AE

100R

100R32AH

6253

F

G

H

I

J

K

L

M

N

O

P

SPI_CLK_IB

IR-IN_DATA_IN_RXD_SDA1_IB

SPI_DATA_OUT_IB

PS-LNA

RJ12

1250

F270

1

F213

2

3

F271 I212

4 5

F214

6

43249-6101

MULTI 12NC : 3139_283_30162 BD 12NC : 3139_283_30172

1

2 11

2

2 3 456

+3V3A

1200

1 2

3

4 5 6 7

8

910

+12VA

1240

1 2

3

4 5 6 7

8

9 10 11 12

27p

22A4

100n

16

VDD

6

G4

13

1

12

2

11

4X1 4X2

1 2

10

3

5 9

VEEVSS

78

LODGENET

1241

1 2

3

4 5 6 7

8

9

10 11

100u

502382-0970

16V

6251

BZX384-C6V8

5251

5250

220R

5253

220R

22u

22A5

BZX384-C18

F200 F201

F202 F203 F204 F205 100R3204 F206

6205

6202

BZX384-C6V8

3294 4K7

3296 4K7

3

2

32AK

2K2

3

42AC

2

42A1

3

2

6250

220R

6203

BZX384-C6V8

42A7

42AD

42A8

1

32A6

10K

F268

BZX384-C6V8

5294

220R

42A6

6204

BZX384-C6V8

220R

220R5244 220R5241

220R5242

3297

10K

72A6 BSH111

72A4 BSH111

+3V3-STANDBY

1

42A2

3

2

F269

4

BZX384-C6V8

4251

F240

32AJ 100R

F241

4253

F243

CVI_75R

+5V-STANDBY

+3V3-STANDBY

+5V-STANDBY

32A7

2K2

72A5 BSH111

1

3 2

72A2 BC857BW

1

6206

PS-LNA

+3V3-STANDBY

220R

6254

F263

6252

F210

3

F212 I211 F242 F245

F248

F249

F252 F254 F256 F258 F259 F260 F261

BZX384-C6V8

F273

BZX384-C6V8

BC847BW

2250

6201

5240 5230 220R

5243 220R

72A8

F265

F267

5252

1n0

32AL

4K7

3200

3202

BZX384-C6V8

F262

32AM

BZX384-C3V3

I216

+5V-STANDBY

10K

5

100R

100R3201 100R 100R3203

BSH111

NVM_LOAD

I200

TDO_iB

I201 I202

TCK_iB

I203

TMS_iB

62A1

SPI_CLK_RJ1

SPI_DATA_IN_IB

SPI_DATA_OUT_RJ1

RC_IN_MICRO

SDA_I2C

Card_CVBS_out

100R3243

I217

LN_PWR

SPI_CLK_IB

IR-IN_DATA_IN_RXD_SDA1_IB

SPI_DATA_OUT_IB

SPI_CLK_LN

IR-IN_DATA_IN_RXD_SDA1_LN

SPI_DATA_OUT_LN

IR_OUT_LN

IR-IN_DATA_IN_RXD_SDA1_RJ

SPI_CLK_RJ

SPI_DATA_OUT_RJ

SPI_CLK_RJ1

+12VIB

+3V3-STANDBY

72A7

ENABLE_12V_SUPP

42AE

312

LN_PWR

42AF

SPI_DATA_OUT_RJ1

IR_OUT

6

POR

+3V3-STANDBY

TDI_iB

IR-out-iB

POR

LN_PWR MUTE_iB

SPI_CLK_IB

SPI_DATA_OUT_IB

POR1

SDA_I2C

SDA1_iB

SCL1_iB

LED1-OUT

TDI_iB

TDO_iB

TMS_iB TCK_iB

IR-IN_DATA_IN_RXD_SDA1_IB

IR_OUT

IR_OUT_LN

IR-IN_DATA_IN_RXD_SDA1_IB IR-IN_DATA_IN_RXD_SDA1_LN

SPI_NO_LOGNET

SPI_CLK_IB SPI_CLK_LN

SPI_DATA_OUT_IB SPI_DATA_OUT_LN

IR-IN_DATA_IN_RXD_SDA1_RJ

SPI_DATA_IN_IB

IR_OUT

F220

5291

+3V3A

10K

3205 10K

3212

3209

100R

3244 100R

3220

+3V3A

100R

3216

3217

100K

3210

100R

I208

2232

RES

3245

DATA_OUT1

100K

2219 27p

I230

2276

220p

RES 3232

1

I207

100K

BC847BW

100n

8

6255

BAT54 COL

I229

3214

3215

100K

RES 6230

BAS316

RES

7

7 8

+3V3-STANDBY

10K3211

RES 7231

F222

6u8

2291

+3V3A

100K

3213

3255 100R

2218 27p

3206

I231

10K

I206

3

2

+3V3A

220u 16V

2203 100n

100n

2204

2205

I224

22p

2206

22p

10K

3207

RES 3231

2K2

9

3218

3219

2220

10n

1

1205

+3V3A

RES

3230

I204

BC857BW

31

24M

I225

32

44

10n2207

F223

5

52 51 50

I222

49

I220

48 46 43

I221

42

I226

11 10 7

I227

2

I228

1

4

3

13 12

+3V3A

10K

3208

3

7208 BC847BW

2

3253

100R

4K7

2

1

3

RES

I205

7230

AVCC

1

XTAL

RESET_IN

DEBUG

0 1 2

3

4 5 6 7

PC <2:4>

VSTBY TSTAT TERR PC7 PD1 CLKIN

TDI TDO TMS TCK

7261 BC847BW

RES 3233

100R

10

1085

I241

I235

+3V3A

PB

JTAG

+3V3A

3235

RES

BC857BW

+3V3A

+3V3-STANDBY

2201

I242

100u

16V

6u8

5201

I243

I240

833

VDD

Φ

MCU

GND

91945

6272

3

2

10K

3234

1

I210

RES 7232

2202 100n

647

3V3VCC

P1 <0:7>

SPICLK SPIRXD SPITXD

SPISEL

ADC<0:7>

P3 <0:7>

EXINT 0:1

P4 <0:7>

SPICLK SPIRXD SPITXD

SPISEL

TCM<0:5>

PCACLK 0:1

7220 UPSD3354DV-40

3293

100R

32A5

BZX384-C2V7

F251

1

32AC

10K

+3V3A

2

3

RES

3236

RXD1 TXD1

RXD0 TXD0

RXD1 TXD1

2200

I245

100n

34

T2

35

X2T2

36 37 38 39

40 41

23 24 25

TG0

26

TG1

27

C0

28

C1

29

SDA

30

SCL

22

T2

21

T2X

20 18 17 16 15 14

470K

I236

3256

1K0

4K7

10K

3239

10n

10n2221

2222

I250 I251

I252 I253 I254 I255 I256

I260

I261

I262 I263 I264 I265 I266

I267

SIDEIO-DETECT

I237

3263

1

1K0

7262 BC847BW

+3V3-STANDBY

7221

74HC4053PW

MDX

6

G4

13

1

12

2

11

4X1 4X2

1 2 10

3

5 9

VEE VSS

7

126 20

12

+3V3-STANDBY

10K

10K3246

3221

F235

10n2224

10n2223

3240 100R 3241 47R

3237-2 10K

3237-4 10K 3238-1 10K 3238-2 3238-3 10K

+3V3A

3264

I238

3

2

7269 74HCT1G00GW

42A9

22A3

100n

16

VDD

8

42AA

42AB

F236

PANEL MODE

3222

+3V3A

10K

2269

100n

4

14

15

4

RES

1230

100R

+3V3-STANDBY

3224 10K

3225 10K

47R3242

10K3237-1

10K3237-3

10K

10K3238-4

+3V3-STANDBY

5

&

3

13

1

F230

2

F231

3

RES

3226

100n

2231

NVM_LOAD

10K

RES

3227 10K

RC_IN_MICRO

SDA-SSB-MUX1 SCL-SSB-MUX1

223027p

RES

2229 27p

RES

ENABLE_12V_SUPP

SPI_NO_LOGNET

+3V3A

RC_IN_MICRO

10K

3269

2

1

IR-IN_DATA_IN_RXD_SDA1_RJ

SPI_CLK_RJ

SPI_DATA_OUT_RJ

+T

TV_POR LED1-3V3 LED2-3V3

RXD0

TXD0

PEND_IR

CEC_IN

LED2-OUT

CEC_OUT

PEND_IR

14

+12VI

1231

+12VA

1850mA

4230

4231

+3V3-STANDBY

CEC_IN

18K

CEC_OUT

I270

TXD0

I272

RXD0

RSTX

RSRX

NAME

SV

SCL1_iB

SDA1_iB

CLASS_NO

-- -- --

2009-05-15

2009-07-31

+3V3A

DC398881

3PC333

YiPing Guo

RC

32A0

I278

I279

4K7

3280

3281

1

2

3

15

7

F280

F281

6

F288

5

7280 M24C64-WMN6

BDS MODULES

PCB SB PB522_LN

CHECK DATE

32A1

22A2

32A3

100K

6270 PESDXL2BT

WC

SCL

SUPERS.

220p

EEPROM

EMANTESNHC

16

22A1

72A3 BC847BW

Φ

(8Kx8)

2009-05-15

27K32A2

47K

330p

2280

100n

8

ADR

4

RES

62A0

BAS316

CEC-HDMI

42A0

32A4

220R

RSTX

RSRX

1

0

2

1

3

2SDA

2009-07-31

2

2 2009-07-28

3139 283 3017

A2

20

17

43

C

ROYAL PHILIPS ELECTRONICS N.V. 2009

1813

1811

13010

19

42

9 10111213 14 15 16 17

1200 A3

5253 K3

1205 C8

5291 B7

1230 B11

5293 H2

1231 B12

5294 K4

1240 D3

6201 B3

1241 H3

6202 B3

1250 K1

6203 B4

2200 C10

6204 B4

2201 B10

6205 B4 2202 C9 2203 C8 2204 C8 2205 C8 2206 C8 2207 D8 2218 E8 2219 E7 2220 E8 2221 C10 2222 C10 2223 D10 2224 D10 2229 E12 2230 E12 2231 B12 2232 L7 2243 E2 2250 K3 2269 G11 2276 G7 2280 G14 2291 B8 2292 H2 22A1 D14 22A2 C13 22A3 H11 22A4 E3 22A5 K3

3200 B5 3201 B5 3202 B5 3203 B5 3204 B5 3205 C7 3206 F7 3207 F8 3208 F8 3209 D7 3210 F7 3211 C7 3212 C7 3213 C7 3214 E6 3215 E6 3216 E7 3217 E7 3218 E8 3219 E8 3220 E7 3221 C10 3222 C11 3224 D11 3225 D11 3226 D11 3227 D11 3230 K8 3231 K8 3232 K7 3233 K9 3234 K9 3235 K9 3236 L9 3237-1 E11 3237-2 E11 3237-3 E11 3237-4 E11 3238-1 F11 3238-2 F11 3238-3 F11 3238-4 F11 3239 C10 3240 E11 3241 E11 3242 E11 3243 D5 3244 D7 3245 C7 3246 C10 3253 G8 3255 D8 3256 G9 3263 G10 3264 F10 3269 G11 3280 G13 3281 G13 3293 F9 3294 H4 3296 H4 3297 H4 32A0 D13 32A1 C13 32A2 C13 32A3 D13 32A4 D14 32A5 F9 32A6 I4 32A7 J4 32AC J9 32AD K2 32AE K2 32AF K2 32AG K2 32AH K2 32AJ D4 32AK I4 32AL L4 32AM K5

4230 B12 4231 B12 4251 D4 4253 D4 42A0 D14 42A1 I3 42A2 J4 42A6 K4 42A7 F4 42A8 G4 42A9 H10 42AA J10 42AB J10 42AC I3 42AD F4 42AE L5 42AF L5 5201 B9 5230 D3 5240 D3 5241 D3 5242 D3 5243 D3 5244 D3 5250 K2 5251 K3 5252 K3

6206 B4

6230 K7

6250 K4

6251 J3

6252 J3

6253 K2

6254 K3

6255 C7

6270 G13

6272 F9

62A0 C14

62A1 C5

7208 F8

7220 F9

7221 H10

7230 K8

7231 K7

7232 K9

7261 G9

7262 G10

7269 G10

7280 H13

72A1 F2

72A2 K4

72A3 D14

72A4 J4

72A5 J4

72A6 I4

72A7 K5

72A8 H3

F200 B3

F201 B3

F202 B3

F203 B3

F204 B3

F205 B3

F206 B3

F210 D3

F212 D3

F213 K2

F214 K2

F220 B7

F222 B8

F223 D8

F230 B12

F231 B11

F235 C11

F236 C11

F240 D4

F241 D4

F242 D3

F243 D4

F245 D3

F248 D3

F249 D3

F251 G9

F252 H3

F254 H3

F256 H3

F258 H3

F259 H3

F260 H3

F261 H3

F262 H5

F263 I3

F265 I3

F267 J3

F268 J4

F269 K4

F270 K2

F271 K2

F273 K3

F280 G13

F281 H13

F288 H13

I200 B5

I201 B5

I202 B5

I203 B5

I204 K8

I205 K8

I206 K8

I207 K7

I208 K7

I210 K9

I211 D3

I212 K2

I216 E5

I217 E5

I220 D8

I221 D8

I222 D8

I224 C8

I225 C8

I226 E8

I227 E8

I228 E8

I229 E6

I230 F7

I231 F8

I235 G9

I236 G10

I237 G10

I238 F11

I240 C9

I241 C9

I242 B9

I243 B9

I245 C9

I250 D10

I251 D10

I252 D10

I253 D10

I254 E10

I255 E10

I256 E10

I260 E10

I261 E10

I262 E10

I263 E10

I264 E10

I265 E10

I266 E10

I267 F10

I270 F12

I272 F12

I278 F13

I279 F13

A

B

C

D

E

D

F

E

G

F

H

I

G

J

H

K

L

I

M

J

N1N

K

O

P

L

18730_541_090918.eps

090918

2009-Oct-09

SSB: Supply

Circuit Diagrams and PWB Layouts

EN 99PB52.3HU LA 10.

A

B

C

D

1

32 10

5

6

7

8

9

11 124

13

A

1B10 D2 1B20 A4 1B22 A4

1B23 B4 1B26 B4 1B28 A2

1B29 B6 9B15 C4

2B22 A5

2B23 B5 2B26 B5 2B27 B8

2B54 D5 2B56 D5

3B20 A5

3B22 A5 3B26 B5 3B56 C6

3B57 C5 3B58 D6 3B59 D6

3B60 A8 3B61 B8

5B10 C4

5B11 D4 5B12 D4 5B13 D4

5B14 D4 9B10 D6 9B11 D5

9B16 C4 9B17 D4

9B18 D4 9B19 D4 FB28 B3

FB40 D5 FB41 D52B20 A5 FB42 D5

FB43 D6 FB44 D6 FM20 A3

FM22 A3 FM23 B3 FM26 B3

IB40 D7 IB41 D7 IM20 A8

B

1

2 3 4

SUPPLY

A

1B28

1 2

TO

DISPLAY

SUPPLY

3

4 5 6 7

8

FM20

FM22

FM23

1B20

1B22

1B23

5678

2B20 1n0

2B22

2B23

3B20 100R

10n

3B22

3B26

100R

BACKLIGHT-OUT

LAMP-ON-OUT

BACKLIGHT-BOOST

POWER-OK-DISPLAY

2B27

+3V3-STANDBY

RES

3B60

IM20

3B61

1u0

C

A

D

10K 10K

owner.

is prohibited without the written consent of the copyright

E

F

G

H

I

B

C

D

FB28

1B26

FM26

2B26

100p

1B29

T3.0A

T 3A 452

+5V-ON

+12VTCON

RES

B

E

F

C

9B15 RES

5B10

120R

9B16 RES

1B10

1

TO

AMBILIGHT

1

2 3 45

2

3

4 5

5B11

120R

RES

9B17

5B12

120R

9B18 RES

5B13

120R

9B19 RES

5B14

120R

FB41

FB40

2B56

100p

FB42

2B54

RES

100p

3B57

9B11

FB43

100R

3B56

100R

47R3B58

3B59 47R

FB44

9B10

IB40

IB41

SCL-AMBI

SDA-AMBI

678

G

D

H

I

J

MULTI 12NC : 3139_283_30162 BD 12NC : 3139_283_30172

1

2

DC398881

CLASS_NO

3PC333

-- -- --

1

2009-05-15

2009-07-3123

NAME

YiPing Guo

SV

3

54

6

7

CHECK DATE

EMANTESNHC

BDS MODULES

PCB SB PB522_LN

SUPERS.

2009-05-15

1098

2

2009-07-31

2 2009-07-28

3139 283 3017

43

C

ROYAL PHILIPS ELECTRONICS N.V. 2009

43

13010

J

A3

11 12 13

18730_542_090918.eps

090918

2009-Oct-09

Circuit Diagrams and PWB Layouts

E

EN 100PB52.3HU LA 10.

SSB: SRP List Explanation

xample

Net Name Diagram

+12-15V AP1 (4x) +12-15V AP4 (4x) +12-15V AP5 (12x) +12-15V AP6 (4x) +12-15V AP7 (8x) +12V AP1 (4x) +12V_NF AP1 (2x) +12VAL AP1 (2x) +25VLP AP1 (4x) +25VLP AP2 (1x) +3V3-STANDBY AP5 (3x) +400V-F AP1 (2x) +400V-F AP2 (2x) +400V-F AP3 (2x) +5V2 AP1 (6x) +5V2 AP2 (1x) +5V2-NF AP1 (1x) +5V2-NF AP2 (1x) +5V-SW AP1 (6x) +5V-SW AP2 (1x) +8V6 AP1 (3x) +AUX AP1 (2x) +AUX AP2 (1x) +DC-F AP1 (2x) +DC-F AP3 (2x) +SUB-SPEAKER AP5 (1x) +SUB-SPEAKER AP6 (2x)

-12-15V AP1 (4x)

-12-15V AP4 (6x)

-12-15V AP5 (14x)

-12-15V AP6 (6x)

-12-15V AP7 (8x) AL-OFF AP1 (2x) AUDIO-L AP4 (1x) AUDIO-L AP5 (1x) AUDIO-PROT AP5 (3x) AUDIO-R AP4 (1x) AUDIO-R AP5 (1x) AUDI O-SW AP5 (1x) AUDI O-SW AP7 (1x) BOOST AP1 (2x) CPROT AP4 (2x) CPROT AP5 (1x) CPROT-SW AP5 (1x) CPROT-SW AP6 (2x)

-DC-F AP1 (2x)

-DC-F AP3 (2x) DC-PROT AP1 (1x) DC-PROT AP5 (2x) DIM-CONTROL AP1 (2x) FEEDBACK+SW AP6 (2x) FEEDBACK-L AP4 (2x) FEEDBACK-R AP4 (2x) FEEDBACK-SW AP6 (2x) GND-AL AP1 (2x) GNDHA AP1 (40x) GNDHA AP2 (20x) GNDHA AP3 (2x) GNDHOT AP3 (2x) GND-L AP1 (2x) GND-L AP4 (4x) GND-L AP5 (34x) GND-LL AP4 (7x) GND-LL AP5 (1x) GND-LR AP4 (7x) GND-LR AP5 (1x) GND-LSW AP5 (1x) GND-LSW AP6 (15x) GND-S AP1 (11x) GND-SA AP4 (8x) GND-

SA AP5 (2x) GND-SA AP6 (8x) GND-SA AP7 (6x) GNDscrew AP3 (2x) GNDscrew AP5 (2x) GND-SSB AP5 (3x) GND-SSP AP1 (51x) GND-SSP AP2 (15x) IN+SW AP6 (2x) IN-L AP4 (2x) IN-R AP4 (2x) IN-SW AP6 (2x) INV-MUTE AP4 (1x) INV-MUTE AP5 (1x) INV-MUTE AP6 (1x) LEFT-SPEAKER AP4 (1x) LEFT-SPEAKER AP5 (1x) MUTE AP4 (2x) MUTE AP5 (1x) MUTE AP6 (2x) ON-OFF AP1 (3x) OUT AP6 (1x) OUT AP7 (2x) OUTN AP6 (1x) OUTN AP7 (1x) POWER-GOOD AP1 (2x) POWER-OK-PLATFORM AP1 (2x) RIGHT-SPEAKER AP4 (1x) RIGHT-SPEAKER AP5 (1x)

SOUND-ENABLE AP5 (3x) STANDBY AP1 (5x) STANDBY AP2 (1x)

-SUB-SPEAKER AP5 (1x)

-SUB-SPEAKER AP6 (2x) V-CLAMP AP1 (1x) V-CLAMP AP3 (2x)

1 . 1 . Introduction

SRP (Service Re ference Protocol) is a softw are too l that creates a list w i th all refer e n c es to signal lines. The list contains references to the signals w i thin all schemat ics of a PWB. It replaces the text refe r ences currentl y p r inted next t o the signal names in the s

chematics. These printed refe rences are created man ually an d are t h e r efore n o t guar an teed to be 100 %

correct. In additio n , in the current crowded schema t ics there is often none or ver y little pl ace for these references.

Some of the PW

B schematics w ill use SRP while others w ill sti ll use the manual refe rences. Either there w

r e fer ence list for a schematic, or ther e w ill be pr inted r e ferences in the schematic.

1.2. No n - SRP Schematics

There a r e severa l different signals available in a schematic:

1.2.1. Po w e r Supply Lines

All pow er suppl y lines are available in t he suppl y line overview (see chapter 6). I n th e schematics (se e chapter 7) is n o t indicated w h e r e supplies are coming from or going to. It is how ever indi ca

Outgoing Incoming

+5 V +5 V

1.2.2. Normal Signals

For no rmal signals, a schematic r e ference (e. g . B1 4b) is placed next to the signals.

B 14b

si gnal _nam e

1.2.3. Grounds

For no rmal and s pecial grounds (e .g. GN DH OT o r GND3V3 etc.), n o thing is indicate d.

1.3. SRP Schematics

SRP is a tool, w h ich automatically creates a list w i th signal reference s , indicating on which sc hematic t he signals are used. A reference is cr eated for all signals indicat ed w i th an SRP s y mbol, these s y mbols are:

+5 V +5 V

na m e na m e

na m e

Bi-directional lin e (e.g. SDA ) into a w i r e tree.

na m e

Signal line into a w i r e tree, its dir e ction depends on t he circuit (e.g. ingoing for PD P, outgoing for L C D sets).

Remarks:

• When there is a black dot on the "signal dire ction arrow" it is an SRP symbol, so there will be a reference to the signal name in the SRP list.

• All references to normal grounds (Ground symbols without additi onal text) it concise.

• Signals that are not used in multiple schematics, but only onc e or several times in the same schematic, are included in the SRP reference list, but only with one reference.

Additional Tip:

When using the PDF service manual file, you can very easily search for signal names and follow the signal over all the schematics. In Adob

• Select the signal name you want to sear ch for, with the "Select text" tool.

• Copy and paste the signal name in the "Search PDF" tool.

• Search for all occurrences of the signal name.

• Now you can quickly jump between the different occurrences and follow the signal over a ll s chema tics . It is advised to "zoom in" to e.g. 150% to see clearly, which text is select schematic.

PS. It is recommended to use at least Adobe PDF (reader) version 6. x, due to better search possibilities in this version.

ill be an SRP

ted if a supply is incoming (created elsew h e r e), o r outgoing (cr eat ed or adapt ed in the current sche m atic).

Power suppl y li ne.

Stand alone signal or sw itching li ne (used as less as possible).

Signal line into a w i re tree.

Sw itching line into a w i re tre e .

are not listed in the reference list, this to keep

e PDF reader:

ed. Then you can zoom out, to get an overview of the complete

10000_031_090121.eps

090121

Personal Notes:

2009-Oct-09