
2N7002
60V N-Channel Enhancement Mode MOSFET
FEA TURES
• R
, VGS@10V,IDS@500mA=5
DS(ON)
• R
, VGS@4.5V,IDS@75mA=7.5
DS(ON)
0.120(3.04)
0.110(2.80)
0.006(0.15)MIN.
• Advanced Trench Process Technology
• High Density Cell Design For Ultra Low On-Resistance
• Specially Designed for Battery Operated Systems, Solid-State Relays
0.056(1.40)
0.047(1.20)
0.079(2.00)
0.070(1.80)
Drivers : Relays, Displays, Lamps, Solenoids, Memories, etc.
• Lead free in comply with EU RoHS 2011/65/EU directives
• Green molding compound as per IEC61249 Std. . (Halogen Free)
0.004(0.10)
0.000(0.00)
0.020(0.50)
0.013(0.35)
MECHANICAL DATA
• Case : SOT-23 Package
• Terminals : Solderable per MIL-STD-750,Method 2026
• Approx. Weight : 0.0003 ounces, 0.008 grams
• Marking : S72
Maximum Ratings and Thermal Characteristics (TA=25OC unless otherwise noted )
0.044(1.10)
0.035(0.90)
0.008(0.20)
0.003(0.08)
RETEMARAPlobmyStimiLstinU
egatloVecruoS-niarD V
egatloVecruoS-etaG V
tnerruCniarDsuounitnoC I
)1
tnerruCniarDdesluP
noitapissiDrewoPmumixaM
)detnuomBCP(ecnatsiseRlamrehTtneibmAot-noitcnuJ
Note:1. Maximum DC current limited by the package
2. Surface mounted on FR4 board, t < 10 sec
T
T
egnaRerutarepmeTegarotSdnanoitcnuJgnitarepO T
2
SD
SG
D
I
MD
52=OC
A
57=OC
A
P
JT,GTS
R
D
θ AJ
06V
+ 02V
052Am
0031Am
053
012
051+ot55-
753
Wm
O
C
O
W/C
PAGE . 1August 29,2013-REV.03

2N7002
ELECTRICAL CHARACTERISTICS
retemaraPlobmySnoitidnoCtseT.niM.pyT.xaMstinU
citatS
egatloVnwodkaerBecruoS-niarDVB
egatloVdlohserhTetaGV
ecnatsiseRetatS-nOecruoS-niarDR
ecnatsiseRetatS-nOecruoS-niarDR
tnerruCniarDegatloVetaGoreZI
egakaeLydoBetaGI
ecnatcudnocsnarTdrawroFg
SSD
)ht(SG
)no(SD
)no(SD
SSD
SSG
Sf
V
VSDV=SGI,
V
V
VSG=+ V,V02
V
I,V0=
SG
SG
SG
V
SD
SD
Au01=06--V
D
Au052=1-5.2V
D
I,V5.4=
Am57=--5.7
D
I,V01=
Am005=--5
D
V,V06=
V0=--1Au
SG
V0=--+001An
SD
I,V51=
Am052=002--Sm
D
cimanyD
egrahCetaGlatoTQ
egrahCniarD-etaGQ
emiTnO-nruTt
emiTffO-nruTt
g
sg
dg
no
ffo
V
I
D
I,V51=
D
R,V01=
V,Am005=
01= Ω
Am005=
V5.4=
02= Ω
L
V01=
NEG
SD
V
DD
V
DD
R
G
Ω
-6.07.0
-1.0-
CnegrahCecruoS-etaGQ
-80.0-
-951
sn
-1262
ecnaticapaCtupnIC
ecnaticapaCrefsnarTesreveRC
ssi
sso
ssr
V
V,V52=
SD
V0=
SG
HM0.1=f
Z
edoiDniarD-ecruoS
Switching
tnerruCdrawroFedoiD.xaMI
egatloVdrawroFedoiDV
s
DS
I
V
DD
---052Am
V,Am052=
S
V0=-39.02.1V
SG
Test Circuit
R
V
IN
R
G
L
V
OUT
--05
--52
--5
Gate Charge
Test Circuit
1mA
FpecnaticapaCtuptuOC
V
DD
R
V
GS
R
G
L
PAGE . 2August 29,2013-REV.03

Fig. 1-TYPICAL FORWARD CHARACTERISTIC
FIG.1- Output Characteristic
Typical Characteristics Curves (T =25 C,unless otherwise noted)
A
O
FIG.2- Transfer Characteristic
FIG.3- On Resistance vs Drain Current
FIG.4- On Resistance vs Gate to Source Voltage
FIG.5- On Resistance vs Junction Temperature
0
0.2
0.4
0.6
0.8
1
1.2
012345
VDS- Drain-to-Source Voltage (V)
I
D
- Drain-to-Source Current (A)
5.0V
4.0V
3.0V
VGS= 6.0~10V
0
0.2
0.4
0.6
0.8
1
1.2
0123456
VGS- Gate-to-Source Voltage (V)
I
D
- Drain Source Current (A)
VDS=10V
0
1
2
3
4
5
0 0.2 0.4 0.6 0.8 1 1.2
ID- Drain Current (A)
R
DS(ON)
- On-Resistance
()W
VGS=4.5V
VGS=10V
0
2
4
6
8
10
2345678910
V
GS
- Gate-to-Source Voltage (V)
R
DS(ON)
- On-Resistance
ID=500mA
o
C
T =125
J
o
C
T=25
J
()W
0.4
0.6
0.8
1
1.2
1.4
1.6
1.8
2
-50 -25 0 25 50 75 100 125 150
TJ- Junction Temperature (oC)
R
DS(ON)
- On-Res istanc e(Nor malized)
VGS=10V
I
D
=500mA
o
C
T=25
J
2N7002
PAGE . 3August 29,2013-REV.03

2N7002
Vgs
Qg
Vgs(th)
Qg(th)
Qsw
QgdQgs
Fig.6 - Gate Charge Waveform
1.2
1.1
1
0.9
0.8
0.7
- G-S Threshold Voltage (NORMALIZED)
th
0.6
V
-50 -25 0 25 50 75 100 125 150
TJ- Junction Temperature (oC)
ID=250 Am
Qg
10
V
15V
DS=
=500mA
I
8
D
6
4
2
- Gate-t o -So u rce Vo ltage (V)
GS
V
0
0 0.2 0.4 0.6 0.8 1
Qg- Gate Charge (nC)
Fig.7 - Gate Charge
73
I=250ADm
72
71
70
69
68
67
66
- Breakdown Voltage (V)
65
DSS
64
BV
-50-250 255075100125150
TJ- Junction Temperature (oC)
Fig.8 - Threshold Voltage vs Temperature
10
VGS=0V
1
0.1
- Sour ce Current (A)
S
I
0.01
TJ=125oC
0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8
T=25
J
o
C
o
T =-55
C
J
VSD- Source-to-Drain Voltage (V)
Fig.10 - Source-Drain Diode Forward Voltage
Fig.9 - Breakdown Voltage vs Junction Temperature
80
70
60
50
Ciss
40
30
C - Capacitance (pF)
20
Coss
10
Crss
0
0 5 10 15 20 25
VDS- Drain-to-Source Voltage (V)
f=1MHz
=0V
V
GS
Fig.11 - Capacitance vs Drain to Source Voltage
PAGE . 4August 29,2013-REV.03

2N7002
MOUNTING PAD LA YOUT
0.035 MIN.
(0.90) MIN.
0.031 MIN.
(0.80) MIN.
0.037
(0.95)
0.043
(1.10)
0.078
(2.00)
ORDER INFORMA TION
• Packing information
T/R - 12K per 13" plastic Reel
T/R - 3K per 7" plastic Reel
0.043
(1.10)
0.106
(2.70)
PAGE . 5August 29,2013-REV.03

2N7002
Part No_packing code_V ersion
2N7002_R1_00001
2N7002_R2_00001
For exa mple :
RB500V-40_R2_00001
Part No.
Packing type 1st Code Packing size code 2nd Code HF or RoHS 1st Code 2nd~5
Tape and Ammunition Box
(T/B)
Tape and Reel
(T/R )
Bu lk Pac k ing
(B/P)
Tu be Pac ki ng
(T/P)
Tape and Reel (R ight Oriented)
(TRR)
Tape and Reel (Left Oriented)
(TRL)
FORMING F
Serial number
Version code means HF
Packing size code means 13"
Packing type means T/R
Packing Code XX Versio n C ode XXXXX
A
R
B
T
S
L
PANASERT T/B CATHODE UP
PANASERT T/B CATHODE DOWN
N/A 0 HF 0 serial number
7" 1 RoHS 1 serial number
13" 2
26mm X
52mm Y
(PBCU)
(PBCD)
U
D
th
Code
PAGE . 6August 29,2013-REV.03

2N7002
Disclaimer
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•
from Panjit International Inc..
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•
document anytime without notification. Please refer to our website for the latest
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•
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•
of fitness for particular purpose, non-infringement and merchantability.
Applications shown on the herein document are examples of standard use and operation.
•
Customers are responsible in comprehending the suitable use in particular applications.
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suitable for the specified use without further testing or modification.
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•
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August 29,2013-REV.03
PAGE . 7