For Audio Equipment
MN662747RPH
Signal Processing LSI for CD Players
Overview
The MN662747RPH is a CD signal processing LSI that,
on a single chip, combines optics servos for the CD player
(focus, tracking, and traverse servos), digital signal
processing (EFM demodulation and error correction),
digital servo processing for the spindle motor, digital
filter, and D/A converter, so thus covers all signal
processing functions from the head's RF amplifier onward.
Features
(Optics servo)
Focus, tracking, and traverse servos
Automatic adjustment functions for FO/TR gain,
FO/TR offset, and FO/TR balance
Built-in D/A converter for drive voltage output
Built-in dropout countermeasures
Anti-shock functions
Built-in track cross counter
Traverse speed detection function
(Digital Signal Processing)
Built-in DSL and PLL
Frame synchronization detection, holding, and
insertion
Subcode data processing
Subcode Q data CRC check
Built-in subcode Q data register
CIRC error detection and correction
C1 decoder: duplex error correction
C2 decoder: triplex error correction
Built-in 16-K bits of RAM for use in deinterleaving
Audio data interpolation
Averaging or retention of previous values
Digital attenuation (–12 dB)
Audio data peak level detection function
Digital audio interface (EIAJ format)
Audio data serial interface for input and output
(Audio circuits)
(Other)
Digital filter using 8-fold oversampling
Built-in D/A converter (1-bit D/A converter)
Built-in differential operational amplifier (secondary
low pass filter)
Built-in playback pitch control function (normal
speed only) (±13%)
Support for quadruple-speed playback (digital servo
and signal processing block only)
Built-in support for jitter-free disc rotation synchronization playback
Oscillator shutdown mode
Power management mode
Operating voltage 4.5 to 5.5 V
Applications
CD players
(Spindle Motor Servo)
CLV digital servo
Switchable servo gain
MN662747RPH For Audio Equipment
Pin Assignment
BYTCK/TVSTOP
CLDCK
FCLK
IPFLAG
FLAG
CLVS
CRC
DEMPH
FLAG6/RESY
IOSEL
TEST
AV
DD1
OUTL
AV
SS1
OUTR
RSEL
CSEL
PSEL
MSEL
SSEL
SS2AVDD2
VDDX2X1VSSSBCK
SUBC
VCOF2
PCK
EFM
AV
VCOF
PLLF
DSLF
60595857565554535251504948474645444342
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
12345678910111213141516171819
SS1
TX
BCLK
LRCK
DD1
DV
DV
SRDATA
MCLK
MDATA
MLD
SENSE
FLOCK
TLOCK
BLKCK
SQCK
REF
DRF
I
SUBQ
DMUTE
ARF
WVEL
RST
STAT
PLAY
PLLF2
41
20
SMCK
PMCK
40
LDON
39
BDO
38
RFDET
37
TRCRS
36
OFT
35
VDET
34
RFENV
33
TE
32
FE
31
TBAL
30
FBAL
29
V
28
27
26
25
24
23
22
21
REF
FOD
TRD
KICK
ECS
ECM
PC
TVD
TRV
(TOP VIEW)
QFS080-P-1414
For Audio Equipment MN662747RPH
Block Diagram
51
AV
SS2
AV
DD2
LRCKIN/MSEL
BCLKIN/SSEL
SRDATEIN/PSEL
IOSEL
CLVS
CRC
BLKCK
CLDCK
SBCK
SUBC
DEMPH
FLAG6/RESY
SSEL
SQCK
SUBQ
PCK
EFM
PLLF
PLLF2
DSLF
I
REF
DRF
ARF
RSEL
PSEL
MLD
MCLK
MDATA
CK384/EFM
VCOF2
VCOF
SMCK
FCLK
PMCK
CSEL
MSEL
X2
X1
STAT
50
70
66
67
13
62
56
55
68
69
80
14
15
53
52
48
41
47
45
46
44
76
78
9
7
8
54
49
19
63
20
77
79
59
58
17
DIGITAL
DEEMPHASIS
BUFFER
SUBCODE
DSL•PLL VCO
EFM DEMODULATION
SYNC INTERPOLATION
8 TIMES
OVER SAMPLING
DIGITAL FILTER
SUBCODE DEMODULATION
LOGICS
1 BIT DAC
16K
SRAM
CIRC ERROR CORRECTION
DEINTERLEAVE
VCO
INTERFACE
MICROCOMPUTER
TIMING
GENERATOR
PITCH CONTROL
A/D CONVERTER INPUT PORT
)
R
(
PWM
)
L
(
PWM
DIGITAL
AUDIO
CLV
INTERPOLATION
SOFT MUTING
DIGITAL
SERVO CPU
SERVO
TIMING GENERATOR
–
+
–
+
INTERFACE
SERVO
ATTENUATION
PEAK DETECT
AUTO CUE
D/A
OUTPUT
75
73
74
72
65
64
6
24
23
2
3
1
16
21
26
29
61
25
22
27
28
31
CONVERTER
30
12
11
42
40
PORT
43
10
OUTR
OUTL
AV
SS1
AV
DD1
FLAG
IPFLAG
TX
ECM
PC
LRCK
SRDATA
BCLK
DMUTE
TRV
KICK
V
REF
BYTCK/TRVSTOP
ECS
TVD
TRD
FOD
TBAL
FBAL
TLOCK
FLOCK
PLAY
LDON
WVEL
SENSE
605745187132
SS
DD
V
SS1
DD1
V
DV
DV
RST
TEST
33TE34
FE
RFENV
37
TRCRS
35
VDET
39
BDO
38
RFDET
36
OFT