Panasonic MN65761T Datasheet
A/D, D/C Converters for Image Signal Processing
MN65761T
Low Power 9-Bit CMOS A/D Converter for Image Processing
Overview
The MN65761T is a high-speed 9-bit CMOS analog-
to-digital converter for image processing applications.
It uses a half flash structure based on chopper comparators and achieves both high speed and low power
consumption with multiplexing.
It provides separate power supply pins for the circuits
driving the low-voltage digital output pins.
Features
Maximum conversion rate: 18 MSPS (min.)
Linearity error: ±1.3 LSB (typ.)
Differential linearity error: ±0.6 LSB (typ.)
Power supply voltage: 3.6 V or 2.6 V
Power consumption: 60 mW (typ.) (f
=18 MHz)
CLK
Applications
Digital television receivers
Digital video equipment
Digital image processing equipment
Pin Assignment
N.C.
N.C.D6D5D4DV
N.C.
N.C.
D7
D8
N.C.
AV
AV
CLK
NOE
POWD
N.C.
N.C.
SS
DD
3635343332313029282726
37
38
39
40
41
42
43
44
45
46
47
48
1234567891011
N.C.
N.C.
TQFP048-P-0707
DDLAVSS
SS
SS
RT
DD
RTS
V
V
AV
AV
AV
(TOP VIEW)
D3D2D1
DD
RM
V
V
AV
N.C.
N.C.
25
N.C.
24
N.C.
23
D0
22
TEST
21
AV
20
19
18
17
16
15
14
13
12
IN
N.C.
N.C.
AV
AV
V
RBS
V
RB
AV
N.C.
N.C.
DD
DD
SS
SS
1
MN65761T A/D, D/C Converters for Image Signal Processing
Block Diagram
SS
AVDDAVDDAV
20
191817
RBSVRB
V
16
15
31
Upper comparator (5 bits)
31
Upper encoder (5 bits)
SS
RM
IN
AVSSAVDDAVDDAV
10
V
V
9
8
7
6
Clock generator
5
VRTV
5
31
31
SS
RTS
AV
4
3
31
Lower comparator A (4 bits)
Lower encoder A (4 bits)
Lower comparator B (4 bits)
Lower encoder B (4 bits)
31
55
Error
correction
and
data latch
21
22
27
28
29
TEST
(LSB)
D0
D1
D2
303132
D3
AV
SS
D4D5D6
DDL
DV
33
343940
D7
D8
42
43
44
45
46
SS
DD
CLK
AV
NOE
POWD
AV
2
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