Panasonic CQVCD-163-WJ Service manual

Specification*
ORDER No. ACED030757C3
AUTOMOTIVE AFTERMARKET
CQ-VCD163WJ
Removable Front Panel Video CD Player / Receiver
General Power Supply DC 12V (11V - 16V),
Test Voltage 14.4V Negative Ground
Tone Controls Bass ; ±12dB at 100Hz
Treble ; ±12dB at 10kHz
Current Consumption Less than 2.2A (CD play mode,
0.5W×4ch) Maximum Power Output 50W×4ch (at 1kHz, Vol. Max.) Suitable Speaker Impedance 4-8 Pre-Amp Output Voltage 2.5V (VCD play mode; 1kHz, 0dB) Output Impedance 200
FM Stereo Radio Frequency Range 87.5 - 108MHz Usable Sensitivity 11.0dBf (1.25µV, 75Ω)
AM Radio Frequency Range 531 - 1,602kHz
Usable Sensitivity 28dB/µV (25µV, S/N 20dB)
CD / Video CD Player Sampling Frequency 32 times oversampling Pick-Up Type Astigma 3-beam Light Source Semiconductor Laser Wavelength 780nm Frequency Response 5Hz to 20,000Hz (±1dB) Signal to Noise Ratio 96dB Total Harmonic Distortion 0.006% (at 1kHz) Wow and Flutter Below measurable limits Video Signal Output Composite Video Signal, 1.0V[p-p]
75 Dimensions** 178×50×155mm Weight** 1.4kg
* Specifications and the design are subject to possible modification without notice due to improvements.
** Dimensions and Weight shown are approximate.
© 2003 Matsushita Electric Industrial Co., Ltd. All rights reserved. Unauthorized copying and distribution is a violation of law.
CQ-VCD163WJ
CONTENTS
Page Page
1 FEATUERS 2 2 LASER PRODUCTS 3 REPLACEING THE FUSE 4 MAINTENANCE 5 NOTES 6 DIMENSIONS 7 WIRING DIAGRAM 8 BLOCK DIAGRAM
8.1. Main / Key Block
8.2. CD Servo Block
9 TERMINALS DESCRIPTION
9.1. Main Block
9.2. Display Block
9.3. CD Servo Block
10 PACKAGE AND IC BLOCK DIAGRAM
10.1. Main Block
10.2. Display Block
12
2 3 3 3 3 4 5
5 6
7
7 7 7
9
9
10.3. Interface Block 12
10.4. CD Servo Block
11 REPLACEM ENT PARTS LIST 12 EXPLODED VIEW (Unit) 13 CD PLAYER MECHANICAL PARTS LIST 14 EXPLODED VIEW (CD Deck) 15 WIRING CONNECTION
15.1. Main Block-1
15.2. Main Block-2
15.3. Display Block
15.4. CD SERVO Block
16 SCHEMAT IC DIAGRAM-1
16.1. Main Block
17 SCHEMAT IC DIAGRAM-2
17.1. Display Block
17.2. CD Servo Block
17.3. Interface Block
13
14 20 21 22 23
23 24 25 26
27
27
29
29 30 31
1 FEATUERS
PLL (Phase Locked Loop) synthesized tuning.
• •
18-FM, 6-AM presets with preset scan
• •
Digital servo for reliable CD playback.
• •
Removable face plate.
• •
2 LASER PRODUCTS
2
3 REPLACEING THE FUSE
Use fuses of the same specified rating (15A). Using different substitutes or fuses with higher ratings, or connecting the product directly without a fuse, could cause fire or damage to the stereo unit.
4 MAINTENANCE
Your products is designed and manufactured to ensure a minimum of maintenance. Use a dry, a soft cloth for routine exterior cleaning. Never use benzine, thinner or other solvents.
5 NOTES
[RADIO BLOCK]
Do not align the AM/FM package block. When the package block is necessary, it will be supplied already aligned at the factory.
[CD DECK BLOCK]
This model has no servo alignment points because microcomputer controls the servo circuit.
CQ-VCD163WJ
6 DIMENSIONS
3
CQ-VCD163WJ
7 WIRING DIAGRAM
4
8 BLOCK DIAGRAM
8.1. Main / Key Block
CQ-VCD163WJ
5
CQ-VCD163WJ
8.2. CD Servo Block
6
9 TERMINALS DESCRIPTION
9.1. Main Block
CQ-VCD163WJ
IC600 : UPD784224116
Pin
No.
Port Descriptions I/O
1 NC (Connecting to ground) - 0 0 0 2 NC (Connecting to ground) - 0 0 0 3 NC (Connecting to ground) - 0 0 0 4 AVSS Analog ground - 0 0 0 5 AF MUTE AF mute O 5.1 5.1 5.2 6 AMP-CNT Power Amp. stand-by O 5.1 5.1 5.2 7 AVREF Reference voltage - 5.1 5.1 5.2 8 CD-MISO CD data I 0 0 0
9 CD-MOSI CD data O 0 0 2.4 10 CD-SCK CD clock O 0 0 5.1 11 NC Not used - - - ­12 CD_OSCSTP CD OSC stop control I 0 0 0 13 NC Not used - - - ­14 NC Not used - - - ­15 VCD_CNT Video CD control O 0 0 5 16 PLL-MISO Data from PLL I 5.1 5.1 5.1 17 PLL-MOSI Data for PLL O 0 0 0 18 PLL-CLK Clock for PLL O 5.1 5.1 5.2 19 PLL-CE PLL chip enable O 0 0 0 20 HDIO Host serial data bus I/O 0 0 0 21 HCK Host Clock O 0 0 0 22 VRST Hardware reset O 0 0 0 23 HSEL Host address/data
24 CD-STB CD strobe O 0 0 5.1 25 CD-A0 CD address 0 O 0 0 4.4 26 CD-RST CD reset O 0 0 5.1 27 CD-RFOK CD RFOK signal I 0 0 5.0 28 CD-LOCK CD lock signal I 0 0 5.0 29 CD-LIMIT CD limit sw I 0 0 5.1 30 CD-SW2 CD SW2 I 5.1 5.1 0 31 MODE A MODE A I 5 5 5 32 MODE B MODE B I 5 5 0 33 Vss Ground - 0 0 0 34 NC Not used - - - ­35 ST-IND FM stereo detection I 5.0 5.1 5.1 36 IC2-CLK Electronic volume clock O 5.1 5.1 5.2 37 IC2-DATA Electronic volume data I/O 5.1 0 5.2 38 NC No connection - - - ­39 ILL8V LCD back light control I 5 5 5 40 NC No connection - - - ­41 LCD-MOSI LCD data output O 0 0 0 42 LCD-MISO LCD data input I 5.0 5.0 5.0 43 LCD-CLK LCD clock O 0 0 0 44 LCD-CE LCD chip enable output O 0 0 0 45 POWER LED Pilot lamp on O 0 0 0 46 ANT.CONT Motor antenna control O 5.1 5.1 0 47 NC No connection - - - ­48 EEPROM_SK Serial clock - - - ­49 REM-IN_SUB Remote control sig.
50 EEPROM_DI EEPROM data input - - - ­51 EEPROM_CS Chip select - - - ­52 NC No connection - - - ­53 EEPROM_DO EEPROM data output - - - ­54 NC Not used - - - ­55 PANEL-DET Panel detect I 0 4.8 4.9 56 CD-ON CD power control O 0 0 5.1 57 PWR CNT Power control O 5.0 5.0 5.0 58 ACC-DET ACC detection I 5.1 5.1 5.1 59 MUTE MUTE 0 5.1 5.1 5.1 60 /RESET Reset input I 5.1 5.1 5.1 61 REM Remocon data input I 4.4 4.4 4.4 62 BATT Battery detection I 5.1 5.1 5.1 63 CD SW1 CD SW1 I 0 0 0 64 DAC_MUTE DAC MUTE O 0 0 0 65 HRDY Host redy O 0 0 5
select
sampling
(V)FM(V)AM(V)CD(V)
O 0.6 0 0
I 0 4.4 4.4
Pin
No.
66 HINT Host interrupt I 0 0 5 67 VSS Ground - 0 0 0 68 VDD +5V power supply - 5.1 5.1 5.1 69 X2 Crystal oscillator - 3.1 3.1 3.1 70 X1 Crystal oscillator - 2.2 2.2 2.2 71 Vpp (Ground pull-down) - 0 0 0 72 SUB-X2 Crystal oscillator - 3.1 3.1 3.1 73 SUB-X1 Crystal oscillator - 2.5 2.5 2.5 74 AVDD +5V power supply - 5.1 5.1 5.1 75 AVREF (Connecting to VDD) - 5.1 5.1 5.1 76 VSM_DET S-meter detection I 0 0 0 77 NC Not used I 0 0 0 78 NC Not used I 0 0 0 79 INIT A Initial value A I 0 0 0 80 NC Not used I 0 0 0
Port Descriptions I/O
(V)FM(V)AM(V)CD(V)
Note 1 :
Voltage measuerments are with respect to ground, with a voltmeter (internal resistance : 10M ohms).
9.2. Display Block
IC901 : YEAMLC75854W
Pin No. Port Descriptions I/O
1-35 SEG1-35 LCD segment O 2.5 36-39 NC No connection - ­40-43 COM1-4 LCD common O 2.5 44-49 KS1-6 Key data output O 0.9 50-54 KI1-5 Key data input I 0
55 TEST (Connecting to ground) - 0 56 VDD +5V power supply - 5.1 57 VDD1 Ground through capacitor - 3.3 58 VDD2 Ground through capacitor - 1.7 59 Vss Ground - 0 60 OSC CR oscillator - 3.9 61 DO Key data output O 4.4 62 CE Chip enable I 0 63 CLK LCD clock I 0 64 DI LCD data input I 0
(V)
9.3. CD Servo Block
IC1 : C1BB00000665
Pin No.
10 D.VDD Digital logic power supply - 5.0 11 DA.VDD DAC power supply - 4.8 12 R_OUT Audio R ch O 2.4 13 DA.GND DAC ground - 0 14 REGC Bypass capacitor for SCF
15 DA.GND DAC ground - 0 16 L_OUT Audio L ch O 2.4 17 DA.VDD DAC power supply - 4.8
Port Descriptions I/O Vol.
1 D.GND Digital logic Ground - 0 2 RFOK RFOK output signal O 5.0 3 /RST System reset I 5.1 4 A0 Command/Parameter specification I 4.5 5 /STB Serial data strobe I 5.1 6 /SCK Data shift clock I 5.1 7 SO Serial data O 0 8 SI Serial data I 2.4 9 XTALEN (Connecting to ground) - 0
regurator
- 2.5
(V)
(V)
7
CQ-VCD163WJ
Pin No.
18 R+ Not used - ­19 R- Not used - ­20 L- Not used - ­21 L+ Not used - ­22 X.VDD Crystal OSC power supply - 5.0 23 /XTAL Crystal OSC terminal - 2.4 24 XTAL Crystal OSC terminal - 2.2 25 X.GND Crystal OSC ground - 0 26 D.VDD Digital logic power supply - 5.0 27 EMPH Not used - ­28 FLAG Not used - ­29 DIN DAC serial data I 2.6 30 DOUT DAC serial data O 2.6 31 SCKIN DAC shift clock I 2.7 32 SCKO DAC shift clock O 2.7 33 LRCKIN DAC LRCK signal I 2.5 34 LRCK DAC LRCK signal O 2.5 35 HOLD/WDCK Not used - ­36 TX Not used - ­37 D.GND Digital logic Ground - 0 38 C16M Not used - ­39 LIMIT (Connecting to VDD) - 5.0 40 D.VDD Digital logic power supply - 5.0 41 LOCK EFM SYNC detection O 5.0 42 RFCK Not used - ­43 MIRR/WFCK Not used - ­44 PLCK Not used - ­45 D.GND Digital logic Ground - 0 46 C1D1 Not used - ­47 C1D2 Not used - ­48 C2D1 Not used - ­49 C2D2 Not used - ­50 C2D3 Not used - ­51 D.VDD Digital logic power supply - 5.0 52 PACK Not used - ­53 TSO Not used - ­54 TSI (Connecting to ground) - 0 55 /TSCK (Connecting to ground) - 0 56 TSTB (Connecting to ground) - 0 57 D.GND Digital logic Ground - 0 58 TEST0 (Connecting to ground) - 0 59 TEST1 (Connecting to ground) - 0 60 ATEST Not used - 2.1 61 A.GND Analog logic Ground - 0 62 FD Focus drive O 2.6 63 TD Traking drive O 2.5 64 SD Sled drive O 2.5 65 MD Spindle drive O 2.6 66 DAC0 Not used - ­67 DAC1 Not used - ­68 DAC2 Not used - ­69 DAC3 Not used - ­70 A.VDD Analog logic power supply - 5.0 71 EFM EFM signal O 2.7 72 ASY Reference v oltage for EFM comp. I 2.5 73 C3T Capacitor terminal for 3T
74 RFI RF for EFM data generation I 2.5 75 AGCO RF signal output (after gain
76 AGCI RF-AGC amp input I 2.5 77 RFO RF summing amp output O 2.8 78 EQ2 C/R terminal for RF amp equalizer - 2.6 79 EQ1 C/R terminal for RF amp equalizer - 0.5 80 RF- RF summing amp inverted input I 2.4 81 A.GND Analog logic Ground - 0 82 A Photo detector A input I 2.7 83 C Photo detector C input I 2.5 84 B Photo detector B input I 2.7 85 D Photo detector D input I 2.5 86 F Photo detector F input I 3.0 87 E Photo detector E input I 3.0 88 A.VDD Analog logic power supply - 5.0
Port Descriptions I/O Vol.
detection
adjustment)
(V)
- 2.7
O 2.5
Pin No.
100 A.VDD Analog logic power supply - 5.0
Port Descriptions I/O Vol.
89 REFOUT Reference voltage output O 2.5 90 FE- Focus error amp input I 2.5 91 FE0 Focus error amp output O 2.5 92 TE- Tracking error amp input I 2.5 93 TE0 Tracking error amp output O 2.5 94 TE2 Tracking error amp output O 2.6 95 TEC Tracking comparator input I 2.5 96 A.GND Analog logic Ground - 0 97 PD PD detection I 0 98 LD LD control O 3.6 99 PN (Connecting to ground) - 0
(V)
8
10 PACKAGE AND IC BLOCK DIAGRAM
10.1. Main Block
CQ-VCD163WJ
P50 : C5BA00000109
IC100 : YEAMLC72135M
9
CQ-VCD163WJ
IC300 : C1BB00000543
IC400 : AN8065S_E1
10
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