This Logic Level Vertical Power MOSFET is a general purpose part
that provides the “best of design” available today in a low cost power
package. Avalanche energy issues make this part an ideal design in.
The drain−to−source diode has a ideal fast but soft recovery.
Features
• Pb−Free Packages are Available
• Ultra−Low R
• SPICE Parameters Available
• Diode is Characterized for Use in Bridge Circuits
• I
and V
DSS
• High Avalanche Energy Specified
• ESD JEDAC Rated HBM Class 1, MM Class B, CDM Class 0
T ypical Applications
• Power Supplies
• Inductive Loads
• PWM Motor Controls
• Replaces MTP75N03HDL and MTB75N03HDL in Many
Applications
DS(on)
2
PAK
, Single Base, Advanced Technology
DS(on)
Specified at Elevated Temperatures
http://onsemi.com
75 AMPERES, 30 VOLTS
= 8 m
N−Channel
D
S
TO−220
CASE 221A
STYLE 5
MARKING
DIAGRAMS
4
Drain
75N
03L09
AYWW
G
4
R
DS(on)
Semiconductor Components Industries, LLC, 2004
August, 2004 − Rev. 6
1
2
3
4
2
D
PAK
2
1
3
75N03L09= Device Code
A= Assembly Location
Y= Year
WW= Work Week
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 2 of this data sheet.
Operating and Storage Temperature RangeTJ and T
Single Pulse Drain−to−Source Avalanche Energy − Starting TJ = 25°C
= 38 Vdc, VGS = 10 Vdc, L = 1 mH, IL(pk) = 55 A, VDS = 40 Vdc)
(V
DD
E
AS
stg
75
Adc
59
225
125
1.0
2.5
Apk
W
W/°C
W
−55 to 150°C
1500mJ
Thermal Resistance
− Junction−to−Case
− Junction−to−Ambient
− Junction−to−Ambient (Note 1)
R
R
R
Maximum Lead Temperature for Soldering Purposes, 1/8″ from case for 10 secondsT
JC
JA
JA
L
1.0
°C/W
62.5
50
260°C
Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit
values (not normal operating conditions) and are not valid simultaneously . If these limits are exceeded, device functional operation is not implied,
damage may occur and reliability may be affected.
1. When surface mounted to an FR4 board using the minimum recommended pad size.
3. Switching characteristics are independent of operating junction temperatures.
4. From characterization test data.
http://onsemi.com
t
rr
t
a
t
b
Q
RR
−37−
−20−
−17−
−0.023−
ns
C
3
NTP75N03L09, NTB75N03L09
120
90
60
30
, DRAIN CURRENT (AMPS)
D
I
TJ = 25°C
0
0
0.6 0.8 1 1.2 1.4 1.6 1.8 2 2.2 2.4
0.40.2
, DRAIN−TO−SOURCE VOLTAGE (VOLTS)
V
DS
Figure 1. On−Region CharacteristicsFigure 2. Transfer Characteristics
0.0085
0.008
0.0075
0.007
0.0065
0.006
0.0055
0.005
, DRAIN−TO SOURCE RESISTANCE ()
0.0045
0.004
DS(on)
R
VGS = 5 V
2060 70120
10
ID, DRAIN CURRENT (AMPS)
VGS = 4 V
VGS = 4.5 V
VGS = 5 V
VGS = 6 V
VGS = 8 V
VGS = 10 V
TJ = 100°C
TJ = 25°C
TJ = −55°C
504030
VGS = 3.5 V
VGS = 3 V
VGS = 2.5 V
80 90 100
150
VDS ≥ 10 V
135
120
105
90
75
60
45
30
, DRAIN CURRENT (AMPS)
D
I
15
0
2.6
0.52.5321.53.514
0.009
TJ = 25°C
0.008
0.007
0.006
0.005
, DRAIN−TO SOURCE RESISTANCE ()
0.004
DS(on)
080604010020120
R
TJ = 25°C
TJ = 100°C
V
, GATE−TO−SOURCE VOLTAGE (VOLTS)
GS
TJ = −55°C
VGS = 5 V
VGS = 10 V
ID, DRAIN CURRENT (AMPS)
Figure 3. On−Resistance vs. Drain Current and
Temperature
1.6
1.4
1.2
1
0.8
0.6
−5050250−2575125150
, DRAIN−TO SOURCE RESISTANCE (NORMALIZED)
DS(on)
Figure 5. On−Resistance Variation Temperature
R
V
= 5.0 V
GS
I
= 37.5 A
D
TJ, JUNCTION TEMPERATURE (°C)
100
1000
100
10
, LEAKAGE (nA)
DSS
I
1
http://onsemi.com
4
Figure 4. On−Resistance vs. Drain Current and
Gate Voltage
VGS = 0 V
TJ = 125°C
TJ = 100°C
51520251030
VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS)
Figure 6. Drain−to−Source Leakage Current vs.
Voltage
NTP75N03L09, NTB75N03L09
12000
10000
8000
6000
4000
C, CAPACITANCE (pF)
2000
0
10
1000
100
t, TIME (ns)
10
1
V
V
GS
DS
C
iss
C
oss
C
rss
4 2 0 2 4 6 8 10121416182022
68
GATE−TO−SOURCE OR DRAIN−TO−SOURCE
VDS = 0 V
V
= 0 V
GS
T
= 25°C
J
25
8
V
6
Q
4
1
DS
Q
T
Q
2
2
, GATE−TO−SOURCE VOLTAGE (V)
GS
0
V
0102030405060
Q
3
Qg, TOTAL GATE CHARGE (nC)
VOLTAGE (VOLTS)
Figure 7. Capacitance VariationFigure 8. Gate−to−Source and
Drain−to−Source Voltage vs. Total Charge
10
t
r
t
f
t
d(off)
t
d(on)
9.16.24.7
VDD = 15 V
V
GS
TJ = 25°C
I
= 75 A
D
2.21020
RG, GATE RESISTANCE ()
= 5 V
75
70
65
60
55
50
45
40
35
30
25
20
, SOURCE CURRENT (AMPS)
15
S
I
10
VGS = 0 V
T
= 25°C
J
5
0
0.00.80.60.40.21.0
VSD, SOURCE−TO−DRAIN VOLTAGE (VOLTS)
V
GS
ID = 75 A
T
= 25°C
J
30
20
10
0
Figure 9. Resistive Switching Time Variation
vs. Gate Resistance
1600
1400
1200
1000
800
600
400
AVALANCHE ENERGY (mJ)
200
, SINGLE PULSE DRAIN−TO−SOURCE
AS
0
E
257550100125150
TJ, STARTING JUNCTION TEMPERATURE (°C)
Figure 11. Maximum Avalanche Energy vs.
Starting Junction Temperature
http://onsemi.com
Figure 10. Diode Forward Voltage vs. Current
ID = 75 A
5
NTP75N03L09, NTB75N03L09
PACKAGE DIMENSIONS
TO−220
CASE 221A−09
ISSUE AA
SEATING
−T−
PLANE
B
4
Q
123
F
T
A
U
C
S
H
K
Z
L
V
R
J
G
D
N
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. DIMENSION Z DEFINES A ZONE WHERE ALL
BODY AND LEAD IRREGULARITIES ARE
ALLOWED.
DIM MINMAXMIN MAX
A 0.570 0.620 14.48 15.75
B 0.380 0.4059.66 10.28
C 0.160 0.1904.074.82
D 0.025 0.0350.640.88
F 0.142 0.1473.613.73
G 0.095 0.1052.422.66
H 0.110 0.1552.803.93
J 0.018 0.0250.460.64
K 0.500 0.562 12.70 14.27
L 0.045 0.0601.151.52
N 0.190 0.2104.835.33
Q 0.100 0.1202.543.04
R 0.080 0.1102.042.79
S 0.045 0.0551.151.39
T 0.235 0.2555.976.47
U 0.000 0.0500.001.27
V 0.045−−−1.15−−−
Z−−− 0.080−−−2.04
STYLE 5:
PIN 1. GATE
2. DRAIN
3. SOURCE
4. DRAIN
MILLIMETERSINCHES
http://onsemi.com
6
NTP75N03L09, NTB75N03L09
PACKAGE DIMENSIONS
D2PAK
CASE 418AA−01
ISSUE O
−T−
SEATING
PLANE
−B−
G
C
E
V
4
W
A
231
S
K
W
J
D
3 PL
M
0.13 (0.005)T
M
B
NOTES:
1. DIMENSIONING AND TOLERANCING
PER ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
DIM MINMAXMIN MAX
A 0.340 0.3808.649.65
B 0.380 0.4059.65 10.29
C 0.160 0.1904.064.83
D 0.020 0.0360.510.92
E 0.045 0.0551.141.40
F 0.310−−−7.87−−−
G0.100 BSC2.54 BSC
J 0.018 0.0250.460.64
K 0.090 0.1102.292.79
M 0.280−−−7.11−−−
S 0.575 0.625 14.60 15.88
V 0.045 0.0551.141.40
STYLE 2:
PIN 1. GATE
2. DRAIN
3. SOURCE
4. DRAIN
MILLIMETERSINCHES
SOLDERING FOOTPRINT*
8.38
0.33
10.66
0.42
1.016
0.04
5.08
0.20
3.05
0.12
17.02
0.67
SCALE 3:1
inches
mm
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
http://onsemi.com
7
NTP75N03L09, NTB75N03L09
ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMENT:
Literature Distribution Center for ON Semiconductor
P.O. Box 61312, Phoenix, Arizona 85082−1312 USA
Phone: 480−829−7710 or 800−344−3860 Toll Free USA/Canada
Fax: 480−829−7709 or 800−344−3867Toll Free USA/Canada
Email: orderlit@onsemi.com
N. American Technical Support: 800−282−9855 Toll Free
USA/Canada
Japan: ON Semiconductor, Japan Customer Focus Center
2−9−1 Kamimeguro, Meguro−ku, Tokyo, Japan 153−0051
Phone: 81−3−5773−3850
http://onsemi.com
ON Semiconductor Website: http://onsemi.com
Order Literature: http://www.onsemi.com/litorder
For additional information, please contact your
local Sales Representative.
NTP75N03L09/D
8
Loading...
+ hidden pages
You need points to download manuals.
1 point = 1 manual.
You can buy points or you can get point for every manual you upload.