4. Switching characteristics are independent of operating junction temperatures.
SymbolMinTypMaxUnit
V
(BR)DSS
I
DSS
GSS
V
GS(th)
R
DS(on)
C
C
C
t
d(on)
t
d(off)
d(on)
t
d(off)
Q
Q
Q
V
t
t
t
FS
iss
oss
rss
t
t
gs
gd
SD
rr
a
b
RR
30
−
−
−
25
−
−
−
−
−
1.0
10
−−±100nAdc
1.0
−
−6.8
1.9
−3.8
6.8
9.5
3.0
−
9.3
9.3
12.5
−40−mhos
−20502400pF
−640800
−225310
−1018ns
r
−2235
−4575
f
−3570
−18−ns
r
−70−
−32−
f
T
−30−
−28−nC
−7.5−
−19−
−
−
0.90
0.75
1.3
−
−37−
−21−
−16−
−0.035−µC
Vdc
mV/°C
µAdc
Vdc
mV/°C
mΩ
Vdc
ns
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2
NTP4302, NTB4302
70
7 V
60
5 V
50
40
30
20
, DRAIN CURRENT (AMPS)
D
I
10
0
02.5
0.51.5
VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS)
VGS = 10 V
4.6 V
3 V2.8 V
TJ = 25C
Figure 1. On−Region CharacteristicsFigure 2. Transfer Characteristics
0.08
0.06
60
4.4 V
4 V
3.8 V
3.4 V
3.2 V
21
ID = 20 A
= 25°C
T
J
, DRAIN CURRENT (AMPS)
D
I
3
0.015
VDS ≥ 10 V
50
40
30
20
10
0.01
TJ = 25°C
TJ = 100°C
TJ = −55°C
0
26
TJ = 25°C
345
V
, GATE−TO−SOURCE VOLTAGE (VOLTS)
GS
VGS = 4.5 V
0.04
0.005
0.02
, DRAIN−TO−SOURCE RESISTANCE (Ω)
0
042610
DS(on)
R
VGS, GATE−TO−SOURCE VOLTAGE (VOLTS)
803020104070
, DRAIN−TO−SOURCE RESISTANCE (Ω)
DS(on)
R
Figure 3. On−Resistance versus
Gate−to−Source V oltage
1.6
1.4
1.2
0.8
1
ID = 20 A
V
= 10 V
GS
10000
1000
100
, LEAKAGE (nA)
DSS
I
VGS = 10 V
0
ID, DRAIN CURRENT (AMPS)
5060
Figure 4. On−Resistance versus Drain Current
and Gate Voltage
VGS = 0 V
TJ = 150°C
TJ = 100°C
10
0.6
−5050250−2575100
, DRAIN−TO−SOURCE RESISTANCE (NORMALIZED)
DS(on)
R
TJ, JUNCTION TEMPERATURE (°C)
Figure 5. On−Resistance Variation with
Temperature
1
150125
02025151030
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3
VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS)
Figure 6. Drain−to−Source Leakage Current
versus V oltage
NTP4302, NTB4302
6000
VGS = 0 VVDS = 0 VTJ = 25°C
5000
C
iss
4000
3000
C
rss
C
iss
2000
C, CAPACITANCE (pF)
1000
0
1010
0
V
V
GS
DS
C
oss
C
rss
GATE−TO−SOURCE OR DRAIN−TO−SOURCE (VOLTS)
Figure 7. Capacitance VariationFigure 8. Gate−to−Source and
1000
VDD = 24 V
I
= 20 A
D
V
= 10 V
GS
100
t
d(off)
t
r
5
Q
V
4
DS
Q
1
T
Q
2
3
2
1
, GATE−TO−SOURCE VOLTAGE (VOLTS)
0
GS
2020
01030
30
V
Q
, TOTAL GATE CHARGE (nC)
g
Drain−to−Source Voltage versus Total Charge
25
VGS = 0 V
T
= 25°C
J
t
f
20
15
V
GS
ID = 37 A
T
= 25°C
J
18
12
30
24
6
, DRAIN−TO−SOURCE VOLTAGE (VOLTS)
DS
V
t, TIME (ns)
10
t
d(on)
1
1
10
RG, GATE RESISTANCE (Ω)
Figure 9. Resistive Switching Time Variations
versus Gate Resistance
1000
, DRAIN CURRENT (AMPS)
D
I
Mounted on 2″ sq. FR4 board (1″ sq. 2 oz. Cu 0.06″
thick single sided) with one die operating, 10 s max.
VGS = 20 V
SINGLE PULSE
100
T
C
= 25°C
10 µs
100 µs
DS(on)
1 ms
LIMIT
10 ms
dc
10
R
THERMAL LIMIT
1
PACKAGE LIMIT
0.1101100
VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS)
10
5
, SOURCE CURRENT (AMPS)
S
I
0
100
0.50.70.60.8
Figure 10. Diode Forward Voltage versus Current
800
700
600
500
400
300
200
AVALANCHE ENERGY (mJ)
100
, SINGLE PULSE DRAIN−TO−SOURCE
AS
0
E
251251007550150
0.9
VSD, SOURCE−TO−DRAIN VOLTAGE (VOLTS)
ID = 17 A
TJ, STARTING JUNCTION TEMPERATURE (°C)
1
Figure 11. Maximum Rated Forward Biased
Safe Operating Area
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Figure 12. Maximum Avalanche Energy versus
Starting Junction Temperature
4
1.00
NTP4302, NTB4302
SAFE OPERATING AREA
D = 0.5
0.2
0.1
0.10
SINGLE PULSE
r(t), NORMALIZED EFFECTIVE
TRANSIENT THERMAL RESISTANCE
0.05
0.02
0.01
P
(pk)
t
1
t
2
DUTY CYCLE, D = t1/t
R
(t) = r(t) R
θ
JC
θ
JC
D CURVES APPLY FOR POWER
PULSE TRAIN SHOWN
READ TIME AT t
T
− TC = P
J(pk)
2
(pk)
1
R
θ
0.01
1.0E−051.0E−041.0E−031.0E−021.0E−011.0E+001.0E+01
t, TIME (s)
Figure 13. Thermal Response
di/dt
I
S
t
rr
t
t
a
b
TIME
t
p
0.25 I
S
I
S
(t)
JC
Figure 14. Diode Reverse Recovery Waveform
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5
NTP4302, NTB4302
PACKAGE DIMENSIONS
TO−220 THREE−LEAD
TO−220AB
CASE 221A−09
ISSUE AA
SEATING
−T−
PLANE
B
4
Q
123
F
T
A
U
C
S
H
K
Z
L
V
R
J
G
D
N
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. DIMENSION Z DEFINES A ZONE WHERE ALL
BODY AND LEAD IRREGULARITIES ARE
ALLOWED.
DIM MINMAXMIN MAX
A 0.570 0.620 14.48 15.75
B 0.380 0.4059.66 10.28
C 0.160 0.1904.074.82
D 0.025 0.0350.640.88
F 0.142 0.1473.613.73
G 0.095 0.1052.422.66
H 0.110 0.1552.803.93
J 0.018 0.0250.460.64
K 0.500 0.562 12.70 14.27
L 0.045 0.0601.151.52
N 0.190 0.2104.835.33
Q 0.100 0.1202.543.04
R 0.080 0.1102.042.79
S 0.045 0.0551.151.39
T 0.235 0.2555.976.47
U 0.000 0.0500.001.27
V 0.045−−−1.15−−−
Z−−− 0.080−−−2.04
STYLE 5:
PIN 1. GATE
2. DRAIN
3. SOURCE
4. DRAIN
MILLIMETERSINCHES
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6
−T−
SEATING
PLANE
VARIABLE
CONFIGURATION
ZONE
−B−
G
NTP4302, NTB4302
PACKAGE DIMENSIONS
D2PAK
CASE 418AA−01
ISSUE O
C
E
V
4
W
A
231
S
K
W
J
3 PL
D
M
0.13 (0.005)T
M
B
U
NOTES:
1. DIMENSIONING AND TOLERANCING
PER ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
DIM MINMAXMIN MAX
A 0.340 0.3808.649.65
B 0.380 0.4059.65 10.29
C 0.160 0.1904.064.83
D 0.020 0.0360.510.92
E 0.045 0.0551.141.40
F 0.310−−−7.87−−−
G0.100 BSC2.54 BSC
J 0.018 0.0250.460.64
K 0.090 0.1102.292.79
M 0.280−−−7.11−−−
S 0.575 0.625 14.60 15.88
V 0.045 0.0551.141.40
STYLE 2:
PIN 1. GATE
2. DRAIN
3. SOURCE
4. DRAIN
MILLIMETERSINCHES
M
F
VIEW W−WVIEW W−WVIEW W−W
123
M
M
F
F
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7
NTP4302, NTB4302
ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
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NTP4302/D
8
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