Datasheet NTP10N40, NTB10N40 Datasheet (ON Semiconductor)

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NTP10N40, NTB10N40
Preferred Device
Advance Information
Power MOSFET 10 Amps, 400 Volts
N–Channel TO–220 and D2PAK
Designed for high voltage, high speed switching applications in
power supplies, converters, power motor controls and bridge circuits.
Features
Higher Current Rating
Lower R
Lower Capacitances
Lower Total Gate Charge
Tighter V
Avalanche Energy Specified
T ypical Applications
Switch Mode Power Supplies
PWM Motor Controls
Converters
Bridge Circuits
DS(on)
Specifications
SD
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10 AMPERES
400 VOLTS
R
DS(on)
G
4
= 500 m
N–Channel
D
S
4
MAXIMUM RATINGS (T
Rating
Drain–Source Voltage V Drain–Gate Voltage (RGS = 1.0 MΩ) V Gate–Source Voltage
– Continuous – Non–Repetitive (tp10 ms)
Drain
– Continuous – Continuous @ 100°C – Single Pulse (tp10 µs)
Total Power Dissipation
Derate above 25°C
Operating and Storage Temperature
Range
Single Drain–to–Source Avalanche
Energy – Starting TJ = 25°C (VDD = 100 Vdc, VGS = 10 Vdc, IL = 10 A, L = 10 mH, RG = 25 Ω)
Thermal Resistance
– Junction–to–Case – Junction–to–Ambient – Junction–to–Ambient (Note 1.)
Maximum Lead Temperature for
Soldering Purposes, 1/8 from case for 10 seconds
1. When surface mounted to an FR4 board using the minimum recommended pad size.
This document contains information on a new product. Specifications and information herein are subject to change without notice.
= 25°C unless otherwise noted)
C
Symbol Value Unit
DSS DGR
V
GS
V
GSM
I
D
I
D
I
DM
P
D
TJ, T
stg
E
AS
R
θJC
R
θJA
R
θJA
T
L
400 Vdc 400 Vdc
2040
10
7.5 35
142
1.14
–55 to 150 °C
500 mJ
0.88
62.5 50
260 °C
Vdc
Adc
Watts
W/°C
°C/W
1
2
3
TO–220AB
CASE 221A
1
2
3
STYLE 5
D2PAK
CASE 418B
STYLE 2
MARKING DIAGRAMS
AND PIN ASSIGNMENTS
Drain
NTP10N40 LLYWW
Gate Source
Drain
NTx10N40 = Device Code LL = Location Code Y = Year WW = Work Week
Drain
NTB10N40 LLYWW
Drain
Gate Source
ORDERING INFORMATION
Device Package Shipping
NTP10N40 TO–220AB 50 Units/Rail NTB10N40 D2PAK 50 Units/Rail NTB10N40T4 D2PAK 800/Tape & Reel
Preferred devices are recommended choices for future use and best overall value.
Semiconductor Components Industries, LLC, 2000
November, 2000 – Rev. 1
1 Publication Order Number:
NTP10N40/D
NTP10N40, NTB10N40
)
f = 1.0 MHz)
R
G
9.1 Ω)
(V
DS
320 Vdc, I
D
Adc
dIS/dt = 100 A/µs)
ELECTRICAL CHARACTERISTICS (T
Characteristic
OFF CHARACTERISTICS
Drain–to–Source Breakdown Voltage
(VGS = 0 Vdc, ID = 0.25 mAdc) Temperature Coefficient (Positive)
Zero Gate Voltage Collector Current
(VDS = 400 Vdc, VGS = 0 Vdc) (VDS = 400 Vdc, VGS = 0 Vdc, TJ =125°C)
Gate–Body Leakage Current (VGS = ±20 Vdc, VDS = 0) I
ON CHARACTERISTICS (Note 2.)
Gate Threshold Voltage
ID = 0.25 mA, VDS = V
Temperature Coefficient (Negative) Static Drain–to–Source On–Resistance (VGS = 10 Vdc, ID = 5.0 Adc) R Drain–to–Source On–Voltage
(VGS = 10 Vdc, ID = 10 Adc)
(VGS = 10 Vdc, ID = 5.0 Adc, TJ = 125°C) Forward Transconductance (VDS = 15 Vdc, ID = 5.0 Adc) g
DYNAMIC CHARACTERISTICS
Input Capacitance Output Capacitance
Transfer Capacitance
SWITCHING CHARACTERISTICS (Note 3.)
Turn–On Delay Time Rise Time Turn–Off Delay Time Fall Time Gate Charge
SOURCE–DRAIN DIODE CHARACTERISTICS
Forward On–Voltage (Note 2.)
Reverse Recovery Time
Reverse Recovery Stored
Charge
INTERNAL PACKAGE INDUCTANCE
Internal Drain Inductance
(Measured from contact screw on tab to center of die)
(Measured from the drain lead 0.25 from package to center of die) Internal Source Inductance
(Measured from the source lead 0.25 from package to source bond pad)
2. Pulse Test: Pulse Width ≤300 µs, Duty Cycle ≤ 2%.
3. Switching characteristics are independent of operating junction temperature.
GS
(IS = 10 Adc, VGS = 0 Vdc, TJ = 125°C)
= 25°C unless otherwise noted)
C
(VDS = 25 Vdc, VGS = 0 Vdc,
(VDD = 200 Vdc, ID = 10 Adc,
(VDS = 320 Vdc, ID = 10 Adc,
f = 1.0 MHz
VGS = 10 Vdc,
RG = 9.1 Ω)
VGS = 10 Vdc)
(IS = 10 Adc, VGS = 0 Vdc)
(IS = 10 Adc, VGS = 0 Vdc,
dIS/dt = 100 A/µs)
10
,
Symbol Min Typ Max Unit
V
(BR)DSS
I
DSS
GSS(f)
I
GSS(r)
V
GS(th)
DS(on)
V
DS(on)
FS
C
iss
C
oss
C
rss
t
d(on)
t
r
t
d(off)
t
f
Q
T
Q
1
Q
2
Q
3
V
SD
t
rr
t
a
t
b
Q
RR
L
D
L
S
400
– –
– –
2.0 –
350 500 mOhm
– –
2.0 7.0 Mhos
1440 2020 pF – 360 500 – 15 30
10 20 ns – 20 40 – 33 70 – 24 50 – 24 30 nC – 6.0 – – 7.0 – – 12
– –
305 – – 155 – – 150 – – 2.5 µC
– –
7.5
475
– –
– –
2.5
6.5
– –
0.9
0.8
3.5
4.5
– –
10
100 100
100
4.0 –
6.0
5.3
1.1 –
– –
mV/°C
mV/°C
Vdc
µAdc
nAdc
Vdc
Vdc
Vdc
ns
nH
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2
NTP10N40, NTB10N40
PACKAGE DIMENSIONS
TO–220 THREE–LEAD
TO–220AB
CASE 221A–09
ISSUE AA
SEATING
–T–
PLANE
B
4
Q
123
F
T
A
U
C
S
H
K
Z
L
V
R J
G
D
N
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. DIMENSION Z DEFINES A ZONE WHERE ALL BODY AND LEAD IRREGULARITIES ARE ALLOWED.
DIM MIN MAX MIN MAX
A 0.570 0.620 14.48 15.75 B 0.380 0.405 9.66 10.28 C 0.160 0.190 4.07 4.82 D 0.025 0.035 0.64 0.88 F 0.142 0.147 3.61 3.73 G 0.095 0.105 2.42 2.66 H 0.110 0.155 2.80 3.93 J 0.018 0.025 0.46 0.64 K 0.500 0.562 12.70 14.27 L 0.045 0.060 1.15 1.52 N 0.190 0.210 4.83 5.33 Q 0.100 0.120 2.54 3.04 R 0.080 0.110 2.04 2.79 S 0.045 0.055 1.15 1.39 T 0.235 0.255 5.97 6.47 U 0.000 0.050 0.00 1.27 V 0.045 --- 1.15 --- Z --- 0.080 --- 2.04
STYLE 5:
PIN 1. GATE
2. DRAIN
3. SOURCE
4. DRAIN
MILLIMETERSINCHES
D2PAK
CASE 418B–03
ISSUE D
–T–
SEATING PLANE
–B–
G
C
E
V
4
A
231
S
K
J
3 PL
D
0.13 (0.005) T
M
M
B
H
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
DIM MIN MAX MIN MAX
A 0.340 0.380 8.64 9.65 B 0.380 0.405 9.65 10.29 C 0.160 0.190 4.06 4.83 D 0.020 0.035 0.51 0.89 E 0.045 0.055 1.14 1.40 G 0.100 BSC 2.54 BSC H 0.080 0.110 2.03 2.79 J 0.018 0.025 0.46 0.64 K 0.090 0.110 2.29 2.79 S 0.575 0.625 14.60 15.88 V 0.045 0.055 1.14 1.40
STYLE 2:
PIN 1. GATE
2. DRAIN
3. SOURCE
4. DRAIN
MILLIMETERSINCHES
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NTP10N40, NTB10N40
ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes
without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer.
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NTP10N40/D
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