NTGS4111P
y
y
s
Power MOSFET
−30 V, −4.7 A, Single P−Channel, TSOP−6
Features
• Leading −30 V Trench Process for Low R
• Low Profile Package Suitable for Portable Applications
• Surface Mount TSOP−6 Package Saves Board Space
• Improved Efficiency for Battery Applications
• Pb−Free Package is Available
Applications
• Battery Management and Switching
• Load Switching
• Battery Protection
DS(on)
V
(BR)DSS
−30 V
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R
TYP
DS(on)
38 mW @ −10 V
68 mW @ −4.5 V
P−Channel
1256
ID MAX
−4.7 A
MAXIMUM RATINGS (T
Drain−to−Source Voltage V
Gate−to−Source Voltage V
Continuous Drain
Current (Note 1)
Power Dissipation
(Note 1)
Continuous Drain
Current (Note 2)
Power Dissipation
(Note 2)
Pulsed Drain Current
Operating Junction and Storage Temperature TJ,
Source Current (Body Diode) I
Lead Temperature for Soldering Purposes
(1/8″ from case for 10 s)
= 25°C unless otherwise noted)
J
Rating Symbol Value Unit
D
D
L
−30 V
±20 V
−3.7
1.25
−2.6
0.63 W
−15 A
−55 to
150
−1.7 A
260 °C
A
W
A
°C
DSS
GS
Stead
State
t ≤ 5 s T
Steady
State
t ≤ 5 s 2.0
Stead
State
T
= 25°C
A
T
= 85°C −2.7
A
= 25°C −4.7
A
T
= 25°C P
A
T
= 25°C
A
T
= 85°C −1.9
A
T
= 25°C P
A
tp = 10 ms
T
I
I
I
DM
STG
T
D
D
S
THERMAL RESISTANCE RATINGS
Rating Symbol Max Unit
Junction−to−Ambient – Steady State (Note 1)
Junction−to−Ambient – t ≤ 5 s (Note 1)
Junction−to−Ambient – Steady State (Note 2)
Maximum ratings are those values beyond which device damage can occur.
Maximum ratings applied to the device are individual stress limit values (not
normal operating conditions) and are not valid simultaneously. If these limits are
exceeded, device functional operation is not implied, damage may occur and
reliability may be affected.
1. Surface−mounted on FR4 board using 1 in sq pad size
(Cu area = 1.127 in sq [1 oz] including traces).
2. Surface−mounted on FR4 board using the minimum recommended pad size
(Cu area = 0.006 in sq).
R
q
JA
R
q
R
q
62.5
JA
JA
100
200
°C/W
3
4
MARKING DIAGRAM &
PIN ASSIGNMENT
Drain6Drain
1
TSOP−6
CASE 318G
STYLE 1
TG = Specific Device Code
M
G = Pb−Free Package
(Note: Microdot may be in either location)
*Date Code orientation may vary depending
upon manufacturing location.
= Date Code*
1
Drain2Drain
5
TG M G
G
Source
4
3
Gate
ORDERING INFORMATION
Device Package Shipping
NTGS4111PT1 TSOP−6 3000 / Tape & Reel
NTGS4111PT1G TSOP−6
(Pb−Free)
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
3000 / Tape& Reel
†
© Semiconductor Components Industries, LLC, 2006
April, 2006 − Rev. 2
1 Publication Order Number:
NTGS4111P/D
NTGS4111P
ELECTRICAL CHARACTERISTICS (T
= 25°C unless otherwise noted)
J
Characteristic Symbol Test Condition Min Typ Max Unit
OFF CHARACTERISTICS
Drain−to−Source Breakdown Voltage V
Drain−to−Source Breakdown Voltage
Temperature Coefficient
V
(BR)DSS/TJ
Zero Gate Voltage Drain Current I
Gate−to−Source Leakage Current I
(BR)DSS
DSS
GSS
V
V
V
DS
V
GS
GS
DS
= 0 V, I
= 0 V,
= −24 V
= 0 V, V
D
ON CHARACTERISTICS (Note 3)
Gate Threshold Voltage V
Negative Threshold Temperature Coefficient V
GS(TH)/TJ
Drain−to−Source On Resistance R
Forward Transconductance g
GS(TH)
DS(on)
FS
V
GS
V
GS
V
GS
V
DS
= VDS, I
= −10 V, I
= −4.5 V, I
= −10 V, I
D
CHARGES, CAPACITANCES AND GATE RESISTANCE
Input Capacitance C
Output Capacitance C
Reverse Transfer Capacitance C
Total Gate Charge Q
Threshold Gate Charge Q
Gate−to−Source Charge Q
Gate−to−Drain Charge Q
ISS
OSS
RSS
G(TOT)
G(TH)
GS
GD
V
= 0 V, f = 1.0 MHz,
GS
V
DS
V
= −10 V, V
GS
I
= −3.7 A
D
= −15 V
SWITCHING CHARACTERISTICS, VGS = −10 V (Note 4)
Turn−On Delay Time t
Rise Time t
Turn−Off Delay Time t
Fall Time t
d(ON)
r
d(OFF)
f
V
GS
I
= −1.0 A, R
D
= −10 V, V
SWITCHING CHARACTERISTICS, VGS = −4.5 V (Note 4)
Turn−On Delay Time t
Rise Time t
Turn−Off Delay Time t
Fall Time t
d(ON)
r
d(OFF)
f
V
GS
I
D
= −4.5 V, V
= −1.0 A, R
DRAIN − SOURCE DIODE CHARACTERISTICS
Characteristic Symbol Test Condition Min Typ Max Unit
Forward Diode Voltage V
Reverse Recovery Time t
Charge Time t
Discharge Time t
Reverse Recovery Charge Q
RR
DS
a
b
RR
V
= 0 V,
GS
I
= −1.0 A
S
VGS = 0 V
dIS/dt = 100 A/ms, IS = −1.0 A
3. Pulse Test: pulse width v 300 ms, duty cycle v 2%.
4. Switching characteristics are independent of operating junction temperatures.
= −250 mA
−30 V
−17 mV/°C
TJ = 25°C
TJ = 125°C
= ±20 V ±100 nA
GS
= −250 mA
−1.0 −3.0 V
−1.0
−100
5.0 mV/°C
= −3.7 A 38 60
D
= −2.7 A 68 110
D
= −3.7 A 6.0 S
D
750
140
130
15.25 32
= −15 V,
DD
0.8
2.6
3.4
9.0 17
= −15 V,
DD
= 6.0 W
G
9.0 18
38 85
22 45
11 20
= −15 V,
DD
= 6.0 W
G
15 28
28 56
22 50
TJ = 25°C
TJ = 125°C
−0.76 −1.2
−0.60
24 60
9.0
15
12 nC
mA
mW
pF
nC
ns
ns
V
ns
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2
NTGS4111P
12
0
−10V
11
10
9
8
7
6
5
4
3
DRAIN CURRENT (AMPS)
D,
2
−I
1
0
0
0.4
−VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS)
Figure 1. On−Region Characteristics
0.2
TYPICAL PERFORMANCE CURVES (T
−4.5 V
−5 V
1.20.8
−4.2 V
−6 V
−5.5 V
TJ = 25°C
1.6 2
−4 V
−8 V
−3.8 V
−3.6 V
−3.4 V
−3.2 V
−3 V
3.22.82.4 3.6 4
TJ = 25°C
ID = −3.7 A
= 25°C unless otherwise noted)
J
12
VDS ≥ −10 V
11
10
9
8
7
6
5
4
3
DRAIN CURRENT (AMPS)
D,
2
−I
1
25°C
0
1
1.5
−VGS, GATE−TO−SOURCE VOLTAGE (VOLTS)
Figure 2. Transfer Characteristics
0.1
TJ = 25°C
VGS = −4.5 V
100°C
TJ = −55°C
2.523
3.5 4
4.5
5
0.05
0.1
VGS = −10 V
DRAIN−TO−SOURCE RESISTANCE (W)
0
210
DS(on),
R
468
−V
GATE VOLTAGE (VOLTS)
GS,
9357
Figure 3. On−Resistance vs. Gate−to−Source
Voltage
1.5
ID = −3.7 A
DRAIN−TO−SOURCE RESISTANCE (W)
DS(on),
R
100000
0
2.0
3.0
−ID, DRAIN CURRENT (AMPS)
Figure 4. On−Resistance vs. Drain Current and
Gate Voltage
VGS = 0 V
VGS = −10 V
TJ = 150°C
10000
1.0
DRAIN−TO−SOURCE
DS(on),
R
RESISTANCE (NORMALIZED)
0.5
−50 0−25 25
50 125100
75
TJ, JUNCTION TEMPERATURE (°C)
1000
LEAKAGE CURRENT (nA)
DSS,
−I
150
100
TJ = 100°C
5
10
15
−VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS)
20
4.0
25 3
Figure 5. On−Resistance Variation with
Temperature
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Figure 6. Drain−to−Source Leakage Current
vs. Voltage
3
NTGS4111P
C, CAPACITANCE (pF)
)
TYPICAL PERFORMANCE CURVES (T
1400
C
1300
1200
1100
iss
C
rss
1000
900
800
700
600
500
400
300
200
100
VDS = 0 V VGS = 0 V
0
5
−VGS−V
010 10
DS
C
oss
C
rss
5
15
−GATE−TO−SOURCE OR DRAIN−TO−SOURCE VOLTAGE (VOLTS)
Figure 7. Capacitance Variation
100
10
1
VGS = −20 V
SINGLE PULSE
TC = 25°C
0.1
, DRAIN CURRENT (AMPS)
D
−I
0.01
0.1 1 100
R
LIMIT
DS(on)
THERMAL LIMIT
PACKAGE LIMIT
10
−VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS)
Figure 9. Maximum Rated Forward Biased
Safe Operating Area
TJ = 25°C
20 25
100 ms
1 ms
10 ms
dc
C
iss
30
= 25°C unless otherwise noted)
J
12
QT
10
V
8
DS
6
Q
4
GS
Q
GD
2
0
GATE−TO−SOURCE VOLTAGE (VOLTS
−V
GS,
0
4
216
6101411395371115
Qg, TOTAL GATE CHARGE (nC)
Figure 8. Gate−to−Source Voltage vs. Total
Gate Charge
10
VGS = 0 V
TJ = 150°C
1
, SOURCE CURRENT (AMPS)
S
−I
0.1
0.5 0.80.6
0.7
−VSD, SOURCE−TO−DRAIN VOLTAGE (VOLTS)
Figure 10. Diode Forward Voltage vs. Current
V
GS
128
TJ = −55°C
ID = −3.7 A
TJ = 25°C
TJ = 100°C
TJ = 25°C
0.9
1.00.40.3
20
10
−V
DS,
DRAIN−TO−SOURCE VOLTAGE (VOLTS)
0
1.1
1
D = 0.5
0.2
0.1
0.1
0.05
0.02
0.01
0.01
0.001
Single Pulse
0.0001
1E−06 1E−05 1E−041E−07
, EFFECTIVE TRANSIENT THERMAL RESPONSE
thja(t)
R
Figure 11. FET Thermal Response
1E−03 1E−02 1E−01 1E+00 1E+01 1E+02 1E+03
t, TIME (s)
http://onsemi.com
4
NTGS4111P
PACKAGE DIMENSIONS
TSOP−6
CASE 318G−02
ISSUE P
0.05 (0.002)
D
456
H
E
1
23
E
b
e
A
A1
c
L
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. MAXIMUM LEAD THICKNESS INCLUDES LEAD
FINISH THICKNESS. MINIMUM LEAD
THICKNESS IS THE MINIMUM THICKNESS OF
BASE MATERIAL.
4. DIMENSIONS A AND B DO NOT INCLUDE
MOLD FLASH, PROTRUSIONS, OR GATE
BURRS.
DIMAMIN NOM MAX MIN
A1 0.01 0.06 0.10 0.001
q
b 0.25 0.38 0.50 0.010
c 0.10 0.18 0.26 0.004
D 2.90 3.00 3.10 0.114
E 1.30 1.50 1.70 0.051
e 0.85 0.95 1.05 0.034
L 0.20 0.40 0.60 0.008
H
E
q
STYLE 1:
PIN 1. DRAIN
MILLIMETERS
0.90 1.00 1.10 0.035
2.50 2.75 3.00 0.099 0.108 0.118
0° 10° 0° 10°
− −
2. DRAIN
3. GATE
4. SOURCE
5. DRAIN
6. DRAIN
INCHES
NOM MAX
0.039 0.043
0.002 0.004
0.014 0.020
0.007 0.010
0.118 0.122
0.059 0.067
0.037 0.041
0.016 0.024
SOLDERING FOOTPRINT*
2.4
0.094
0.95
0.037
1.9
0.075
0.95
0.037
0.7
0.028
1.0
0.039
SCALE 10:1
ǒ
inches
mm
Ǔ
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
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NTGS4111P/D
5
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