ON Semiconductor NTB125N02R, NTP125N02R Technical data

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NTB125N02R, NTP125N02R

Power MOSFET
125 A, 24 V N−Channel

2

TO−220, D

Features

• Planar HD3e Process for Fast Switching Performance

• Body Diode for Low t

Operation

• Low C

• Optimized Q

• Low Gate Charge

to Minimize Driver Loss

iss

and R

gd

PAK

and Qrr and Optimized for Synchronous

rr

for Shoot−through Protection

DS(on)

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125 AMPERES, 24 VOLTS

R

DS(on)

= 3.7 m (Typ)

D

MAXIMUM RATINGS (T

Parameter

Drain−to−Source Voltage V
Gate−to−Source Voltage − Continuous V
Thermal Resistance − Junction−to−Case

Total Power Dissipation @ TC = 25°C
Drain Current −

Continuous @ T
Continuous @ T
Continuous @ TA = 25°C, Limited by Wires
Single Pulse (t

Thermal Resistance −

Junction−to−Ambient (Note 1)
Total Power Dissipation @ T
Drain Current − Continuous @ T

Thermal Resistance −

Junction−to−Ambient (Note 2)
Total Power Dissipation @ T
Drain Current − Continuous @ T

Operating and Storage Temperature Range TJ, T

Single Pulse Drain−to−Source Avalanche
Energy − Starting T
(V

= 50 Vdc, V

DD

L = 1 mH, R
Maximum Lead Temperature for Soldering

Purposes, 1/8″ from Case for 10 Seconds

1. When surface mounted to an FR4 board using 1 inch pad size,
(Cu Area 1.127 in

2. When surface mounted to an FR4 board using minimum recommended pad
size, (Cu Area 0.412 in

= 25 )

G

C

C

= 10 s)

p

J

GS

= 25°C Unless otherwise specified)

J

= 25°C, Chip

= 25°C, Limited by Package

= 25°C

A

= 25°C

A

= 25°C

A

= 25°C

A

= 25°C

= 10 Vdc, IL = 15.5 Apk,

2

).

2

).

Symbol Value Unit

stg

24 V

±20 V

1.1

113.6
125

120.5

95

250

46

2.72

18.6

63

1.98

15.9

−55 to
150

120 mJ

260 °C

dc
dc

°C/W

W

A
A
A
A

°C/W

W

A

°C/W

W

A

°C

R

R

R

P

P

P

E

DSS

GS



JC
D

I

D

I

D

I

D

I

D



JA
D

I

D



JA
D

I

D

AS

T

L

PIN ASSIGNMENT

PIN FUNCTION

1 Gate
2 Drain
3 Source
4 Drain

G

S

MARKING

DIAGRAMS

TO−220AB

4

CASE 221A

STYLE 5

1

2

3

2

D

4

2

1

3

125N2 = Specific Device Code
Y = Year
WW = Work Week

PAK

CASE 418AA

STYLE 2

125N2R

YWW

125N2

YWW

ORDERING INFORMATION

Device Package Shipping

2

NTB125N02R D
NTB125N02RT4 D2PAK 800/Tape & Reel

NTP125N02R TO−220AB 50 Units/Rail
†For information on tape and reel specifications,

including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.

PAK

50 Units/Rail

†

 Semiconductor Components Industries, LLC, 2003

October, 2003 − Rev. 4

1 Publication Order Number:

NTB125N02R/D

NTB125N02R, NTP125N02R

(

DS dc,GS

,)

(

(V

GS

V

d

V

DD

V

d

)

V

DS

V

d

) (Note 3)

g

Forward On−Voltage

(I

S

A

d

V

GS

V

d

) (Note 3)

VSD−−0.82

1.2−V

d

(

S dc,GS dc

)

(I

S

A

d

V

GS

V

d

ELECTRICAL CHARACTERISTICS (T

Characteristics

= 25°C Unless otherwise specified)

J

Symbol Min Typ Max Unit

OFF CHARACTERISTICS

Drain−to−Source Breakdown Voltage (Note 3)

(V

= 0 Vdc, I

GS

Temperature Coefficient (Positive)

= 250 Adc)

D

Zero Gate Voltage Drain Current

(V

= 20 Vdc, VGS = 0 Vdc)

DS

= 20 Vdc, VGS = 0 Vdc, TJ = 125°C)

(V

DS

Gate−Body Leakage Current

(VGS = ±20 Vdc, VDS = 0 Vdc)

V

(BR)DSS

I

DSS

I

GSS

25

−

−

−

28
15

−

−

− − ±100

ON CHARACTERISTICS (Note 3)

Gate Threshold Voltage (Note 3)

(VDS = VGS, ID = 250 Adc)

Threshold Temperature Coefficient (Negative)
Static Drain−to−Source On−Resistance (Note 3)

(VGS = 10 Vdc, ID = 110 Adc)
(V

= 4.5 Vdc, ID = 55 Adc)

GS

(V

= 10 Vdc, ID = 20 Adc)

GS

= 4.5 Vdc, ID = 20 Adc)

(V

GS

Forward Transconductance (Note 3)

(VDS = 10 Vdc, ID = 15 Adc)

V

GS(th)

R

DS(on)

g

FS

1.0

−

−

−

−

−

1.5

5.0

3.7

4.9

3.7

4.7

− 44 −

DYNAMIC CHARACTERISTICS

Input Capacitance
Output Capacitance
Transfer Capacitance

(VDS = 20 Vdc, VGS = 0 V, f = 1 MHz)

C

iss

C

oss

C

rss

− 2710 3440

− 1105 1670

− 227 640

SWITCHING CHARACTERISTICS (Note 4)

Turn−On Delay Time
Rise Time
Turn−Off Delay Time

V

= 10 V

= 10

ID = 40 Adc, RG = 3)

, V

,

c

= 10 V

= 10

t

d(on)

t

t

d(off)

r

,

,

c

− 11 22

− 39 80

− 27 40
Fall Time tf − 21 40
Gate Charge

(VGS = 4.5 Vdc, ID = 40 Adc,

= 10

V

= 10 V) (Note 3

c

Q

T

Q

1

Q

2

− 23.6 28

− 5.1 −

− 11 −

SOURCE−DRAIN DIODE CHARACTERISTICS

Forward On−Volta

e (I

= 20 A

= 20

, V

= 0 V

,

= 0

c

(IS = 55 Adc, VGS = 0 Vdc)

) (Note 3) V

c

D

− 0.82 1.2 V

0.99

(IS = 20 Adc, VGS = 0 Vdc, TJ = 125°C) − 0.65 −

Reverse Recovery Time

(I

= 30 A

= 30

dIS/dt = 100 A/s) (Note 3)

, V

= 0 V

= 0

,

,

c

,

c

Reverse Recovery Stored Charge Q

t
t
t

rr
a
b

RR

− 36.5 −

− 17.7 −

− 18.8 −

− 0.024 − C

3. Pulse Test: Pulse Width  300 s, Duty Cycle  2%.

4. Switching characteristics are independent of operating junction temperatures.

1.5
10

2.0

4.6

6.2

V

−

−

−

dc

mV/°C

A

dc

nA

dc

V

dc

mV/°C

m

−

−

Mhos

pF

ns

nC

c

ns

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