The NL37WZ06 is a high performance triple inverter with open
drain outputs operating from a 1.65 to 5.5 V supply.
The internal circuit is composed of multiple stages, including an
open drain output which provides the capability to set output
switching level. This allows the NL37WZ06 to be used to interface 5
V circuits to circuits of any voltage between V
external resistor and power supply .
• Extremely High Speed: t
• Designed for 1.65 V to 5.5 V V
2.5 ns (typical) at VCC = 5 V
PD
Operation
CC
• Over Voltage Tolerant Inputs
• LVTTL Compatible − Interface Capability with 5 V TTL Logic with
VCC = 3 V
• LVCMOS Compatible
• 24 mA Output Sink Capability @ 3.0 V
• Near Zero Static Supply Current Substantially Reduces System
Power Requirements
• Chip Complexity: FET = 72
and 7 V using an
CC
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8
1
US8
US SUFFIX
CASE 493
LF = Device Code
D = Date Code
MARKING
DIAGRAM
8
D
LF
1
IN A1
OUT Y3
IN A2
GND
PIN ASSIGNMENT
1
1
2
3
45
8
7
6
V
CC
OUT Y1
IN A3
OUT Y2
2
3IN A2
4
5
6
7
8
FUNCTION TABLE
Figure 1. Pinout (Top View)
IN A1
IN A2
IN A3
1
1
1
Figure 2. Logic Symbol
OUT Y1
OUT Y2
OUT Y3
See detailed ordering and shipping information in the package
dimensions section on page 4 of this data sheet.
A InputY Output
ORDERING INFORMATION
IN A1
OUT Y3
GND
OUT Y2
IN A3
OUT Y1
V
L
H
CC
Z
L
Semiconductor Components Industries, LLC, 2003
August, 2003 − Rev. 2
1Publication Order Number:
NL37WZ06/D
NL37WZ06
MAXIMUM RATINGS
SymbolParameterValueUnit
V
CC
V
I
V
O
I
IK
I
OK
I
O
I
CC
I
GND
T
STG
T
L
T
J
JA
P
D
MSLMoisture SensitivityLevel 1
F
R
V
ESD
Maximum Ratings are those values beyond which damage to the device may occur. Exposure to these conditions or conditions beyond those
indicated may adversely affect device reliability. Functional operation under absolute maximum−rated conditions is not implied. Functional
operation should be restricted to the Recommended Operating Conditions.
1. Measured with minimum pad spacing on an FR4 board, using 10 mm−by−1 inch, 2−ounce copper trace with no air flow.
2. Tested to EIA/JESD22−A114−A.
3. Tested to EIA/JESD22−A115−A.
4. Tested to JESD22−C101−A.
DC Supply Voltage−0.5 to +7.0V
DC Input Voltage−0.5 to 7.0V
DC Output Voltage−0.5 to 7.0V
DC Input Diode CurrentVI < GND−50mA
DC Output Diode CurrentVO < GND−50mA
DC Output Sink Current50mA
DC Supply Current per Supply Pin100mA
DC Ground Current per Ground Pin100mA
Storage Temperature Range−65 to +150°C
Lead Temperature, 1 mm from Case for 10 Seconds260°C
Junction Temperature under Bias+150°C
Thermal Resistance(Note 1)250°C/W
Power Dissipation in Still Air at 85°C250mW
Flammability RatingOxygen Index: 28 to 34UL 94 V−0 @ 0.125 in
ESD Withstand VoltageHuman Body Model (Note 2)
Machine Model (Note 3)
Charged Device Model (Note 4)
> 2000
> 200
N/A
V
RECOMMENDED OPERATING CONDITIONS
SymbolParameterMinMaxUnit
V
CC
V
I
V
O
T
A
t/VInput Transition Rise or Fall RateVCC = 2.5 V 0.2 V
5. Unused inputs may not be left open. All inputs must be tied to a high− or low−logic input voltage level.
Supply VoltageOperating
Data Retention Only
1.65
1.5
5.5
5.5
Input Voltage(Note 5)05.5V
Output Voltage(HIGH or LOW State)0V
6. CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load.
Average operating current can be obtained by the equation: I
power consumption; P
Input CapacitanceVCC = 5.5 V, VI = 0 V or V
Output CapacitanceVCC = 5.5 V, VI = 0 V or V
CC
CC
Power Dissipation Capacitance (Note 6)10 MHz, VCC = 5.5 V, VI = 0 V or V
= CPD VCC fin + ICC. CPD is used to determine the no−load dynamic
)
= CPD V
D
2
fin + ICC VCC.
CC
CC(OPR
CC
2.5pF
4.0pF
4.0pF
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3
PULSE
GENERATOR
NL37WZ06
A
Y
50%
t
PZLtPLZ
50% V
CC
Figure 3. Switching Waveforms
V
CC
DUT
R
T
V
+0.3 V
OL
V
CC
GND
HIGH
IMPEDANCE
R
C
R
L
L
1
VCC x 2
RT = Z
of pulse generator (typically 50 )
OUT
Figure 4. Test Circuit
DEVICE ORDERING INFORMATION
Device Nomenclature
Logic
Device
Order Number
Circuit
Indicator
NL37WZ06USNL37WZ06USUS8
No. of
Gates
per
Package
Temp
Range
Identifier
Technology
Device
Function
Package
Suffix
Package Type
Tape and
Reel Size
178 mm (7″)
3000 Unit
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4
NL37WZ06
CAVITY
TAPE
TOP TAPE
TAPE DIMENSIONS mm
8.00
+ 0.30
− 0.10
TAPE TRAILER
(Connected to Reel Hub)
NO COMPONENTS
160 mm MIN
Figure 5. Tape Ends for Finished Goods
4.00
2.00
4.00
COMPONENTS
DIRECTION OF FEED
TAPE LEADER
NO COMPONENTS
400 mm MIN
1.50 TYP
1.75
3.50 0.25
1
1.00 ± 0.25 TYP
DIRECTION OF FEED
Figure 6. US8 Reel Configuration/Orientation
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5
NL37WZ06
1.5 mm MIN
(0.06 in)
(0.512 in 0.008 in)
t MAX
13.0 mm 0.2 mm
20.2 mm MIN
A
(0.795 in)
REEL DIMENSIONS
Tape Size
8 mm
T and R Suffix
FULL RADIUS
Figure 7. Reel Dimensions
A Max
US
178 mm
(7 in)
DIRECTION OF FEED
G
8.4 mm, + 1.5 mm, −0.0
(0.33 in + 0.059 in, −0.00)
50 mm MIN
(1.969 in)
G
t Max
14.4 mm
(0.56 in)
BARCODE LABEL
Figure 8. Reel Winding Direction
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6
HOLEPOCKET
−T−
SEATING
PLANE
A
58
P
D
G
K
0.10 (0.004)XY
M
41
−X−
LB
T
−Y−
C
NL37WZ06
PACKAGE DIMENSIONS
US8
US SUFFIX
CASE 493−02
ISSUE A
J
DETAIL E
R
S
U
T0.10 (0.004)
V
DETAIL E
H
N
F
NOTES:
R 0.10 TYP
M
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION “A” DOES NOT INCLUDE MOLD
FLASH, PROTRUSION OR GATE BURR.
MOLD FLASH. PROTRUSION AND GATE
BURR SHALL NOT EXCEED 0.140 MM
(0.0055”) PER SIDE.
4. DIMENSION “B” DOES NOT INCLUDE
INTER−LEAD FLASH OR PROTRUSION.
INTER−LEAD FLASH AND PROTRUSION
SHALL NOT E3XCEED 0.140 (0.0055”) PER
SIDE.
5. LEAD FINISH IS SOLDER PLATING WITH
THICKNESS OF 0.0076−0.0203 MM.
(300−800 “).
6. ALL TOLERANCE UNLESS OTHERWISE
SPECIFIED ±0.0508 (0.0002 “).
ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make
changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any
particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all
liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or
specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be
validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others.
SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death
may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC
and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees
arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that
SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer.
PUBLICATION ORDERING INFORMATION
Literature Fulfillment:
Literature Distribution Center for ON Semiconductor
P.O. Box 5163, Denver, Colorado 80217 USA
Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada
Fax: 303−675−2176 or 800−344−3867Toll Free USA/Canada
Email: orderlit@onsemi.com
N. American Technical Support: 800−282−9855 Toll Free USA/Canada
http://onsemi.com
JAPAN: ON Semiconductor, Japan Customer Focus Center
2−9−1 Kamimeguro, Meguro−ku, Tokyo, Japan 153−0051
Phone: 81−3−5773−3850
ON Semiconductor Website: http://onsemi.com
For additional information, please contact your local
Sales Representative.
NL37WZ06/D
8
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