The NCS36000 is a fully integrated mixed−signal CMOS device
designed for low−cost passive infrared controlling applications. The
device integrates two low−noise amplifiers and a LDO regulator to
drive the sensor. The output of the amplifiers goes to a window
comparator that uses internal voltage references from the regulator.
The digital control circuit processes the output from the window
comparator and provides the output to the OUT and LED pin.
Features
• 3.0 − 5.75 V Operation
• −40 to 85°C
• 14 Pin SOIC Package
• Integrated 2−Stage Amplifier
• Internal LDO to Drive Sensor
• Internal Oscillator with External RC
• Single or Dual Pulse Detection
• Direct Drive of LED and OUT
• This is a Pb−Free Device
Typical Applications
• Automatic Lighting (Residential and Commercial)
• Automation of Doors
• Motion Triggered Events (Animal photography)
14VDD
7VSS
6VREF
LDO &
Voltage References
2
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MARKING
DIAGRAM
14
1
SOIC−14
D SUFFIX
CASE 751A
A= Assembly Location
WL= Wafer Lot
Y= Year
WW= Work Week
G= Pb−Free Package
14
NCS36000G
AWLYWW
1
PIN CONNECTIONS
OP2_O
OP2_N
OP1_O
OP1_N
OP1_P
VREF
VSS
1
2
3
4
5
6
7
(Top View)
14
13
12
11
10
9
8
VDD
OSC
MODE
NC
xLED_EN
LED
OUT
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 7 of this data sheet.
1OP2_OOutput of second amplifier
2OP2_NInverting input of second amplifier
3OP1_OOutput of first amplifier
4OP1_NInverting input of first amplifier
5OP1_PNon−inverting input of first amplifier
6VREFRegulated voltage reference to drive sensor
7VSSAnalog ground reference.
8OUTCMOS output (10 mA Max)
9LEDCMOS output to drive LED (10mA Max)
10xLED_ENActive low LED enable input
11NCNo Connect
12MODEPin used to select pulse count mode
13OSCExternal oscillator to control clock frequency
14VDDAnalog power supply
ABSOLUTE MAXIMUM RATINGS
RatingSymbolValueUnit
Input Voltage Range (Note 1)V
Output Voltage RangeV
Maximum Junction TemperatureT
J(max)
Storage Temperature RangeT
ESD Capability, Human Body Model (Note 2)ESD
ESD Capability, Machine Model (Note 2)ESD
Lead Temperature Soldering
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
1. Refer to ELECTRICAL CHARACTERISTICS and APPLICATION INFORMATION for Safe Operating Area.
2. This device series incorporates ESD protection and is tested by the following methods:
ESD Human Body Model tested per AEC−Q100−002 (EIA/JESD22−A114)
ESD Machine Model tested per AEC−Q100−003 (EIA/JESD22−A115)
Latchup Current Maximum Rating: v150 mA per JEDEC standard: JESD78
3. For information, please refer to our Soldering and Mounting Techniques Reference Manual, SOLDERRM/D
4. Refer to ELECTRICAL CHARACTERISTICS and APPLICATION INFORMATION for Safe Operating Area.
5. Values based on copper area of 645 mm
2
(or 1 in2) of 1 oz copper thickness andFR4 PCB substrate.
R
q
JA
Will be Completed once
package and power
consumption is finalized
See note above.
°C/W
°C/W
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2
Page 3
NCS36000
OPERATING RANGES (Note 6)
Rating
Analog Power SupplyV
Analog Ground ReferenceV
Supply Current (Standby, No Loads)I
Digital Inputs (MODE)
Digital Output (OUT, LED)Push−Pull Output (10 mA Load)
OP1_P (Sensor Input) (Note 7)AMP 1 IN0.1VDD −
Ambient TemperatureT
6. Refer to ELECTRICAL CHARACTERISTICS and APPLICATION INFORMATION for Safe Operating Area.
7. Guaranteed By Design (Non−tested parameter).
SymbolMinTypMaxUnit
DD
SS
DD
V
ih
V
il
V
oh
V
ol
A
3.05.05.75V
0.00.1V
0.7 *
V
DD
V
DD
VDD +
VSSVDD *
0.67 *
V
DD
VSSVDD *
−4085°C
170m
0.3
0.28
V
DD
0.3
1.1
A
V
V
V
ELECTRICAL CHARACTERISTICS V
Parameter
= 1 V, Cin = 100 nF, C
in
Test ConditionsSymbolMinTypMaxUnit
= 100 nF, for typical values TA = 25°C; unless otherwise noted.
out
LDO Voltage Reference
Output Voltage
VDD = 3.0 V to 5.75 VVREF2.62.72.8V
Supply CurrentVDD = 3.0 V to 5.75VIREF2050
Comparator High Trip LevelV
Comparator Low Trip LevelV
Reference voltage for non−inverting input of
second amplifier
h
l
V
m
2.4132.52.588V
1.6411.71.760V
2.0072.12.174V
System Oscillator
Oscillator Frequency
VDD = 5.0 V
= 220 kW
R
3
C2 = 100 nF
OSC62.5Hz
Window Comparator
Lower Trip Threshold
See Vl above
Higher Trip ThresholdSee Vh above
Differential Amplifiers (Amplifier Circuit)
DC Gain
VDD = 5.0 V (Note 8)Av80dB
Common−mode Input RangeVDD = 5.0 V (Note 8)CMIR0.1VDD −
1.1
Power Supply Rejection RatioVDD = 5.0 V (Note 8)PSRR60dB
Output Drive CurrentVDD = 5.0 V (Note 8)I
out1
25
POR
POR Release Voltage
V
POR
1.352.85V
8. Guaranteed By Design (Non−tested parameter).
mA
V
mA
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3
Page 4
NCS36000
APPLICATIONS INFORMATION
Oscillator
The oscillator uses an external resistor and capacitor to set
the system clock frequency. Multiple clock frequencies can
be selected using different combinations of resistors and
capacitors. Figure 2 shows a simplifier block diagram for
the system oscillator.
VDD
14
OSC
13
Figure 2. Block Diagram of System Oscillator Circuit
LDO Regulator
−
+
−
+
SET
Q
S
CLR
Q
R
The LDO regulator provides the reference voltage for the
sensor and all other analog blocks within the system. The
nominal voltage reference for the sensor is 2.7 V ±5%. An
external capacitor is needed on the VREF pin to guarantee
stability of the regulator.
Differential Amplifiers
The two differential amplifiers can be configured as a
bandpass filter to condition the PIR sensor signal for the post
digital signal processing. The cutoff frequencies and
passband gain are set by the external components. See
Figure 5.
80
70
60
50
40
30
20
−1
10
0
10
1
10
Figure 3. Plot Showing Typical Magnitude Response
of Differential Amplifiers When Configured as a
Bandpass Filter
Window Comparator
The window comparator compares the voltage from the
second dif ferential amplifier to two reference voltages from
the LDO regulator. COMP_P triggers if OP2_O is greater
than the Vh voltage and COMP_N triggers if OP2_O is
lower than the Vl voltage. See Figures 4 and 5.
OP2_O
Vh
Vm
Vl
Vdd
Comp_P
Vss
Vdd
Comp_N
Vss
Figure 4. Plot Showing Functionality of Window Comparator for an Analog Input OP2_O
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4
Page 5
VREF
D
G
Sensor dependent
components
Figure 5. Figure Showing Simplified Block Diagram of Analog Conditioning Stages
NCS36000
VREF 6
1
Vh
OP2_O
Vl
LDO6
5
+
4
−
Application dependent
components
Vm
+
23
−
−
Comp_P
+
−
Comp_N
+
Vh
Vm
Vl
Digital Signal Processing Block (all times assume a
62.5 Hz system oscillator frequency)
The digital signaling processing block performs three
major functions.
The first function is that the device toggles LED during the
start−up sequencing at approximately two hertz regardless
of the state of the XLED_EN pin. The startup sequence lasts
for thirty seconds. During that time the OUT pin is held low
regardless of the state of OP2_O.
The second function of the digital signal processing block
is to insure a certain glitch width is seen before OUT is
toggled. The digital signal processing block is synchronous
with the system oscillator frequency and therefore the
deglitch time is related to when the comparators toggle
within the oscillator period. A signal width less than two
clock period is guaranteed to be deglitched as a zero. A
signal width of greater than three clock cycles is guaranteed
to be de−glitched. It should be noted that down−sampling
can occur if sufficient anti−aliasing is not performed at the
input of the circuit (OPI_P) or if noise is injected into the
amplifiers, an example would be a noisy power supply.
T
V
H
OP 2_O
= 2,5V
SP
< 3T
CLK
T
> 3T
SP
CLK
The third function of the digital signal processing block is
to recognize different pulse signatures coming from the
window comparator block. The device is equipped with two
pulse recognition routines. Single pulse mode (MODE tied
to VSS) will trigger the OUT pin if either comparator toggles
and the deglitch time is of the appropriate length. (See
Figure 6). Dual pulse mode (MODE tied to V
) requires
DD
two pulses with each pulse coming from the opposite
comparator to occur within a timeout window of five
seconds or 312 clock cycles (See Figure 7). If the adjacent
pulses occur outside the timeout window then the digital
processing block will restart the pulse recognition routine.
xLED_EN Pin
The xLED_EN pin enables the LED output driver when
motion has been detected. If xLED_EN is tied high the LED
pin will not toggle after motion is detected. If the xLED_EN
is tied low the LED pin will toggle when motion is detected.
During start-up the LED pin will toggle irrespective of how
the xLED_EN pin is tied. (See Figure 6).
V
M
V
L
= 2,1V
= 1,7V
OUT
4T
CLK
120 T
CLK
Figure 6. Timing Diagram for Single−Pulse Mode Detection
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5
Page 6
NCS36000
C2
C1
R1
V
H
V
M
V
L
OP 2_O
= 2,5V
= 2,1V
= 1,7V
OUT
C3
R2
C6
R3
< 3T
T
SP
CLK
> 3T
T
SP
CLK
TDP< 360 T
CLK
T
3T
SP
1T
> 3T
CLK
CLK
CLK
Figure 7. Timing Diagram for Dual−Pulse Mode Detection
Power Supply /
OP2_O
OP2_N
OP1_O
OP1_N
OP1_P
VREF
VSS
AC to DC Rectifier
VDD
OSC
MODE
nc
xLED_EN
LED
OUT
14
13
12
11
10
9
8
C4
R4
D
G
R5
1
2
3
4
5
6
7
C5
120 T
CLK
J1
R6
D1
R7
C7
J2
Microcontroller
Sensor dependent
components
Figure 8. Typical Application Diagram Using NCS36000
R1 = 10 kWC1 = 33 mF
R2 = 560 kW
C2 = 10 nFJ2 (Jumper for Mode Select)
R3 = 10 kWC3 = 33 mF
R4 = 560 kW
R5 = 43 kW
R6 = 1 kW
R7 = 220 kW
C4 = 10 nF
C5 = 100 nF
C6 = 100 nF
C7 = 100 nF
9. R1, C1, R2, C2, R3, C3, R4, C4 setup bandpass filter characteristics. With components as shown above the passband gain is approximately
70 dB with the 3 dB cutoff frequency of the filter at approximately 700 mHz and 20 Hz.
10.R4 can be replaced by a potentiometer to adjust sensitivity of system. Note dynamically changing R4 will also change the pole location for
the second amplifier.
11.R5 and C5 are sensor dependant components and R6 may need to be adjusted to guarantee the AMP 1 IN parameter outlined within the
Operating Ranges section of this document.
12.R7 and C7 may be adjusted to change the oscillator frequency. R7 may not be smaller than 50 kW.
J1 (Jumper for xLED_EN)
D1 (LED)
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6
Page 7
NCS36000
ORDERING INFORMATION
DevicePackageShipping
NCS36000DGSOIC−14
(Pb−Free)
†
55 Units / Rail
NCS36000DRGSOIC−14
(Pb−Free)
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
3000 / Tape & Reel
www.onsemi.com
7
Page 8
−T−
P
al
SEATING
PLANE
NCS36000
PACKAGE DIMENSIONS
SOIC−14
D SUFFIX
CASE 751A−03
−A−
14
8
−B−
P
7 PL
0.25 (0.010)B
1
7
G
C
D 14 PL
0.25 (0.010)A
K
M
S
B
T
S
ISSUE J
M
M
X 45
R
_
M
J
SOLDERING FOOTPRINT*
7X
7.04
1.52
1
14X
0.58
14X
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS A AND B DO NOT INCLUDE
MOLD PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
PER SIDE.
5. DIMENSION D DOES NOT INCLUDE
DAMBAR PROTRUSION. ALLOWABLE
DAMBAR PROTRUSION SHALL BE 0.127
(0.005) TOTAL IN EXCESS OF THE D
DIMENSION AT MAXIMUM MATERIAL
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC owns the rights to a number of patents, trademarks,
copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. SCILLC
reserves the right to m ake c hanges w ithout f urt her n otice t o a ny p roducts h erein. SCILLC makes no warranty, representation or guarantee regarding the s uitability o f i ts p roducts f or a ny
particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without
limitation special, consequent ial o r i ncidental d amages. “ Typical” parameters which m ay b e p rovided i n S CILLC d at a s heets and/or specifications can a nd d o v ary i n d iff erent applications
and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC
does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for
surgical implant into t he b ody, or other a pplications i ntended t o s upport or sustain life, or f or a ny o ther a pplication i n w hich the failure of the SCILLC p roduct c ould creat e a s ituat ion w here
personal injury or death may occur. S hould B uyer p urchase o r u se S CILLC p r oduct s for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and
its officers, e mployees, s ubsidiaries, a ffiliat es, a nd d istributor s h arm less a gainst a ll c laims, c osts, d amages, a nd e xpenses, and r easonable a ttorney f ees a rising o ut o f, d irectly o r i ndirectly,
any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim a lleges t hat SCILLC was negligent regarding the design or manufacture
of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
UBLICATION ORDERING INFORMATION
LITERATURE FULFILLMENT:
Literature Distribution Center for ON Semiconductor
P.O. Box 5163, Denver, Colorado 80217 USA
Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada
Fax: 303−675−2176 or 800−344−3867Toll Free USA/Canada
Email: orderlit@onsemi.com
N. American Technical Support: 800−282−9855 Toll Free
USA/Canada
Europe, Middle East and Africa Technical Support:
Phone: 421 33 790 2910
Japan Customer Focus Center
Phone: 81−3−5817−1050
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ON Semiconductor Website: www.onsemi.com
Order Literature: http://www.onsemi.com/orderlit
For additional information, please contact your loc
Sales Representative
NCS36000/D
8
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