ON Semiconductor MJ21195, MJ21195G, MJ21196, MJ21196G Service Manual

MJ21195 − PNP MJ21196 − NPN
Preferred Devices
Silicon Power Transistors
Features
Total Harmonic Distortion Characterized
High DC Current Gain − h
Excellent Gain Linearity
High SOA: 3 A, 80 V, 1 Sec
Pb−Free Packages are Available*
MAXIMUM RATINGS
Rating Symbol Value Unit
Collector−Emitter Voltage V Collector−Base Voltage V Emitter−Base Voltage V Collector−Emitter Voltage − 1. 5V V Collector Current − Continuous
− Peak (Note 1) Base Current − Continuous I Total Device Dissipation @ TC = 25_C
Derate above 25_C
Operating and Storage Junction Temperature Range
THERMAL CHARACTERISTICS
Characteristics Symbol Max Unit
Thermal Resistance, Junction−to−Case
Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit values (not normal operating conditions) and are not valid simultaneously . If these limits are exceeded, device functional operation is not implied, damage may occur and reliability may be affected.
1. Pulse Test: Pulse Width = 5 ms, Duty Cycle ≤10%.
= 25 Min @ IC = 8 Adc
FE
CEO CBO EBO CEX
I
C
B
P
D
TJ, T
stg
R
q
JC
250 Vdc 400 Vdc
5 Vdc
400 Vdc
16 30
5 Adc
250
1.43
−65 to +200
0.7
Adc
W
W/_C
_C
_C/W
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16 AMPERES
COMPLEMENTARY SILICON-
POWER TRANSISTORS 250 VOLTS, 250 WATTS
TO−204AA (TO−3)
CASE 1−07
MARKING DIAGRAM
MJ2119xG
AYWW
MEX
MJ2119x = Device Code
x = 5 or 6 G = Pb−Free Package A = Assembly Location Y = Year WW = Work Week MEX = Country of Origin
*For additional information on our Pb−Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.
© Semiconductor Components Industries, LLC, 2006
February, 2006 − Rev. 4
1 Publication Order Number:
ORDERING INFORMATION
Device Package Shipping
MJ21195 TO−204 100 Units / Tray MJ21195G TO−204
MJ21196 TO−204 100 Units / Tray MJ21196G TO−204
Preferred devices are recommended choices for future use and best overall value.
(Pb−Free)
(Pb−Free)
100 Units / Tray
100 Units / Tray
MJ21195/D
MJ21195 − PNP MJ21196 − NPN
ELECTRICAL CHARACTERISTICS (T
= 25°C ± 5°C unless otherwise noted)
C
Characteristic
OFF CHARACTERISTICS
Collector−Emitter Sustaining Voltage
(I
= 100 mAdc, IB = 0)
C
Collector Cutoff Current
= 200 Vdc, IB = 0)
(V
CE
Emitter Cutoff Current
(V
= 5 Vdc, IC = 0)
CE
Collector Cutoff Current
(V
= 250 Vdc, V
CE
BE(off)
= 1.5 Vdc)
SECOND BREAKDOWN
Second Breakdown Collector Current with Base Forward Biased
(V
= 50 Vdc, t = 1 s (non−repetitive)
CE
= 80 Vdc, t = 1 s (non−repetitive)
(V
CE
ON CHARACTERISTICS
DC Current Gain
(I
= 8 Adc, VCE = 5 Vdc)
C
= 16 Adc, VCE = 5 Vdc)
(I
C
Base−Emitter On Voltage
(I
= 8 Adc, VCE = 5 Vdc)
C
Collector−Emitter Saturation Voltage
(I
= 8 Adc, IB = 0.8 Adc)
C
= 16 Adc, IB = 3.2 Adc)
(I
C
DYNAMIC CHARACTERISTICS
Total Harmonic Distortion at the Output
V
= 28.3 V, f = 1 kHz, P
RMS
LOAD
= 100 W
RMS
h
FE
unmatched
(Matched pair h
= 50 @ 5 A/5 V) h
FE
FE
matched
Current Gain Bandwidth Product
(I
= 1 Adc, VCE = 10 Vdc, f
C
= 1 MHz)
test
Output Capacitance
(V
= 10 Vdc, IE = 0, f
CB
= 1 MHz)
test
2. Pulse Test: Pulse Width = 300 ms, Duty Cycle ≤2%
Symbol Min Typical Max Unit
V
CEO(sus)
I
CEO
I
EBO
I
CEX
I
S/b
h
FE
V
BE(on)
V
CE(sat)
T
HD
f
C
T
ob
250 Vdc
100
100
100
mAdc
mAdc
mAdc
Adc
5
2.5
75
25
8
2.2 Vdc
Vdc
0.8
0.08
1.4 4
4 MHz
500 pF
%
PNP MJ21195
6.5
6.0
5.5
5.0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
T
f, CURRENT BANDWIDTH PRODUCT (MHz)
0
0.1 1.0 10
TJ = 25°C f
= 1 MHz
test
VCE = 10 V
5 V
IC, COLLECTOR CURRENT (AMPS)
7.5
7.0
6.5
6.0
5.5
5.0
4.5
4.0
3.5
3.0
2.5 TJ = 25°C
2.0 f
= 1 MHz
test
1.5
T
f, CURRENT BANDWIDTH PRODUCT (MHz)
1.0
0.1 1.0 10
NPN MJ21196
10 V
VCE = 5 V
IC, COLLECTOR CURRENT (AMPS)
Figure 1. Typical Current Gain Bandwidth Product Figure 2. Typical Current Gain Bandwidth Product
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2
1000
MJ21195 − PNP MJ21196 − NPN
TYPICAL CHARACTERISTICS
PNP MJ21195 NPN MJ21196
1000
, DC CURRENT GAIN
FE
h
1000
, DC CURRENT GAIN
FE
h
100
100
10
10
VCE = 20 V
TJ = 100°C 25°C
−25 °C
IC, COLLECTOR CURRENT (AMPS)
100
, DC CURRENT GAIN
FE
h
VCE = 20 V
100101.00.1
10
TJ = 100°C 25°C
−25 °C
, COLLECTOR CURRENT (AMPS)
I
C
Figure 3. DC Current Gain, VCE = 20 V Figure 4. DC Current Gain, VCE = 20 V
VCE = 5 V
PNP MJ21195
TJ = 100°C 25°C
−25 °C
I
, COLLECTOR CURRENT (AMPS)
C
1000
100
, DC CURRENT GAIN
FE
h
VCE = 5 V
100101.00.1
10
NPN MJ21196
TJ = 100°C
25°C
−25 °C
IC, COLLECTOR CURRENT (AMPS)
Figure 5. DC Current Gain, VCE = 5 V Figure 6. DC Current Gain, VCE = 5 V
100101.00.1
100101.00.1
, COLLECTOR CURRENT (A)
C
I
PNP MJ21195
30
25
20
15
10
5.0
0
5.0010152025 , COLLECTOR−EMITTER VOLTAGE (VOLTS)
V
CE
Figure 7. Typical Output Characteristics
IB = 2 A
1.5 A
1 A
0.5 A
TJ = 25°C
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NPN MJ21196
, COLLECTOR CURRENT (A) I
30
25
20
15
10
C
5.0
0
5.0010152025
VCE, COLLECTOR−EMITTER VOLTAGE (VOLTS)
IB = 2 A
1.5 A
1 A
0.5 A
TJ = 25°C
Figure 8. Typical Output Characteristics
3
TYPICAL CHARACTERISTICS
3.0
2.5
2.0
TJ = 25°C I
= 10
C/IB
MJ21195 − PNP MJ21196 − NPN
PNP MJ21195 NPN MJ21196
1.6 TJ = 25°C
1.4
1.2
1.0
I
C/IB
= 10
V
BE(sat)
SATURATION VOLTAGE (VOLTS)
, BASE−EMITTER VOLTAGE (VOLTS)
BE(on)
V
1.5
1.0
0.5
1.0
0.1
0.8
V
BE(sat)
V
CE(sat)
0
IC, COLLECTOR CURRENT (AMPS)
100101.00.1
Figure 9. Typical Saturation Voltages
SATURATION VOLTAGE (VOLTS)
0.6
0.4
0.2
0
IC, COLLECTOR CURRENT (AMPS)
Figure 10. Typical Saturation Voltages
V
CE(sat)
100101.00.1
PNP MJ21195 NPN MJ21196
10
TJ = 25°C
VCE = 5 V (DASHED)
IC, COLLECTOR CURRENT (AMPS)
VCE = 20 V (SOLID)
100101.00.1
, BASE−EMITTER VOLTAGE (VOLTS)
BE(on)
V
1.0
0.1
10
TJ = 25°C
VCE = 5 V (DASHED)
VCE = 20 V (SOLID)
100101.00.1
IC, COLLECTOR CURRENT (AMPS)
100
, COLLECTOR CURRENT (AMPS)
C
I
Figure 11. Typical Base−Emitter Voltage
10 ms
10
1 sec
250 ms
1.0
0.1
VCE, COLLECTOR−EMITTER VOLTAGE (VOLTS)
50 ms
100101.0 1000
Figure 13. Active Region Safe Operating Area
ability of a transistor; average junction temperature and secondary breakdown. Safe operating area curves indicate I observed for reliable operation; i.e., the transistor must not be subjected to greater dissipation than the curves indicate.
T temperatures, thermal limitations will reduce the power than can be handled to values less than the limitations imposed by second breakdown.
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4
Figure 12. T ypical Base−Emitter Voltage
There are two limitations on the power handling
− VCE limits of the transistor that must be
C
The data of Figure 13 is based on T
is variable depending on conditions. At high case
C
J(pk)
= 200°C;
MJ21195 − PNP MJ21196 − NPN
10000
1000
C, CAPACITANCE (pF)
100
C
ib
C
ob
TJ = 25°C f
= 1 MHz
test
VR, REVERSE VOLTAGE (VOLTS)
Figure 14. MJ21195 Typical Capacitance
1.2
1.1
1.0
0.9
100101.00.1
10000
1000
C, CAPACITANCE (pF)
100
C
ib
TJ = 25°C f
= 1 MHz
test
VR, REVERSE VOLTAGE (VOLTS)
C
ob
Figure 15. MJ21196 Typical Capacitance
100101.00.1
0.8
, TOTAL HARMONIC
DISTORTION (%)
HD
T
0.7
0.6
Figure 16. Typical Total Harmonic Distortion
AUDIO PRECISION MODEL ONE PLUS TOTAL HARMONIC
DISTORTION
ANALYZER
FREQUENCY (Hz)
SOURCE
AMPLIFIER
50 W
10000010000100010010
+50 V
DUT
DUT
0.5 W
0.5 W
8.0 W
−50 V
Figure 17. Total Harmonic Distortion Test Circuit
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5
MJ21195 − PNP MJ21196 − NPN
PACKAGE DIMENSIONS
TO−204 (TO−3)
CASE 1−07
ISSUE Z
A
N
C
E
D
2 PL
0.13 (0.005) Y
U
V
H
L
2
1
G
−T−
K
M
−Y−
B
T
SEATING PLANE
M
Q
M
−Q−
0.13 (0.005) T
M
M
Y
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. ALL RULES AND NOTES ASSOCIATED WITH REFERENCED TO−204AA OUTLINE SHALL APPLY.
DIM MIN MAX MIN MAX
A 1.550 REF 39.37 REF B −−− 1.050 −−− 26.67 C 0.250 0.335 6.35 8.51 D 0.038 0.043 0.97 1.09 E 0.055 0.070 1.40 1.77 G 0.430 BSC 10.92 BSC H 0.215 BSC 5.46 BSC K 0.440 0.480 11.18 12.19 L 0.665 BSC 16.89 BSC N −−− 0.830 −−− 21.08 Q 0.151 0.165 3.84 4.19 U 1.187 BSC 30.15 BSC V 0.131 0.188 3.33 4.77
MILLIMETERSINCHES
ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
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MJ21195/D
6
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