ON Semiconductor MC74HC273A Technical data
MC74HC273A
2
Octal D Flip−Flop with
Common Clock and Reset
High−Performance Silicon−Gate CMOS
The MC74HC273A is identical in pinout to the LS273. The device
inputs are compatible with standard CMOS outputs; with pullup
resistors, they are compatible with LSTTL outputs.
This device consists of eight D flip−flops with common Clock and
Reset inputs. Each flip−flop is loaded with a low−to−high transition of
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MARKING
DIAGRAMS
the Clock input. Reset is asynchronous and active low.
Features
0
• Output Drive Capability: 10 LSTTL Loads
• Outputs Directly Interface to CMOS, NMOS and TTL
• Operating Voltage Range: 2.0 to 6.0 V
• Low Input Current: 1.0 mA
• High Noise Immunity Characteristic of CMOS Devices
1
20
• In Compliance with the Requirements Defined by JEDEC Standard
No. 7A
1
PDIP−20
N SUFFIX
CASE 738
SOIC−20
DW SUFFIX
CASE 751D
• Chip Complexity: 264 FETs or 66 Equivalent Gates
20
MC74HC273AN
AWLYYWWG
1
20
74HC273A
AWLYYWWG
1
• Pb−Free Packages are Available*
20
20
TSSOP−20
DT SUFFIX
1
CASE 948E
1
HC
273A
ALYWG
G
*For additional information on our Pb−Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
© Semiconductor Components Industries, LLC, 2005
July, 2005 − Rev. 10
1 Publication Order Number:
20
20
1
See detailed ordering and shipping information in the package
dimensions section on page 2 of this data sheet.
SOEIAJ−20
F SUFFIX
CASE 967
A = Assembly Location
WL, L = Wafer Lot
YY, Y = Year
WW, W = Work Week
G = Pb−Free Package
G = Pb−Free Package
(Note: Microdot may be in either location)
ORDERING INFORMATION
74HC273A
AWLYWWG
1
MC74HC273A/D
MC74HC273A
PIN ASSIGNMENT
Î
Î
Î
LOGIC DIAGRAM
3
D0
4
D1
7
D2
DATA
INPUTS
Internal Gate Count*
Internal Gate Propagation Delay
Internal Gate Power Dissipation
Speed Power Product
ООООООООО
*Equivalent to a two−input NAND gate.
8
D3
13
D4
14
D5
17
D6
18
D7
11
CLOCK
1
RESET
Design Criteria
2
Q0
5
Q1
6
Q2
9
Q3
12
Q4
15
Q5
16
Q6
19
Q7
PIN 20 = V
PIN 10 = GND
Value
66
1.5
5.0
.0075
ÎÎ
NONINVERTING
OUTPUTS
CC
Units
ea
ns
mW
pJ
Î
RESET
Q0
D0
D1
Q1 5
Q2
D2
D3
Q3
GND
1
2
3
4
6
7
8
9
10
20
V
CC
19
Q7
18
D7
17
D6
16
Q6
15
Q5
14
D5
13
D4
12
Q4
11
CLOCK
FUNCTION TABLE
Inputs Output
Reset Clock D Q
LXX L
HHH
HLL
H L X No Change
H X No Change
ORDERING INFORMATION
Device Package Shipping
MC74HC273AN PDIP−20 18 Units / Rail
MC74HC273ANG SOIC−20
18 Units / Rail
(Pb−Free)
MC74HC273ADW SOIC−20 WIDE 38 Units / Rail
MC74HC273ADWG SOIC−20 WIDE
38 Units / Rail
(Pb−Free)
MC74HC273ADWR2 SOIC−20 WIDE 1000 Tape & Reel
MC74HC273ADWR2G SOIC−20 WIDE
1000 Tape & Reel
(Pb−Free)
MC74HC273ADT TSSOP−20* 75 Units / Rail
MC74HC273ADTG TSSOP−20* 75 Units / Rail
MC74HC273ADTR2 TSSOP−20* 2500 Tape & Reel
MC74HC273ADTR2G TSSOP−20* 2500 Tape & Reel
MC74HC273AF SOEIAJ−20 40 Units / Rail
MC74HC273AFG SOEIAJ−20
40 Units / Rail
(Pb−Free)
MC74HC273AFEL SOEIAJ−20 2000 Tape & Reel
MC74HC273AFELG SOEIAJ−20
2000 Tape & Reel
(Pb−Free)
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
*This package is inherently Pb−Free.
†
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2
MC74HC273A
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
ÎÎ
Î
Î
Î
Î
Î
Î
ÎÎ
ÎÎ
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
ÎÎ
ÎÎ
ÎÎ
Î
Î
Î
Î
Î
Î
ÎÎ
ÎÎ
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
ÎÎ
ÎÎ
ÎÎ
ÎÎ
ÎÎ
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
ÎÎ
ÎÎ
ÎÎ
ÎÎ
Î
Î
Î
Î
MAXIMUM RATINGS
Symbol
V
V
ÎÎ
ÎÎ
DC Supply Voltage (Referenced to GND)
CC
V
DC Input Voltage (Referenced to GND)
in
DC Output Voltage (Referenced to GND)
out
I
DC Input Current, per Pin
in
I
DC Output Current, per Pin
out
I
DC Supply Current, VCC and GND Pins
CC
P
Power Dissipation in Still Air, Plastic DIP†
D
ОООООООООООО
T
Storage Temperature
stg
T
Lead Temperature, 1 mm from Case for 10 Seconds
L
ОООООООООООО
Maximum ratings are those values beyond which device damage can occur. Maximum ratings
applied to the device are individual stress limit values (not normal operating conditions) and are
not valid simultaneously. If these limits are exceeded, device functional operation is not implied,
damage may occur and reliability may be affected.
†Derating — Plastic DIP: – 10 mW/_C from 65_ to 125_C
SOIC Package: – 7 mW/_C from 65_ to 125_C
TSSOP Package: − 6.1 mW/_C from 65_ to 125_C
For high frequency or heavy load considerations, see Chapter 2 of the ON Semiconductor High−Speed CMOS Data Book (DL129/D).
Parameter
SOIC Package†
TSSOP Package†
Plastic DIP, SOIC or TSSOP Package
Value
– 0.5 to + 7.0
– 0.5 to VCC + 0.5
– 0.5 to VCC + 0.5
± 20
± 25
± 50
750
500
ÎÎÎ
450
– 65 to + 150
260
ÎÎÎ
Unit
mA
mA
mA
mW
Î
Î
_C
_C
This device contains protection
V
V
V
circuitry to guard against damage
due to high static voltages or electric
fields. However, precautions must
be taken to avoid applications of any
voltage higher than maximum rated
voltages to this high−impedance circuit. For proper operation, Vin and
V
should be constrained to the
out
range GND v (Vin or V
) v VCC.
out
Unused inputs must always be
tied to an appropriate logic voltage
level (e.g., either GND or VCC).
Unused outputs must be left open.
RECOMMENDED OPERATING CONDITIONS
Symbol
V
CC
Vin, V
T
A
tr, t
f
ÎÎ
ÎÎ
DC Supply Voltage (Referenced to GND)
DC Input Voltage, Output Voltage (Referenced to GND)
out
Operating Temperature, All Package Types
Input Rise and Fall Time VCC = 2.0 V
ОООООООООООО
(Figure 1) VCC = 4.5 V
ОООООООООООО
Parameter
VCC = 6.0 V
DC ELECTRICAL CHARACTERISTICS (Voltages Referenced to GND)
ÎÎ
Symbol
V
ÎÎ
ÎÎ
V
ÎÎ
V
OH
ÎÎ
ÎÎ
ÎÎ
ÎÎ
V
OL
ÎÎ
ÎÎ
ÎÎ
ОООООООО
Minimum High−Level Input Voltage
IH
ОООООООО
ОООООООО
Maximum Low−Level Input Voltage
IL
ОООООООО
Parameter
Minimum High−Level Output
ОООООООО
Voltage
ОООООООО
ОООООООО
ОООООООО
Maximum Low−Level Output
Voltage
ОООООООО
ОООООООО
ОООООООО
ООООООО
Test Conditions
V
= VCC – 0.1 V
out
|I
| v 20 mA
out
ООООООО
ООООООО
V
= 0.1 V
out
|I
| v 20 mA
out
ООООООО
Vin = V
IH
ООООООО
|I
| v 20 mA
out
Vin = V
IH
ООООООО
ООООООО
Vin = V
IL
|I
| v 20 mA
out
ООООООО
Vin = V
IL
ООООООО
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Min
2.0
0
– 55
0
0
0
|I
|I
|I
|I
|I
|I
3
out
out
out
out
out
out
Max
6.0
V
CC
+ 125
1000
ÎÎ
500
400
ÎÎ
| v 2.4 mA
| v 6.0 mA
| v 7.8 mA
| v 2.4 mA
| v 6.0 mA
| v 7.8 mA
Unit
V
V
_C
ns
Î
Î
V
Î
2.0
3.0
Î
4.5
6.0
Î
2.0
3.0
4.5
Î
6.0
2.0
Î
4.5
6.0
3.0
Î
4.5
6.0
Î
2.0
4.5
6.0
Î
3.0
4.5
Î
6.0
CC
V
Guaranteed Limit
– 55 to
ÎÎ
25_C
1.5
2.1
ÎÎ
3.15
4.2
ÎÎ
0.5
0.9
1.35
ÎÎ
1.8
1.9
ÎÎ
4.4
5.9
2.48
ÎÎ
3.98
5.48
ÎÎ
0.1
0.1
0.1
ÎÎ
0.26
0.26
ÎÎ
0.26
ÎÎ
v 85_C
1.5
2.1
ÎÎ
3.15
4.2
ÎÎ
0.5
0.9
1.35
ÎÎ
1.8
1.9
ÎÎ
4.4
5.9
2.34
ÎÎ
3.84
5.34
ÎÎ
0.1
0.1
0.1
ÎÎ
0.33
0.33
ÎÎ
0.33
ÎÎ
v 125_C
1.5
2.1
ÎÎ
3.15
4.2
ÎÎ
0.5
0.9
1.35
ÎÎ
1.8
1.9
ÎÎ
4.4
5.9
2.2
ÎÎ
3.7
5.2
ÎÎ
0.1
0.1
0.1
ÎÎ
0.4
0.4
ÎÎ
0.4
Unit
V
V
V
V
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