ON Semiconductor MC74HC04A Technical data

MC74HC04A

Hex Inverter

High−Performance Silicon−Gate CMOS

The MC74HC04A is identical in pinout to the LS04 and the
MC14069. The device inputs are compatible with Standard CMOS
outputs; with pullup resistors, they are compatible with LSTTL
outputs.

The device consists of six three−stage inverters.

Features

• Output Drive Capability: 10 LSTTL Loads

• Outputs Directly Interface to CMOS, NMOS and TTL

• Operating Voltage Range: 2.0 to 6.0 V

• Low Input Current: 1 A

• High Noise Immunity Characteristic of CMOS Devices

• In Compliance With the JEDEC Standard No. 7A Requirements

• Chip Complexity: 36 FETs or 9 Equivalent Gates

• Pb−Free Packages are Available*

LOGIC DIAGRAM

A2

A3

A4

1

3

5

9

2

Y1A1

4

Y2

6

Y3

Y = A

8

Y4

14

14

14

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PDIP−14

N SUFFIX

1

1

CASE 646

SOIC−14

D SUFFIX

CASE 751A

TSSOP−14
DT SUFFIX

CASE 948G

1

A = Assembly Location
WL or L = Wafer Lot
YY or Y = Year
WW or W = Work Week

MARKING

DIAGRAMS

14

MC74HC04AN

AWLYYWW

1

14

HC04A

AWLYWW

1

14

HC

04

ALYW

1

A5

A6

11

13

10

Y5

12

Y6

Pinout: 14−Lead Packages (Top View)

V

A6 Y6 A5 Y5 A4 Y4

CC

1314 12 11 10 9 8

21 34567

A1 Y1 A2 Y2 A3 Y3 GND

*For additional information on our Pb−Free strategy and soldering details, please

download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.

 Semiconductor Components Industries, LLC, 2005

May, 2005 − Rev. 10

1 Publication Order Number:

FUNCTION TABLE

Inputs Outputs

A

L

H

Y

H

L

ORDERING INFORMATION

See detailed ordering and shipping information in the package
dimensions section on page 2 of this data sheet.

MC74HC04A/D

MC74HC04A

ОООООООООООООООООООООО

ОООООООООООООООООООООО

ОООООООООООООООООООООО

ОООООООООООООООООООООО

ОООООООООООООООООООООО

ОООООООООООООООООООООО

Î

Î

ОООООООООООООООООООООО

Î

Î

Î

Î

Î

Î

Î

Î

ОООООООООООООООООООООО

Î

Î

Î

Î

ОООООООООООООООООООООО

ОООООООООООООООООООООО

ОООООООООООООООООООООО

ОООООООООООООООООООООО

Î

ОООООООООООООООООООООО

Î

Î

Î

Î

Î

†

MAXIMUM RATINGS

Symbol

V

CC

V

V

out

I

in

I

out

I

CC

P

ÎÎÎ

ÎÎÎ

T

stg

T

ÎÎÎ

DC Supply Voltage (Referenced to GND)
DC Input Voltage (Referenced to GND)

in

DC Output Voltage (Referenced to GND)
DC Input Current, per Pin
DC Output Current, per Pin
DC Supply Current, VCC and GND Pins
Power Dissipation in Still Air, Plastic DIP†

D

ОООООООООООООООООООО

ОООООООООООООООООООО

Storage Temperature
Lead Temperature, 1 mm from Case for 10 Seconds

L

ОООООООООООООООООООО

Plastic DIP, SOIC or TSSOP Package

Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit
values (not normal operating conditions) and are not valid simultaneously . If these limits are exceeded, device functional operation is not implied,
damage may occur and reliability may be affected.
*This device contains protection circuitry to guard against damage due to high static voltages or electric fields. However, precautions must be

taken to avoid applications of any voltage higher than maximum rated voltages to this high−impedance circuit. For proper operation, V
V

should be constrained to the range GND  (Vin or V

out

(e.g., either GND or V

†Derating − Plastic DIP: – 10 mW/C from 65 to 125C

). Unused outputs must be left open.

CC

SOIC Package: – 7 mW/C from 65 to 125C
TSSOP Package: − 6.1 mW/C from 65 to 125C

For high frequency or heavy load considerations, see Chapter 2 of the ON Semiconductor High−Speed CMOS Data Book (DL129/D).

Parameter

Value

– 0.5 to + 7.0
– 0.5 to VCC + 0.5
– 0.5 to VCC + 0.5

± 20
± 25
± 50

750

SOIC Package†

TSSOP Package†

ÎÎÎÎ

500
450

ÎÎÎÎ

– 65 to + 150

ÎÎÎÎ

260

)  VCC. Unused inputs must always be tied to an appropriate logic voltage level

out

Unit

mA
mA
mA

mW

Î

Î

C
C

Î

V
V
V

in

and

RECOMMENDED OPERATING CONDITIONS

Symbol

V

CC

Vin, V

out

T

A

tr, t

f

ÎÎÎ

DC Supply Voltage (Referenced to GND)
DC Input Voltage, Output Voltage (Referenced to GND)
Operating Temperature, All Package Types
Input Rise and Fall Time VCC = 2.0 V

(Figure 1) V

ОООООООООООООООООООО

Parameter

CC

V

CC

= 4.5 V
= 6.0 V

Min

2.0
0

– 55

0
0

Î

0

Max

6.0

V

CC

+ 125

1000

500

ÎÎ

400

Unit

V
V

C

ns

Î

ORDERING INFORMATION

Device Order Number Package Shipping

MC74HC04AN PDIP−14 2000 / Rail
MC74HC04ANG PDIP−14

(Pb−Free)
MC74HC04AD SOIC−14 55 / Rail
MC74HC04ADG SOIC−14

(Pb−Free)
MC74HC04ADR2 SOIC−14 2500 / Tape & Reel
MC74HC04ADR2G SOIC−14

(Pb−Free)
MC74HC04ADTR2 TSSOP−14* 2500 / Tape & Reel
MC74HC04AF SOEIAJ−14 50 / Rail
MC74HC04AFG SOEIAJ−14

(Pb−Free)
MC74HC04AFEL SOEIAJ−14 2000 / Tape & Reel
MC74HC04AFELG SOEIAJ−14

(Pb−Free)

†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging

Specifications Brochure, BRD8011/D.

*This package is inherently Pb−Free.

2000 / Rail

55 / Rail

2500 / Tape & Reel

50 / Rail

2000 / Tape & Reel

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